GPIO Simulation Results

Sunday February 25 2024 20:02:21 UTC

GitHub Revision: 49a27e136c

Branch: os_regression

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 17821327886248910358472250431024817182401150698618588470408418907520000067582

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke gpio_smoke 1.560s 102.040us 50 50 100.00
gpio_smoke_no_pullup_pulldown 1.620s 196.609us 50 50 100.00
gpio_smoke_en_cdc_prim 1.550s 51.914us 50 50 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.580s 87.912us 50 50 100.00
V1 csr_hw_reset gpio_csr_hw_reset 0.700s 16.607us 5 5 100.00
V1 csr_rw gpio_csr_rw 0.640s 63.714us 20 20 100.00
V1 csr_bit_bash gpio_csr_bit_bash 2.460s 177.628us 5 5 100.00
V1 csr_aliasing gpio_csr_aliasing 0.790s 30.254us 5 5 100.00
V1 csr_mem_rw_with_rand_reset gpio_csr_mem_rw_with_rand_reset 1.650s 32.729us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr gpio_csr_rw 0.640s 63.714us 20 20 100.00
gpio_csr_aliasing 0.790s 30.254us 5 5 100.00
V1 TOTAL 255 255 100.00
V2 direct_and_masked_out gpio_random_dout_din 1.420s 286.834us 50 50 100.00
gpio_random_dout_din_no_pullup_pulldown 1.500s 71.986us 50 50 100.00
V2 out_in_regs_read_write gpio_dout_din_regs_random_rw 1.040s 270.861us 50 50 100.00
V2 gpio_interrupt_programming gpio_intr_rand_pgm 1.510s 101.554us 50 50 100.00
V2 random_interrupt_trigger gpio_rand_intr_trigger 3.760s 357.757us 50 50 100.00
V2 interrupt_and_noise_filter gpio_intr_with_filter_rand_intr_event 3.720s 186.428us 50 50 100.00
V2 noise_filter_stress gpio_filter_stress 30.040s 553.802us 50 50 100.00
V2 regs_long_reads_and_writes gpio_random_long_reg_writes_reg_reads 6.620s 2.226ms 50 50 100.00
V2 full_random gpio_full_random 1.100s 155.971us 50 50 100.00
V2 stress_all gpio_stress_all 4.055m 34.020ms 50 50 100.00
V2 alert_test gpio_alert_test 0.660s 13.685us 50 50 100.00
V2 intr_test gpio_intr_test 0.640s 18.964us 50 50 100.00
V2 tl_d_oob_addr_access gpio_tl_errors 3.150s 234.312us 20 20 100.00
V2 tl_d_illegal_access gpio_tl_errors 3.150s 234.312us 20 20 100.00
V2 tl_d_outstanding_access gpio_csr_rw 0.640s 63.714us 20 20 100.00
gpio_same_csr_outstanding 0.900s 19.513us 20 20 100.00
gpio_csr_aliasing 0.790s 30.254us 5 5 100.00
gpio_csr_hw_reset 0.700s 16.607us 5 5 100.00
V2 tl_d_partial_access gpio_csr_rw 0.640s 63.714us 20 20 100.00
gpio_same_csr_outstanding 0.900s 19.513us 20 20 100.00
gpio_csr_aliasing 0.790s 30.254us 5 5 100.00
gpio_csr_hw_reset 0.700s 16.607us 5 5 100.00
V2 TOTAL 640 640 100.00
V2S tl_intg_err gpio_tl_intg_err 1.420s 129.239us 20 20 100.00
gpio_sec_cm 0.960s 97.972us 5 5 100.00
V2S sec_cm_bus_integrity gpio_tl_intg_err 1.420s 129.239us 20 20 100.00
V2S TOTAL 25 25 100.00
V3 stress_all_with_rand_reset gpio_stress_all_with_rand_reset 37.535m 145.820ms 15 50 30.00
V3 TOTAL 15 50 30.00
TOTAL 935 970 96.39

Testplan Progress

Items Total Written Passing Progress
V1 9 9 9 100.00
V2 14 14 14 100.00
V2S 2 2 2 100.00
V3 1 1 0 0.00

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
99.63 99.06 99.24 100.00 -- 99.80 99.68 99.99

Failure Buckets

Past Results