GPIO Simulation Results

Sunday February 04 2024 20:02:57 UTC

GitHub Revision: 0dd29ab736

Branch: os_regression

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 76373007482531906509957308269646114477602578576554530782790132514100107307713

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke gpio_smoke 1.350s 133.947us 50 50 100.00
gpio_smoke_no_pullup_pulldown 1.560s 307.763us 50 50 100.00
gpio_smoke_en_cdc_prim 1.780s 306.887us 50 50 100.00
gpio_smoke_no_pullup_pulldown_en_cdc_prim 1.790s 198.970us 50 50 100.00
V1 csr_hw_reset gpio_csr_hw_reset 0.650s 165.036us 5 5 100.00
V1 csr_rw gpio_csr_rw 0.660s 36.023us 20 20 100.00
V1 csr_bit_bash gpio_csr_bit_bash 3.310s 253.529us 5 5 100.00
V1 csr_aliasing gpio_csr_aliasing 0.850s 37.470us 5 5 100.00
V1 csr_mem_rw_with_rand_reset gpio_csr_mem_rw_with_rand_reset 1.320s 46.503us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr gpio_csr_rw 0.660s 36.023us 20 20 100.00
gpio_csr_aliasing 0.850s 37.470us 5 5 100.00
V1 TOTAL 255 255 100.00
V2 direct_and_masked_out gpio_random_dout_din 1.330s 210.122us 50 50 100.00
gpio_random_dout_din_no_pullup_pulldown 1.340s 69.411us 50 50 100.00
V2 out_in_regs_read_write gpio_dout_din_regs_random_rw 1.000s 57.256us 50 50 100.00
V2 gpio_interrupt_programming gpio_intr_rand_pgm 1.450s 206.788us 50 50 100.00
V2 random_interrupt_trigger gpio_rand_intr_trigger 3.720s 226.763us 50 50 100.00
V2 interrupt_and_noise_filter gpio_intr_with_filter_rand_intr_event 3.790s 94.574us 50 50 100.00
V2 noise_filter_stress gpio_filter_stress 28.920s 6.620ms 50 50 100.00
V2 regs_long_reads_and_writes gpio_random_long_reg_writes_reg_reads 6.290s 1.842ms 50 50 100.00
V2 full_random gpio_full_random 1.210s 309.687us 50 50 100.00
V2 stress_all gpio_stress_all 3.894m 183.675ms 50 50 100.00
V2 alert_test gpio_alert_test 0.650s 15.639us 50 50 100.00
V2 intr_test gpio_intr_test 0.670s 25.121us 50 50 100.00
V2 tl_d_oob_addr_access gpio_tl_errors 3.430s 319.717us 20 20 100.00
V2 tl_d_illegal_access gpio_tl_errors 3.430s 319.717us 20 20 100.00
V2 tl_d_outstanding_access gpio_csr_rw 0.660s 36.023us 20 20 100.00
gpio_same_csr_outstanding 0.890s 20.042us 20 20 100.00
gpio_csr_aliasing 0.850s 37.470us 5 5 100.00
gpio_csr_hw_reset 0.650s 165.036us 5 5 100.00
V2 tl_d_partial_access gpio_csr_rw 0.660s 36.023us 20 20 100.00
gpio_same_csr_outstanding 0.890s 20.042us 20 20 100.00
gpio_csr_aliasing 0.850s 37.470us 5 5 100.00
gpio_csr_hw_reset 0.650s 165.036us 5 5 100.00
V2 TOTAL 640 640 100.00
V2S tl_intg_err gpio_tl_intg_err 1.490s 221.019us 20 20 100.00
gpio_sec_cm 0.970s 436.188us 5 5 100.00
V2S sec_cm_bus_integrity gpio_tl_intg_err 1.490s 221.019us 20 20 100.00
V2S TOTAL 25 25 100.00
V3 stress_all_with_rand_reset gpio_stress_all_with_rand_reset 37.312m 905.903ms 50 50 100.00
V3 TOTAL 50 50 100.00
TOTAL 970 970 100.00

Testplan Progress

Items Total Written Passing Progress
V1 9 9 9 100.00
V2 14 14 14 100.00
V2S 2 2 2 100.00
V3 1 1 1 100.00

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
99.63 99.06 99.24 100.00 -- 99.80 99.68 100.00

Past Results