T405 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/7.i2c_host_stretch_timeout.763260005 |
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|
Aug 25 05:58:37 AM UTC 24 |
Aug 25 05:59:16 AM UTC 24 |
689302356 ps |
T406 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_fmt_empty.3294523549 |
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|
Aug 25 05:59:06 AM UTC 24 |
Aug 25 05:59:18 AM UTC 24 |
696934279 ps |
T256 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/6.i2c_target_stress_all.53256114 |
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|
Aug 25 05:58:15 AM UTC 24 |
Aug 25 05:59:18 AM UTC 24 |
29966215444 ps |
T407 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_host_smoke.879856509 |
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|
Aug 25 06:00:13 AM UTC 24 |
Aug 25 06:00:39 AM UTC 24 |
2499075380 ps |
T408 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_reset_rx.245109521 |
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|
Aug 25 05:59:07 AM UTC 24 |
Aug 25 05:59:23 AM UTC 24 |
304188966 ps |
T409 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_host_stretch_timeout.3819833884 |
|
|
Aug 25 05:59:10 AM UTC 24 |
Aug 25 05:59:24 AM UTC 24 |
3217004883 ps |
T410 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_target_stretch.475644824 |
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|
Aug 25 05:59:17 AM UTC 24 |
Aug 25 05:59:25 AM UTC 24 |
1072747309 ps |
T411 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_full.2322674873 |
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|
Aug 25 05:58:00 AM UTC 24 |
Aug 25 05:59:26 AM UTC 24 |
16115601419 ps |
T412 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_reset_acq.3289866343 |
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Aug 25 05:59:24 AM UTC 24 |
Aug 25 05:59:27 AM UTC 24 |
144338587 ps |
T413 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/2.i2c_host_fifo_watermark.3317524790 |
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|
Aug 25 05:55:21 AM UTC 24 |
Aug 25 05:59:27 AM UTC 24 |
6911506656 ps |
T414 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_reset_tx.3309435344 |
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|
Aug 25 05:59:24 AM UTC 24 |
Aug 25 05:59:27 AM UTC 24 |
507791280 ps |
T415 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_target_intr_smoke.3955051953 |
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|
Aug 25 05:59:18 AM UTC 24 |
Aug 25 05:59:28 AM UTC 24 |
3518971908 ps |
T416 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_target_timeout.4228632319 |
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|
Aug 25 05:59:19 AM UTC 24 |
Aug 25 05:59:30 AM UTC 24 |
10318139310 ps |
T417 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_target_intr_stress_wr.1659387446 |
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|
Aug 25 05:59:19 AM UTC 24 |
Aug 25 05:59:32 AM UTC 24 |
9037941922 ps |
T288 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_host_mode_toggle.1740562140 |
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|
Aug 25 05:59:29 AM UTC 24 |
Aug 25 05:59:33 AM UTC 24 |
130994944 ps |
T418 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_host_perf_precise.4176765714 |
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|
Aug 25 05:59:09 AM UTC 24 |
Aug 25 05:59:34 AM UTC 24 |
477756332 ps |
T419 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_target_perf.4259487782 |
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|
Aug 25 05:59:25 AM UTC 24 |
Aug 25 05:59:35 AM UTC 24 |
2536763708 ps |
T420 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_watermarks_tx.72413989 |
|
|
Aug 25 05:59:33 AM UTC 24 |
Aug 25 05:59:35 AM UTC 24 |
198350457 ps |
T421 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_target_stress_wr.2892029915 |
|
|
Aug 25 05:59:16 AM UTC 24 |
Aug 25 05:59:36 AM UTC 24 |
7920365837 ps |
T422 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_target_bad_addr.3210390064 |
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|
Aug 25 05:59:27 AM UTC 24 |
Aug 25 05:59:36 AM UTC 24 |
1732422941 ps |
T423 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_watermarks_acq.1970198157 |
|
|
Aug 25 05:59:32 AM UTC 24 |
Aug 25 05:59:38 AM UTC 24 |
502620338 ps |
T424 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_target_smbus_maxlen.2090510366 |
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|
Aug 25 05:59:35 AM UTC 24 |
Aug 25 05:59:40 AM UTC 24 |
460061930 ps |
T189 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_target_nack_txstretch.2924337117 |
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|
Aug 25 05:59:37 AM UTC 24 |
Aug 25 05:59:40 AM UTC 24 |
144946504 ps |
T425 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_alert_test.3156497745 |
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|
Aug 25 05:59:38 AM UTC 24 |
Aug 25 05:59:40 AM UTC 24 |
37908415 ps |
T426 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_host_override.2046502674 |
|
|
Aug 25 05:59:39 AM UTC 24 |
Aug 25 05:59:41 AM UTC 24 |
110145014 ps |
T427 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_target_tx_stretch_ctrl.275639479 |
|
|
Aug 25 05:59:34 AM UTC 24 |
Aug 25 05:59:42 AM UTC 24 |
157887475 ps |
T428 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_target_nack_acqfull_addr.279773947 |
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|
Aug 25 05:59:36 AM UTC 24 |
Aug 25 05:59:42 AM UTC 24 |
871321986 ps |
T429 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_overflow.2904545134 |
|
|
Aug 25 05:58:33 AM UTC 24 |
Aug 25 05:59:42 AM UTC 24 |
2126019611 ps |
T57 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/6.i2c_target_intr_stress_wr.236870858 |
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|
Aug 25 05:58:06 AM UTC 24 |
Aug 25 05:59:42 AM UTC 24 |
23551563039 ps |
T430 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_target_nack_acqfull.2808621283 |
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|
Aug 25 05:59:36 AM UTC 24 |
Aug 25 05:59:43 AM UTC 24 |
5450234229 ps |
T431 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_reset_fmt.3738217998 |
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|
Aug 25 05:59:41 AM UTC 24 |
Aug 25 05:59:44 AM UTC 24 |
266731176 ps |
T432 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_host_smoke.2784245116 |
|
|
Aug 25 05:59:04 AM UTC 24 |
Aug 25 05:59:45 AM UTC 24 |
14161223976 ps |
T226 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/5.i2c_target_stress_all.1605703443 |
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|
Aug 25 05:57:36 AM UTC 24 |
Aug 25 05:59:46 AM UTC 24 |
14232729465 ps |
T433 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_overflow.2231795568 |
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|
Aug 25 05:57:55 AM UTC 24 |
Aug 25 06:00:35 AM UTC 24 |
9690148101 ps |
T434 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_fmt_empty.3773746858 |
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|
Aug 25 05:59:41 AM UTC 24 |
Aug 25 05:59:47 AM UTC 24 |
611849343 ps |
T435 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_host_error_intr.2287627481 |
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|
Aug 25 05:59:43 AM UTC 24 |
Aug 25 05:59:51 AM UTC 24 |
684086244 ps |
T436 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_target_smoke.276423588 |
|
|
Aug 25 05:59:14 AM UTC 24 |
Aug 25 05:59:53 AM UTC 24 |
3984071394 ps |
T437 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_reset_rx.3494124475 |
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|
Aug 25 05:59:42 AM UTC 24 |
Aug 25 05:59:54 AM UTC 24 |
333366039 ps |
T438 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_host_may_nack.2998024522 |
|
|
Aug 25 05:59:31 AM UTC 24 |
Aug 25 05:59:55 AM UTC 24 |
1628956162 ps |
T439 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_target_stretch.1667161648 |
|
|
Aug 25 05:59:48 AM UTC 24 |
Aug 25 05:59:56 AM UTC 24 |
2093002546 ps |
T440 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_full.3101822786 |
|
|
Aug 25 05:58:34 AM UTC 24 |
Aug 25 05:59:58 AM UTC 24 |
1802352093 ps |
T441 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_target_intr_smoke.3863688945 |
|
|
Aug 25 06:00:31 AM UTC 24 |
Aug 25 06:00:44 AM UTC 24 |
15257282340 ps |
T442 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_reset_tx.2655786567 |
|
|
Aug 25 05:59:57 AM UTC 24 |
Aug 25 06:00:00 AM UTC 24 |
926489824 ps |
T443 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_reset_acq.3945393862 |
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|
Aug 25 05:59:56 AM UTC 24 |
Aug 25 06:00:00 AM UTC 24 |
1429823330 ps |
T444 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_target_stress_rd.2400753880 |
|
|
Aug 25 05:59:16 AM UTC 24 |
Aug 25 06:00:00 AM UTC 24 |
9190124072 ps |
T445 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_host_smoke.33123900 |
|
|
Aug 25 05:59:38 AM UTC 24 |
Aug 25 06:00:03 AM UTC 24 |
2251625212 ps |
T446 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_target_smoke.3094017631 |
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|
Aug 25 05:59:45 AM UTC 24 |
Aug 25 06:00:03 AM UTC 24 |
1495481693 ps |
T447 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_overflow.1243858333 |
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|
Aug 25 05:59:06 AM UTC 24 |
Aug 25 06:00:04 AM UTC 24 |
9338473329 ps |
T448 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_target_intr_smoke.2252647776 |
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|
Aug 25 05:59:52 AM UTC 24 |
Aug 25 06:00:05 AM UTC 24 |
1299554706 ps |
T449 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_target_timeout.400713351 |
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|
Aug 25 05:59:55 AM UTC 24 |
Aug 25 06:00:05 AM UTC 24 |
1893553355 ps |
T450 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_target_perf.975905325 |
|
|
Aug 25 05:59:59 AM UTC 24 |
Aug 25 06:00:07 AM UTC 24 |
510379289 ps |
T451 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_target_intr_stress_wr.2461271593 |
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|
Aug 25 05:59:54 AM UTC 24 |
Aug 25 06:00:10 AM UTC 24 |
12637318381 ps |
T117 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_watermark.1283842873 |
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|
Aug 25 05:57:55 AM UTC 24 |
Aug 25 06:00:10 AM UTC 24 |
5000844073 ps |
T452 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/7.i2c_target_stress_rd.542007178 |
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|
Aug 25 05:58:44 AM UTC 24 |
Aug 25 06:00:11 AM UTC 24 |
5365404558 ps |
T453 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_watermarks_tx.2790504939 |
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|
Aug 25 06:00:09 AM UTC 24 |
Aug 25 06:00:12 AM UTC 24 |
118437892 ps |
T454 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_watermarks_acq.582271914 |
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|
Aug 25 06:00:09 AM UTC 24 |
Aug 25 06:00:12 AM UTC 24 |
160500058 ps |
T455 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/0.i2c_target_intr_stress_wr.2909696949 |
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|
Aug 25 05:54:52 AM UTC 24 |
Aug 25 06:00:12 AM UTC 24 |
17613953831 ps |
T79 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_host_mode_toggle.1628981726 |
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|
Aug 25 06:00:09 AM UTC 24 |
Aug 25 06:00:13 AM UTC 24 |
127759095 ps |
T456 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_target_stress_rd.2650742976 |
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|
Aug 25 05:59:48 AM UTC 24 |
Aug 25 06:00:13 AM UTC 24 |
1882499778 ps |
T457 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_target_smbus_maxlen.3661360588 |
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|
Aug 25 06:00:09 AM UTC 24 |
Aug 25 06:00:15 AM UTC 24 |
1109834339 ps |
T458 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_target_nack_txstretch.2334815500 |
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|
Aug 25 06:00:11 AM UTC 24 |
Aug 25 06:00:15 AM UTC 24 |
1989909902 ps |
T459 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_alert_test.1284065714 |
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|
Aug 25 06:00:13 AM UTC 24 |
Aug 25 06:00:15 AM UTC 24 |
38129667 ps |
T460 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_host_override.1091966529 |
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|
Aug 25 06:00:13 AM UTC 24 |
Aug 25 06:00:15 AM UTC 24 |
200210387 ps |
T461 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_target_nack_acqfull.90768120 |
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|
Aug 25 06:00:11 AM UTC 24 |
Aug 25 06:00:17 AM UTC 24 |
5542036051 ps |
T462 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_target_bad_addr.4141024467 |
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|
Aug 25 06:00:00 AM UTC 24 |
Aug 25 06:00:17 AM UTC 24 |
1305616699 ps |
T463 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_reset_fmt.3171284468 |
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|
Aug 25 06:00:16 AM UTC 24 |
Aug 25 06:00:18 AM UTC 24 |
341157350 ps |
T464 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_target_tx_stretch_ctrl.359948092 |
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|
Aug 25 06:00:09 AM UTC 24 |
Aug 25 06:00:18 AM UTC 24 |
207674321 ps |
T465 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_target_nack_acqfull_addr.2364902774 |
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|
Aug 25 06:00:11 AM UTC 24 |
Aug 25 06:00:18 AM UTC 24 |
1230515460 ps |
T466 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_host_error_intr.1985059285 |
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|
Aug 25 06:00:19 AM UTC 24 |
Aug 25 06:00:23 AM UTC 24 |
175042608 ps |
T467 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_reset_rx.60939993 |
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|
Aug 25 06:00:16 AM UTC 24 |
Aug 25 06:00:23 AM UTC 24 |
638424723 ps |
T279 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_host_may_nack.1469641726 |
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|
Aug 25 06:00:09 AM UTC 24 |
Aug 25 06:00:24 AM UTC 24 |
241102046 ps |
T468 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_host_stretch_timeout.1926913732 |
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|
Aug 25 05:59:43 AM UTC 24 |
Aug 25 06:00:32 AM UTC 24 |
818223036 ps |
T469 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_host_stretch_timeout.2985523350 |
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|
Aug 25 06:00:19 AM UTC 24 |
Aug 25 06:00:34 AM UTC 24 |
2513691876 ps |
T470 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_target_hrst.1809196865 |
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|
Aug 25 06:00:40 AM UTC 24 |
Aug 25 06:00:45 AM UTC 24 |
846943383 ps |
T314 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_fmt_empty.2377852394 |
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|
Aug 25 06:00:16 AM UTC 24 |
Aug 25 06:00:39 AM UTC 24 |
422085081 ps |
T471 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_reset_acq.37901135 |
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|
Aug 25 06:00:36 AM UTC 24 |
Aug 25 06:00:39 AM UTC 24 |
362040429 ps |
T472 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_reset_tx.1613301376 |
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|
Aug 25 06:00:39 AM UTC 24 |
Aug 25 06:00:42 AM UTC 24 |
225380590 ps |
T473 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_target_timeout.1976978529 |
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|
Aug 25 06:00:35 AM UTC 24 |
Aug 25 06:00:46 AM UTC 24 |
1255147448 ps |
T474 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_target_perf.443557878 |
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|
Aug 25 06:00:40 AM UTC 24 |
Aug 25 06:00:46 AM UTC 24 |
1646786500 ps |
T475 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_watermarks_tx.3052416479 |
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Aug 25 06:00:47 AM UTC 24 |
Aug 25 06:00:49 AM UTC 24 |
107737346 ps |
T476 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_target_tx_stretch_ctrl.1383197052 |
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Aug 25 06:00:47 AM UTC 24 |
Aug 25 06:00:50 AM UTC 24 |
51499522 ps |
T477 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_target_bad_addr.1089165433 |
|
|
Aug 25 06:00:40 AM UTC 24 |
Aug 25 06:00:50 AM UTC 24 |
702074606 ps |
T478 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_target_stress_rd.3875749109 |
|
|
Aug 25 06:00:25 AM UTC 24 |
Aug 25 06:00:50 AM UTC 24 |
2396890445 ps |
T251 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_host_perf_precise.1248047937 |
|
|
Aug 25 06:00:18 AM UTC 24 |
Aug 25 06:00:51 AM UTC 24 |
604777173 ps |
T479 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_watermarks_acq.54820537 |
|
|
Aug 25 06:00:46 AM UTC 24 |
Aug 25 06:00:51 AM UTC 24 |
889730926 ps |
T268 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_host_may_nack.171100393 |
|
|
Aug 25 06:00:45 AM UTC 24 |
Aug 25 06:00:53 AM UTC 24 |
446489899 ps |
T480 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_alert_test.2994559269 |
|
|
Aug 25 06:00:51 AM UTC 24 |
Aug 25 06:00:53 AM UTC 24 |
25981763 ps |
T481 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_target_smbus_maxlen.2962192420 |
|
|
Aug 25 06:00:49 AM UTC 24 |
Aug 25 06:00:54 AM UTC 24 |
1808168435 ps |
T482 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_host_override.3200362365 |
|
|
Aug 25 06:00:52 AM UTC 24 |
Aug 25 06:00:54 AM UTC 24 |
30554641 ps |
T483 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_host_perf.19986914 |
|
|
Aug 25 06:00:18 AM UTC 24 |
Aug 25 06:00:55 AM UTC 24 |
8027383272 ps |
T484 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_target_nack_txstretch.1458474130 |
|
|
Aug 25 06:00:51 AM UTC 24 |
Aug 25 06:00:55 AM UTC 24 |
150987818 ps |
T485 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_target_stress_all.1101726086 |
|
|
Aug 25 05:59:26 AM UTC 24 |
Aug 25 06:00:55 AM UTC 24 |
31729011054 ps |
T296 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_target_nack_acqfull.218994057 |
|
|
Aug 25 06:00:50 AM UTC 24 |
Aug 25 06:00:56 AM UTC 24 |
2029820636 ps |
T486 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_target_nack_acqfull_addr.1995925208 |
|
|
Aug 25 06:00:51 AM UTC 24 |
Aug 25 06:00:56 AM UTC 24 |
1824385497 ps |
T88 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_target_smoke.1588679381 |
|
|
Aug 25 06:00:20 AM UTC 24 |
Aug 25 06:00:56 AM UTC 24 |
1717360031 ps |
T258 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_reset_fmt.1973869557 |
|
|
Aug 25 06:00:55 AM UTC 24 |
Aug 25 06:00:57 AM UTC 24 |
83214824 ps |
T487 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/5.i2c_host_fifo_full.2978794500 |
|
|
Aug 25 05:57:14 AM UTC 24 |
Aug 25 06:00:59 AM UTC 24 |
5753667700 ps |
T488 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_host_error_intr.214191411 |
|
|
Aug 25 06:00:57 AM UTC 24 |
Aug 25 06:01:05 AM UTC 24 |
410060286 ps |
T489 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_reset_rx.679972574 |
|
|
Aug 25 06:00:56 AM UTC 24 |
Aug 25 06:01:08 AM UTC 24 |
513634167 ps |
T134 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/6.i2c_host_stress_all.4126415408 |
|
|
Aug 25 05:58:02 AM UTC 24 |
Aug 25 06:01:11 AM UTC 24 |
36484939379 ps |
T135 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_fmt_empty.3298364027 |
|
|
Aug 25 06:00:56 AM UTC 24 |
Aug 25 06:01:11 AM UTC 24 |
1132985685 ps |
T136 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_watermark.1575255404 |
|
|
Aug 25 05:59:40 AM UTC 24 |
Aug 25 06:01:12 AM UTC 24 |
6274563164 ps |
T137 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_host_perf_precise.3177327015 |
|
|
Aug 25 06:00:57 AM UTC 24 |
Aug 25 06:01:13 AM UTC 24 |
2784253482 ps |
T138 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_target_stress_wr.3605714236 |
|
|
Aug 25 06:01:05 AM UTC 24 |
Aug 25 06:01:17 AM UTC 24 |
8455590377 ps |
T139 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_target_intr_smoke.3959811238 |
|
|
Aug 25 06:01:12 AM UTC 24 |
Aug 25 06:01:18 AM UTC 24 |
1179134080 ps |
T140 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_overflow.1580885505 |
|
|
Aug 25 05:59:41 AM UTC 24 |
Aug 25 06:01:20 AM UTC 24 |
15331798726 ps |
T141 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_target_stress_rd.3735806390 |
|
|
Aug 25 06:01:08 AM UTC 24 |
Aug 25 06:01:21 AM UTC 24 |
1816022984 ps |
T142 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_reset_tx.2795419572 |
|
|
Aug 25 06:01:19 AM UTC 24 |
Aug 25 06:01:22 AM UTC 24 |
154563874 ps |
T143 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_reset_acq.497685957 |
|
|
Aug 25 06:01:19 AM UTC 24 |
Aug 25 06:01:22 AM UTC 24 |
345836839 ps |
T490 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_alert_test.736461333 |
|
|
Aug 25 06:02:19 AM UTC 24 |
Aug 25 06:02:21 AM UTC 24 |
18139837 ps |
T491 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_target_smoke.3218889930 |
|
|
Aug 25 06:00:59 AM UTC 24 |
Aug 25 06:01:23 AM UTC 24 |
1258906110 ps |
T492 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_full.2637585069 |
|
|
Aug 25 06:00:17 AM UTC 24 |
Aug 25 06:01:26 AM UTC 24 |
38437209884 ps |
T493 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_target_timeout.2804401040 |
|
|
Aug 25 06:01:14 AM UTC 24 |
Aug 25 06:01:29 AM UTC 24 |
1404946858 ps |
T494 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_watermarks_acq.2180433443 |
|
|
Aug 25 06:01:24 AM UTC 24 |
Aug 25 06:01:29 AM UTC 24 |
515361309 ps |
T495 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_target_perf.2511204741 |
|
|
Aug 25 06:01:21 AM UTC 24 |
Aug 25 06:01:30 AM UTC 24 |
587823017 ps |
T496 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_watermarks_tx.1353210637 |
|
|
Aug 25 06:01:28 AM UTC 24 |
Aug 25 06:01:31 AM UTC 24 |
163126515 ps |
T497 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_watermark.1895332014 |
|
|
Aug 25 05:59:06 AM UTC 24 |
Aug 25 06:01:31 AM UTC 24 |
4509937000 ps |
T498 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_host_perf.124702073 |
|
|
Aug 25 05:59:42 AM UTC 24 |
Aug 25 06:01:33 AM UTC 24 |
4967155106 ps |
T499 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_alert_test.737151945 |
|
|
Aug 25 06:01:32 AM UTC 24 |
Aug 25 06:01:34 AM UTC 24 |
37175325 ps |
T500 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_target_bad_addr.1893802583 |
|
|
Aug 25 06:01:22 AM UTC 24 |
Aug 25 06:01:35 AM UTC 24 |
5363425302 ps |
T501 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_host_smoke.3323567288 |
|
|
Aug 25 06:00:52 AM UTC 24 |
Aug 25 06:01:35 AM UTC 24 |
1546446380 ps |
T502 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_target_tx_stretch_ctrl.2940055455 |
|
|
Aug 25 06:01:28 AM UTC 24 |
Aug 25 06:01:35 AM UTC 24 |
224841932 ps |
T503 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_target_nack_txstretch.3064940092 |
|
|
Aug 25 06:01:32 AM UTC 24 |
Aug 25 06:01:36 AM UTC 24 |
443691139 ps |
T504 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_target_smbus_maxlen.2473783643 |
|
|
Aug 25 06:01:30 AM UTC 24 |
Aug 25 06:01:36 AM UTC 24 |
3071375795 ps |
T505 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_target_nack_acqfull.377384265 |
|
|
Aug 25 06:01:30 AM UTC 24 |
Aug 25 06:01:37 AM UTC 24 |
559613773 ps |
T506 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_target_nack_acqfull_addr.2644276672 |
|
|
Aug 25 06:01:31 AM UTC 24 |
Aug 25 06:01:37 AM UTC 24 |
1152293485 ps |
T507 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_host_stretch_timeout.2664349906 |
|
|
Aug 25 06:00:57 AM UTC 24 |
Aug 25 06:01:37 AM UTC 24 |
4899964627 ps |
T146 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_host_override.1728620252 |
|
|
Aug 25 06:01:35 AM UTC 24 |
Aug 25 06:01:38 AM UTC 24 |
178723709 ps |
T261 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_reset_fmt.3434826721 |
|
|
Aug 25 06:01:37 AM UTC 24 |
Aug 25 06:01:39 AM UTC 24 |
189343344 ps |
T297 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_target_stretch.1132711424 |
|
|
Aug 25 06:01:12 AM UTC 24 |
Aug 25 06:01:40 AM UTC 24 |
3152585695 ps |
T275 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_host_may_nack.3805306767 |
|
|
Aug 25 06:01:24 AM UTC 24 |
Aug 25 06:01:43 AM UTC 24 |
1533205826 ps |
T508 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_reset_rx.415961593 |
|
|
Aug 25 06:01:37 AM UTC 24 |
Aug 25 06:01:46 AM UTC 24 |
275514588 ps |
T509 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_target_stretch.3578845508 |
|
|
Aug 25 06:00:25 AM UTC 24 |
Aug 25 06:01:47 AM UTC 24 |
3081365938 ps |
T510 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_host_error_intr.3141606063 |
|
|
Aug 25 06:01:40 AM UTC 24 |
Aug 25 06:01:47 AM UTC 24 |
1049945906 ps |
T511 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/5.i2c_host_fifo_watermark.3088436485 |
|
|
Aug 25 05:57:10 AM UTC 24 |
Aug 25 06:01:48 AM UTC 24 |
16302297448 ps |
T512 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_fmt_empty.386328352 |
|
|
Aug 25 06:01:37 AM UTC 24 |
Aug 25 06:01:49 AM UTC 24 |
395772821 ps |
T513 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_watermark.2070974721 |
|
|
Aug 25 05:58:31 AM UTC 24 |
Aug 25 06:01:50 AM UTC 24 |
2891815436 ps |
T514 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_watermark.4200697549 |
|
|
Aug 25 06:00:15 AM UTC 24 |
Aug 25 06:01:53 AM UTC 24 |
5846645084 ps |
T515 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_host_stretch_timeout.2687208644 |
|
|
Aug 25 06:01:39 AM UTC 24 |
Aug 25 06:01:59 AM UTC 24 |
665507725 ps |
T516 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_reset_acq.132436337 |
|
|
Aug 25 06:01:58 AM UTC 24 |
Aug 25 06:02:00 AM UTC 24 |
128315886 ps |
T517 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_target_intr_smoke.969782718 |
|
|
Aug 25 06:01:49 AM UTC 24 |
Aug 25 06:02:00 AM UTC 24 |
1887350958 ps |
T518 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_reset_tx.1387046977 |
|
|
Aug 25 06:02:00 AM UTC 24 |
Aug 25 06:02:03 AM UTC 24 |
610083998 ps |
T519 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_target_timeout.3928060898 |
|
|
Aug 25 06:01:52 AM UTC 24 |
Aug 25 06:02:05 AM UTC 24 |
1227072555 ps |
T520 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_target_smoke.160549813 |
|
|
Aug 25 06:01:43 AM UTC 24 |
Aug 25 06:02:07 AM UTC 24 |
2531125684 ps |
T118 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_watermark.804538600 |
|
|
Aug 25 06:00:53 AM UTC 24 |
Aug 25 06:02:09 AM UTC 24 |
15679126773 ps |
T521 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_target_hrst.2750762653 |
|
|
Aug 25 06:02:06 AM UTC 24 |
Aug 25 06:02:11 AM UTC 24 |
379457738 ps |
T522 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_overflow.3619716689 |
|
|
Aug 25 06:00:55 AM UTC 24 |
Aug 25 06:02:11 AM UTC 24 |
4601675235 ps |
T523 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_target_perf.251329782 |
|
|
Aug 25 06:02:01 AM UTC 24 |
Aug 25 06:02:12 AM UTC 24 |
3987954191 ps |
T524 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_target_bad_addr.2456740949 |
|
|
Aug 25 06:02:04 AM UTC 24 |
Aug 25 06:02:12 AM UTC 24 |
1517349600 ps |
T525 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_watermarks_tx.693779648 |
|
|
Aug 25 06:02:11 AM UTC 24 |
Aug 25 06:02:14 AM UTC 24 |
277077988 ps |
T526 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_target_smbus_maxlen.2178292946 |
|
|
Aug 25 06:02:13 AM UTC 24 |
Aug 25 06:02:17 AM UTC 24 |
1189507877 ps |
T527 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_host_may_nack.1018016564 |
|
|
Aug 25 06:02:09 AM UTC 24 |
Aug 25 06:02:17 AM UTC 24 |
553464879 ps |
T528 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_watermarks_acq.17724689 |
|
|
Aug 25 06:02:11 AM UTC 24 |
Aug 25 06:02:18 AM UTC 24 |
8058766885 ps |
T529 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_target_tx_stretch_ctrl.3394301378 |
|
|
Aug 25 06:02:13 AM UTC 24 |
Aug 25 06:02:19 AM UTC 24 |
163443555 ps |
T52 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_target_nack_acqfull.2535528635 |
|
|
Aug 25 06:02:15 AM UTC 24 |
Aug 25 06:02:20 AM UTC 24 |
919217669 ps |
T530 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_target_stress_rd.1189731794 |
|
|
Aug 25 06:01:47 AM UTC 24 |
Aug 25 06:02:21 AM UTC 24 |
619589150 ps |
T531 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_host_override.1782663395 |
|
|
Aug 25 06:02:20 AM UTC 24 |
Aug 25 06:02:22 AM UTC 24 |
87121966 ps |
T532 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_target_nack_acqfull_addr.2546666365 |
|
|
Aug 25 06:02:18 AM UTC 24 |
Aug 25 06:02:24 AM UTC 24 |
2079193433 ps |
T533 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_reset_rx.238068596 |
|
|
Aug 25 06:03:53 AM UTC 24 |
Aug 25 06:04:09 AM UTC 24 |
214315118 ps |
T534 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_reset_fmt.4136750603 |
|
|
Aug 25 06:02:22 AM UTC 24 |
Aug 25 06:02:25 AM UTC 24 |
112456288 ps |
T535 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_target_stretch.2808807163 |
|
|
Aug 25 06:01:48 AM UTC 24 |
Aug 25 06:02:26 AM UTC 24 |
1437595142 ps |
T536 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_full.2991596250 |
|
|
Aug 25 05:59:42 AM UTC 24 |
Aug 25 06:02:30 AM UTC 24 |
3828630181 ps |
T537 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_fmt_empty.1817209429 |
|
|
Aug 25 06:02:23 AM UTC 24 |
Aug 25 06:02:30 AM UTC 24 |
321878019 ps |
T538 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_reset_rx.2143946517 |
|
|
Aug 25 06:02:23 AM UTC 24 |
Aug 25 06:02:30 AM UTC 24 |
419514633 ps |
T539 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_target_stress_all.3551945301 |
|
|
Aug 25 06:01:21 AM UTC 24 |
Aug 25 06:02:32 AM UTC 24 |
6466437321 ps |
T540 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_host_perf_precise.1195830953 |
|
|
Aug 25 06:02:26 AM UTC 24 |
Aug 25 06:02:32 AM UTC 24 |
105410497 ps |
T541 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_target_intr_stress_wr.2515066186 |
|
|
Aug 25 06:01:13 AM UTC 24 |
Aug 25 06:02:32 AM UTC 24 |
11516102236 ps |
T542 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_host_error_intr.3312514150 |
|
|
Aug 25 06:02:31 AM UTC 24 |
Aug 25 06:02:36 AM UTC 24 |
480067525 ps |
T543 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_overflow.2115204661 |
|
|
Aug 25 06:00:15 AM UTC 24 |
Aug 25 06:02:37 AM UTC 24 |
1758046846 ps |
T544 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_target_intr_stress_wr.1711356524 |
|
|
Aug 25 06:01:50 AM UTC 24 |
Aug 25 06:02:38 AM UTC 24 |
4152167925 ps |
T24 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/3.i2c_host_stress_all.4082198984 |
|
|
Aug 25 05:55:52 AM UTC 24 |
Aug 25 06:02:41 AM UTC 24 |
74944972929 ps |
T545 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_host_stretch_timeout.1658050262 |
|
|
Aug 25 06:02:27 AM UTC 24 |
Aug 25 06:02:44 AM UTC 24 |
655965312 ps |
T546 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_target_stress_rd.1564660225 |
|
|
Aug 25 06:02:33 AM UTC 24 |
Aug 25 06:02:45 AM UTC 24 |
545818808 ps |
T547 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_reset_acq.2956416375 |
|
|
Aug 25 06:02:44 AM UTC 24 |
Aug 25 06:02:48 AM UTC 24 |
610822940 ps |
T548 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_host_perf.3749156370 |
|
|
Aug 25 06:00:56 AM UTC 24 |
Aug 25 06:02:48 AM UTC 24 |
5330151986 ps |
T549 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_reset_tx.1984980227 |
|
|
Aug 25 06:02:46 AM UTC 24 |
Aug 25 06:02:48 AM UTC 24 |
345897521 ps |
T550 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_target_intr_smoke.4211255898 |
|
|
Aug 25 06:02:37 AM UTC 24 |
Aug 25 06:02:50 AM UTC 24 |
944056008 ps |
T551 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_target_timeout.1102588040 |
|
|
Aug 25 06:02:39 AM UTC 24 |
Aug 25 06:02:53 AM UTC 24 |
2790076924 ps |
T552 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/5.i2c_host_perf.2833196077 |
|
|
Aug 25 05:57:14 AM UTC 24 |
Aug 25 06:02:54 AM UTC 24 |
12417041740 ps |
T81 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_host_mode_toggle.3428247423 |
|
|
Aug 25 06:02:51 AM UTC 24 |
Aug 25 06:02:55 AM UTC 24 |
219197317 ps |
T553 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_target_perf.2104862034 |
|
|
Aug 25 06:02:47 AM UTC 24 |
Aug 25 06:02:56 AM UTC 24 |
1434126071 ps |
T554 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_target_bad_addr.1021541310 |
|
|
Aug 25 06:02:49 AM UTC 24 |
Aug 25 06:02:57 AM UTC 24 |
827124778 ps |
T555 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_full.446808535 |
|
|
Aug 25 05:59:07 AM UTC 24 |
Aug 25 06:02:57 AM UTC 24 |
4181568898 ps |
T556 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_watermarks_tx.3011977466 |
|
|
Aug 25 06:02:56 AM UTC 24 |
Aug 25 06:03:00 AM UTC 24 |
865910107 ps |
T557 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_watermarks_acq.2489940158 |
|
|
Aug 25 06:02:55 AM UTC 24 |
Aug 25 06:03:00 AM UTC 24 |
441229438 ps |
T558 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_host_smoke.3572624767 |
|
|
Aug 25 06:02:20 AM UTC 24 |
Aug 25 06:03:02 AM UTC 24 |
3142897760 ps |
T559 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_target_smbus_maxlen.949190971 |
|
|
Aug 25 06:02:58 AM UTC 24 |
Aug 25 06:03:03 AM UTC 24 |
926284455 ps |
T560 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_target_nack_acqfull.826301077 |
|
|
Aug 25 06:02:58 AM UTC 24 |
Aug 25 06:03:04 AM UTC 24 |
2306600345 ps |
T561 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_alert_test.2923130364 |
|
|
Aug 25 06:03:03 AM UTC 24 |
Aug 25 06:03:05 AM UTC 24 |
15183683 ps |
T562 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_target_nack_txstretch.3958758901 |
|
|
Aug 25 06:03:02 AM UTC 24 |
Aug 25 06:03:05 AM UTC 24 |
703560535 ps |
T47 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_target_nack_acqfull_addr.1451581554 |
|
|
Aug 25 06:03:00 AM UTC 24 |
Aug 25 06:03:05 AM UTC 24 |
1180894149 ps |
T269 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_host_may_nack.1959112242 |
|
|
Aug 25 06:02:54 AM UTC 24 |
Aug 25 06:03:06 AM UTC 24 |
2657938623 ps |
T147 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_host_override.3585277160 |
|
|
Aug 25 06:03:05 AM UTC 24 |
Aug 25 06:03:07 AM UTC 24 |
20866526 ps |
T563 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_host_smoke.2186183420 |
|
|
Aug 25 06:01:33 AM UTC 24 |
Aug 25 06:03:07 AM UTC 24 |
6079924269 ps |
T564 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_reset_fmt.4123557470 |
|
|
Aug 25 06:03:07 AM UTC 24 |
Aug 25 06:03:10 AM UTC 24 |
108317741 ps |
T565 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_target_intr_stress_wr.2095731579 |
|
|
Aug 25 06:00:33 AM UTC 24 |
Aug 25 06:03:11 AM UTC 24 |
10966082703 ps |
T89 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_target_smoke.1803974716 |
|
|
Aug 25 06:02:31 AM UTC 24 |
Aug 25 06:03:11 AM UTC 24 |
7843778410 ps |
T566 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_full.3184597720 |
|
|
Aug 25 06:01:38 AM UTC 24 |
Aug 25 06:04:08 AM UTC 24 |
2555658194 ps |
T567 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_host_error_intr.3322977176 |
|
|
Aug 25 06:03:12 AM UTC 24 |
Aug 25 06:03:15 AM UTC 24 |
118403967 ps |
T568 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_target_stress_wr.1442124034 |
|
|
Aug 25 06:01:46 AM UTC 24 |
Aug 25 06:03:15 AM UTC 24 |
36792573784 ps |
T569 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_target_tx_stretch_ctrl.147276558 |
|
|
Aug 25 06:02:57 AM UTC 24 |
Aug 25 06:03:15 AM UTC 24 |
671618726 ps |
T570 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_host_perf_precise.3738451044 |
|
|
Aug 25 06:03:11 AM UTC 24 |
Aug 25 06:03:16 AM UTC 24 |
176212001 ps |
T571 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_reset_rx.3966464999 |
|
|
Aug 25 06:03:08 AM UTC 24 |
Aug 25 06:03:18 AM UTC 24 |
460897133 ps |
T572 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_fmt_empty.3039005467 |
|
|
Aug 25 06:03:07 AM UTC 24 |
Aug 25 06:03:19 AM UTC 24 |
189612155 ps |
T573 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_target_intr_smoke.1653779822 |
|
|
Aug 25 06:03:19 AM UTC 24 |
Aug 25 06:03:31 AM UTC 24 |
13537355025 ps |
T574 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_host_stretch_timeout.263833663 |
|
|
Aug 25 06:03:11 AM UTC 24 |
Aug 25 06:03:34 AM UTC 24 |
953969954 ps |
T575 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/4.i2c_target_stress_all.2328256540 |
|
|
Aug 25 05:56:50 AM UTC 24 |
Aug 25 06:03:36 AM UTC 24 |
35319407850 ps |
T576 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_reset_tx.3420692289 |
|
|
Aug 25 06:03:36 AM UTC 24 |
Aug 25 06:03:39 AM UTC 24 |
652486310 ps |
T577 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_reset_acq.2878190911 |
|
|
Aug 25 06:03:35 AM UTC 24 |
Aug 25 06:03:39 AM UTC 24 |
467394105 ps |
T578 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_target_timeout.3487675728 |
|
|
Aug 25 06:03:25 AM UTC 24 |
Aug 25 06:03:40 AM UTC 24 |
2993115763 ps |
T579 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_target_smoke.3249749810 |
|
|
Aug 25 06:03:16 AM UTC 24 |
Aug 25 06:03:40 AM UTC 24 |
4867204544 ps |
T580 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_target_stretch.1769942801 |
|
|
Aug 25 06:03:17 AM UTC 24 |
Aug 25 06:03:40 AM UTC 24 |
2763378811 ps |
T293 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_target_stress_all.821938688 |
|
|
Aug 25 06:02:01 AM UTC 24 |
Aug 25 06:03:43 AM UTC 24 |
50414356742 ps |
T119 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_watermark.2964015601 |
|
|
Aug 25 06:01:35 AM UTC 24 |
Aug 25 06:03:44 AM UTC 24 |
18456503521 ps |
T581 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_target_stress_rd.2360115275 |
|
|
Aug 25 06:03:17 AM UTC 24 |
Aug 25 06:03:44 AM UTC 24 |
1350727962 ps |
T582 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_target_hrst.2523743271 |
|
|
Aug 25 06:03:41 AM UTC 24 |
Aug 25 06:03:45 AM UTC 24 |
272192918 ps |
T583 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_target_perf.3450690031 |
|
|
Aug 25 06:03:38 AM UTC 24 |
Aug 25 06:03:46 AM UTC 24 |
2584296260 ps |
T584 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_overflow.2570095919 |
|
|
Aug 25 06:02:22 AM UTC 24 |
Aug 25 06:04:04 AM UTC 24 |
15151193696 ps |
T289 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_host_mode_toggle.1718068602 |
|
|
Aug 25 06:03:41 AM UTC 24 |
Aug 25 06:03:48 AM UTC 24 |
139154090 ps |
T585 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_watermarks_tx.914059654 |
|
|
Aug 25 06:03:45 AM UTC 24 |
Aug 25 06:03:48 AM UTC 24 |
157408161 ps |
T586 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_host_smoke.3673502446 |
|
|
Aug 25 06:03:04 AM UTC 24 |
Aug 25 06:03:49 AM UTC 24 |
3649515931 ps |
T587 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_target_bad_addr.2229294873 |
|
|
Aug 25 06:03:41 AM UTC 24 |
Aug 25 06:03:49 AM UTC 24 |
1696247455 ps |
T588 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_watermarks_acq.4137426476 |
|
|
Aug 25 06:03:44 AM UTC 24 |
Aug 25 06:03:50 AM UTC 24 |
1097680331 ps |
T589 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_target_smbus_maxlen.57075758 |
|
|
Aug 25 06:03:46 AM UTC 24 |
Aug 25 06:03:51 AM UTC 24 |
465706793 ps |
T590 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_alert_test.1527900163 |
|
|
Aug 25 06:03:49 AM UTC 24 |
Aug 25 06:03:51 AM UTC 24 |
30672509 ps |
T148 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/15.i2c_host_override.356990923 |
|
|
Aug 25 06:03:50 AM UTC 24 |
Aug 25 06:03:52 AM UTC 24 |
56735324 ps |
T591 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/15.i2c_host_error_intr.4066904225 |
|
|
Aug 25 06:03:59 AM UTC 24 |
Aug 25 06:04:04 AM UTC 24 |
660739504 ps |
T592 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_target_nack_acqfull.2788948527 |
|
|
Aug 25 06:03:47 AM UTC 24 |
Aug 25 06:03:52 AM UTC 24 |
7392363675 ps |
T593 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_reset_fmt.916878196 |
|
|
Aug 25 06:03:52 AM UTC 24 |
Aug 25 06:03:54 AM UTC 24 |
449296954 ps |
T594 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_target_nack_acqfull_addr.2378068853 |
|
|
Aug 25 06:03:48 AM UTC 24 |
Aug 25 06:03:54 AM UTC 24 |
3531130713 ps |
T277 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_host_may_nack.2476879104 |
|
|
Aug 25 06:03:41 AM UTC 24 |
Aug 25 06:03:58 AM UTC 24 |
728796221 ps |
T595 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/15.i2c_host_perf_precise.3893715296 |
|
|
Aug 25 06:03:55 AM UTC 24 |
Aug 25 06:03:58 AM UTC 24 |
145354959 ps |
T596 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_full.2309765319 |
|
|
Aug 25 06:00:56 AM UTC 24 |
Aug 25 06:04:01 AM UTC 24 |
3133765145 ps |
T597 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/8.i2c_host_perf.62913798 |
|
|
Aug 25 05:59:09 AM UTC 24 |
Aug 25 06:04:04 AM UTC 24 |
28695235936 ps |
T598 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/15.i2c_host_smoke.245502998 |
|
|
Aug 25 06:03:49 AM UTC 24 |
Aug 25 06:04:20 AM UTC 24 |
13677918372 ps |
T298 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/0.i2c_target_stress_all.1758231780 |
|
|
Aug 25 05:54:52 AM UTC 24 |
Aug 25 06:04:11 AM UTC 24 |
47760242704 ps |
T599 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_overflow.3791927492 |
|
|
Aug 25 06:03:06 AM UTC 24 |
Aug 25 06:04:14 AM UTC 24 |
7011041842 ps |
T600 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_fmt_empty.312511778 |
|
|
Aug 25 06:03:53 AM UTC 24 |
Aug 25 06:04:19 AM UTC 24 |
858806666 ps |
T601 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/15.i2c_target_intr_smoke.3218835887 |
|
|
Aug 25 06:04:10 AM UTC 24 |
Aug 25 06:04:20 AM UTC 24 |
817768096 ps |
T602 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_acq.2221547160 |
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|
Aug 25 06:04:18 AM UTC 24 |
Aug 25 06:04:22 AM UTC 24 |
222239844 ps |
T603 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_tx.2838802792 |
|
|
Aug 25 06:04:20 AM UTC 24 |
Aug 25 06:04:23 AM UTC 24 |
325772887 ps |
T604 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/15.i2c_target_timeout.3876039477 |
|
|
Aug 25 06:04:12 AM UTC 24 |
Aug 25 06:04:25 AM UTC 24 |
4603980735 ps |
T605 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/15.i2c_target_stretch.3878652067 |
|
|
Aug 25 06:04:09 AM UTC 24 |
Aug 25 06:04:25 AM UTC 24 |
3432507901 ps |
T606 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/15.i2c_target_smoke.4201866730 |
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Aug 25 06:04:04 AM UTC 24 |
Aug 25 06:04:25 AM UTC 24 |
3701528347 ps |
T607 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_target_stress_all.3643712485 |
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Aug 25 06:02:49 AM UTC 24 |
Aug 25 06:04:28 AM UTC 24 |
63428539869 ps |
T608 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/14.i2c_target_intr_stress_wr.1096610175 |
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Aug 25 06:03:20 AM UTC 24 |
Aug 25 06:04:28 AM UTC 24 |
5909297189 ps |
T609 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/15.i2c_target_intr_stress_wr.311432963 |
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Aug 25 06:04:10 AM UTC 24 |
Aug 25 06:04:28 AM UTC 24 |
12296711493 ps |
T610 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/15.i2c_target_hrst.1270442314 |
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Aug 25 06:04:24 AM UTC 24 |
Aug 25 06:04:28 AM UTC 24 |
455475852 ps |
T611 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/15.i2c_target_perf.2849790432 |
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Aug 25 06:04:21 AM UTC 24 |
Aug 25 06:04:29 AM UTC 24 |
1043556275 ps |
T612 |
/workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_overflow.2168745471 |
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Aug 25 06:03:52 AM UTC 24 |
Aug 25 06:06:03 AM UTC 24 |
1772218858 ps |