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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
91.23 97.21 89.46 97.22 72.02 94.26 98.44 90.00


Total test records in report: 1852
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T841 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_host_smoke.2666015741 Aug 25 06:09:27 AM UTC 24 Aug 25 06:09:51 AM UTC 24 2787872836 ps
T842 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/21.i2c_host_smoke.1026670219 Aug 25 06:08:07 AM UTC 24 Aug 25 06:09:56 AM UTC 24 11607739421 ps
T843 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_target_stress_rd.3160010550 Aug 25 06:12:16 AM UTC 24 Aug 25 06:12:22 AM UTC 24 242854697 ps
T844 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/3.i2c_target_stress_all.3140589382 Aug 25 05:56:09 AM UTC 24 Aug 25 06:09:59 AM UTC 24 39684071702 ps
T845 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_target_smoke.654307440 Aug 25 06:09:43 AM UTC 24 Aug 25 06:09:59 AM UTC 24 1810583827 ps
T846 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_fmt_empty.3971597265 Aug 25 06:09:31 AM UTC 24 Aug 25 06:10:00 AM UTC 24 2212072162 ps
T847 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_target_intr_smoke.3748947614 Aug 25 06:09:45 AM UTC 24 Aug 25 06:10:01 AM UTC 24 6050207346 ps
T123 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_watermark.3046511945 Aug 25 06:08:43 AM UTC 24 Aug 25 06:10:02 AM UTC 24 11578825317 ps
T848 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/20.i2c_host_perf.2401322038 Aug 25 06:07:17 AM UTC 24 Aug 25 06:10:03 AM UTC 24 19437207850 ps
T849 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_reset_acq.2923616153 Aug 25 06:10:01 AM UTC 24 Aug 25 06:10:03 AM UTC 24 241590889 ps
T850 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_overflow.3871129759 Aug 25 06:06:40 AM UTC 24 Aug 25 06:10:03 AM UTC 24 10387397798 ps
T851 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_reset_tx.1545992718 Aug 25 06:10:01 AM UTC 24 Aug 25 06:10:04 AM UTC 24 199650293 ps
T852 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_target_timeout.3190347744 Aug 25 06:09:51 AM UTC 24 Aug 25 06:10:05 AM UTC 24 1513172694 ps
T853 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_target_hrst.133578060 Aug 25 06:10:03 AM UTC 24 Aug 25 06:10:08 AM UTC 24 796429386 ps
T854 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_tx.2669895343 Aug 25 06:10:05 AM UTC 24 Aug 25 06:10:08 AM UTC 24 266272122 ps
T855 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_full.1041185879 Aug 25 06:06:42 AM UTC 24 Aug 25 06:10:09 AM UTC 24 3216139670 ps
T856 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_target_perf.4076905881 Aug 25 06:10:01 AM UTC 24 Aug 25 06:10:10 AM UTC 24 1130118436 ps
T857 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_acq.95851460 Aug 25 06:10:04 AM UTC 24 Aug 25 06:10:10 AM UTC 24 2209824910 ps
T858 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_target_stress_rd.1414471357 Aug 25 06:09:44 AM UTC 24 Aug 25 06:10:11 AM UTC 24 478161329 ps
T859 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_host_may_nack.3023235671 Aug 25 06:10:04 AM UTC 24 Aug 25 06:10:12 AM UTC 24 1278090980 ps
T860 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_target_bad_addr.3952284412 Aug 25 06:10:02 AM UTC 24 Aug 25 06:10:12 AM UTC 24 1243815154 ps
T861 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_alert_test.2644119921 Aug 25 06:10:11 AM UTC 24 Aug 25 06:10:13 AM UTC 24 26927891 ps
T862 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_target_smbus_maxlen.1605619440 Aug 25 06:10:08 AM UTC 24 Aug 25 06:10:14 AM UTC 24 2133498116 ps
T863 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull.1149077106 Aug 25 06:10:08 AM UTC 24 Aug 25 06:10:14 AM UTC 24 2068672288 ps
T864 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_target_tx_stretch_ctrl.4133554914 Aug 25 06:10:06 AM UTC 24 Aug 25 06:10:14 AM UTC 24 243334497 ps
T865 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_host_override.293903094 Aug 25 06:10:12 AM UTC 24 Aug 25 06:10:14 AM UTC 24 30018804 ps
T866 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_target_smbus_maxlen.676777218 Aug 25 06:10:40 AM UTC 24 Aug 25 06:10:45 AM UTC 24 507137349 ps
T867 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_alert_test.543798364 Aug 25 06:10:43 AM UTC 24 Aug 25 06:10:45 AM UTC 24 98778657 ps
T868 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/22.i2c_host_smoke.3490442306 Aug 25 06:08:43 AM UTC 24 Aug 25 06:10:15 AM UTC 24 7226980707 ps
T869 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull_addr.2093758717 Aug 25 06:10:09 AM UTC 24 Aug 25 06:10:15 AM UTC 24 2416586839 ps
T870 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_reset_fmt.1323047798 Aug 25 06:10:14 AM UTC 24 Aug 25 06:10:17 AM UTC 24 511104293 ps
T871 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_host_error_intr.4219906465 Aug 25 06:10:16 AM UTC 24 Aug 25 06:10:19 AM UTC 24 157175447 ps
T872 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_host_perf_precise.4003997716 Aug 25 06:10:15 AM UTC 24 Aug 25 06:10:20 AM UTC 24 259216081 ps
T873 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_reset_rx.2961942637 Aug 25 06:10:15 AM UTC 24 Aug 25 06:10:25 AM UTC 24 161347256 ps
T874 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_host_stretch_timeout.688803735 Aug 25 06:09:38 AM UTC 24 Aug 25 06:10:27 AM UTC 24 855929033 ps
T875 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_fmt_empty.251579018 Aug 25 06:10:14 AM UTC 24 Aug 25 06:10:29 AM UTC 24 864265670 ps
T876 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_target_stretch.1543479489 Aug 25 06:10:21 AM UTC 24 Aug 25 06:10:29 AM UTC 24 648026298 ps
T877 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_watermark.335457869 Aug 25 06:08:10 AM UTC 24 Aug 25 06:10:30 AM UTC 24 17003250306 ps
T878 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_acq.485526176 Aug 25 06:10:30 AM UTC 24 Aug 25 06:10:33 AM UTC 24 143161811 ps
T879 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_target_stress_rd.1228170256 Aug 25 06:10:20 AM UTC 24 Aug 25 06:10:34 AM UTC 24 10836606887 ps
T880 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_target_intr_smoke.3066431110 Aug 25 06:10:26 AM UTC 24 Aug 25 06:10:34 AM UTC 24 642204255 ps
T881 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_full.1187502710 Aug 25 06:08:47 AM UTC 24 Aug 25 06:10:34 AM UTC 24 6048335014 ps
T882 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_tx.1134661720 Aug 25 06:10:31 AM UTC 24 Aug 25 06:10:35 AM UTC 24 256488149 ps
T883 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_target_stress_wr.20710077 Aug 25 06:10:18 AM UTC 24 Aug 25 06:10:36 AM UTC 24 17600226023 ps
T884 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/5.i2c_target_stress_wr.3235439802 Aug 25 05:57:21 AM UTC 24 Aug 25 06:10:37 AM UTC 24 44812134827 ps
T885 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_host_mode_toggle.1983090739 Aug 25 06:10:36 AM UTC 24 Aug 25 06:10:39 AM UTC 24 595498497 ps
T886 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_target_intr_stress_wr.1450939550 Aug 25 06:09:49 AM UTC 24 Aug 25 06:10:39 AM UTC 24 4228254501 ps
T887 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_target_hrst.2585863601 Aug 25 06:10:36 AM UTC 24 Aug 25 06:10:40 AM UTC 24 1183459552 ps
T888 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_tx.3993724736 Aug 25 06:10:38 AM UTC 24 Aug 25 06:10:41 AM UTC 24 113052971 ps
T889 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_target_timeout.3299689130 Aug 25 06:10:28 AM UTC 24 Aug 25 06:10:41 AM UTC 24 2536472573 ps
T890 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_target_bad_addr.1489212525 Aug 25 06:10:36 AM UTC 24 Aug 25 06:10:42 AM UTC 24 2929742124 ps
T891 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_target_intr_stress_wr.1032165381 Aug 25 06:10:28 AM UTC 24 Aug 25 06:10:44 AM UTC 24 9170548246 ps
T892 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_acq.2539058888 Aug 25 06:10:37 AM UTC 24 Aug 25 06:10:44 AM UTC 24 1526092541 ps
T893 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_target_nack_txstretch.1166873444 Aug 25 06:10:42 AM UTC 24 Aug 25 06:10:46 AM UTC 24 424002068 ps
T894 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_target_tx_stretch_ctrl.2818943260 Aug 25 06:10:40 AM UTC 24 Aug 25 06:10:46 AM UTC 24 356637572 ps
T895 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull.2633519642 Aug 25 06:10:41 AM UTC 24 Aug 25 06:10:47 AM UTC 24 582087568 ps
T896 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_target_perf.617172733 Aug 25 06:10:34 AM UTC 24 Aug 25 06:10:47 AM UTC 24 1015163834 ps
T152 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_host_override.1756023609 Aug 25 06:10:45 AM UTC 24 Aug 25 06:10:48 AM UTC 24 30923877 ps
T897 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull_addr.2404218043 Aug 25 06:10:42 AM UTC 24 Aug 25 06:10:49 AM UTC 24 1200153362 ps
T898 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_fmt.427580989 Aug 25 06:10:47 AM UTC 24 Aug 25 06:10:49 AM UTC 24 95631516 ps
T899 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_rx.618172321 Aug 25 06:10:47 AM UTC 24 Aug 25 06:10:56 AM UTC 24 433822303 ps
T900 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_fmt_empty.3380217834 Aug 25 06:10:47 AM UTC 24 Aug 25 06:10:57 AM UTC 24 770036818 ps
T901 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_host_error_intr.737314945 Aug 25 06:10:50 AM UTC 24 Aug 25 06:10:58 AM UTC 24 280372718 ps
T902 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_host_stretch_timeout.3336077481 Aug 25 06:10:15 AM UTC 24 Aug 25 06:10:59 AM UTC 24 1518747681 ps
T903 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_overflow.38749383 Aug 25 06:09:29 AM UTC 24 Aug 25 06:11:02 AM UTC 24 9487154432 ps
T904 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_host_may_nack.3437771920 Aug 25 06:10:36 AM UTC 24 Aug 25 06:11:04 AM UTC 24 1000720353 ps
T905 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_overflow.3232815101 Aug 25 06:08:10 AM UTC 24 Aug 25 06:11:08 AM UTC 24 7580112674 ps
T906 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_target_smoke.1601188627 Aug 25 06:10:17 AM UTC 24 Aug 25 06:11:09 AM UTC 24 2411827930 ps
T907 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_overflow.2136722418 Aug 25 06:10:13 AM UTC 24 Aug 25 06:11:10 AM UTC 24 2594939989 ps
T908 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_target_stretch.1657410661 Aug 25 06:11:04 AM UTC 24 Aug 25 06:11:11 AM UTC 24 2899152232 ps
T909 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_host_stretch_timeout.395571713 Aug 25 06:10:50 AM UTC 24 Aug 25 06:11:13 AM UTC 24 3557168655 ps
T910 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_host_perf_precise.2016572594 Aug 25 06:12:11 AM UTC 24 Aug 25 06:12:14 AM UTC 24 43606876 ps
T911 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_rx.2351771446 Aug 25 06:12:08 AM UTC 24 Aug 25 06:12:16 AM UTC 24 1802934819 ps
T912 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_target_smoke.1843306878 Aug 25 06:10:58 AM UTC 24 Aug 25 06:11:14 AM UTC 24 6290994252 ps
T913 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/21.i2c_target_stress_all.2714356587 Aug 25 06:08:32 AM UTC 24 Aug 25 06:11:15 AM UTC 24 36958422809 ps
T914 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_acq.142143856 Aug 25 06:11:12 AM UTC 24 Aug 25 06:11:15 AM UTC 24 178740199 ps
T915 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_tx.2977361210 Aug 25 06:11:13 AM UTC 24 Aug 25 06:11:16 AM UTC 24 234528055 ps
T916 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_target_intr_smoke.60066191 Aug 25 06:11:06 AM UTC 24 Aug 25 06:11:17 AM UTC 24 3947721049 ps
T917 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_target_stress_rd.3515688150 Aug 25 06:11:00 AM UTC 24 Aug 25 06:11:19 AM UTC 24 1166108808 ps
T918 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_target_hrst.3879974082 Aug 25 06:11:15 AM UTC 24 Aug 25 06:11:20 AM UTC 24 3956414747 ps
T919 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_full.2838037735 Aug 25 06:08:11 AM UTC 24 Aug 25 06:11:22 AM UTC 24 6055667023 ps
T920 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_target_timeout.3890956133 Aug 25 06:11:10 AM UTC 24 Aug 25 06:11:23 AM UTC 24 6374609402 ps
T921 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_tx.1883845088 Aug 25 06:11:20 AM UTC 24 Aug 25 06:11:23 AM UTC 24 151645474 ps
T922 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_target_bad_addr.3529177138 Aug 25 06:11:14 AM UTC 24 Aug 25 06:11:24 AM UTC 24 10911914400 ps
T923 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_acq.3202659214 Aug 25 06:11:18 AM UTC 24 Aug 25 06:11:24 AM UTC 24 544740152 ps
T924 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_target_perf.2322143529 Aug 25 06:11:14 AM UTC 24 Aug 25 06:11:24 AM UTC 24 753440066 ps
T925 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_target_smbus_maxlen.1287736140 Aug 25 06:11:21 AM UTC 24 Aug 25 06:11:26 AM UTC 24 468667237 ps
T926 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_target_intr_stress_wr.1643131979 Aug 25 06:11:09 AM UTC 24 Aug 25 06:11:27 AM UTC 24 16511066080 ps
T927 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_alert_test.3596550900 Aug 25 06:11:25 AM UTC 24 Aug 25 06:11:27 AM UTC 24 20646120 ps
T928 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_host_override.2946681491 Aug 25 06:11:25 AM UTC 24 Aug 25 06:11:27 AM UTC 24 46598404 ps
T929 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_target_tx_stretch_ctrl.3932975085 Aug 25 06:11:21 AM UTC 24 Aug 25 06:11:27 AM UTC 24 116442888 ps
T930 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_full.285928897 Aug 25 06:10:15 AM UTC 24 Aug 25 06:12:16 AM UTC 24 1936413200 ps
T931 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/18.i2c_target_intr_stress_wr.772730220 Aug 25 06:06:21 AM UTC 24 Aug 25 06:11:28 AM UTC 24 16378090761 ps
T932 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_host_error_intr.1976667686 Aug 25 06:12:14 AM UTC 24 Aug 25 06:12:18 AM UTC 24 301115256 ps
T933 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull_addr.218184370 Aug 25 06:11:24 AM UTC 24 Aug 25 06:11:29 AM UTC 24 501583460 ps
T934 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull.104505062 Aug 25 06:11:23 AM UTC 24 Aug 25 06:11:29 AM UTC 24 511150717 ps
T935 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_fmt.3993330994 Aug 25 06:11:28 AM UTC 24 Aug 25 06:11:31 AM UTC 24 261994388 ps
T936 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_host_error_intr.4181740615 Aug 25 06:11:31 AM UTC 24 Aug 25 06:11:34 AM UTC 24 936797654 ps
T937 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_fmt_empty.2000859367 Aug 25 06:11:28 AM UTC 24 Aug 25 06:11:40 AM UTC 24 343879370 ps
T938 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_host_perf.2019425654 Aug 25 06:11:29 AM UTC 24 Aug 25 06:11:40 AM UTC 24 626012414 ps
T939 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_host_may_nack.2434383532 Aug 25 06:11:17 AM UTC 24 Aug 25 06:11:40 AM UTC 24 495133666 ps
T940 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_rx.2449219185 Aug 25 06:11:29 AM UTC 24 Aug 25 06:11:40 AM UTC 24 836340587 ps
T941 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_overflow.3686935149 Aug 25 06:10:47 AM UTC 24 Aug 25 06:11:41 AM UTC 24 3649378841 ps
T942 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_host_stretch_timeout.3007251320 Aug 25 06:11:31 AM UTC 24 Aug 25 06:11:44 AM UTC 24 475226951 ps
T943 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_target_intr_smoke.2119999520 Aug 25 06:11:42 AM UTC 24 Aug 25 06:11:50 AM UTC 24 608080976 ps
T944 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_acq.2163285172 Aug 25 06:11:48 AM UTC 24 Aug 25 06:11:51 AM UTC 24 193471267 ps
T945 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_tx.2161284579 Aug 25 06:11:51 AM UTC 24 Aug 25 06:11:53 AM UTC 24 560601182 ps
T946 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_target_smoke.1791908977 Aug 25 06:11:35 AM UTC 24 Aug 25 06:11:53 AM UTC 24 13683605931 ps
T947 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_target_stress_wr.2828657356 Aug 25 06:00:23 AM UTC 24 Aug 25 06:11:56 AM UTC 24 43651880612 ps
T948 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_target_timeout.1033530250 Aug 25 06:11:43 AM UTC 24 Aug 25 06:11:56 AM UTC 24 1227967855 ps
T949 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_overflow.1953207505 Aug 25 06:08:44 AM UTC 24 Aug 25 06:11:58 AM UTC 24 9873242994 ps
T950 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_target_perf.2012053552 Aug 25 06:11:52 AM UTC 24 Aug 25 06:11:59 AM UTC 24 1011329036 ps
T951 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_host_smoke.768198547 Aug 25 06:11:25 AM UTC 24 Aug 25 06:11:59 AM UTC 24 1757775321 ps
T952 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_target_stress_rd.2645220342 Aug 25 06:11:40 AM UTC 24 Aug 25 06:12:00 AM UTC 24 768730550 ps
T953 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_host_smoke.943108642 Aug 25 06:10:12 AM UTC 24 Aug 25 06:12:00 AM UTC 24 1750240863 ps
T954 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_target_intr_stress_wr.451869046 Aug 25 06:11:42 AM UTC 24 Aug 25 06:12:01 AM UTC 24 3326583176 ps
T955 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_tx.3495602025 Aug 25 06:12:00 AM UTC 24 Aug 25 06:12:02 AM UTC 24 77273122 ps
T956 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_acq.3697289681 Aug 25 06:11:59 AM UTC 24 Aug 25 06:12:04 AM UTC 24 3771296110 ps
T957 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_target_smbus_maxlen.519390845 Aug 25 06:12:01 AM UTC 24 Aug 25 06:12:04 AM UTC 24 884535500 ps
T958 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_target_tx_stretch_ctrl.752462060 Aug 25 06:12:01 AM UTC 24 Aug 25 06:12:04 AM UTC 24 82802415 ps
T959 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_alert_test.2049622357 Aug 25 06:12:04 AM UTC 24 Aug 25 06:12:06 AM UTC 24 41079955 ps
T960 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_target_nack_txstretch.3743413830 Aug 25 06:12:03 AM UTC 24 Aug 25 06:12:06 AM UTC 24 1473497748 ps
T961 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_watermark.3389283326 Aug 25 06:10:12 AM UTC 24 Aug 25 06:12:07 AM UTC 24 28079424990 ps
T962 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_target_bad_addr.4169937472 Aug 25 06:11:54 AM UTC 24 Aug 25 06:12:07 AM UTC 24 4398529940 ps
T963 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_host_override.1506907827 Aug 25 06:12:05 AM UTC 24 Aug 25 06:12:07 AM UTC 24 50627015 ps
T964 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull_addr.2084514319 Aug 25 06:12:02 AM UTC 24 Aug 25 06:12:07 AM UTC 24 2123578200 ps
T53 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull.3682565444 Aug 25 06:12:02 AM UTC 24 Aug 25 06:12:08 AM UTC 24 2036823074 ps
T965 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_fmt.2789341368 Aug 25 06:12:07 AM UTC 24 Aug 25 06:12:10 AM UTC 24 517872316 ps
T278 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_host_may_nack.425047675 Aug 25 06:11:58 AM UTC 24 Aug 25 06:12:11 AM UTC 24 628315405 ps
T966 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_target_stretch.2856128976 Aug 25 06:11:41 AM UTC 24 Aug 25 06:12:13 AM UTC 24 3402443324 ps
T967 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_target_stress_all.4260617655 Aug 25 06:11:14 AM UTC 24 Aug 25 06:12:14 AM UTC 24 38272094783 ps
T968 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_watermark.861191348 Aug 25 06:06:39 AM UTC 24 Aug 25 06:12:15 AM UTC 24 16082619707 ps
T969 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/21.i2c_host_perf.2199924690 Aug 25 06:08:11 AM UTC 24 Aug 25 06:12:22 AM UTC 24 77514980269 ps
T970 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_fmt_empty.4085439780 Aug 25 06:12:07 AM UTC 24 Aug 25 06:12:27 AM UTC 24 2408260132 ps
T971 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_target_intr_smoke.1106182734 Aug 25 06:12:18 AM UTC 24 Aug 25 06:12:28 AM UTC 24 642952086 ps
T972 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_host_stretch_timeout.391642881 Aug 25 06:12:12 AM UTC 24 Aug 25 06:12:28 AM UTC 24 3288994422 ps
T973 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_target_stretch.3769115469 Aug 25 06:12:17 AM UTC 24 Aug 25 06:12:28 AM UTC 24 1780683296 ps
T974 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_target_timeout.1005150408 Aug 25 06:14:08 AM UTC 24 Aug 25 06:14:20 AM UTC 24 2733205438 ps
T975 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_tx.2615243870 Aug 25 06:12:29 AM UTC 24 Aug 25 06:12:32 AM UTC 24 583065172 ps
T976 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_acq.577213817 Aug 25 06:12:29 AM UTC 24 Aug 25 06:12:32 AM UTC 24 1917409185 ps
T977 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_target_timeout.3384414339 Aug 25 06:12:22 AM UTC 24 Aug 25 06:12:34 AM UTC 24 4070163075 ps
T978 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_host_mode_toggle.3059153185 Aug 25 06:14:19 AM UTC 24 Aug 25 06:14:22 AM UTC 24 297013870 ps
T979 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/17.i2c_target_stress_all.274306633 Aug 25 06:05:54 AM UTC 24 Aug 25 06:12:35 AM UTC 24 48136501850 ps
T317 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_target_hrst.3747353287 Aug 25 06:12:33 AM UTC 24 Aug 25 06:12:37 AM UTC 24 662666998 ps
T980 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/20.i2c_target_intr_stress_wr.1204470290 Aug 25 06:07:33 AM UTC 24 Aug 25 06:12:37 AM UTC 24 18517923970 ps
T981 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_target_perf.1411240776 Aug 25 06:12:30 AM UTC 24 Aug 25 06:12:40 AM UTC 24 2946636891 ps
T982 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_tx.802899219 Aug 25 06:12:38 AM UTC 24 Aug 25 06:12:41 AM UTC 24 105498190 ps
T983 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_target_bad_addr.942239787 Aug 25 06:12:33 AM UTC 24 Aug 25 06:12:42 AM UTC 24 2602178191 ps
T984 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_acq.2835817013 Aug 25 06:12:38 AM UTC 24 Aug 25 06:12:42 AM UTC 24 3045536778 ps
T985 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_target_stretch.4162221979 Aug 25 06:09:45 AM UTC 24 Aug 25 06:12:43 AM UTC 24 3703468085 ps
T986 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_host_may_nack.4223879731 Aug 25 06:12:36 AM UTC 24 Aug 25 06:12:44 AM UTC 24 1403571899 ps
T987 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_target_smbus_maxlen.75149224 Aug 25 06:12:40 AM UTC 24 Aug 25 06:12:45 AM UTC 24 551753728 ps
T988 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_host_smoke.2335343897 Aug 25 06:10:45 AM UTC 24 Aug 25 06:12:46 AM UTC 24 1937723819 ps
T989 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_target_tx_stretch_ctrl.4173365974 Aug 25 06:12:38 AM UTC 24 Aug 25 06:12:46 AM UTC 24 171066380 ps
T990 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_target_nack_txstretch.1678678456 Aug 25 06:12:43 AM UTC 24 Aug 25 06:12:46 AM UTC 24 522811794 ps
T991 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_alert_test.3006411688 Aug 25 06:12:44 AM UTC 24 Aug 25 06:12:46 AM UTC 24 23303655 ps
T992 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull.3541323397 Aug 25 06:12:42 AM UTC 24 Aug 25 06:12:47 AM UTC 24 7487924780 ps
T993 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull_addr.792795693 Aug 25 06:12:43 AM UTC 24 Aug 25 06:12:48 AM UTC 24 590443916 ps
T994 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_host_override.1192210467 Aug 25 06:12:46 AM UTC 24 Aug 25 06:12:48 AM UTC 24 75142463 ps
T995 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_fmt.1386083039 Aug 25 06:12:47 AM UTC 24 Aug 25 06:12:50 AM UTC 24 103643754 ps
T996 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_fmt_empty.2820074633 Aug 25 06:12:47 AM UTC 24 Aug 25 06:12:53 AM UTC 24 607753622 ps
T997 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_target_smoke.2941666796 Aug 25 06:12:15 AM UTC 24 Aug 25 06:12:55 AM UTC 24 1879230097 ps
T998 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_host_perf_precise.1882929118 Aug 25 06:12:52 AM UTC 24 Aug 25 06:12:57 AM UTC 24 238905673 ps
T999 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_rx.2583664271 Aug 25 06:12:48 AM UTC 24 Aug 25 06:12:57 AM UTC 24 623498180 ps
T1000 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_overflow.3248985697 Aug 25 06:11:27 AM UTC 24 Aug 25 06:12:58 AM UTC 24 8312660430 ps
T1001 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_host_perf.3542954067 Aug 25 06:12:09 AM UTC 24 Aug 25 06:13:01 AM UTC 24 2749012077 ps
T1002 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_overflow.1210081095 Aug 25 06:12:07 AM UTC 24 Aug 25 06:13:01 AM UTC 24 1380927785 ps
T1003 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_host_error_intr.1268887553 Aug 25 06:12:56 AM UTC 24 Aug 25 06:13:02 AM UTC 24 1376792552 ps
T1004 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_target_stress_all.3573442194 Aug 25 06:10:02 AM UTC 24 Aug 25 06:13:03 AM UTC 24 26412099352 ps
T1005 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_acq.3149190232 Aug 25 06:13:09 AM UTC 24 Aug 25 06:13:11 AM UTC 24 345697598 ps
T1006 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_tx.1850514741 Aug 25 06:13:13 AM UTC 24 Aug 25 06:13:16 AM UTC 24 223585169 ps
T1007 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_host_stretch_timeout.884661135 Aug 25 06:12:54 AM UTC 24 Aug 25 06:13:17 AM UTC 24 1484383784 ps
T1008 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_target_intr_smoke.1663250459 Aug 25 06:13:02 AM UTC 24 Aug 25 06:13:17 AM UTC 24 2392457632 ps
T1009 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_target_timeout.2927892181 Aug 25 06:13:04 AM UTC 24 Aug 25 06:13:18 AM UTC 24 2611518134 ps
T1010 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_target_stress_wr.1561698697 Aug 25 06:12:58 AM UTC 24 Aug 25 06:13:21 AM UTC 24 14052037050 ps
T1011 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_target_smoke.3767492687 Aug 25 06:12:58 AM UTC 24 Aug 25 06:13:22 AM UTC 24 1116887228 ps
T1012 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_target_bad_addr.1592285911 Aug 25 06:13:18 AM UTC 24 Aug 25 06:13:26 AM UTC 24 3613806560 ps
T1013 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_target_perf.3671337208 Aug 25 06:13:17 AM UTC 24 Aug 25 06:13:26 AM UTC 24 1374426753 ps
T1014 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_target_stretch.3209995567 Aug 25 06:13:02 AM UTC 24 Aug 25 06:13:30 AM UTC 24 2460449074 ps
T1015 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_tx.2494328925 Aug 25 06:13:27 AM UTC 24 Aug 25 06:13:30 AM UTC 24 749634263 ps
T1016 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_full.992769633 Aug 25 06:09:31 AM UTC 24 Aug 25 06:13:31 AM UTC 24 7179150886 ps
T1017 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_acq.583123518 Aug 25 06:13:25 AM UTC 24 Aug 25 06:13:31 AM UTC 24 2896483463 ps
T1018 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_target_hrst.1529069727 Aug 25 06:14:18 AM UTC 24 Aug 25 06:14:22 AM UTC 24 433529469 ps
T1019 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/17.i2c_host_perf.288961367 Aug 25 06:05:29 AM UTC 24 Aug 25 06:13:34 AM UTC 24 32730491881 ps
T1020 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_watermark.1902165584 Aug 25 06:10:45 AM UTC 24 Aug 25 06:13:35 AM UTC 24 18034045091 ps
T1021 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_target_smbus_maxlen.1267202723 Aug 25 06:13:30 AM UTC 24 Aug 25 06:13:36 AM UTC 24 562797108 ps
T1022 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_alert_test.3061841668 Aug 25 06:13:35 AM UTC 24 Aug 25 06:13:37 AM UTC 24 17303823 ps
T1023 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull_addr.382370855 Aug 25 06:13:32 AM UTC 24 Aug 25 06:13:37 AM UTC 24 1047026731 ps
T1024 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull.836949775 Aug 25 06:13:31 AM UTC 24 Aug 25 06:13:37 AM UTC 24 1035828080 ps
T1025 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_host_override.1944521876 Aug 25 06:13:36 AM UTC 24 Aug 25 06:13:38 AM UTC 24 26305676 ps
T1026 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_fmt.3417694769 Aug 25 06:13:38 AM UTC 24 Aug 25 06:13:41 AM UTC 24 115053417 ps
T1027 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_target_stress_rd.982972470 Aug 25 06:12:59 AM UTC 24 Aug 25 06:13:43 AM UTC 24 8041792052 ps
T1028 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_fmt_empty.1958542539 Aug 25 06:13:38 AM UTC 24 Aug 25 06:13:46 AM UTC 24 228938614 ps
T1029 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_target_tx_stretch_ctrl.1501055694 Aug 25 06:13:27 AM UTC 24 Aug 25 06:13:46 AM UTC 24 701655495 ps
T1030 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_host_may_nack.1237529491 Aug 25 06:13:22 AM UTC 24 Aug 25 06:13:50 AM UTC 24 566817026 ps
T1031 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_host_error_intr.3486110985 Aug 25 06:13:47 AM UTC 24 Aug 25 06:13:50 AM UTC 24 444382435 ps
T1032 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_rx.1592208872 Aug 25 06:13:38 AM UTC 24 Aug 25 06:13:52 AM UTC 24 845742360 ps
T1033 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_host_smoke.250068502 Aug 25 06:13:35 AM UTC 24 Aug 25 06:13:58 AM UTC 24 1058835862 ps
T1034 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_host_stretch_timeout.2389460520 Aug 25 06:13:47 AM UTC 24 Aug 25 06:14:00 AM UTC 24 532881544 ps
T1035 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_host_smoke.1589999292 Aug 25 06:12:45 AM UTC 24 Aug 25 06:14:04 AM UTC 24 1450660042 ps
T1036 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_full.1760223861 Aug 25 06:10:48 AM UTC 24 Aug 25 06:14:08 AM UTC 24 11461641868 ps
T1037 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_target_smoke.2829572258 Aug 25 06:13:52 AM UTC 24 Aug 25 06:14:08 AM UTC 24 2674103504 ps
T1038 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_target_intr_stress_wr.2998380507 Aug 25 06:13:02 AM UTC 24 Aug 25 06:14:11 AM UTC 24 10208881663 ps
T1039 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_target_intr_smoke.867782405 Aug 25 06:14:05 AM UTC 24 Aug 25 06:14:13 AM UTC 24 759789520 ps
T1040 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_host_smoke.1703159040 Aug 25 06:12:05 AM UTC 24 Aug 25 06:14:13 AM UTC 24 8166683574 ps
T1041 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_acq.2979983855 Aug 25 06:14:12 AM UTC 24 Aug 25 06:14:16 AM UTC 24 576836868 ps
T1042 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_tx.216840363 Aug 25 06:14:14 AM UTC 24 Aug 25 06:14:17 AM UTC 24 1662588593 ps
T1043 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_target_stretch.2041614497 Aug 25 06:14:01 AM UTC 24 Aug 25 06:14:18 AM UTC 24 2359368351 ps
T1044 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_host_perf_precise.1394835720 Aug 25 06:10:49 AM UTC 24 Aug 25 06:14:20 AM UTC 24 3143560373 ps
T1045 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_target_perf.1230859371 Aug 25 06:14:14 AM UTC 24 Aug 25 06:14:20 AM UTC 24 1983891283 ps
T1046 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_tx.4280786380 Aug 25 06:14:21 AM UTC 24 Aug 25 06:14:24 AM UTC 24 237906466 ps
T1047 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_acq.2398018634 Aug 25 06:14:21 AM UTC 24 Aug 25 06:14:25 AM UTC 24 251297286 ps
T1048 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_full.1797457714 Aug 25 06:12:08 AM UTC 24 Aug 25 06:14:27 AM UTC 24 3205109256 ps
T1049 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_target_bad_addr.1355665433 Aug 25 06:14:17 AM UTC 24 Aug 25 06:14:28 AM UTC 24 2216558777 ps
T1050 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_target_smbus_maxlen.2731793156 Aug 25 06:14:23 AM UTC 24 Aug 25 06:14:28 AM UTC 24 1195067908 ps
T1051 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_target_tx_stretch_ctrl.3414200782 Aug 25 06:14:23 AM UTC 24 Aug 25 06:14:29 AM UTC 24 188026787 ps
T1052 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_alert_test.3113525771 Aug 25 06:14:29 AM UTC 24 Aug 25 06:14:31 AM UTC 24 34056599 ps
T1053 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull.3261525079 Aug 25 06:14:25 AM UTC 24 Aug 25 06:14:31 AM UTC 24 523583805 ps
T1054 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull_addr.4002674005 Aug 25 06:14:25 AM UTC 24 Aug 25 06:14:31 AM UTC 24 2212697334 ps
T1055 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_target_nack_txstretch.2840626572 Aug 25 06:14:29 AM UTC 24 Aug 25 06:14:32 AM UTC 24 1413328798 ps
T153 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_host_override.735867089 Aug 25 06:14:30 AM UTC 24 Aug 25 06:14:32 AM UTC 24 60126972 ps
T1056 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_fmt.812908740 Aug 25 06:14:32 AM UTC 24 Aug 25 06:14:35 AM UTC 24 121419319 ps
T1057 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_rx.4254378568 Aug 25 06:14:33 AM UTC 24 Aug 25 06:14:41 AM UTC 24 803573062 ps
T1058 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_fmt_empty.1974806698 Aug 25 06:14:33 AM UTC 24 Aug 25 06:14:41 AM UTC 24 1903471875 ps
T271 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_host_may_nack.2452747078 Aug 25 06:14:21 AM UTC 24 Aug 25 06:14:42 AM UTC 24 1388268239 ps
T1059 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_full.3920768918 Aug 25 06:13:39 AM UTC 24 Aug 25 06:14:45 AM UTC 24 2224610679 ps
T1060 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_host_error_intr.1524463467 Aug 25 06:14:42 AM UTC 24 Aug 25 06:14:46 AM UTC 24 219522330 ps
T1061 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_target_intr_stress_wr.477792176 Aug 25 06:14:08 AM UTC 24 Aug 25 06:14:47 AM UTC 24 12731806202 ps
T1062 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_full.4153010928 Aug 25 06:11:29 AM UTC 24 Aug 25 06:14:51 AM UTC 24 2740961845 ps
T1063 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_full.1875780912 Aug 25 06:12:48 AM UTC 24 Aug 25 06:14:56 AM UTC 24 2964055107 ps
T1064 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_overflow.2227219049 Aug 25 06:13:37 AM UTC 24 Aug 25 06:15:07 AM UTC 24 9555760117 ps
T1065 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_target_stretch.3826686043 Aug 25 06:14:57 AM UTC 24 Aug 25 06:15:09 AM UTC 24 5514214449 ps
T91 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_target_smoke.1093041620 Aug 25 06:14:47 AM UTC 24 Aug 25 06:15:09 AM UTC 24 1119495039 ps
T1066 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_target_stress_rd.1491027235 Aug 25 06:13:59 AM UTC 24 Aug 25 06:15:12 AM UTC 24 8213724379 ps
T1067 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_watermark.51090096 Aug 25 06:11:26 AM UTC 24 Aug 25 06:15:14 AM UTC 24 28022849473 ps
T1068 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_host_smoke.1645709243 Aug 25 06:14:29 AM UTC 24 Aug 25 06:15:15 AM UTC 24 7618116040 ps
T1069 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_tx.3947041643 Aug 25 06:15:15 AM UTC 24 Aug 25 06:15:18 AM UTC 24 246099030 ps
T1070 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_target_intr_smoke.3027593740 Aug 25 06:15:08 AM UTC 24 Aug 25 06:15:18 AM UTC 24 6301521017 ps
T253 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_acq.2963339217 Aug 25 06:15:15 AM UTC 24 Aug 25 06:15:19 AM UTC 24 687183283 ps
T1071 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_host_stretch_timeout.3525792874 Aug 25 06:14:42 AM UTC 24 Aug 25 06:15:19 AM UTC 24 533502880 ps
T1072 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_host_perf.1790619918 Aug 25 06:13:42 AM UTC 24 Aug 25 06:15:22 AM UTC 24 6853243022 ps
T1073 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_target_hrst.1950545654 Aug 25 06:15:20 AM UTC 24 Aug 25 06:15:23 AM UTC 24 487697734 ps
T1074 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_target_timeout.1346382152 Aug 25 06:15:10 AM UTC 24 Aug 25 06:15:24 AM UTC 24 4545833434 ps
T1075 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_target_perf.305560337 Aug 25 06:15:16 AM UTC 24 Aug 25 06:15:25 AM UTC 24 592350343 ps
T1076 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_watermarks_tx.4110486599 Aug 25 06:15:24 AM UTC 24 Aug 25 06:15:27 AM UTC 24 168321669 ps
T1077 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_watermarks_acq.160183962 Aug 25 06:15:24 AM UTC 24 Aug 25 06:15:27 AM UTC 24 218233882 ps
T1078 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_target_tx_stretch_ctrl.2052725246 Aug 25 06:15:26 AM UTC 24 Aug 25 06:15:29 AM UTC 24 83878333 ps
T282 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_host_may_nack.4171234621 Aug 25 06:15:23 AM UTC 24 Aug 25 06:15:30 AM UTC 24 273813009 ps
T1079 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_target_stress_all.1742968947 Aug 25 06:10:34 AM UTC 24 Aug 25 06:15:30 AM UTC 24 34204099429 ps
T1080 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_target_bad_addr.3751623074 Aug 25 06:15:19 AM UTC 24 Aug 25 06:15:30 AM UTC 24 1382759911 ps
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