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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
91.23 97.21 89.46 97.22 72.02 94.26 98.44 90.00


Total test records in report: 1852
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T1081 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_target_smbus_maxlen.123936007 Aug 25 06:15:26 AM UTC 24 Aug 25 06:15:30 AM UTC 24 509829673 ps
T1082 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_alert_test.1610584088 Aug 25 06:15:30 AM UTC 24 Aug 25 06:15:33 AM UTC 24 35066116 ps
T1083 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_target_nack_acqfull_addr.1222059260 Aug 25 06:15:28 AM UTC 24 Aug 25 06:15:34 AM UTC 24 569528113 ps
T1084 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_host_override.1511592570 Aug 25 06:15:32 AM UTC 24 Aug 25 06:15:34 AM UTC 24 29858617 ps
T1085 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_target_nack_txstretch.973171603 Aug 25 06:15:30 AM UTC 24 Aug 25 06:15:34 AM UTC 24 162214036 ps
T1086 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_target_nack_acqfull.1803770303 Aug 25 06:15:28 AM UTC 24 Aug 25 06:15:35 AM UTC 24 546413510 ps
T1087 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_watermark.52832759 Aug 25 06:09:28 AM UTC 24 Aug 25 06:15:35 AM UTC 24 19726793988 ps
T1088 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_watermark.656866707 Aug 25 06:12:07 AM UTC 24 Aug 25 06:15:37 AM UTC 24 14134080389 ps
T1089 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_fmt.1879742917 Aug 25 06:15:35 AM UTC 24 Aug 25 06:15:38 AM UTC 24 274849410 ps
T1090 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_overflow.1433276868 Aug 25 06:14:32 AM UTC 24 Aug 25 06:15:44 AM UTC 24 11654487350 ps
T124 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_watermark.2162834058 Aug 25 06:13:36 AM UTC 24 Aug 25 06:15:44 AM UTC 24 4263503852 ps
T1091 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_rx.2673162720 Aug 25 06:15:35 AM UTC 24 Aug 25 06:15:46 AM UTC 24 961210238 ps
T1092 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_fmt_empty.1101361292 Aug 25 06:15:35 AM UTC 24 Aug 25 06:15:46 AM UTC 24 130170317 ps
T1093 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/29.i2c_target_stress_wr.1776424747 Aug 25 06:13:53 AM UTC 24 Aug 25 06:15:50 AM UTC 24 40281249313 ps
T1094 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_host_error_intr.3660121072 Aug 25 06:15:44 AM UTC 24 Aug 25 06:15:51 AM UTC 24 497770987 ps
T1095 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_host_perf_precise.3534226272 Aug 25 06:11:30 AM UTC 24 Aug 25 06:15:56 AM UTC 24 24413686157 ps
T1096 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_target_stress_rd.81431603 Aug 25 06:15:48 AM UTC 24 Aug 25 06:15:56 AM UTC 24 588860305 ps
T1097 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_host_perf_precise.1751623315 Aug 25 06:15:38 AM UTC 24 Aug 25 06:15:59 AM UTC 24 1401900182 ps
T1098 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_host_stretch_timeout.3000013654 Aug 25 06:15:38 AM UTC 24 Aug 25 06:16:01 AM UTC 24 895188312 ps
T1099 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_overflow.315442450 Aug 25 06:12:47 AM UTC 24 Aug 25 06:16:01 AM UTC 24 4644550395 ps
T1100 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_target_intr_smoke.3875549180 Aug 25 06:15:52 AM UTC 24 Aug 25 06:16:02 AM UTC 24 3919174221 ps
T1101 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_target_intr_stress_wr.1447430019 Aug 25 06:15:56 AM UTC 24 Aug 25 06:16:03 AM UTC 24 2832218645 ps
T1102 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_reset_acq.3424029396 Aug 25 06:16:02 AM UTC 24 Aug 25 06:16:05 AM UTC 24 118239035 ps
T1103 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_reset_tx.1969063696 Aug 25 06:16:02 AM UTC 24 Aug 25 06:16:05 AM UTC 24 161989930 ps
T1104 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_target_stretch.1080739607 Aug 25 06:15:51 AM UTC 24 Aug 25 06:16:08 AM UTC 24 1462009816 ps
T1105 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_host_smoke.2450960255 Aug 25 06:15:32 AM UTC 24 Aug 25 06:16:10 AM UTC 24 5450099023 ps
T1106 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_target_hrst.2986902740 Aug 25 06:16:06 AM UTC 24 Aug 25 06:16:10 AM UTC 24 5006171706 ps
T1107 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_target_stress_rd.2601326606 Aug 25 06:14:52 AM UTC 24 Aug 25 06:16:11 AM UTC 24 1435739586 ps
T1108 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_target_timeout.4260198192 Aug 25 06:15:57 AM UTC 24 Aug 25 06:16:11 AM UTC 24 1464545834 ps
T1109 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_host_perf.930165852 Aug 25 06:12:49 AM UTC 24 Aug 25 06:16:12 AM UTC 24 30729934863 ps
T1110 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_target_perf.3570529686 Aug 25 06:16:03 AM UTC 24 Aug 25 06:16:12 AM UTC 24 2602882142 ps
T1111 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_target_bad_addr.4163609596 Aug 25 06:16:05 AM UTC 24 Aug 25 06:16:14 AM UTC 24 1322719950 ps
T1112 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_watermarks_tx.1684716397 Aug 25 06:16:11 AM UTC 24 Aug 25 06:16:14 AM UTC 24 539554320 ps
T1113 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_watermarks_acq.52678193 Aug 25 06:16:10 AM UTC 24 Aug 25 06:16:14 AM UTC 24 3868990247 ps
T1114 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_target_stress_all.2533305312 Aug 25 06:15:19 AM UTC 24 Aug 25 06:16:15 AM UTC 24 12954785052 ps
T1115 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_target_tx_stretch_ctrl.2485368067 Aug 25 06:16:11 AM UTC 24 Aug 25 06:16:15 AM UTC 24 108886919 ps
T1116 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_alert_test.2546791772 Aug 25 06:16:14 AM UTC 24 Aug 25 06:16:16 AM UTC 24 32604736 ps
T1117 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_target_smbus_maxlen.2055765931 Aug 25 06:16:11 AM UTC 24 Aug 25 06:16:16 AM UTC 24 420754886 ps
T1118 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_target_tx_stretch_ctrl.2477003872 Aug 25 06:17:42 AM UTC 24 Aug 25 06:18:03 AM UTC 24 972132106 ps
T1119 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_target_nack_acqfull_addr.2361221376 Aug 25 06:16:12 AM UTC 24 Aug 25 06:16:17 AM UTC 24 578166515 ps
T1120 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_target_nack_acqfull.3782025754 Aug 25 06:16:12 AM UTC 24 Aug 25 06:16:18 AM UTC 24 2028851993 ps
T1121 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_host_override.3111784540 Aug 25 06:16:15 AM UTC 24 Aug 25 06:16:18 AM UTC 24 21440062 ps
T1122 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_target_smoke.129269655 Aug 25 06:15:47 AM UTC 24 Aug 25 06:16:19 AM UTC 24 862709334 ps
T262 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_reset_fmt.126852600 Aug 25 06:16:17 AM UTC 24 Aug 25 06:16:19 AM UTC 24 235579496 ps
T1123 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_full.177630553 Aug 25 06:14:33 AM UTC 24 Aug 25 06:16:20 AM UTC 24 8152771915 ps
T1124 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_target_stress_wr.2249381584 Aug 25 06:14:48 AM UTC 24 Aug 25 06:16:20 AM UTC 24 29750203056 ps
T1125 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_host_error_intr.1957546790 Aug 25 06:16:20 AM UTC 24 Aug 25 06:16:23 AM UTC 24 64481046 ps
T1126 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_target_stress_all.1004508985 Aug 25 06:13:18 AM UTC 24 Aug 25 06:16:24 AM UTC 24 29261128618 ps
T1127 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_reset_rx.52296794 Aug 25 06:16:18 AM UTC 24 Aug 25 06:16:25 AM UTC 24 911974112 ps
T1128 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_host_may_nack.1271412539 Aug 25 06:16:09 AM UTC 24 Aug 25 06:16:29 AM UTC 24 362998618 ps
T1129 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_fmt_empty.1353383032 Aug 25 06:16:18 AM UTC 24 Aug 25 06:16:34 AM UTC 24 1983539926 ps
T1130 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_target_intr_stress_wr.2850956936 Aug 25 06:15:09 AM UTC 24 Aug 25 06:16:37 AM UTC 24 20123246823 ps
T1131 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_target_smoke.3948941117 Aug 25 06:16:21 AM UTC 24 Aug 25 06:16:39 AM UTC 24 1099893819 ps
T1132 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_host_stretch_timeout.737357054 Aug 25 06:16:20 AM UTC 24 Aug 25 06:16:42 AM UTC 24 2954996482 ps
T1133 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_reset_acq.1110462804 Aug 25 06:16:40 AM UTC 24 Aug 25 06:16:43 AM UTC 24 641848923 ps
T1134 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_host_error_intr.2945206410 Aug 25 06:18:00 AM UTC 24 Aug 25 06:18:03 AM UTC 24 226960201 ps
T1135 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_target_intr_smoke.1114987542 Aug 25 06:16:31 AM UTC 24 Aug 25 06:16:43 AM UTC 24 2066015843 ps
T1136 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_overflow.3234929849 Aug 25 06:16:17 AM UTC 24 Aug 25 06:18:13 AM UTC 24 10036069935 ps
T1137 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_reset_tx.3741199717 Aug 25 06:16:43 AM UTC 24 Aug 25 06:16:46 AM UTC 24 337310342 ps
T1138 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_target_stress_rd.1454162463 Aug 25 06:16:25 AM UTC 24 Aug 25 06:16:49 AM UTC 24 1800437011 ps
T1139 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_target_hrst.614127897 Aug 25 06:16:46 AM UTC 24 Aug 25 06:16:50 AM UTC 24 1033701982 ps
T1140 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_target_intr_smoke.2374035425 Aug 25 06:18:04 AM UTC 24 Aug 25 06:18:10 AM UTC 24 1978151665 ps
T263 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/23.i2c_host_stress_all.4000273449 Aug 25 06:09:40 AM UTC 24 Aug 25 06:16:53 AM UTC 24 71643312152 ps
T1141 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_target_timeout.2307401784 Aug 25 06:16:39 AM UTC 24 Aug 25 06:16:53 AM UTC 24 19851098256 ps
T1142 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_target_perf.3765026258 Aug 25 06:16:43 AM UTC 24 Aug 25 06:16:53 AM UTC 24 745780424 ps
T1143 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_host_smoke.505071050 Aug 25 06:16:14 AM UTC 24 Aug 25 06:16:53 AM UTC 24 1779668341 ps
T1144 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_target_bad_addr.4179385805 Aug 25 06:16:44 AM UTC 24 Aug 25 06:16:54 AM UTC 24 5035111293 ps
T1145 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_watermarks_tx.3977700392 Aug 25 06:16:54 AM UTC 24 Aug 25 06:16:56 AM UTC 24 342139347 ps
T1146 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_watermarks_acq.342096913 Aug 25 06:16:54 AM UTC 24 Aug 25 06:16:58 AM UTC 24 296178089 ps
T1147 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_target_smbus_maxlen.1195032900 Aug 25 06:16:54 AM UTC 24 Aug 25 06:17:00 AM UTC 24 5558812151 ps
T1148 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_target_nack_acqfull.571371420 Aug 25 06:16:54 AM UTC 24 Aug 25 06:17:00 AM UTC 24 1173168343 ps
T1149 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_target_tx_stretch_ctrl.1725222660 Aug 25 06:16:54 AM UTC 24 Aug 25 06:17:01 AM UTC 24 135550975 ps
T1150 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_target_nack_acqfull_addr.4161406843 Aug 25 06:16:55 AM UTC 24 Aug 25 06:17:01 AM UTC 24 500957226 ps
T1151 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_target_nack_txstretch.2951329061 Aug 25 06:16:57 AM UTC 24 Aug 25 06:17:01 AM UTC 24 137526299 ps
T1152 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_alert_test.4116320075 Aug 25 06:16:59 AM UTC 24 Aug 25 06:17:01 AM UTC 24 29752176 ps
T1153 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_host_perf_precise.1499036942 Aug 25 06:16:19 AM UTC 24 Aug 25 06:17:02 AM UTC 24 2471156593 ps
T1154 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_host_perf.344376118 Aug 25 06:14:35 AM UTC 24 Aug 25 06:17:02 AM UTC 24 8833886238 ps
T1155 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_host_override.2909868639 Aug 25 06:17:01 AM UTC 24 Aug 25 06:17:03 AM UTC 24 68492239 ps
T1156 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/22.i2c_target_stress_all.1210477522 Aug 25 06:09:13 AM UTC 24 Aug 25 06:17:04 AM UTC 24 57779402171 ps
T1157 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_reset_fmt.2235867553 Aug 25 06:17:01 AM UTC 24 Aug 25 06:17:04 AM UTC 24 119199534 ps
T1158 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/27.i2c_target_intr_stress_wr.2351473540 Aug 25 06:12:22 AM UTC 24 Aug 25 06:17:07 AM UTC 24 17828503736 ps
T1159 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_host_perf_precise.1722597042 Aug 25 06:17:05 AM UTC 24 Aug 25 06:17:09 AM UTC 24 132874345 ps
T1160 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_reset_rx.2902398199 Aug 25 06:17:03 AM UTC 24 Aug 25 06:17:12 AM UTC 24 865522698 ps
T1161 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_overflow.835082522 Aug 25 06:15:34 AM UTC 24 Aug 25 06:17:14 AM UTC 24 2463557207 ps
T1162 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_target_stress_all.2108726796 Aug 25 06:16:04 AM UTC 24 Aug 25 06:17:14 AM UTC 24 12652356782 ps
T272 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_host_may_nack.4119555816 Aug 25 06:16:51 AM UTC 24 Aug 25 06:17:15 AM UTC 24 3893578253 ps
T1163 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_host_error_intr.2026628053 Aug 25 06:17:08 AM UTC 24 Aug 25 06:17:16 AM UTC 24 898231104 ps
T1164 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_full.3971737680 Aug 25 06:16:18 AM UTC 24 Aug 25 06:17:17 AM UTC 24 1710991326 ps
T1165 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_target_stretch.1146217457 Aug 25 06:17:16 AM UTC 24 Aug 25 06:17:22 AM UTC 24 1561036164 ps
T1166 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_host_smoke.2467937296 Aug 25 06:17:00 AM UTC 24 Aug 25 06:17:28 AM UTC 24 12619125597 ps
T1167 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_target_intr_smoke.2981832483 Aug 25 06:17:16 AM UTC 24 Aug 25 06:17:29 AM UTC 24 3666365900 ps
T1168 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_full.2591611615 Aug 25 06:15:36 AM UTC 24 Aug 25 06:17:29 AM UTC 24 8728738911 ps
T1169 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_fmt_empty.1743022790 Aug 25 06:17:03 AM UTC 24 Aug 25 06:17:29 AM UTC 24 1496097146 ps
T1170 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_reset_tx.1898639794 Aug 25 06:17:30 AM UTC 24 Aug 25 06:17:33 AM UTC 24 540387234 ps
T1171 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_reset_acq.2067879099 Aug 25 06:17:30 AM UTC 24 Aug 25 06:17:33 AM UTC 24 338407317 ps
T1172 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_target_timeout.2677203720 Aug 25 06:17:23 AM UTC 24 Aug 25 06:17:36 AM UTC 24 5702342914 ps
T1173 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_target_perf.3489030264 Aug 25 06:17:30 AM UTC 24 Aug 25 06:17:39 AM UTC 24 3302102504 ps
T306 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/25.i2c_host_stress_all.2634886559 Aug 25 06:10:57 AM UTC 24 Aug 25 06:17:40 AM UTC 24 8499810617 ps
T1174 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_host_perf.2301741856 Aug 25 06:17:04 AM UTC 24 Aug 25 06:17:42 AM UTC 24 2718786917 ps
T1175 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_host_stretch_timeout.3462498598 Aug 25 06:17:05 AM UTC 24 Aug 25 06:17:42 AM UTC 24 2139708403 ps
T1176 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/24.i2c_host_perf.170313959 Aug 25 06:10:15 AM UTC 24 Aug 25 06:17:43 AM UTC 24 50294043716 ps
T1177 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_watermarks_tx.1994529055 Aug 25 06:17:41 AM UTC 24 Aug 25 06:17:44 AM UTC 24 456137383 ps
T1178 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_watermarks_acq.2168202396 Aug 25 06:17:40 AM UTC 24 Aug 25 06:17:44 AM UTC 24 935534083 ps
T1179 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_target_bad_addr.3837105557 Aug 25 06:17:34 AM UTC 24 Aug 25 06:17:45 AM UTC 24 5220062831 ps
T1180 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_host_may_nack.4256779357 Aug 25 06:17:40 AM UTC 24 Aug 25 06:17:46 AM UTC 24 652574411 ps
T1181 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_target_smbus_maxlen.3412388627 Aug 25 06:17:43 AM UTC 24 Aug 25 06:17:47 AM UTC 24 991561850 ps
T1182 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_host_perf.89989134 Aug 25 06:16:19 AM UTC 24 Aug 25 06:17:48 AM UTC 24 3122765407 ps
T1183 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_alert_test.473871558 Aug 25 06:17:46 AM UTC 24 Aug 25 06:17:48 AM UTC 24 127902860 ps
T1184 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_target_stress_rd.4044529163 Aug 25 06:17:15 AM UTC 24 Aug 25 06:17:49 AM UTC 24 1319091981 ps
T1185 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_host_perf.3112703345 Aug 25 06:15:36 AM UTC 24 Aug 25 06:18:01 AM UTC 24 13425668477 ps
T1186 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_host_override.3127173036 Aug 25 06:17:48 AM UTC 24 Aug 25 06:17:50 AM UTC 24 25371436 ps
T1187 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_target_nack_acqfull.552306811 Aug 25 06:17:44 AM UTC 24 Aug 25 06:17:50 AM UTC 24 4219139187 ps
T1188 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_target_nack_acqfull_addr.1831830936 Aug 25 06:17:45 AM UTC 24 Aug 25 06:17:51 AM UTC 24 591923949 ps
T1189 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_reset_fmt.2775786649 Aug 25 06:17:50 AM UTC 24 Aug 25 06:17:53 AM UTC 24 101351613 ps
T1190 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_host_perf_precise.3848295306 Aug 25 06:17:55 AM UTC 24 Aug 25 06:17:58 AM UTC 24 117152719 ps
T1191 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_fmt_empty.4010288201 Aug 25 06:17:50 AM UTC 24 Aug 25 06:17:59 AM UTC 24 256243508 ps
T1192 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_reset_rx.57427868 Aug 25 06:17:51 AM UTC 24 Aug 25 06:17:59 AM UTC 24 216288398 ps
T1193 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_target_smoke.1996057709 Aug 25 06:17:13 AM UTC 24 Aug 25 06:17:59 AM UTC 24 1083074485 ps
T1194 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_host_stretch_timeout.2398041421 Aug 25 06:17:59 AM UTC 24 Aug 25 06:18:14 AM UTC 24 3180762454 ps
T1195 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_watermark.3416187046 Aug 25 06:12:47 AM UTC 24 Aug 25 06:18:16 AM UTC 24 4375643421 ps
T1196 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_reset_acq.4107718889 Aug 25 06:18:17 AM UTC 24 Aug 25 06:18:20 AM UTC 24 559412592 ps
T1197 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/22.i2c_host_perf.2918902028 Aug 25 06:08:49 AM UTC 24 Aug 25 06:18:22 AM UTC 24 7551868596 ps
T1198 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_reset_tx.736765599 Aug 25 06:18:20 AM UTC 24 Aug 25 06:18:23 AM UTC 24 536207493 ps
T125 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_watermark.207526141 Aug 25 06:17:01 AM UTC 24 Aug 25 06:18:23 AM UTC 24 6042894022 ps
T1199 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_target_timeout.234683484 Aug 25 06:18:14 AM UTC 24 Aug 25 06:18:26 AM UTC 24 1215251915 ps
T1200 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_target_perf.3219575865 Aug 25 06:18:20 AM UTC 24 Aug 25 06:18:27 AM UTC 24 4319744167 ps
T1201 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/32.i2c_target_intr_stress_wr.3946104824 Aug 25 06:16:35 AM UTC 24 Aug 25 06:18:29 AM UTC 24 15435483172 ps
T1202 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_target_stress_rd.2874604844 Aug 25 06:19:36 AM UTC 24 Aug 25 06:19:53 AM UTC 24 6174378956 ps
T1203 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_target_stress_rd.4217137072 Aug 25 06:18:47 AM UTC 24 Aug 25 06:19:54 AM UTC 24 1150826933 ps
T1204 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_watermark.4184221678 Aug 25 06:15:32 AM UTC 24 Aug 25 06:18:31 AM UTC 24 10971428589 ps
T1205 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_watermarks_tx.1014506797 Aug 25 06:18:29 AM UTC 24 Aug 25 06:18:32 AM UTC 24 442394283 ps
T1206 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_watermarks_acq.2481478355 Aug 25 06:18:28 AM UTC 24 Aug 25 06:18:33 AM UTC 24 452557540 ps
T1207 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_target_tx_stretch_ctrl.1655449684 Aug 25 06:18:30 AM UTC 24 Aug 25 06:18:34 AM UTC 24 67933236 ps
T1208 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_target_bad_addr.2009835070 Aug 25 06:18:23 AM UTC 24 Aug 25 06:18:34 AM UTC 24 1967794621 ps
T1209 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/26.i2c_target_stress_all.2300693568 Aug 25 06:11:54 AM UTC 24 Aug 25 06:18:34 AM UTC 24 52792272986 ps
T1210 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_target_smbus_maxlen.2178336864 Aug 25 06:18:31 AM UTC 24 Aug 25 06:18:36 AM UTC 24 4608576473 ps
T1211 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_host_may_nack.2916422963 Aug 25 06:18:26 AM UTC 24 Aug 25 06:18:36 AM UTC 24 10528806599 ps
T1212 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_alert_test.4163719833 Aug 25 06:18:35 AM UTC 24 Aug 25 06:18:37 AM UTC 24 27150988 ps
T1213 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_reset_tx.1332153977 Aug 25 06:19:50 AM UTC 24 Aug 25 06:19:54 AM UTC 24 231589696 ps
T284 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_host_override.2301381270 Aug 25 06:18:36 AM UTC 24 Aug 25 06:18:38 AM UTC 24 17674115 ps
T1214 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_target_nack_acqfull_addr.3047863556 Aug 25 06:18:33 AM UTC 24 Aug 25 06:18:38 AM UTC 24 854071680 ps
T1215 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_target_nack_acqfull.1316613646 Aug 25 06:18:32 AM UTC 24 Aug 25 06:18:39 AM UTC 24 1241687162 ps
T1216 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_host_mode_toggle.2539198775 Aug 25 06:19:54 AM UTC 24 Aug 25 06:19:57 AM UTC 24 463322922 ps
T1217 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_host_smoke.1075997324 Aug 25 06:17:47 AM UTC 24 Aug 25 06:18:40 AM UTC 24 3906159653 ps
T1218 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_overflow.2568608285 Aug 25 06:17:01 AM UTC 24 Aug 25 06:18:40 AM UTC 24 11791797774 ps
T1219 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_reset_fmt.304563913 Aug 25 06:18:38 AM UTC 24 Aug 25 06:18:41 AM UTC 24 275664620 ps
T1220 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_target_smoke.3476402965 Aug 25 06:18:00 AM UTC 24 Aug 25 06:18:43 AM UTC 24 4028505501 ps
T1221 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_host_perf_precise.4053296573 Aug 25 06:18:40 AM UTC 24 Aug 25 06:18:43 AM UTC 24 78248572 ps
T1222 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_host_error_intr.2820165700 Aug 25 06:18:42 AM UTC 24 Aug 25 06:18:46 AM UTC 24 231147753 ps
T1223 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_fmt_empty.828578317 Aug 25 06:18:38 AM UTC 24 Aug 25 06:18:47 AM UTC 24 1452753684 ps
T1224 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_target_stress_rd.3109288842 Aug 25 06:18:02 AM UTC 24 Aug 25 06:18:47 AM UTC 24 8019144348 ps
T1225 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_reset_rx.709794112 Aug 25 06:18:38 AM UTC 24 Aug 25 06:18:47 AM UTC 24 128618982 ps
T1226 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/13.i2c_host_perf.4013816782 Aug 25 06:02:26 AM UTC 24 Aug 25 06:18:49 AM UTC 24 27039062898 ps
T1227 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_host_stretch_timeout.640982293 Aug 25 06:18:40 AM UTC 24 Aug 25 06:18:53 AM UTC 24 11293981788 ps
T264 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/22.i2c_host_stress_all.2957390243 Aug 25 06:08:56 AM UTC 24 Aug 25 06:18:53 AM UTC 24 53518571235 ps
T1228 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/33.i2c_target_intr_stress_wr.1692050030 Aug 25 06:17:17 AM UTC 24 Aug 25 06:18:55 AM UTC 24 34563960358 ps
T1229 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/20.i2c_target_stress_all.1112250761 Aug 25 06:07:49 AM UTC 24 Aug 25 06:18:56 AM UTC 24 43521810275 ps
T1230 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_reset_tx.4024981069 Aug 25 06:18:55 AM UTC 24 Aug 25 06:18:58 AM UTC 24 203900796 ps
T1231 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_reset_acq.3687181272 Aug 25 06:18:54 AM UTC 24 Aug 25 06:18:58 AM UTC 24 258841569 ps
T1232 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_target_intr_smoke.2268817122 Aug 25 06:18:48 AM UTC 24 Aug 25 06:18:59 AM UTC 24 995769797 ps
T1233 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_target_timeout.852346065 Aug 25 06:18:50 AM UTC 24 Aug 25 06:19:00 AM UTC 24 4242126689 ps
T1234 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_target_hrst.4253349181 Aug 25 06:18:59 AM UTC 24 Aug 25 06:19:02 AM UTC 24 318348603 ps
T1235 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_target_perf.3676762915 Aug 25 06:18:58 AM UTC 24 Aug 25 06:19:03 AM UTC 24 935742756 ps
T1236 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_host_mode_toggle.3888055633 Aug 25 06:19:00 AM UTC 24 Aug 25 06:19:04 AM UTC 24 94611400 ps
T1237 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_target_smoke.1507737265 Aug 25 06:18:44 AM UTC 24 Aug 25 06:19:05 AM UTC 24 4594229887 ps
T1238 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_watermarks_tx.2623982480 Aug 25 06:19:04 AM UTC 24 Aug 25 06:19:08 AM UTC 24 705131537 ps
T1239 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_target_bad_addr.2652407367 Aug 25 06:18:59 AM UTC 24 Aug 25 06:19:08 AM UTC 24 854192849 ps
T1240 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_watermarks_acq.313895235 Aug 25 06:19:03 AM UTC 24 Aug 25 06:19:09 AM UTC 24 1056397229 ps
T1241 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_target_stretch.2811233172 Aug 25 06:18:48 AM UTC 24 Aug 25 06:19:11 AM UTC 24 2139915284 ps
T1242 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_target_smbus_maxlen.1805880809 Aug 25 06:19:05 AM UTC 24 Aug 25 06:19:12 AM UTC 24 3812722864 ps
T1243 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_target_tx_stretch_ctrl.2348851688 Aug 25 06:19:04 AM UTC 24 Aug 25 06:19:13 AM UTC 24 295049440 ps
T1244 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_alert_test.2044940724 Aug 25 06:19:12 AM UTC 24 Aug 25 06:19:14 AM UTC 24 15549450 ps
T1245 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_target_nack_txstretch.3813090283 Aug 25 06:19:10 AM UTC 24 Aug 25 06:19:14 AM UTC 24 896056996 ps
T1246 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_host_smoke.3080461600 Aug 25 06:18:35 AM UTC 24 Aug 25 06:19:15 AM UTC 24 7232361957 ps
T1247 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_target_nack_acqfull.3991621053 Aug 25 06:19:09 AM UTC 24 Aug 25 06:19:16 AM UTC 24 2144114915 ps
T1248 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_target_nack_acqfull_addr.3138139257 Aug 25 06:19:09 AM UTC 24 Aug 25 06:19:16 AM UTC 24 1376073049 ps
T1249 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_host_override.645807669 Aug 25 06:19:14 AM UTC 24 Aug 25 06:19:16 AM UTC 24 115027905 ps
T1250 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_reset_fmt.3822105470 Aug 25 06:19:16 AM UTC 24 Aug 25 06:19:18 AM UTC 24 1645144332 ps
T1251 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_target_intr_stress_wr.3839271381 Aug 25 06:18:10 AM UTC 24 Aug 25 06:19:22 AM UTC 24 6003435011 ps
T1252 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_host_perf_precise.1228300014 Aug 25 06:14:41 AM UTC 24 Aug 25 06:19:23 AM UTC 24 5853693911 ps
T1253 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_host_perf_precise.2447400083 Aug 25 06:19:19 AM UTC 24 Aug 25 06:19:24 AM UTC 24 770884698 ps
T1254 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_host_may_nack.3987640801 Aug 25 06:19:01 AM UTC 24 Aug 25 06:19:24 AM UTC 24 2086301124 ps
T1255 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_reset_rx.1699727799 Aug 25 06:19:17 AM UTC 24 Aug 25 06:19:25 AM UTC 24 365947368 ps
T1256 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_host_error_intr.2237724916 Aug 25 06:19:24 AM UTC 24 Aug 25 06:19:36 AM UTC 24 235565515 ps
T1257 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_full.3698370986 Aug 25 06:17:51 AM UTC 24 Aug 25 06:19:40 AM UTC 24 3352429375 ps
T1258 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_host_stretch_timeout.1068820888 Aug 25 06:19:22 AM UTC 24 Aug 25 06:19:41 AM UTC 24 740839329 ps
T1259 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/10.i2c_host_stress_all.2170317515 Aug 25 06:00:19 AM UTC 24 Aug 25 06:19:42 AM UTC 24 20342802385 ps
T1260 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_target_smoke.866970951 Aug 25 06:19:26 AM UTC 24 Aug 25 06:19:49 AM UTC 24 4591101720 ps
T1261 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_target_intr_stress_wr.3493957596 Aug 25 06:19:43 AM UTC 24 Aug 25 06:19:49 AM UTC 24 3533034871 ps
T1262 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_overflow.1058964838 Aug 25 06:18:37 AM UTC 24 Aug 25 06:19:49 AM UTC 24 2112255770 ps
T1263 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_fmt_empty.4131164701 Aug 25 06:19:17 AM UTC 24 Aug 25 06:19:49 AM UTC 24 2001579257 ps
T1264 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_host_smoke.1440901897 Aug 25 06:19:13 AM UTC 24 Aug 25 06:19:51 AM UTC 24 4136185207 ps
T1265 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_watermark.3788560551 Aug 25 06:14:32 AM UTC 24 Aug 25 06:19:51 AM UTC 24 17997539373 ps
T1266 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_target_intr_smoke.3971007845 Aug 25 06:19:42 AM UTC 24 Aug 25 06:19:53 AM UTC 24 899951558 ps
T1267 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_target_stress_wr.1462837296 Aug 25 06:18:44 AM UTC 24 Aug 25 06:19:53 AM UTC 24 40804448091 ps
T1268 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_reset_acq.3922984586 Aug 25 06:19:50 AM UTC 24 Aug 25 06:19:53 AM UTC 24 152211457 ps
T1269 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_watermarks_tx.946656781 Aug 25 06:19:55 AM UTC 24 Aug 25 06:19:58 AM UTC 24 111905085 ps
T1270 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_target_tx_stretch_ctrl.436140612 Aug 25 06:19:55 AM UTC 24 Aug 25 06:19:59 AM UTC 24 51283402 ps
T1271 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_target_stretch.903262291 Aug 25 06:19:41 AM UTC 24 Aug 25 06:19:59 AM UTC 24 3613133864 ps
T1272 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_target_perf.1481676157 Aug 25 06:19:52 AM UTC 24 Aug 25 06:20:00 AM UTC 24 15072202853 ps
T1273 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_watermarks_acq.3901441111 Aug 25 06:19:54 AM UTC 24 Aug 25 06:20:00 AM UTC 24 1166004234 ps
T1274 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_target_timeout.3216350310 Aug 25 06:19:50 AM UTC 24 Aug 25 06:20:02 AM UTC 24 3187832820 ps
T1275 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_target_bad_addr.3071360340 Aug 25 06:19:54 AM UTC 24 Aug 25 06:20:02 AM UTC 24 1373379122 ps
T1276 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_target_smbus_maxlen.3725278673 Aug 25 06:19:58 AM UTC 24 Aug 25 06:20:03 AM UTC 24 1004804195 ps
T1277 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_alert_test.162544591 Aug 25 06:20:02 AM UTC 24 Aug 25 06:20:04 AM UTC 24 42424159 ps
T1278 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_target_nack_txstretch.3085243085 Aug 25 06:20:00 AM UTC 24 Aug 25 06:20:04 AM UTC 24 629450992 ps
T1279 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_target_nack_acqfull_addr.4034537182 Aug 25 06:19:59 AM UTC 24 Aug 25 06:20:04 AM UTC 24 3448449883 ps
T1280 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_watermark.1471915723 Aug 25 06:17:49 AM UTC 24 Aug 25 06:20:04 AM UTC 24 19010696525 ps
T1281 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_target_nack_acqfull.474315095 Aug 25 06:19:59 AM UTC 24 Aug 25 06:20:05 AM UTC 24 563276242 ps
T1282 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_host_override.878608913 Aug 25 06:20:03 AM UTC 24 Aug 25 06:20:05 AM UTC 24 77898178 ps
T1283 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_reset_fmt.3936635931 Aug 25 06:20:05 AM UTC 24 Aug 25 06:20:08 AM UTC 24 660125071 ps
T1284 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_host_perf_precise.954988876 Aug 25 06:20:06 AM UTC 24 Aug 25 06:20:09 AM UTC 24 94436630 ps
T1285 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_watermark.3805885079 Aug 25 06:18:37 AM UTC 24 Aug 25 06:20:11 AM UTC 24 14776388999 ps
T1286 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_overflow.3918122954 Aug 25 06:17:49 AM UTC 24 Aug 25 06:20:12 AM UTC 24 1999981489 ps
T1287 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/36.i2c_host_may_nack.1892659600 Aug 25 06:19:54 AM UTC 24 Aug 25 06:20:12 AM UTC 24 328953390 ps
T1288 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_host_error_intr.3178967495 Aug 25 06:20:09 AM UTC 24 Aug 25 06:20:13 AM UTC 24 181402745 ps
T1289 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_host_perf.3469980179 Aug 25 06:20:05 AM UTC 24 Aug 25 06:20:15 AM UTC 24 1185934126 ps
T1290 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_reset_rx.2308162557 Aug 25 06:20:05 AM UTC 24 Aug 25 06:20:19 AM UTC 24 374669511 ps
T1291 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/35.i2c_target_stress_all.2740196435 Aug 25 06:18:58 AM UTC 24 Aug 25 06:20:20 AM UTC 24 9756800853 ps
T1292 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_fmt_empty.2121952652 Aug 25 06:20:05 AM UTC 24 Aug 25 06:20:22 AM UTC 24 255018945 ps
T1293 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/38.i2c_target_tx_stretch_ctrl.2543077927 Aug 25 06:21:12 AM UTC 24 Aug 25 06:21:21 AM UTC 24 292577058 ps
T1294 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/16.i2c_target_intr_stress_wr.1310541307 Aug 25 06:05:05 AM UTC 24 Aug 25 06:20:24 AM UTC 24 34565820204 ps
T1295 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_reset_acq.3657936026 Aug 25 06:20:22 AM UTC 24 Aug 25 06:20:25 AM UTC 24 274114326 ps
T1296 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_reset_tx.595994607 Aug 25 06:20:25 AM UTC 24 Aug 25 06:20:28 AM UTC 24 318546354 ps
T1297 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_target_intr_smoke.675915720 Aug 25 06:20:14 AM UTC 24 Aug 25 06:20:28 AM UTC 24 5219106664 ps
T1298 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_host_smoke.4126395613 Aug 25 06:20:02 AM UTC 24 Aug 25 06:20:30 AM UTC 24 5248164106 ps
T1299 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_target_smoke.3681787079 Aug 25 06:20:12 AM UTC 24 Aug 25 06:20:31 AM UTC 24 4287562770 ps
T1300 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_target_timeout.3514935195 Aug 25 06:20:20 AM UTC 24 Aug 25 06:20:31 AM UTC 24 1412409960 ps
T1301 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_target_perf.4050646384 Aug 25 06:20:25 AM UTC 24 Aug 25 06:20:32 AM UTC 24 1925628119 ps
T1302 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_target_hrst.607229661 Aug 25 06:20:29 AM UTC 24 Aug 25 06:20:33 AM UTC 24 1491291747 ps
T1303 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_host_mode_toggle.1549222993 Aug 25 06:20:29 AM UTC 24 Aug 25 06:20:33 AM UTC 24 142879866 ps
T1304 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/18.i2c_target_stress_all.2342456054 Aug 25 06:06:25 AM UTC 24 Aug 25 06:20:33 AM UTC 24 37085786282 ps
T1305 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_watermarks_tx.2108403459 Aug 25 06:20:32 AM UTC 24 Aug 25 06:20:34 AM UTC 24 139254122 ps
T1306 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_target_bad_addr.2690677084 Aug 25 06:20:25 AM UTC 24 Aug 25 06:20:35 AM UTC 24 977805528 ps
T1307 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_alert_test.2543297945 Aug 25 06:20:35 AM UTC 24 Aug 25 06:20:37 AM UTC 24 52757964 ps
T1308 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_target_stress_wr.2448220822 Aug 25 06:20:12 AM UTC 24 Aug 25 06:20:38 AM UTC 24 45333716389 ps
T1309 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_target_smbus_maxlen.3649357722 Aug 25 06:20:33 AM UTC 24 Aug 25 06:20:38 AM UTC 24 531788680 ps
T1310 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_watermarks_acq.1892332115 Aug 25 06:20:32 AM UTC 24 Aug 25 06:20:38 AM UTC 24 2439383314 ps
T1311 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_host_may_nack.585495284 Aug 25 06:20:31 AM UTC 24 Aug 25 06:20:38 AM UTC 24 409894144 ps
T1312 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_target_tx_stretch_ctrl.2058118017 Aug 25 06:20:33 AM UTC 24 Aug 25 06:20:40 AM UTC 24 198234914 ps
T1313 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_target_nack_acqfull.3838322791 Aug 25 06:20:34 AM UTC 24 Aug 25 06:20:40 AM UTC 24 517299787 ps
T48 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_target_nack_acqfull_addr.977566164 Aug 25 06:20:34 AM UTC 24 Aug 25 06:20:40 AM UTC 24 475397917 ps
T1314 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/38.i2c_host_override.2230014885 Aug 25 06:20:38 AM UTC 24 Aug 25 06:20:41 AM UTC 24 25930131 ps
T1315 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_target_stress_rd.3058907483 Aug 25 06:20:13 AM UTC 24 Aug 25 06:20:41 AM UTC 24 1206897480 ps
T1316 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_fmt.3306966775 Aug 25 06:20:40 AM UTC 24 Aug 25 06:20:42 AM UTC 24 81143136 ps
T1317 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_fmt_empty.3192323854 Aug 25 06:20:40 AM UTC 24 Aug 25 06:20:45 AM UTC 24 132576007 ps
T1318 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/37.i2c_host_stretch_timeout.4082947679 Aug 25 06:20:06 AM UTC 24 Aug 25 06:20:46 AM UTC 24 2832973480 ps
T1319 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_rx.1648830247 Aug 25 06:20:41 AM UTC 24 Aug 25 06:20:46 AM UTC 24 259145608 ps
T1320 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/38.i2c_host_error_intr.2435319875 Aug 25 06:20:42 AM UTC 24 Aug 25 06:20:48 AM UTC 24 836551436 ps
T1321 /workspaces/repo/scratch/os_regression_2024_08_24/i2c-sim-vcs/coverage/default/38.i2c_host_perf_precise.785544435 Aug 25 06:20:42 AM UTC 24 Aug 25 06:20:48 AM UTC 24 156739315 ps
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