T410 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_reset_rx.2874204703 |
|
|
Aug 27 07:05:51 AM UTC 24 |
Aug 27 07:05:58 AM UTC 24 |
145729502 ps |
T411 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/7.i2c_target_stress_rd.1239805607 |
|
|
Aug 27 07:05:34 AM UTC 24 |
Aug 27 07:05:59 AM UTC 24 |
14074086506 ps |
T169 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/2.i2c_host_fifo_full.324186020 |
|
|
Aug 27 07:04:10 AM UTC 24 |
Aug 27 07:06:02 AM UTC 24 |
11763073716 ps |
T412 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_target_intr_smoke.3392769060 |
|
|
Aug 27 07:05:56 AM UTC 24 |
Aug 27 07:06:02 AM UTC 24 |
622671043 ps |
T413 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_reset_acq.1723434574 |
|
|
Aug 27 07:05:59 AM UTC 24 |
Aug 27 07:06:03 AM UTC 24 |
192889482 ps |
T414 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_reset_tx.4080600251 |
|
|
Aug 27 07:06:00 AM UTC 24 |
Aug 27 07:06:03 AM UTC 24 |
225603926 ps |
T415 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_target_stretch.2321657258 |
|
|
Aug 27 07:05:56 AM UTC 24 |
Aug 27 07:06:04 AM UTC 24 |
1662210200 ps |
T33 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/7.i2c_host_may_nack.1495449618 |
|
|
Aug 27 07:05:43 AM UTC 24 |
Aug 27 07:06:06 AM UTC 24 |
2254441823 ps |
T192 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/0.i2c_host_fifo_overflow.1753825908 |
|
|
Aug 27 07:03:43 AM UTC 24 |
Aug 27 07:06:09 AM UTC 24 |
9209593394 ps |
T416 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_target_smoke.4091358065 |
|
|
Aug 27 07:05:54 AM UTC 24 |
Aug 27 07:06:10 AM UTC 24 |
2095058580 ps |
T417 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_watermarks_acq.1748813210 |
|
|
Aug 27 07:06:07 AM UTC 24 |
Aug 27 07:06:10 AM UTC 24 |
1030964804 ps |
T418 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_target_bad_addr.3966832956 |
|
|
Aug 27 07:06:03 AM UTC 24 |
Aug 27 07:06:10 AM UTC 24 |
676185375 ps |
T419 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_target_timeout.3200016567 |
|
|
Aug 27 07:05:58 AM UTC 24 |
Aug 27 07:06:10 AM UTC 24 |
4926337891 ps |
T420 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_target_perf.1877706557 |
|
|
Aug 27 07:06:00 AM UTC 24 |
Aug 27 07:06:10 AM UTC 24 |
736019737 ps |
T85 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_host_mode_toggle.3279304262 |
|
|
Aug 27 07:06:05 AM UTC 24 |
Aug 27 07:06:11 AM UTC 24 |
381750379 ps |
T421 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_watermarks_tx.2894186428 |
|
|
Aug 27 07:06:10 AM UTC 24 |
Aug 27 07:06:13 AM UTC 24 |
140024959 ps |
T422 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_host_smoke.294390113 |
|
|
Aug 27 07:05:49 AM UTC 24 |
Aug 27 07:06:14 AM UTC 24 |
6014405235 ps |
T423 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_alert_test.1586799042 |
|
|
Aug 27 07:06:12 AM UTC 24 |
Aug 27 07:06:14 AM UTC 24 |
38594614 ps |
T189 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_target_nack_txstretch.3840214523 |
|
|
Aug 27 07:06:11 AM UTC 24 |
Aug 27 07:06:15 AM UTC 24 |
164722423 ps |
T424 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_target_smbus_maxlen.2625504433 |
|
|
Aug 27 07:06:11 AM UTC 24 |
Aug 27 07:06:15 AM UTC 24 |
504818239 ps |
T425 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_target_tx_stretch_ctrl.953842910 |
|
|
Aug 27 07:06:11 AM UTC 24 |
Aug 27 07:06:16 AM UTC 24 |
113436226 ps |
T426 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_host_override.1786484445 |
|
|
Aug 27 07:06:14 AM UTC 24 |
Aug 27 07:06:16 AM UTC 24 |
148429725 ps |
T427 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_target_nack_acqfull_addr.176337762 |
|
|
Aug 27 07:06:11 AM UTC 24 |
Aug 27 07:06:17 AM UTC 24 |
1934268225 ps |
T428 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_target_nack_acqfull.64761341 |
|
|
Aug 27 07:06:11 AM UTC 24 |
Aug 27 07:06:17 AM UTC 24 |
495475927 ps |
T429 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_target_intr_stress_wr.2604451856 |
|
|
Aug 27 07:05:57 AM UTC 24 |
Aug 27 07:06:17 AM UTC 24 |
17060895627 ps |
T430 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_reset_fmt.3493753099 |
|
|
Aug 27 07:06:16 AM UTC 24 |
Aug 27 07:06:18 AM UTC 24 |
564306655 ps |
T431 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_fmt_empty.350704356 |
|
|
Aug 27 07:05:51 AM UTC 24 |
Aug 27 07:06:19 AM UTC 24 |
447746372 ps |
T432 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_host_stretch_timeout.551368802 |
|
|
Aug 27 07:05:53 AM UTC 24 |
Aug 27 07:06:20 AM UTC 24 |
1198583414 ps |
T433 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_reset_rx.261142753 |
|
|
Aug 27 07:06:17 AM UTC 24 |
Aug 27 07:06:22 AM UTC 24 |
141233738 ps |
T23 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_host_error_intr.3335209783 |
|
|
Aug 27 07:06:19 AM UTC 24 |
Aug 27 07:06:22 AM UTC 24 |
71101972 ps |
T251 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_host_perf.419102437 |
|
|
Aug 27 07:05:52 AM UTC 24 |
Aug 27 07:06:23 AM UTC 24 |
3632523213 ps |
T434 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_fmt_empty.2086889100 |
|
|
Aug 27 07:06:16 AM UTC 24 |
Aug 27 07:06:24 AM UTC 24 |
326324051 ps |
T90 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/5.i2c_host_fifo_watermark.1429599620 |
|
|
Aug 27 07:04:49 AM UTC 24 |
Aug 27 07:06:27 AM UTC 24 |
7515863355 ps |
T435 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_target_stress_rd.4077404514 |
|
|
Aug 27 07:05:55 AM UTC 24 |
Aug 27 07:06:28 AM UTC 24 |
1596194985 ps |
T21 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/0.i2c_host_stress_all.1965657943 |
|
|
Aug 27 07:03:46 AM UTC 24 |
Aug 27 07:06:31 AM UTC 24 |
10722279896 ps |
T47 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_host_may_nack.742045482 |
|
|
Aug 27 07:06:07 AM UTC 24 |
Aug 27 07:06:33 AM UTC 24 |
1125953966 ps |
T142 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_target_intr_smoke.712564306 |
|
|
Aug 27 07:06:24 AM UTC 24 |
Aug 27 07:06:33 AM UTC 24 |
1790298718 ps |
T143 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_reset_acq.1677485845 |
|
|
Aug 27 07:06:32 AM UTC 24 |
Aug 27 07:06:34 AM UTC 24 |
251770571 ps |
T144 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_reset_tx.1791005935 |
|
|
Aug 27 07:06:33 AM UTC 24 |
Aug 27 07:06:36 AM UTC 24 |
295553775 ps |
T145 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_host_smoke.473662766 |
|
|
Aug 27 07:06:12 AM UTC 24 |
Aug 27 07:06:40 AM UTC 24 |
3150297039 ps |
T146 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_target_timeout.2851879743 |
|
|
Aug 27 07:06:28 AM UTC 24 |
Aug 27 07:06:41 AM UTC 24 |
3203418764 ps |
T147 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_target_bad_addr.1230893515 |
|
|
Aug 27 07:06:35 AM UTC 24 |
Aug 27 07:06:42 AM UTC 24 |
2750868043 ps |
T148 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_target_perf.2047378214 |
|
|
Aug 27 07:06:34 AM UTC 24 |
Aug 27 07:06:43 AM UTC 24 |
1265935915 ps |
T149 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/1.i2c_host_fifo_overflow.1564279392 |
|
|
Aug 27 07:04:01 AM UTC 24 |
Aug 27 07:06:43 AM UTC 24 |
2563778092 ps |
T193 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/0.i2c_host_fifo_watermark.633665058 |
|
|
Aug 27 07:03:43 AM UTC 24 |
Aug 27 07:06:47 AM UTC 24 |
6621806022 ps |
T48 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/5.i2c_host_fifo_full.2325802137 |
|
|
Aug 27 07:04:51 AM UTC 24 |
Aug 27 07:06:47 AM UTC 24 |
9152397377 ps |
T436 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_host_mode_toggle.530637472 |
|
|
Aug 27 07:06:43 AM UTC 24 |
Aug 27 07:06:48 AM UTC 24 |
96907829 ps |
T437 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_alert_test.231205870 |
|
|
Aug 27 07:07:17 AM UTC 24 |
Aug 27 07:07:19 AM UTC 24 |
20113412 ps |
T438 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_watermarks_acq.2473309240 |
|
|
Aug 27 07:06:44 AM UTC 24 |
Aug 27 07:06:50 AM UTC 24 |
2333862031 ps |
T439 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_host_perf.3591375125 |
|
|
Aug 27 07:06:18 AM UTC 24 |
Aug 27 07:06:50 AM UTC 24 |
6197931151 ps |
T440 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_watermarks_tx.4000892157 |
|
|
Aug 27 07:06:47 AM UTC 24 |
Aug 27 07:06:50 AM UTC 24 |
151790940 ps |
T441 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_target_stress_rd.2460190829 |
|
|
Aug 27 07:06:22 AM UTC 24 |
Aug 27 07:06:51 AM UTC 24 |
536627673 ps |
T199 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/4.i2c_target_stress_all.3885501886 |
|
|
Aug 27 07:04:39 AM UTC 24 |
Aug 27 07:06:51 AM UTC 24 |
85488853642 ps |
T442 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_host_stretch_timeout.4188887676 |
|
|
Aug 27 07:06:18 AM UTC 24 |
Aug 27 07:06:52 AM UTC 24 |
572811594 ps |
T443 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_target_smbus_maxlen.2534735934 |
|
|
Aug 27 07:06:49 AM UTC 24 |
Aug 27 07:06:52 AM UTC 24 |
564074447 ps |
T261 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_host_may_nack.848740173 |
|
|
Aug 27 07:06:44 AM UTC 24 |
Aug 27 07:06:53 AM UTC 24 |
2940152355 ps |
T66 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_target_intr_stress_wr.1628095591 |
|
|
Aug 27 07:06:24 AM UTC 24 |
Aug 27 07:06:54 AM UTC 24 |
16523239796 ps |
T444 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_target_intr_smoke.2239143565 |
|
|
Aug 27 07:07:01 AM UTC 24 |
Aug 27 07:07:11 AM UTC 24 |
912397957 ps |
T445 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_alert_test.1405954831 |
|
|
Aug 27 07:06:52 AM UTC 24 |
Aug 27 07:06:54 AM UTC 24 |
16777943 ps |
T446 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_host_override.2652280695 |
|
|
Aug 27 07:06:52 AM UTC 24 |
Aug 27 07:06:54 AM UTC 24 |
47901349 ps |
T447 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_target_tx_stretch_ctrl.2053727370 |
|
|
Aug 27 07:06:47 AM UTC 24 |
Aug 27 07:06:54 AM UTC 24 |
154794909 ps |
T448 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_target_smoke.3305541512 |
|
|
Aug 27 07:06:21 AM UTC 24 |
Aug 27 07:06:55 AM UTC 24 |
951778751 ps |
T449 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_target_nack_acqfull_addr.3363893830 |
|
|
Aug 27 07:06:51 AM UTC 24 |
Aug 27 07:06:55 AM UTC 24 |
1803077045 ps |
T450 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_target_nack_acqfull.766039146 |
|
|
Aug 27 07:06:51 AM UTC 24 |
Aug 27 07:06:57 AM UTC 24 |
2293269862 ps |
T451 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_reset_fmt.3978246637 |
|
|
Aug 27 07:06:54 AM UTC 24 |
Aug 27 07:06:57 AM UTC 24 |
336233736 ps |
T170 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_full.3655103009 |
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|
Aug 27 07:05:52 AM UTC 24 |
Aug 27 07:06:58 AM UTC 24 |
5028376463 ps |
T452 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_host_error_intr.2405658727 |
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|
Aug 27 07:06:56 AM UTC 24 |
Aug 27 07:06:59 AM UTC 24 |
245593940 ps |
T453 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_overflow.3497794439 |
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|
Aug 27 07:05:11 AM UTC 24 |
Aug 27 07:07:00 AM UTC 24 |
25126980508 ps |
T454 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/7.i2c_host_smoke.2156676735 |
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|
Aug 27 07:05:27 AM UTC 24 |
Aug 27 07:07:01 AM UTC 24 |
2251184387 ps |
T455 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_host_perf_precise.3931284135 |
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|
Aug 27 07:06:56 AM UTC 24 |
Aug 27 07:07:01 AM UTC 24 |
134797866 ps |
T456 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_target_stress_all.1763337414 |
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|
Aug 27 07:06:34 AM UTC 24 |
Aug 27 07:07:04 AM UTC 24 |
9284030299 ps |
T457 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_host_perf.3899714123 |
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|
Aug 27 07:06:55 AM UTC 24 |
Aug 27 07:07:07 AM UTC 24 |
711497044 ps |
T458 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_target_stretch.2170543459 |
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|
Aug 27 07:06:22 AM UTC 24 |
Aug 27 07:07:07 AM UTC 24 |
4597915572 ps |
T459 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_reset_rx.1050925825 |
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|
Aug 27 07:06:54 AM UTC 24 |
Aug 27 07:07:10 AM UTC 24 |
1406881276 ps |
T460 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_reset_acq.3080784946 |
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|
Aug 27 07:07:08 AM UTC 24 |
Aug 27 07:07:10 AM UTC 24 |
204232716 ps |
T461 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_reset_tx.2586659204 |
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|
Aug 27 07:07:08 AM UTC 24 |
Aug 27 07:07:10 AM UTC 24 |
137025502 ps |
T462 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_full.1290287335 |
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|
Aug 27 07:05:13 AM UTC 24 |
Aug 27 07:07:11 AM UTC 24 |
12567606474 ps |
T463 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_target_smoke.4203983295 |
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|
Aug 27 07:06:58 AM UTC 24 |
Aug 27 07:07:11 AM UTC 24 |
1603172473 ps |
T464 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_target_timeout.1423472297 |
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|
Aug 27 07:07:02 AM UTC 24 |
Aug 27 07:07:13 AM UTC 24 |
2021803840 ps |
T152 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_host_override.2078449176 |
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|
Aug 27 07:08:13 AM UTC 24 |
Aug 27 07:08:14 AM UTC 24 |
113108434 ps |
T122 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_watermark.2143390529 |
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|
Aug 27 07:05:28 AM UTC 24 |
Aug 27 07:07:14 AM UTC 24 |
10666467830 ps |
T465 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_host_mode_toggle.2040205585 |
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|
Aug 27 07:07:12 AM UTC 24 |
Aug 27 07:07:15 AM UTC 24 |
254032133 ps |
T466 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_fmt_empty.3433627748 |
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|
Aug 27 07:06:54 AM UTC 24 |
Aug 27 07:07:15 AM UTC 24 |
331247197 ps |
T467 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_target_bad_addr.2982269183 |
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|
Aug 27 07:07:11 AM UTC 24 |
Aug 27 07:07:16 AM UTC 24 |
561030279 ps |
T468 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_target_perf.2534660303 |
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|
Aug 27 07:07:09 AM UTC 24 |
Aug 27 07:07:16 AM UTC 24 |
5381087545 ps |
T469 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_target_stress_rd.3335582993 |
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|
Aug 27 07:06:59 AM UTC 24 |
Aug 27 07:07:16 AM UTC 24 |
3531584402 ps |
T470 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_watermarks_tx.3681052925 |
|
|
Aug 27 07:07:13 AM UTC 24 |
Aug 27 07:07:17 AM UTC 24 |
558917618 ps |
T265 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_host_may_nack.1097926331 |
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|
Aug 27 07:07:12 AM UTC 24 |
Aug 27 07:07:17 AM UTC 24 |
2112103629 ps |
T471 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_watermarks_acq.257914226 |
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|
Aug 27 07:07:12 AM UTC 24 |
Aug 27 07:07:19 AM UTC 24 |
3623097601 ps |
T472 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_target_tx_stretch_ctrl.2409436841 |
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|
Aug 27 07:07:14 AM UTC 24 |
Aug 27 07:07:19 AM UTC 24 |
138900673 ps |
T473 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_target_nack_acqfull_addr.2861991357 |
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|
Aug 27 07:07:16 AM UTC 24 |
Aug 27 07:07:19 AM UTC 24 |
547866121 ps |
T474 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_target_smbus_maxlen.1850235169 |
|
|
Aug 27 07:07:14 AM UTC 24 |
Aug 27 07:07:20 AM UTC 24 |
4513889024 ps |
T153 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_host_override.192812169 |
|
|
Aug 27 07:07:18 AM UTC 24 |
Aug 27 07:07:20 AM UTC 24 |
63942297 ps |
T475 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_target_nack_acqfull.3921972603 |
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|
Aug 27 07:07:15 AM UTC 24 |
Aug 27 07:07:21 AM UTC 24 |
427285233 ps |
T476 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_target_stretch.2157313801 |
|
|
Aug 27 07:07:00 AM UTC 24 |
Aug 27 07:07:21 AM UTC 24 |
3345449168 ps |
T477 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_host_smoke.569956555 |
|
|
Aug 27 07:06:52 AM UTC 24 |
Aug 27 07:07:22 AM UTC 24 |
4253920866 ps |
T478 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_reset_fmt.1204960947 |
|
|
Aug 27 07:07:20 AM UTC 24 |
Aug 27 07:07:23 AM UTC 24 |
384172595 ps |
T479 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_host_stretch_timeout.1626930909 |
|
|
Aug 27 07:06:56 AM UTC 24 |
Aug 27 07:07:25 AM UTC 24 |
817328117 ps |
T67 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/3.i2c_target_stress_wr.1733659275 |
|
|
Aug 27 07:04:22 AM UTC 24 |
Aug 27 07:07:27 AM UTC 24 |
41599313327 ps |
T480 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/1.i2c_target_intr_stress_wr.252408908 |
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|
Aug 27 07:04:05 AM UTC 24 |
Aug 27 07:07:29 AM UTC 24 |
16549084382 ps |
T481 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/5.i2c_host_fifo_overflow.2130443031 |
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|
Aug 27 07:04:49 AM UTC 24 |
Aug 27 07:07:29 AM UTC 24 |
11824194629 ps |
T482 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/1.i2c_host_fifo_full.2334296686 |
|
|
Aug 27 07:04:02 AM UTC 24 |
Aug 27 07:07:30 AM UTC 24 |
15126266438 ps |
T24 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_host_error_intr.444342547 |
|
|
Aug 27 07:07:23 AM UTC 24 |
Aug 27 07:07:31 AM UTC 24 |
755937601 ps |
T483 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_full.4074471400 |
|
|
Aug 27 07:06:18 AM UTC 24 |
Aug 27 07:07:34 AM UTC 24 |
2875733593 ps |
T484 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_host_stretch_timeout.2986157841 |
|
|
Aug 27 07:07:22 AM UTC 24 |
Aug 27 07:07:35 AM UTC 24 |
650401240 ps |
T485 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_reset_rx.1881971671 |
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|
Aug 27 07:07:20 AM UTC 24 |
Aug 27 07:07:36 AM UTC 24 |
200679541 ps |
T486 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_target_intr_smoke.3205005461 |
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|
Aug 27 07:07:30 AM UTC 24 |
Aug 27 07:07:36 AM UTC 24 |
441728303 ps |
T487 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_alert_test.3514313898 |
|
|
Aug 27 07:08:11 AM UTC 24 |
Aug 27 07:08:13 AM UTC 24 |
42838089 ps |
T488 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_target_stretch.2473203243 |
|
|
Aug 27 07:07:29 AM UTC 24 |
Aug 27 07:07:37 AM UTC 24 |
1665111421 ps |
T489 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_target_stress_wr.2750144415 |
|
|
Aug 27 07:07:53 AM UTC 24 |
Aug 27 07:08:16 AM UTC 24 |
23215143503 ps |
T490 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_fmt_empty.1704057642 |
|
|
Aug 27 07:07:20 AM UTC 24 |
Aug 27 07:07:38 AM UTC 24 |
285027623 ps |
T491 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_host_stretch_timeout.1190680819 |
|
|
Aug 27 07:07:51 AM UTC 24 |
Aug 27 07:08:11 AM UTC 24 |
864554679 ps |
T492 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_reset_acq.305848961 |
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|
Aug 27 07:07:35 AM UTC 24 |
Aug 27 07:07:38 AM UTC 24 |
182463114 ps |
T493 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_reset_tx.3989431271 |
|
|
Aug 27 07:07:37 AM UTC 24 |
Aug 27 07:07:39 AM UTC 24 |
230639920 ps |
T494 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_target_timeout.3776470083 |
|
|
Aug 27 07:07:32 AM UTC 24 |
Aug 27 07:07:42 AM UTC 24 |
1269250227 ps |
T495 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_target_hrst.159663361 |
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|
Aug 27 07:07:39 AM UTC 24 |
Aug 27 07:07:43 AM UTC 24 |
3158672399 ps |
T496 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_watermarks_tx.3329300315 |
|
|
Aug 27 07:07:40 AM UTC 24 |
Aug 27 07:07:43 AM UTC 24 |
550732788 ps |
T497 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_watermarks_acq.1448690833 |
|
|
Aug 27 07:07:39 AM UTC 24 |
Aug 27 07:07:44 AM UTC 24 |
1305226170 ps |
T303 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_target_bad_addr.1080913711 |
|
|
Aug 27 07:07:38 AM UTC 24 |
Aug 27 07:07:44 AM UTC 24 |
625240623 ps |
T498 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_target_perf.3827417553 |
|
|
Aug 27 07:07:38 AM UTC 24 |
Aug 27 07:07:45 AM UTC 24 |
1045652485 ps |
T499 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_host_may_nack.2139734597 |
|
|
Aug 27 07:07:39 AM UTC 24 |
Aug 27 07:07:46 AM UTC 24 |
1510174755 ps |
T500 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_host_perf.2925837604 |
|
|
Aug 27 07:07:20 AM UTC 24 |
Aug 27 07:07:46 AM UTC 24 |
6211930131 ps |
T501 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_alert_test.2256524535 |
|
|
Aug 27 07:07:46 AM UTC 24 |
Aug 27 07:07:48 AM UTC 24 |
47251159 ps |
T502 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_host_smoke.2410121826 |
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|
Aug 27 07:07:47 AM UTC 24 |
Aug 27 07:08:17 AM UTC 24 |
1527510881 ps |
T503 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_target_intr_stress_wr.491550554 |
|
|
Aug 27 07:07:02 AM UTC 24 |
Aug 27 07:07:48 AM UTC 24 |
14517605991 ps |
T504 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_target_bad_addr.1764258960 |
|
|
Aug 27 07:08:05 AM UTC 24 |
Aug 27 07:08:16 AM UTC 24 |
1107006972 ps |
T505 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_target_nack_txstretch.3708775280 |
|
|
Aug 27 07:07:46 AM UTC 24 |
Aug 27 07:07:49 AM UTC 24 |
139225929 ps |
T506 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_target_smbus_maxlen.374832365 |
|
|
Aug 27 07:07:44 AM UTC 24 |
Aug 27 07:07:49 AM UTC 24 |
465567592 ps |
T507 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_host_override.2947590868 |
|
|
Aug 27 07:07:48 AM UTC 24 |
Aug 27 07:07:50 AM UTC 24 |
55386870 ps |
T123 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_watermark.2022286765 |
|
|
Aug 27 07:06:53 AM UTC 24 |
Aug 27 07:07:50 AM UTC 24 |
10895221755 ps |
T508 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_host_mode_toggle.151885771 |
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|
Aug 27 07:08:07 AM UTC 24 |
Aug 27 07:08:12 AM UTC 24 |
379848278 ps |
T509 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_target_nack_acqfull_addr.3670879513 |
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|
Aug 27 07:07:44 AM UTC 24 |
Aug 27 07:07:51 AM UTC 24 |
597960713 ps |
T510 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_watermarks_tx.2767045887 |
|
|
Aug 27 07:08:09 AM UTC 24 |
Aug 27 07:08:11 AM UTC 24 |
81655538 ps |
T511 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_target_nack_acqfull.3053798766 |
|
|
Aug 27 07:07:44 AM UTC 24 |
Aug 27 07:07:51 AM UTC 24 |
2267147568 ps |
T512 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_target_tx_stretch_ctrl.2840894451 |
|
|
Aug 27 07:07:43 AM UTC 24 |
Aug 27 07:07:52 AM UTC 24 |
402956337 ps |
T513 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_reset_fmt.3330289473 |
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|
Aug 27 07:07:49 AM UTC 24 |
Aug 27 07:07:52 AM UTC 24 |
236774522 ps |
T514 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_overflow.961225047 |
|
|
Aug 27 07:05:28 AM UTC 24 |
Aug 27 07:07:52 AM UTC 24 |
7727154490 ps |
T515 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_host_perf_precise.2800896852 |
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|
Aug 27 07:07:51 AM UTC 24 |
Aug 27 07:07:55 AM UTC 24 |
85541068 ps |
T516 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_fmt_empty.3984743842 |
|
|
Aug 27 07:07:49 AM UTC 24 |
Aug 27 07:07:56 AM UTC 24 |
771274769 ps |
T517 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_host_error_intr.1847089141 |
|
|
Aug 27 07:07:53 AM UTC 24 |
Aug 27 07:07:56 AM UTC 24 |
469290827 ps |
T518 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_reset_rx.871680095 |
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|
Aug 27 07:07:50 AM UTC 24 |
Aug 27 07:07:57 AM UTC 24 |
403022318 ps |
T519 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_target_smoke.1904227233 |
|
|
Aug 27 07:07:24 AM UTC 24 |
Aug 27 07:07:58 AM UTC 24 |
3663608578 ps |
T520 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_target_stress_rd.3591206776 |
|
|
Aug 27 07:07:28 AM UTC 24 |
Aug 27 07:07:59 AM UTC 24 |
870615346 ps |
T521 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/4.i2c_host_fifo_watermark.1471191980 |
|
|
Aug 27 07:04:33 AM UTC 24 |
Aug 27 07:07:59 AM UTC 24 |
3775322710 ps |
T522 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_target_stretch.335591213 |
|
|
Aug 27 07:07:57 AM UTC 24 |
Aug 27 07:08:01 AM UTC 24 |
5696269919 ps |
T523 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_reset_acq.1138913646 |
|
|
Aug 27 07:08:01 AM UTC 24 |
Aug 27 07:08:03 AM UTC 24 |
341347494 ps |
T524 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_target_intr_smoke.43581321 |
|
|
Aug 27 07:07:57 AM UTC 24 |
Aug 27 07:08:04 AM UTC 24 |
2778870463 ps |
T525 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_reset_tx.3004164648 |
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|
Aug 27 07:08:03 AM UTC 24 |
Aug 27 07:08:05 AM UTC 24 |
406316838 ps |
T526 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_target_smoke.3315321808 |
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|
Aug 27 07:07:53 AM UTC 24 |
Aug 27 07:08:06 AM UTC 24 |
4776910157 ps |
T527 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_target_stress_rd.3858264772 |
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|
Aug 27 07:07:56 AM UTC 24 |
Aug 27 07:08:06 AM UTC 24 |
350460927 ps |
T528 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_overflow.2955234444 |
|
|
Aug 27 07:05:50 AM UTC 24 |
Aug 27 07:08:07 AM UTC 24 |
2254117053 ps |
T529 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_overflow.1541227854 |
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|
Aug 27 07:06:16 AM UTC 24 |
Aug 27 07:08:08 AM UTC 24 |
2685097160 ps |
T530 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_target_hrst.2650377572 |
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|
Aug 27 07:08:06 AM UTC 24 |
Aug 27 07:08:09 AM UTC 24 |
204336980 ps |
T531 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_target_perf.1861661784 |
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|
Aug 27 07:08:03 AM UTC 24 |
Aug 27 07:08:10 AM UTC 24 |
6256215861 ps |
T304 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_target_timeout.3478084010 |
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|
Aug 27 07:07:59 AM UTC 24 |
Aug 27 07:08:10 AM UTC 24 |
1370346865 ps |
T532 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_host_perf.1791653914 |
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|
Aug 27 07:08:16 AM UTC 24 |
Aug 27 07:08:22 AM UTC 24 |
527861024 ps |
T533 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_watermarks_acq.2662459122 |
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|
Aug 27 07:08:09 AM UTC 24 |
Aug 27 07:08:13 AM UTC 24 |
2884723734 ps |
T534 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_target_nack_txstretch.884949737 |
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|
Aug 27 07:08:11 AM UTC 24 |
Aug 27 07:08:14 AM UTC 24 |
1520956660 ps |
T535 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_target_smbus_maxlen.3204432242 |
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|
Aug 27 07:08:09 AM UTC 24 |
Aug 27 07:08:14 AM UTC 24 |
458614348 ps |
T536 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_target_nack_acqfull_addr.769708461 |
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|
Aug 27 07:08:11 AM UTC 24 |
Aug 27 07:08:15 AM UTC 24 |
449181214 ps |
T537 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_target_nack_acqfull.2203306752 |
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|
Aug 27 07:08:10 AM UTC 24 |
Aug 27 07:08:15 AM UTC 24 |
1926072194 ps |
T538 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_target_tx_stretch_ctrl.3629732702 |
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|
Aug 27 07:08:09 AM UTC 24 |
Aug 27 07:08:16 AM UTC 24 |
142274551 ps |
T539 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_reset_fmt.1976227793 |
|
|
Aug 27 07:08:15 AM UTC 24 |
Aug 27 07:08:17 AM UTC 24 |
74638670 ps |
T540 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_target_stress_all.4247939186 |
|
|
Aug 27 07:07:38 AM UTC 24 |
Aug 27 07:08:18 AM UTC 24 |
54960951937 ps |
T541 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_target_stress_wr.1707466947 |
|
|
Aug 27 07:05:54 AM UTC 24 |
Aug 27 07:08:18 AM UTC 24 |
48803035746 ps |
T542 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_host_perf_precise.3605011979 |
|
|
Aug 27 07:08:17 AM UTC 24 |
Aug 27 07:08:20 AM UTC 24 |
33323538 ps |
T543 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_overflow.2517393414 |
|
|
Aug 27 07:06:53 AM UTC 24 |
Aug 27 07:08:23 AM UTC 24 |
11015123962 ps |
T286 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/8.i2c_target_stress_all.1169635889 |
|
|
Aug 27 07:06:02 AM UTC 24 |
Aug 27 07:08:25 AM UTC 24 |
21012708083 ps |
T544 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_fmt_empty.2235733470 |
|
|
Aug 27 07:08:15 AM UTC 24 |
Aug 27 07:08:25 AM UTC 24 |
423413206 ps |
T545 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_full.2719816987 |
|
|
Aug 27 07:06:54 AM UTC 24 |
Aug 27 07:08:25 AM UTC 24 |
11625413672 ps |
T546 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_host_stretch_timeout.1625576220 |
|
|
Aug 27 07:08:17 AM UTC 24 |
Aug 27 07:08:27 AM UTC 24 |
387736185 ps |
T547 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_reset_rx.1847889797 |
|
|
Aug 27 07:08:15 AM UTC 24 |
Aug 27 07:08:27 AM UTC 24 |
182415600 ps |
T548 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_reset_tx.1811651842 |
|
|
Aug 27 07:08:26 AM UTC 24 |
Aug 27 07:08:29 AM UTC 24 |
303654232 ps |
T549 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/5.i2c_target_stress_all.2361768548 |
|
|
Aug 27 07:05:02 AM UTC 24 |
Aug 27 07:08:30 AM UTC 24 |
24193833971 ps |
T550 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_reset_acq.3736218711 |
|
|
Aug 27 07:08:26 AM UTC 24 |
Aug 27 07:08:30 AM UTC 24 |
235462441 ps |
T551 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_target_intr_smoke.4159232834 |
|
|
Aug 27 07:08:21 AM UTC 24 |
Aug 27 07:08:32 AM UTC 24 |
1120234565 ps |
T552 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_target_smoke.482996789 |
|
|
Aug 27 07:08:18 AM UTC 24 |
Aug 27 07:08:33 AM UTC 24 |
618733362 ps |
T124 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/1.i2c_host_stress_all.824562669 |
|
|
Aug 27 07:04:03 AM UTC 24 |
Aug 27 07:08:35 AM UTC 24 |
11600920798 ps |
T553 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_target_stretch.3072439977 |
|
|
Aug 27 07:08:20 AM UTC 24 |
Aug 27 07:08:35 AM UTC 24 |
5061370223 ps |
T554 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_target_timeout.2621705613 |
|
|
Aug 27 07:08:24 AM UTC 24 |
Aug 27 07:08:35 AM UTC 24 |
1143675842 ps |
T555 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_target_bad_addr.3046783469 |
|
|
Aug 27 07:08:28 AM UTC 24 |
Aug 27 07:08:36 AM UTC 24 |
2368450151 ps |
T556 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_target_stress_wr.2657219168 |
|
|
Aug 27 07:07:26 AM UTC 24 |
Aug 27 07:08:36 AM UTC 24 |
42542263781 ps |
T557 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_host_may_nack.1669202579 |
|
|
Aug 27 07:08:07 AM UTC 24 |
Aug 27 07:08:36 AM UTC 24 |
684585671 ps |
T138 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_host_stress_all.1758994848 |
|
|
Aug 27 07:07:53 AM UTC 24 |
Aug 27 07:08:36 AM UTC 24 |
22402571519 ps |
T558 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_watermarks_tx.3722043212 |
|
|
Aug 27 07:08:34 AM UTC 24 |
Aug 27 07:08:37 AM UTC 24 |
148637525 ps |
T559 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_target_perf.3724651689 |
|
|
Aug 27 07:08:28 AM UTC 24 |
Aug 27 07:08:37 AM UTC 24 |
2641583257 ps |
T560 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_host_smoke.1632505342 |
|
|
Aug 27 07:07:17 AM UTC 24 |
Aug 27 07:08:38 AM UTC 24 |
2201704117 ps |
T561 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_watermarks_acq.608869763 |
|
|
Aug 27 07:08:33 AM UTC 24 |
Aug 27 07:08:38 AM UTC 24 |
496977826 ps |
T562 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_target_smbus_maxlen.659304085 |
|
|
Aug 27 07:08:36 AM UTC 24 |
Aug 27 07:08:39 AM UTC 24 |
1701551464 ps |
T563 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_alert_test.4174195007 |
|
|
Aug 27 07:08:37 AM UTC 24 |
Aug 27 07:08:39 AM UTC 24 |
46871936 ps |
T275 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_host_override.2551801237 |
|
|
Aug 27 07:08:37 AM UTC 24 |
Aug 27 07:08:39 AM UTC 24 |
17225723 ps |
T564 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_full.2991894221 |
|
|
Aug 27 07:07:20 AM UTC 24 |
Aug 27 07:08:40 AM UTC 24 |
13632760780 ps |
T565 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/15.i2c_host_perf_precise.1504230593 |
|
|
Aug 27 07:09:13 AM UTC 24 |
Aug 27 07:09:17 AM UTC 24 |
216242862 ps |
T566 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_fmt_empty.2858765192 |
|
|
Aug 27 07:09:11 AM UTC 24 |
Aug 27 07:09:21 AM UTC 24 |
2257153381 ps |
T567 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_target_nack_acqfull.1756889100 |
|
|
Aug 27 07:08:36 AM UTC 24 |
Aug 27 07:08:41 AM UTC 24 |
2120605615 ps |
T568 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/1.i2c_host_fifo_watermark.2260974069 |
|
|
Aug 27 07:04:01 AM UTC 24 |
Aug 27 07:08:42 AM UTC 24 |
4765533973 ps |
T569 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_reset_fmt.3581609145 |
|
|
Aug 27 07:08:40 AM UTC 24 |
Aug 27 07:08:43 AM UTC 24 |
593002043 ps |
T570 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_target_nack_acqfull_addr.1249579316 |
|
|
Aug 27 07:08:37 AM UTC 24 |
Aug 27 07:08:44 AM UTC 24 |
1112861307 ps |
T571 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_target_tx_stretch_ctrl.2774506853 |
|
|
Aug 27 07:08:35 AM UTC 24 |
Aug 27 07:08:44 AM UTC 24 |
479113227 ps |
T572 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_full.1260673653 |
|
|
Aug 27 07:05:30 AM UTC 24 |
Aug 27 07:08:46 AM UTC 24 |
13309331420 ps |
T573 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_host_error_intr.1613956400 |
|
|
Aug 27 07:08:42 AM UTC 24 |
Aug 27 07:08:47 AM UTC 24 |
633465381 ps |
T574 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_target_stress_rd.2198216299 |
|
|
Aug 27 07:08:20 AM UTC 24 |
Aug 27 07:08:48 AM UTC 24 |
1483997290 ps |
T575 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/6.i2c_target_stress_wr.1091413367 |
|
|
Aug 27 07:05:14 AM UTC 24 |
Aug 27 07:08:50 AM UTC 24 |
60229322665 ps |
T576 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_target_stretch.3971329747 |
|
|
Aug 27 07:08:48 AM UTC 24 |
Aug 27 07:08:51 AM UTC 24 |
333982939 ps |
T577 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_host_stretch_timeout.1107717186 |
|
|
Aug 27 07:08:42 AM UTC 24 |
Aug 27 07:08:52 AM UTC 24 |
479319821 ps |
T287 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_reset_acq.3877628770 |
|
|
Aug 27 07:08:53 AM UTC 24 |
Aug 27 07:08:56 AM UTC 24 |
179987790 ps |
T578 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_target_intr_smoke.1745502696 |
|
|
Aug 27 07:08:49 AM UTC 24 |
Aug 27 07:08:56 AM UTC 24 |
2216314560 ps |
T579 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_reset_rx.129161281 |
|
|
Aug 27 07:08:41 AM UTC 24 |
Aug 27 07:08:57 AM UTC 24 |
1109372582 ps |
T263 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_host_may_nack.1350250059 |
|
|
Aug 27 07:08:31 AM UTC 24 |
Aug 27 07:08:58 AM UTC 24 |
1274706117 ps |
T308 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_reset_tx.2526576729 |
|
|
Aug 27 07:08:55 AM UTC 24 |
Aug 27 07:09:00 AM UTC 24 |
348387545 ps |
T580 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_target_timeout.591506754 |
|
|
Aug 27 07:08:51 AM UTC 24 |
Aug 27 07:09:01 AM UTC 24 |
2512814980 ps |
T581 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_overflow.1632165271 |
|
|
Aug 27 07:08:14 AM UTC 24 |
Aug 27 07:09:02 AM UTC 24 |
3967724392 ps |
T269 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_host_may_nack.1019160096 |
|
|
Aug 27 07:09:03 AM UTC 24 |
Aug 27 07:09:15 AM UTC 24 |
476606311 ps |
T225 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/2.i2c_target_stress_all.3833491904 |
|
|
Aug 27 07:04:14 AM UTC 24 |
Aug 27 07:09:15 AM UTC 24 |
53605532916 ps |
T582 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_host_perf_precise.1753152166 |
|
|
Aug 27 07:07:22 AM UTC 24 |
Aug 27 07:09:19 AM UTC 24 |
24435795350 ps |
T583 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/15.i2c_host_error_intr.3295045115 |
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|
Aug 27 07:09:16 AM UTC 24 |
Aug 27 07:09:22 AM UTC 24 |
272647854 ps |
T584 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_target_perf.2860741392 |
|
|
Aug 27 07:08:57 AM UTC 24 |
Aug 27 07:09:04 AM UTC 24 |
8439169601 ps |
T585 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_host_smoke.2275684596 |
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|
Aug 27 07:08:37 AM UTC 24 |
Aug 27 07:09:04 AM UTC 24 |
2625718316 ps |
T586 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_fmt_empty.3925180718 |
|
|
Aug 27 07:08:41 AM UTC 24 |
Aug 27 07:09:05 AM UTC 24 |
1214812189 ps |
T587 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_target_bad_addr.194135531 |
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|
Aug 27 07:08:57 AM UTC 24 |
Aug 27 07:09:06 AM UTC 24 |
4039264757 ps |
T588 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_target_stress_rd.3079376435 |
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|
Aug 27 07:08:46 AM UTC 24 |
Aug 27 07:09:21 AM UTC 24 |
6610392483 ps |
T589 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/2.i2c_target_intr_stress_wr.3865203603 |
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|
Aug 27 07:04:13 AM UTC 24 |
Aug 27 07:09:07 AM UTC 24 |
18899284281 ps |
T590 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_watermarks_tx.396021676 |
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|
Aug 27 07:09:05 AM UTC 24 |
Aug 27 07:09:08 AM UTC 24 |
105091314 ps |
T591 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_target_smoke.3396166971 |
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|
Aug 27 07:08:44 AM UTC 24 |
Aug 27 07:09:08 AM UTC 24 |
5370164745 ps |
T592 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_watermarks_acq.1378909023 |
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|
Aug 27 07:09:03 AM UTC 24 |
Aug 27 07:09:08 AM UTC 24 |
4725378372 ps |
T593 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_alert_test.2757613075 |
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|
Aug 27 07:09:07 AM UTC 24 |
Aug 27 07:09:09 AM UTC 24 |
17728475 ps |
T594 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_target_smbus_maxlen.4065903383 |
|
|
Aug 27 07:09:05 AM UTC 24 |
Aug 27 07:09:10 AM UTC 24 |
424191480 ps |
T595 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_target_nack_acqfull.3122075922 |
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|
Aug 27 07:09:05 AM UTC 24 |
Aug 27 07:09:10 AM UTC 24 |
604307774 ps |
T596 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_target_nack_txstretch.2871841921 |
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|
Aug 27 07:09:07 AM UTC 24 |
Aug 27 07:09:11 AM UTC 24 |
358083821 ps |
T597 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_watermark.3453548997 |
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|
Aug 27 07:07:18 AM UTC 24 |
Aug 27 07:09:11 AM UTC 24 |
4374584500 ps |
T598 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/15.i2c_host_override.3874257291 |
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|
Aug 27 07:09:09 AM UTC 24 |
Aug 27 07:09:12 AM UTC 24 |
32336324 ps |
T599 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_target_nack_acqfull_addr.1713440558 |
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|
Aug 27 07:09:06 AM UTC 24 |
Aug 27 07:09:12 AM UTC 24 |
514887046 ps |
T600 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_reset_fmt.741466075 |
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|
Aug 27 07:09:11 AM UTC 24 |
Aug 27 07:09:13 AM UTC 24 |
1821511186 ps |
T601 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_host_perf_precise.721868177 |
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|
Aug 27 07:08:42 AM UTC 24 |
Aug 27 07:09:16 AM UTC 24 |
6463725142 ps |
T602 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_target_tx_stretch_ctrl.2884936469 |
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|
Aug 27 07:09:05 AM UTC 24 |
Aug 27 07:09:20 AM UTC 24 |
606022749 ps |
T603 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_target_intr_stress_wr.1104747406 |
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|
Aug 27 07:08:23 AM UTC 24 |
Aug 27 07:09:25 AM UTC 24 |
23437881035 ps |
T604 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_reset_rx.504802378 |
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|
Aug 27 07:09:12 AM UTC 24 |
Aug 27 07:09:26 AM UTC 24 |
171633138 ps |
T605 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_acq.2182400147 |
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|
Aug 27 07:09:27 AM UTC 24 |
Aug 27 07:09:29 AM UTC 24 |
189127559 ps |
T606 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/15.i2c_target_intr_smoke.2042042976 |
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|
Aug 27 07:09:22 AM UTC 24 |
Aug 27 07:09:30 AM UTC 24 |
755191089 ps |
T607 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_overflow.3499955791 |
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|
Aug 27 07:08:39 AM UTC 24 |
Aug 27 07:09:31 AM UTC 24 |
23653300940 ps |
T608 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_tx.1810709708 |
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|
Aug 27 07:09:30 AM UTC 24 |
Aug 27 07:09:32 AM UTC 24 |
250147191 ps |
T609 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/13.i2c_target_stress_all.1078649869 |
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|
Aug 27 07:08:28 AM UTC 24 |
Aug 27 07:09:33 AM UTC 24 |
32212950867 ps |
T305 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_target_stress_all.1994656850 |
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|
Aug 27 07:08:57 AM UTC 24 |
Aug 27 07:09:34 AM UTC 24 |
27186958996 ps |
T610 |
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Aug 27 07:09:23 AM UTC 24 |
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/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_target_stress_all.1543753176 |
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Aug 27 07:08:04 AM UTC 24 |
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/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/15.i2c_target_smoke.3809700557 |
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Aug 27 07:09:17 AM UTC 24 |
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/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_full.3921268788 |
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Aug 27 07:08:41 AM UTC 24 |
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3272056335 ps |
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/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/15.i2c_target_hrst.100848627 |
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Aug 27 07:09:33 AM UTC 24 |
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/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/14.i2c_host_perf.3593413136 |
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Aug 27 07:08:41 AM UTC 24 |
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2843458362 ps |
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/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_watermarks_acq.1974054966 |
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Aug 27 07:09:35 AM UTC 24 |
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