T1320 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/37.i2c_target_nack_acqfull_addr.1042644971 |
|
|
Aug 27 07:23:22 AM UTC 24 |
Aug 27 07:23:27 AM UTC 24 |
472962322 ps |
T1321 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_host_override.2364640967 |
|
|
Aug 27 07:23:25 AM UTC 24 |
Aug 27 07:23:27 AM UTC 24 |
380272364 ps |
T1322 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/37.i2c_target_stretch.2049154339 |
|
|
Aug 27 07:22:55 AM UTC 24 |
Aug 27 07:23:28 AM UTC 24 |
4269990590 ps |
T1323 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_fmt.4081435185 |
|
|
Aug 27 07:23:26 AM UTC 24 |
Aug 27 07:23:29 AM UTC 24 |
268506436 ps |
T1324 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/37.i2c_host_may_nack.3597171653 |
|
|
Aug 27 07:23:16 AM UTC 24 |
Aug 27 07:23:29 AM UTC 24 |
475365742 ps |
T1325 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/37.i2c_host_smoke.3378932070 |
|
|
Aug 27 07:22:38 AM UTC 24 |
Aug 27 07:23:30 AM UTC 24 |
1271827204 ps |
T1326 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_watermark.802716954 |
|
|
Aug 27 07:20:58 AM UTC 24 |
Aug 27 07:23:34 AM UTC 24 |
11768672150 ps |
T1327 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_host_error_intr.1060056793 |
|
|
Aug 27 07:23:32 AM UTC 24 |
Aug 27 07:23:36 AM UTC 24 |
63829038 ps |
T1328 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_host_perf_precise.2075463669 |
|
|
Aug 27 07:23:29 AM UTC 24 |
Aug 27 07:23:39 AM UTC 24 |
144426133 ps |
T1329 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_fmt_empty.1640253542 |
|
|
Aug 27 07:23:27 AM UTC 24 |
Aug 27 07:23:39 AM UTC 24 |
1538061037 ps |
T1330 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_rx.2790301767 |
|
|
Aug 27 07:23:27 AM UTC 24 |
Aug 27 07:23:40 AM UTC 24 |
219222495 ps |
T1331 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/30.i2c_host_perf.4175647987 |
|
|
Aug 27 07:17:36 AM UTC 24 |
Aug 27 07:23:44 AM UTC 24 |
27533440563 ps |
T1332 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_overflow.2439099105 |
|
|
Aug 27 07:22:03 AM UTC 24 |
Aug 27 07:23:46 AM UTC 24 |
1414452402 ps |
T1333 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_target_stress_all.3586896670 |
|
|
Aug 27 07:16:04 AM UTC 24 |
Aug 27 07:23:50 AM UTC 24 |
66428846697 ps |
T1334 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_target_intr_smoke.2714739708 |
|
|
Aug 27 07:23:44 AM UTC 24 |
Aug 27 07:23:51 AM UTC 24 |
1318640897 ps |
T1335 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_target_stretch.195098825 |
|
|
Aug 27 07:23:41 AM UTC 24 |
Aug 27 07:23:52 AM UTC 24 |
3136687296 ps |
T1336 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_full.4013573077 |
|
|
Aug 27 07:22:05 AM UTC 24 |
Aug 27 07:23:52 AM UTC 24 |
3500038736 ps |
T1337 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_host_perf_precise.323088327 |
|
|
Aug 27 07:16:54 AM UTC 24 |
Aug 27 07:23:52 AM UTC 24 |
24469573102 ps |
T1338 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_reset_tx.566210647 |
|
|
Aug 27 07:23:53 AM UTC 24 |
Aug 27 07:23:55 AM UTC 24 |
171600013 ps |
T1339 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_host_stretch_timeout.263875303 |
|
|
Aug 27 07:23:31 AM UTC 24 |
Aug 27 07:23:55 AM UTC 24 |
1072384912 ps |
T1340 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_reset_acq.135746332 |
|
|
Aug 27 07:23:53 AM UTC 24 |
Aug 27 07:23:56 AM UTC 24 |
993798490 ps |
T1341 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_target_bad_addr.2717701192 |
|
|
Aug 27 07:25:35 AM UTC 24 |
Aug 27 07:25:43 AM UTC 24 |
1161338656 ps |
T1342 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_target_timeout.4266856806 |
|
|
Aug 27 07:23:50 AM UTC 24 |
Aug 27 07:23:59 AM UTC 24 |
1393580787 ps |
T1343 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_target_perf.3578802748 |
|
|
Aug 27 07:23:54 AM UTC 24 |
Aug 27 07:24:02 AM UTC 24 |
1284501055 ps |
T1344 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_target_bad_addr.3585096343 |
|
|
Aug 27 07:23:56 AM UTC 24 |
Aug 27 07:24:03 AM UTC 24 |
3152862730 ps |
T1345 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_target_stress_rd.605620116 |
|
|
Aug 27 07:23:40 AM UTC 24 |
Aug 27 07:24:05 AM UTC 24 |
2846277983 ps |
T1346 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_watermarks_tx.1608813694 |
|
|
Aug 27 07:24:02 AM UTC 24 |
Aug 27 07:24:05 AM UTC 24 |
705688123 ps |
T1347 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/36.i2c_target_stress_all.3857235738 |
|
|
Aug 27 07:22:29 AM UTC 24 |
Aug 27 07:24:06 AM UTC 24 |
44561620921 ps |
T1348 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_watermarks_acq.3086630405 |
|
|
Aug 27 07:24:01 AM UTC 24 |
Aug 27 07:24:06 AM UTC 24 |
1723853222 ps |
T1349 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_target_tx_stretch_ctrl.3903789386 |
|
|
Aug 27 07:24:03 AM UTC 24 |
Aug 27 07:24:08 AM UTC 24 |
235174388 ps |
T1350 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_target_smbus_maxlen.3465535181 |
|
|
Aug 27 07:24:04 AM UTC 24 |
Aug 27 07:24:09 AM UTC 24 |
422739232 ps |
T1351 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_alert_test.3875611411 |
|
|
Aug 27 07:24:07 AM UTC 24 |
Aug 27 07:24:09 AM UTC 24 |
17041512 ps |
T1352 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_target_smoke.925722829 |
|
|
Aug 27 07:23:37 AM UTC 24 |
Aug 27 07:24:10 AM UTC 24 |
3764792191 ps |
T1353 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull_addr.3548756470 |
|
|
Aug 27 07:24:06 AM UTC 24 |
Aug 27 07:24:10 AM UTC 24 |
3672126605 ps |
T1354 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_target_nack_txstretch.2315938443 |
|
|
Aug 27 07:24:07 AM UTC 24 |
Aug 27 07:24:10 AM UTC 24 |
1480701934 ps |
T1355 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull.4123579602 |
|
|
Aug 27 07:24:06 AM UTC 24 |
Aug 27 07:24:11 AM UTC 24 |
2329244225 ps |
T1356 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_host_override.2575847396 |
|
|
Aug 27 07:24:09 AM UTC 24 |
Aug 27 07:24:11 AM UTC 24 |
78444385 ps |
T1357 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_fmt.2869177391 |
|
|
Aug 27 07:24:10 AM UTC 24 |
Aug 27 07:24:13 AM UTC 24 |
664485078 ps |
T1358 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_host_may_nack.1162821122 |
|
|
Aug 27 07:23:59 AM UTC 24 |
Aug 27 07:24:17 AM UTC 24 |
2160607491 ps |
T1359 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_host_perf_precise.4096355826 |
|
|
Aug 27 07:24:18 AM UTC 24 |
Aug 27 07:24:20 AM UTC 24 |
114999683 ps |
T1360 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_rx.3444194777 |
|
|
Aug 27 07:24:12 AM UTC 24 |
Aug 27 07:24:21 AM UTC 24 |
1746058053 ps |
T1361 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_host_smoke.56975487 |
|
|
Aug 27 07:23:23 AM UTC 24 |
Aug 27 07:24:21 AM UTC 24 |
26594446045 ps |
T1362 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_full.482198202 |
|
|
Aug 27 07:23:28 AM UTC 24 |
Aug 27 07:24:24 AM UTC 24 |
7977194002 ps |
T1363 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_host_error_intr.2834339006 |
|
|
Aug 27 07:24:22 AM UTC 24 |
Aug 27 07:24:25 AM UTC 24 |
64498026 ps |
T1364 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_watermark.2347421520 |
|
|
Aug 27 07:21:33 AM UTC 24 |
Aug 27 07:24:30 AM UTC 24 |
12556862394 ps |
T1365 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_fmt_empty.2747653012 |
|
|
Aug 27 07:24:11 AM UTC 24 |
Aug 27 07:24:33 AM UTC 24 |
1020539588 ps |
T1366 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_target_stretch.3657638933 |
|
|
Aug 27 07:24:33 AM UTC 24 |
Aug 27 07:24:37 AM UTC 24 |
215963864 ps |
T1367 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_host_smoke.1046669253 |
|
|
Aug 27 07:24:09 AM UTC 24 |
Aug 27 07:24:46 AM UTC 24 |
12221848114 ps |
T1368 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_watermark.3722949022 |
|
|
Aug 27 07:22:39 AM UTC 24 |
Aug 27 07:24:46 AM UTC 24 |
41712254311 ps |
T1369 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_target_intr_smoke.361795044 |
|
|
Aug 27 07:24:37 AM UTC 24 |
Aug 27 07:24:47 AM UTC 24 |
915614066 ps |
T1370 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_target_smoke.1726677802 |
|
|
Aug 27 07:24:25 AM UTC 24 |
Aug 27 07:24:49 AM UTC 24 |
8871191749 ps |
T1371 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_target_stress_rd.1043343463 |
|
|
Aug 27 07:24:30 AM UTC 24 |
Aug 27 07:24:50 AM UTC 24 |
315175835 ps |
T1372 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_acq.1682120392 |
|
|
Aug 27 07:24:48 AM UTC 24 |
Aug 27 07:24:51 AM UTC 24 |
316788282 ps |
T1373 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_tx.2977967669 |
|
|
Aug 27 07:24:49 AM UTC 24 |
Aug 27 07:24:51 AM UTC 24 |
202952284 ps |
T1374 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_overflow.3300765070 |
|
|
Aug 27 07:23:26 AM UTC 24 |
Aug 27 07:24:57 AM UTC 24 |
2367975044 ps |
T1375 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_target_hrst.4025484092 |
|
|
Aug 27 07:24:52 AM UTC 24 |
Aug 27 07:24:57 AM UTC 24 |
1158906602 ps |
T1376 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_target_perf.3608911419 |
|
|
Aug 27 07:24:50 AM UTC 24 |
Aug 27 07:24:58 AM UTC 24 |
4892619115 ps |
T1377 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_target_timeout.327058130 |
|
|
Aug 27 07:24:47 AM UTC 24 |
Aug 27 07:24:59 AM UTC 24 |
4971224943 ps |
T1378 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_overflow.825974882 |
|
|
Aug 27 07:22:40 AM UTC 24 |
Aug 27 07:25:02 AM UTC 24 |
1971735655 ps |
T1379 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_acq.1063947533 |
|
|
Aug 27 07:25:00 AM UTC 24 |
Aug 27 07:25:03 AM UTC 24 |
229916542 ps |
T1380 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_overflow.1470332278 |
|
|
Aug 27 07:24:10 AM UTC 24 |
Aug 27 07:25:03 AM UTC 24 |
7433319957 ps |
T1381 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_tx.303188931 |
|
|
Aug 27 07:25:01 AM UTC 24 |
Aug 27 07:25:04 AM UTC 24 |
134366458 ps |
T1382 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_target_intr_stress_wr.3139830067 |
|
|
Aug 27 07:24:45 AM UTC 24 |
Aug 27 07:25:04 AM UTC 24 |
19600314111 ps |
T1383 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_target_bad_addr.4288935378 |
|
|
Aug 27 07:24:52 AM UTC 24 |
Aug 27 07:25:04 AM UTC 24 |
1371547011 ps |
T1384 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_host_mode_toggle.154820580 |
|
|
Aug 27 07:24:58 AM UTC 24 |
Aug 27 07:25:05 AM UTC 24 |
466996155 ps |
T1385 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_target_tx_stretch_ctrl.597108501 |
|
|
Aug 27 07:25:04 AM UTC 24 |
Aug 27 07:25:07 AM UTC 24 |
59732570 ps |
T1386 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_alert_test.3202166648 |
|
|
Aug 27 07:25:05 AM UTC 24 |
Aug 27 07:25:07 AM UTC 24 |
18693752 ps |
T1387 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/36.i2c_target_intr_stress_wr.2922067676 |
|
|
Aug 27 07:22:23 AM UTC 24 |
Aug 27 07:25:07 AM UTC 24 |
21540905925 ps |
T1388 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_target_smbus_maxlen.3910986970 |
|
|
Aug 27 07:25:04 AM UTC 24 |
Aug 27 07:25:08 AM UTC 24 |
510773201 ps |
T1389 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_target_nack_txstretch.2322773481 |
|
|
Aug 27 07:25:05 AM UTC 24 |
Aug 27 07:25:09 AM UTC 24 |
575114815 ps |
T1390 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull.4254941845 |
|
|
Aug 27 07:25:04 AM UTC 24 |
Aug 27 07:25:10 AM UTC 24 |
3825217271 ps |
T1391 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_host_override.2448778299 |
|
|
Aug 27 07:25:08 AM UTC 24 |
Aug 27 07:25:10 AM UTC 24 |
46300883 ps |
T1392 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull_addr.2126957431 |
|
|
Aug 27 07:25:05 AM UTC 24 |
Aug 27 07:25:11 AM UTC 24 |
2144816922 ps |
T1393 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_fmt.2497182391 |
|
|
Aug 27 07:25:10 AM UTC 24 |
Aug 27 07:25:12 AM UTC 24 |
256201644 ps |
T1394 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_host_stretch_timeout.2085011712 |
|
|
Aug 27 07:24:22 AM UTC 24 |
Aug 27 07:25:13 AM UTC 24 |
1093133674 ps |
T1395 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_rx.1705671337 |
|
|
Aug 27 07:25:11 AM UTC 24 |
Aug 27 07:25:17 AM UTC 24 |
130175720 ps |
T1396 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_watermark.3604880077 |
|
|
Aug 27 07:23:25 AM UTC 24 |
Aug 27 07:25:18 AM UTC 24 |
4751882116 ps |
T1397 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_host_may_nack.1617308343 |
|
|
Aug 27 07:24:58 AM UTC 24 |
Aug 27 07:25:18 AM UTC 24 |
1480394203 ps |
T1398 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_watermark.1262975281 |
|
|
Aug 27 07:24:10 AM UTC 24 |
Aug 27 07:25:19 AM UTC 24 |
12675712879 ps |
T1399 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/45.i2c_target_intr_smoke.1787769978 |
|
|
Aug 27 07:29:27 AM UTC 24 |
Aug 27 07:29:38 AM UTC 24 |
1284837033 ps |
T1400 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_full.1344801158 |
|
|
Aug 27 07:24:12 AM UTC 24 |
Aug 27 07:25:21 AM UTC 24 |
6628752869 ps |
T1401 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_host_error_intr.415429604 |
|
|
Aug 27 07:25:18 AM UTC 24 |
Aug 27 07:25:24 AM UTC 24 |
164191706 ps |
T1402 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/37.i2c_target_stress_all.3292883576 |
|
|
Aug 27 07:23:12 AM UTC 24 |
Aug 27 07:25:24 AM UTC 24 |
23796578105 ps |
T1403 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_fmt_empty.581143849 |
|
|
Aug 27 07:25:10 AM UTC 24 |
Aug 27 07:25:26 AM UTC 24 |
291604851 ps |
T1404 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_target_intr_smoke.2874914090 |
|
|
Aug 27 07:25:24 AM UTC 24 |
Aug 27 07:25:29 AM UTC 24 |
2020962605 ps |
T1405 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_target_stretch.2920120386 |
|
|
Aug 27 07:25:23 AM UTC 24 |
Aug 27 07:25:32 AM UTC 24 |
1142592256 ps |
T1406 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_host_stretch_timeout.2052545774 |
|
|
Aug 27 07:25:14 AM UTC 24 |
Aug 27 07:25:34 AM UTC 24 |
1017358795 ps |
T1407 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_acq.2062165747 |
|
|
Aug 27 07:25:30 AM UTC 24 |
Aug 27 07:25:34 AM UTC 24 |
467713841 ps |
T1408 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_tx.68775416 |
|
|
Aug 27 07:25:32 AM UTC 24 |
Aug 27 07:25:35 AM UTC 24 |
1546724544 ps |
T1409 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_full.121882889 |
|
|
Aug 27 07:22:41 AM UTC 24 |
Aug 27 07:25:37 AM UTC 24 |
11686338856 ps |
T1410 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_host_perf_precise.2876011302 |
|
|
Aug 27 07:25:13 AM UTC 24 |
Aug 27 07:25:38 AM UTC 24 |
1854086940 ps |
T1411 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_target_timeout.1078127138 |
|
|
Aug 27 07:25:25 AM UTC 24 |
Aug 27 07:25:38 AM UTC 24 |
1466825326 ps |
T1412 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_target_perf.3831231742 |
|
|
Aug 27 07:25:33 AM UTC 24 |
Aug 27 07:25:39 AM UTC 24 |
1347713302 ps |
T1413 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_target_hrst.1620360114 |
|
|
Aug 27 07:25:36 AM UTC 24 |
Aug 27 07:25:41 AM UTC 24 |
573611085 ps |
T1414 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_watermarks_acq.2622125668 |
|
|
Aug 27 07:25:39 AM UTC 24 |
Aug 27 07:25:44 AM UTC 24 |
323938183 ps |
T1415 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_watermarks_tx.1001610102 |
|
|
Aug 27 07:25:41 AM UTC 24 |
Aug 27 07:25:44 AM UTC 24 |
132830335 ps |
T1416 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_alert_test.1756971682 |
|
|
Aug 27 07:25:44 AM UTC 24 |
Aug 27 07:25:46 AM UTC 24 |
18093978 ps |
T1417 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_target_nack_txstretch.1594391749 |
|
|
Aug 27 07:25:44 AM UTC 24 |
Aug 27 07:25:47 AM UTC 24 |
164416442 ps |
T1418 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_target_smbus_maxlen.3133890271 |
|
|
Aug 27 07:25:42 AM UTC 24 |
Aug 27 07:25:48 AM UTC 24 |
395140813 ps |
T1419 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_target_tx_stretch_ctrl.3888811596 |
|
|
Aug 27 07:25:41 AM UTC 24 |
Aug 27 07:25:49 AM UTC 24 |
222414391 ps |
T56 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull_addr.3198695793 |
|
|
Aug 27 07:25:44 AM UTC 24 |
Aug 27 07:25:49 AM UTC 24 |
1523188203 ps |
T1420 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull.1882392162 |
|
|
Aug 27 07:25:42 AM UTC 24 |
Aug 27 07:25:49 AM UTC 24 |
2163706083 ps |
T267 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_host_may_nack.255846375 |
|
|
Aug 27 07:25:39 AM UTC 24 |
Aug 27 07:25:50 AM UTC 24 |
2109349102 ps |
T1421 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_host_override.1966815449 |
|
|
Aug 27 07:25:49 AM UTC 24 |
Aug 27 07:25:51 AM UTC 24 |
82998374 ps |
T1422 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_target_stress_rd.2725546433 |
|
|
Aug 27 07:25:23 AM UTC 24 |
Aug 27 07:25:52 AM UTC 24 |
1368180828 ps |
T1423 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_fmt.823885414 |
|
|
Aug 27 07:25:50 AM UTC 24 |
Aug 27 07:25:53 AM UTC 24 |
551713204 ps |
T1424 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_host_smoke.1783614023 |
|
|
Aug 27 07:25:05 AM UTC 24 |
Aug 27 07:25:54 AM UTC 24 |
21135449418 ps |
T1425 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_target_stress_all.1034786666 |
|
|
Aug 27 07:23:55 AM UTC 24 |
Aug 27 07:25:54 AM UTC 24 |
22129985784 ps |
T1426 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_target_smoke.4223531577 |
|
|
Aug 27 07:25:19 AM UTC 24 |
Aug 27 07:25:55 AM UTC 24 |
1816105294 ps |
T1427 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_fmt_empty.3837955516 |
|
|
Aug 27 07:25:50 AM UTC 24 |
Aug 27 07:25:56 AM UTC 24 |
253152741 ps |
T1428 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_host_perf_precise.1646295856 |
|
|
Aug 27 07:25:54 AM UTC 24 |
Aug 27 07:25:57 AM UTC 24 |
105999264 ps |
T1429 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_rx.2738930835 |
|
|
Aug 27 07:25:51 AM UTC 24 |
Aug 27 07:26:01 AM UTC 24 |
139787534 ps |
T1430 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_host_error_intr.172036380 |
|
|
Aug 27 07:25:55 AM UTC 24 |
Aug 27 07:26:01 AM UTC 24 |
304168647 ps |
T1431 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_host_perf.440466159 |
|
|
Aug 27 07:25:53 AM UTC 24 |
Aug 27 07:26:03 AM UTC 24 |
360230064 ps |
T1432 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_overflow.2166987083 |
|
|
Aug 27 07:25:08 AM UTC 24 |
Aug 27 07:26:06 AM UTC 24 |
2118981744 ps |
T1433 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_host_stretch_timeout.943830069 |
|
|
Aug 27 07:25:54 AM UTC 24 |
Aug 27 07:26:07 AM UTC 24 |
1133485396 ps |
T1434 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_target_stretch.2625177489 |
|
|
Aug 27 07:26:03 AM UTC 24 |
Aug 27 07:26:09 AM UTC 24 |
1101105921 ps |
T1435 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_target_intr_stress_wr.2681069691 |
|
|
Aug 27 07:25:25 AM UTC 24 |
Aug 27 07:26:10 AM UTC 24 |
30755328785 ps |
T1436 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_target_intr_smoke.241687409 |
|
|
Aug 27 07:26:04 AM UTC 24 |
Aug 27 07:26:11 AM UTC 24 |
1412633477 ps |
T1437 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_acq.4133517196 |
|
|
Aug 27 07:26:10 AM UTC 24 |
Aug 27 07:26:13 AM UTC 24 |
211116567 ps |
T1438 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_overflow.2773588995 |
|
|
Aug 27 07:28:58 AM UTC 24 |
Aug 27 07:29:36 AM UTC 24 |
5898774483 ps |
T1439 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_target_smoke.1775216792 |
|
|
Aug 27 07:25:57 AM UTC 24 |
Aug 27 07:26:14 AM UTC 24 |
1851967748 ps |
T1440 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_tx.2535888752 |
|
|
Aug 27 07:26:12 AM UTC 24 |
Aug 27 07:26:14 AM UTC 24 |
410687632 ps |
T1441 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_host_perf.3926038638 |
|
|
Aug 27 07:23:29 AM UTC 24 |
Aug 27 07:26:19 AM UTC 24 |
5172083555 ps |
T1442 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_target_timeout.1013979621 |
|
|
Aug 27 07:26:08 AM UTC 24 |
Aug 27 07:26:20 AM UTC 24 |
6115573300 ps |
T1443 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_target_stress_rd.1415544960 |
|
|
Aug 27 07:26:02 AM UTC 24 |
Aug 27 07:26:20 AM UTC 24 |
1982057313 ps |
T1444 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_target_hrst.110532319 |
|
|
Aug 27 07:26:16 AM UTC 24 |
Aug 27 07:26:21 AM UTC 24 |
377176791 ps |
T1445 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_host_override.4241520012 |
|
|
Aug 27 07:27:24 AM UTC 24 |
Aug 27 07:27:26 AM UTC 24 |
16151457 ps |
T1446 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_target_perf.1382060551 |
|
|
Aug 27 07:26:13 AM UTC 24 |
Aug 27 07:26:21 AM UTC 24 |
1094775146 ps |
T1447 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_host_mode_toggle.1319854865 |
|
|
Aug 27 07:26:17 AM UTC 24 |
Aug 27 07:26:21 AM UTC 24 |
347923051 ps |
T1448 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_target_bad_addr.2283046294 |
|
|
Aug 27 07:26:14 AM UTC 24 |
Aug 27 07:26:23 AM UTC 24 |
922807978 ps |
T1449 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_alert_test.3931730487 |
|
|
Aug 27 07:27:22 AM UTC 24 |
Aug 27 07:27:25 AM UTC 24 |
69633906 ps |
T1450 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_watermarks_acq.113033338 |
|
|
Aug 27 07:26:21 AM UTC 24 |
Aug 27 07:26:25 AM UTC 24 |
1927748867 ps |
T1451 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/33.i2c_target_intr_stress_wr.520506099 |
|
|
Aug 27 07:20:32 AM UTC 24 |
Aug 27 07:26:25 AM UTC 24 |
20088723365 ps |
T1452 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_watermarks_tx.1007475108 |
|
|
Aug 27 07:26:22 AM UTC 24 |
Aug 27 07:26:25 AM UTC 24 |
315515436 ps |
T1453 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_target_smbus_maxlen.3581722944 |
|
|
Aug 27 07:26:22 AM UTC 24 |
Aug 27 07:26:26 AM UTC 24 |
1629177480 ps |
T1454 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_host_may_nack.4093399320 |
|
|
Aug 27 07:26:20 AM UTC 24 |
Aug 27 07:26:27 AM UTC 24 |
1201334070 ps |
T1455 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull.2759818563 |
|
|
Aug 27 07:26:22 AM UTC 24 |
Aug 27 07:26:27 AM UTC 24 |
445421133 ps |
T1456 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_target_nack_txstretch.4048215520 |
|
|
Aug 27 07:26:25 AM UTC 24 |
Aug 27 07:26:28 AM UTC 24 |
404016770 ps |
T1457 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_alert_test.4075325090 |
|
|
Aug 27 07:26:26 AM UTC 24 |
Aug 27 07:26:28 AM UTC 24 |
16157859 ps |
T1458 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_host_override.336160843 |
|
|
Aug 27 07:26:26 AM UTC 24 |
Aug 27 07:26:28 AM UTC 24 |
17509832 ps |
T1459 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull_addr.2085605954 |
|
|
Aug 27 07:26:24 AM UTC 24 |
Aug 27 07:26:29 AM UTC 24 |
491979983 ps |
T1460 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_fmt.3947645134 |
|
|
Aug 27 07:26:29 AM UTC 24 |
Aug 27 07:26:31 AM UTC 24 |
105272131 ps |
T1461 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_target_stress_wr.840870632 |
|
|
Aug 27 07:25:59 AM UTC 24 |
Aug 27 07:26:31 AM UTC 24 |
34459913044 ps |
T1462 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_host_perf_precise.1981077179 |
|
|
Aug 27 07:26:32 AM UTC 24 |
Aug 27 07:26:35 AM UTC 24 |
101361889 ps |
T1463 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_fmt_empty.1135079754 |
|
|
Aug 27 07:26:29 AM UTC 24 |
Aug 27 07:26:40 AM UTC 24 |
1404158630 ps |
T1464 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_host_error_intr.4221299891 |
|
|
Aug 27 07:26:35 AM UTC 24 |
Aug 27 07:26:40 AM UTC 24 |
139380072 ps |
T1465 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_rx.4046842998 |
|
|
Aug 27 07:26:30 AM UTC 24 |
Aug 27 07:26:43 AM UTC 24 |
169001679 ps |
T1466 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_target_stress_all.2661637531 |
|
|
Aug 27 07:25:34 AM UTC 24 |
Aug 27 07:26:43 AM UTC 24 |
35223584243 ps |
T1467 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_host_stretch_timeout.1297323843 |
|
|
Aug 27 07:26:32 AM UTC 24 |
Aug 27 07:26:49 AM UTC 24 |
13578139224 ps |
T1468 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_host_smoke.2239914174 |
|
|
Aug 27 07:25:47 AM UTC 24 |
Aug 27 07:26:50 AM UTC 24 |
2453726206 ps |
T1469 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_host_perf.2181356513 |
|
|
Aug 27 07:26:30 AM UTC 24 |
Aug 27 07:26:54 AM UTC 24 |
1069275668 ps |
T1470 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_host_smoke.4159783319 |
|
|
Aug 27 07:26:26 AM UTC 24 |
Aug 27 07:26:55 AM UTC 24 |
1967257455 ps |
T1471 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_target_intr_smoke.1140970353 |
|
|
Aug 27 07:26:51 AM UTC 24 |
Aug 27 07:27:00 AM UTC 24 |
834354054 ps |
T1472 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_acq.3128374505 |
|
|
Aug 27 07:27:02 AM UTC 24 |
Aug 27 07:27:06 AM UTC 24 |
4214452908 ps |
T1473 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_target_timeout.778295995 |
|
|
Aug 27 07:26:56 AM UTC 24 |
Aug 27 07:27:06 AM UTC 24 |
20477050049 ps |
T291 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/32.i2c_host_stress_all.1938954296 |
|
|
Aug 27 07:19:45 AM UTC 24 |
Aug 27 07:27:07 AM UTC 24 |
14737688572 ps |
T1474 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_tx.2948906216 |
|
|
Aug 27 07:27:05 AM UTC 24 |
Aug 27 07:27:08 AM UTC 24 |
607134217 ps |
T1475 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_target_smoke.1133415619 |
|
|
Aug 27 07:26:41 AM UTC 24 |
Aug 27 07:27:12 AM UTC 24 |
1919376503 ps |
T1476 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_target_perf.1447917270 |
|
|
Aug 27 07:27:06 AM UTC 24 |
Aug 27 07:27:13 AM UTC 24 |
846664369 ps |
T1477 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_target_hrst.566099640 |
|
|
Aug 27 07:27:10 AM UTC 24 |
Aug 27 07:27:14 AM UTC 24 |
457316264 ps |
T1478 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_target_stress_wr.988702663 |
|
|
Aug 27 07:25:19 AM UTC 24 |
Aug 27 07:27:15 AM UTC 24 |
35465992174 ps |
T1479 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/36.i2c_target_stress_wr.2328899666 |
|
|
Aug 27 07:22:12 AM UTC 24 |
Aug 27 07:27:15 AM UTC 24 |
63017229453 ps |
T1480 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_target_bad_addr.407387263 |
|
|
Aug 27 07:27:08 AM UTC 24 |
Aug 27 07:27:16 AM UTC 24 |
4262015975 ps |
T1481 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_tx.804975269 |
|
|
Aug 27 07:27:16 AM UTC 24 |
Aug 27 07:27:19 AM UTC 24 |
237984734 ps |
T1482 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_target_smbus_maxlen.3604645790 |
|
|
Aug 27 07:27:17 AM UTC 24 |
Aug 27 07:27:21 AM UTC 24 |
1424869904 ps |
T1483 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/45.i2c_target_stretch.3983038087 |
|
|
Aug 27 07:29:22 AM UTC 24 |
Aug 27 07:29:35 AM UTC 24 |
3241171614 ps |
T1484 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_target_tx_stretch_ctrl.2450810871 |
|
|
Aug 27 07:27:16 AM UTC 24 |
Aug 27 07:27:22 AM UTC 24 |
170854665 ps |
T1485 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_acq.1444861935 |
|
|
Aug 27 07:27:15 AM UTC 24 |
Aug 27 07:27:23 AM UTC 24 |
2671060820 ps |
T1486 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_overflow.1144175715 |
|
|
Aug 27 07:25:50 AM UTC 24 |
Aug 27 07:27:23 AM UTC 24 |
1302903665 ps |
T1487 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/34.i2c_target_stress_all.754068788 |
|
|
Aug 27 07:21:22 AM UTC 24 |
Aug 27 07:27:23 AM UTC 24 |
44923999518 ps |
T1488 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_full.1915300989 |
|
|
Aug 27 07:25:11 AM UTC 24 |
Aug 27 07:27:24 AM UTC 24 |
7216991630 ps |
T1489 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull.2688220230 |
|
|
Aug 27 07:27:19 AM UTC 24 |
Aug 27 07:27:24 AM UTC 24 |
415913187 ps |
T1490 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_target_stress_wr.1840777662 |
|
|
Aug 27 07:24:26 AM UTC 24 |
Aug 27 07:27:24 AM UTC 24 |
35140547640 ps |
T1491 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_target_nack_txstretch.487788883 |
|
|
Aug 27 07:27:22 AM UTC 24 |
Aug 27 07:27:26 AM UTC 24 |
169905773 ps |
T1492 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull_addr.1990209942 |
|
|
Aug 27 07:27:22 AM UTC 24 |
Aug 27 07:27:26 AM UTC 24 |
850751022 ps |
T1493 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_fmt.3773156322 |
|
|
Aug 27 07:27:25 AM UTC 24 |
Aug 27 07:27:28 AM UTC 24 |
109414715 ps |
T1494 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_host_perf_precise.3460898955 |
|
|
Aug 27 07:27:27 AM UTC 24 |
Aug 27 07:27:31 AM UTC 24 |
62341958 ps |
T1495 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_overflow.1466017898 |
|
|
Aug 27 07:26:29 AM UTC 24 |
Aug 27 07:27:33 AM UTC 24 |
1796416991 ps |
T1496 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/37.i2c_host_perf_precise.3281897360 |
|
|
Aug 27 07:22:41 AM UTC 24 |
Aug 27 07:27:35 AM UTC 24 |
24331344189 ps |
T1497 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_watermark.1079503391 |
|
|
Aug 27 07:25:08 AM UTC 24 |
Aug 27 07:27:35 AM UTC 24 |
5313403696 ps |
T1498 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_host_error_intr.480437153 |
|
|
Aug 27 07:27:31 AM UTC 24 |
Aug 27 07:27:35 AM UTC 24 |
78964579 ps |
T1499 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_rx.3895140507 |
|
|
Aug 27 07:27:26 AM UTC 24 |
Aug 27 07:27:37 AM UTC 24 |
447512732 ps |
T1500 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_target_stress_rd.963814227 |
|
|
Aug 27 07:26:44 AM UTC 24 |
Aug 27 07:27:38 AM UTC 24 |
6530681898 ps |
T1501 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_host_may_nack.3883450644 |
|
|
Aug 27 07:27:15 AM UTC 24 |
Aug 27 07:27:38 AM UTC 24 |
2326991355 ps |
T1502 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_host_stretch_timeout.1058995282 |
|
|
Aug 27 07:27:28 AM UTC 24 |
Aug 27 07:27:40 AM UTC 24 |
1061166902 ps |
T1503 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_host_smoke.3609869054 |
|
|
Aug 27 07:27:23 AM UTC 24 |
Aug 27 07:27:42 AM UTC 24 |
950791265 ps |
T1504 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_fmt_empty.1164912640 |
|
|
Aug 27 07:27:26 AM UTC 24 |
Aug 27 07:27:46 AM UTC 24 |
2979247114 ps |
T1505 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_target_intr_smoke.873366785 |
|
|
Aug 27 07:27:39 AM UTC 24 |
Aug 27 07:27:47 AM UTC 24 |
1160299994 ps |
T1506 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_acq.4213879684 |
|
|
Aug 27 07:27:45 AM UTC 24 |
Aug 27 07:27:48 AM UTC 24 |
407950050 ps |
T1507 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_target_smoke.3690280097 |
|
|
Aug 27 07:27:35 AM UTC 24 |
Aug 27 07:27:49 AM UTC 24 |
997204857 ps |
T1508 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_tx.1913510211 |
|
|
Aug 27 07:27:47 AM UTC 24 |
Aug 27 07:27:50 AM UTC 24 |
118590441 ps |
T1509 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_target_timeout.2879659747 |
|
|
Aug 27 07:27:41 AM UTC 24 |
Aug 27 07:27:52 AM UTC 24 |
1890866998 ps |
T1510 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_target_intr_stress_wr.2000566766 |
|
|
Aug 27 07:27:39 AM UTC 24 |
Aug 27 07:27:54 AM UTC 24 |
5623293213 ps |
T1511 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_target_intr_stress_wr.697146406 |
|
|
Aug 27 07:26:55 AM UTC 24 |
Aug 27 07:27:56 AM UTC 24 |
16490356283 ps |
T1512 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_target_stretch.3240928782 |
|
|
Aug 27 07:27:38 AM UTC 24 |
Aug 27 07:27:58 AM UTC 24 |
1195410781 ps |
T1513 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_target_bad_addr.3821002945 |
|
|
Aug 27 07:27:51 AM UTC 24 |
Aug 27 07:27:58 AM UTC 24 |
5319630375 ps |
T1514 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_host_mode_toggle.4265442964 |
|
|
Aug 27 07:27:54 AM UTC 24 |
Aug 27 07:27:58 AM UTC 24 |
414434644 ps |
T1515 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_target_stress_rd.2845277765 |
|
|
Aug 27 07:27:37 AM UTC 24 |
Aug 27 07:27:59 AM UTC 24 |
1678286697 ps |
T1516 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_target_perf.1029363834 |
|
|
Aug 27 07:27:48 AM UTC 24 |
Aug 27 07:27:59 AM UTC 24 |
2410524906 ps |
T1517 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_tx.2796731933 |
|
|
Aug 27 07:27:59 AM UTC 24 |
Aug 27 07:28:02 AM UTC 24 |
318185991 ps |
T1518 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_watermark.3936207514 |
|
|
Aug 27 07:28:05 AM UTC 24 |
Aug 27 07:29:26 AM UTC 24 |
3093933606 ps |
T1519 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_acq.1485196944 |
|
|
Aug 27 07:27:57 AM UTC 24 |
Aug 27 07:28:02 AM UTC 24 |
1931174657 ps |
T1520 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/39.i2c_target_stress_all.3734999012 |
|
|
Aug 27 07:24:52 AM UTC 24 |
Aug 27 07:28:02 AM UTC 24 |
51206392834 ps |
T1521 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_target_smbus_maxlen.2506794160 |
|
|
Aug 27 07:27:59 AM UTC 24 |
Aug 27 07:28:03 AM UTC 24 |
862420445 ps |
T1522 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_alert_test.22793349 |
|
|
Aug 27 07:28:02 AM UTC 24 |
Aug 27 07:28:04 AM UTC 24 |
17613634 ps |
T1523 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull_addr.2509392496 |
|
|
Aug 27 07:28:00 AM UTC 24 |
Aug 27 07:28:05 AM UTC 24 |
562439691 ps |
T1524 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_target_nack_txstretch.802216906 |
|
|
Aug 27 07:28:02 AM UTC 24 |
Aug 27 07:28:05 AM UTC 24 |
205404457 ps |
T1525 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_host_override.3061552093 |
|
|
Aug 27 07:28:04 AM UTC 24 |
Aug 27 07:28:06 AM UTC 24 |
21113406 ps |
T1526 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull.3652513814 |
|
|
Aug 27 07:28:00 AM UTC 24 |
Aug 27 07:28:06 AM UTC 24 |
521000174 ps |
T1527 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_watermark.1781757446 |
|
|
Aug 27 07:25:49 AM UTC 24 |
Aug 27 07:28:06 AM UTC 24 |
9534740409 ps |
T1528 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_target_tx_stretch_ctrl.3232518456 |
|
|
Aug 27 07:27:59 AM UTC 24 |
Aug 27 07:28:08 AM UTC 24 |
407732701 ps |
T1529 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_fmt.228978813 |
|
|
Aug 27 07:28:06 AM UTC 24 |
Aug 27 07:28:08 AM UTC 24 |
133423531 ps |
T1530 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_target_stress_wr.62731027 |
|
|
Aug 27 07:26:44 AM UTC 24 |
Aug 27 07:28:09 AM UTC 24 |
52269998832 ps |
T1531 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_rx.854505877 |
|
|
Aug 27 07:28:07 AM UTC 24 |
Aug 27 07:28:11 AM UTC 24 |
481839738 ps |
T1532 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_host_error_intr.4260960261 |
|
|
Aug 27 07:28:09 AM UTC 24 |
Aug 27 07:28:13 AM UTC 24 |
201921814 ps |
T1533 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_host_may_nack.1804845166 |
|
|
Aug 27 07:27:55 AM UTC 24 |
Aug 27 07:28:17 AM UTC 24 |
1961360159 ps |
T1534 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_full.2787552909 |
|
|
Aug 27 07:26:30 AM UTC 24 |
Aug 27 07:28:17 AM UTC 24 |
6045162745 ps |
T1535 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_fmt_empty.3081466047 |
|
|
Aug 27 07:28:07 AM UTC 24 |
Aug 27 07:28:18 AM UTC 24 |
3394663161 ps |
T1536 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_target_stress_all.749528487 |
|
|
Aug 27 07:27:07 AM UTC 24 |
Aug 27 07:28:26 AM UTC 24 |
42396523937 ps |
T1537 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_full.1306959694 |
|
|
Aug 27 07:25:52 AM UTC 24 |
Aug 27 07:28:26 AM UTC 24 |
7104164495 ps |
T1538 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_host_perf_precise.2643389137 |
|
|
Aug 27 07:28:08 AM UTC 24 |
Aug 27 07:28:28 AM UTC 24 |
445714070 ps |
T1539 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_full.541364486 |
|
|
Aug 27 07:27:27 AM UTC 24 |
Aug 27 07:28:37 AM UTC 24 |
22421947273 ps |
T1540 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_reset_acq.386502907 |
|
|
Aug 27 07:28:34 AM UTC 24 |
Aug 27 07:28:37 AM UTC 24 |
475302930 ps |
T1541 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_watermark.1821407331 |
|
|
Aug 27 07:26:27 AM UTC 24 |
Aug 27 07:28:39 AM UTC 24 |
20890195951 ps |
T1542 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_target_timeout.2122609145 |
|
|
Aug 27 07:28:29 AM UTC 24 |
Aug 27 07:28:41 AM UTC 24 |
1509311088 ps |
T1543 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_target_intr_smoke.2048200240 |
|
|
Aug 27 07:28:27 AM UTC 24 |
Aug 27 07:28:41 AM UTC 24 |
1236178162 ps |
T1544 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_reset_tx.2353551338 |
|
|
Aug 27 07:28:38 AM UTC 24 |
Aug 27 07:28:42 AM UTC 24 |
243926731 ps |
T1545 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_host_stretch_timeout.82843020 |
|
|
Aug 27 07:28:09 AM UTC 24 |
Aug 27 07:28:44 AM UTC 24 |
11949001618 ps |
T1546 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_target_stretch.3764827745 |
|
|
Aug 27 07:28:19 AM UTC 24 |
Aug 27 07:28:47 AM UTC 24 |
2992989160 ps |
T1547 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_target_perf.3197909923 |
|
|
Aug 27 07:28:38 AM UTC 24 |
Aug 27 07:28:48 AM UTC 24 |
3470036129 ps |
T1548 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_watermarks_acq.3448028720 |
|
|
Aug 27 07:28:46 AM UTC 24 |
Aug 27 07:28:50 AM UTC 24 |
282984079 ps |
T1549 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_watermarks_tx.265291100 |
|
|
Aug 27 07:28:48 AM UTC 24 |
Aug 27 07:28:51 AM UTC 24 |
652222409 ps |
T1550 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_host_may_nack.3569539514 |
|
|
Aug 27 07:28:45 AM UTC 24 |
Aug 27 07:28:52 AM UTC 24 |
293011141 ps |
T1551 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_target_tx_stretch_ctrl.3592688075 |
|
|
Aug 27 07:28:48 AM UTC 24 |
Aug 27 07:28:52 AM UTC 24 |
101029944 ps |
T1552 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_target_bad_addr.4279493671 |
|
|
Aug 27 07:28:42 AM UTC 24 |
Aug 27 07:28:52 AM UTC 24 |
3998210361 ps |
T1553 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_target_intr_stress_wr.305440362 |
|
|
Aug 27 07:28:27 AM UTC 24 |
Aug 27 07:28:53 AM UTC 24 |
7664881750 ps |
T1554 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_target_smbus_maxlen.1416594406 |
|
|
Aug 27 07:28:51 AM UTC 24 |
Aug 27 07:28:55 AM UTC 24 |
6460878567 ps |
T1555 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_alert_test.3572078180 |
|
|
Aug 27 07:28:54 AM UTC 24 |
Aug 27 07:28:56 AM UTC 24 |
19320015 ps |
T1556 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_target_nack_txstretch.3094139005 |
|
|
Aug 27 07:28:53 AM UTC 24 |
Aug 27 07:28:57 AM UTC 24 |
354762291 ps |
T1557 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_target_nack_acqfull.1801439477 |
|
|
Aug 27 07:28:52 AM UTC 24 |
Aug 27 07:28:57 AM UTC 24 |
2355373136 ps |
T1558 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_target_nack_acqfull_addr.2009609341 |
|
|
Aug 27 07:28:52 AM UTC 24 |
Aug 27 07:28:57 AM UTC 24 |
575977168 ps |
T1559 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/45.i2c_host_override.2918828909 |
|
|
Aug 27 07:28:56 AM UTC 24 |
Aug 27 07:28:58 AM UTC 24 |
26097013 ps |
T1560 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_target_smoke.1031687193 |
|
|
Aug 27 07:28:14 AM UTC 24 |
Aug 27 07:29:01 AM UTC 24 |
1289467863 ps |
T1561 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_reset_fmt.1702229269 |
|
|
Aug 27 07:28:58 AM UTC 24 |
Aug 27 07:29:01 AM UTC 24 |
1914714329 ps |
T1562 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_host_smoke.1864283547 |
|
|
Aug 27 07:28:04 AM UTC 24 |
Aug 27 07:29:01 AM UTC 24 |
1292116833 ps |
T1563 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/38.i2c_target_intr_stress_wr.2532127761 |
|
|
Aug 27 07:23:47 AM UTC 24 |
Aug 27 07:29:10 AM UTC 24 |
21769539369 ps |
T1564 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_reset_rx.3694709928 |
|
|
Aug 27 07:28:59 AM UTC 24 |
Aug 27 07:29:11 AM UTC 24 |
647175147 ps |
T1565 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/44.i2c_target_stress_rd.3377979223 |
|
|
Aug 27 07:28:18 AM UTC 24 |
Aug 27 07:29:26 AM UTC 24 |
2503814046 ps |
T30 |
/workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/45.i2c_host_error_intr.3389864685 |
|
|
Aug 27 07:29:13 AM UTC 24 |
Aug 27 07:29:16 AM UTC 24 |
378973948 ps |