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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
91.42 97.37 89.65 97.22 72.62 94.47 98.44 90.21


Total test records in report: 1862
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html | tests28.html | tests29.html | tests30.html | tests31.html | tests32.html | tests33.html | tests34.html | tests35.html | tests36.html | tests37.html | tests38.html | tests39.html

T843 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_host_override.2274313005 Aug 27 07:13:14 AM UTC 24 Aug 27 07:13:16 AM UTC 24 19415546 ps
T844 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/22.i2c_target_smbus_maxlen.1562063520 Aug 27 07:13:11 AM UTC 24 Aug 27 07:13:17 AM UTC 24 4639435748 ps
T845 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/22.i2c_target_stretch.3793809576 Aug 27 07:12:55 AM UTC 24 Aug 27 07:13:17 AM UTC 24 650608706 ps
T846 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/22.i2c_target_intr_stress_wr.3982405657 Aug 27 07:12:57 AM UTC 24 Aug 27 07:13:17 AM UTC 24 14576460412 ps
T847 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/22.i2c_target_stress_rd.2627065298 Aug 27 07:12:55 AM UTC 24 Aug 27 07:13:18 AM UTC 24 1048424256 ps
T848 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_reset_rx.2081831444 Aug 27 07:13:47 AM UTC 24 Aug 27 07:13:53 AM UTC 24 1186323460 ps
T849 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/22.i2c_target_nack_acqfull_addr.1066393900 Aug 27 07:13:13 AM UTC 24 Aug 27 07:13:18 AM UTC 24 448535440 ps
T127 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_watermark.2059189676 Aug 27 07:12:16 AM UTC 24 Aug 27 07:13:18 AM UTC 24 3012430370 ps
T60 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/22.i2c_target_nack_acqfull.3664100962 Aug 27 07:13:12 AM UTC 24 Aug 27 07:13:18 AM UTC 24 1006993844 ps
T850 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/22.i2c_host_may_nack.3357859058 Aug 27 07:13:06 AM UTC 24 Aug 27 07:13:19 AM UTC 24 854600056 ps
T851 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_reset_fmt.1588598262 Aug 27 07:13:16 AM UTC 24 Aug 27 07:13:19 AM UTC 24 149086802 ps
T852 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/22.i2c_host_smoke.2734815166 Aug 27 07:12:45 AM UTC 24 Aug 27 07:13:20 AM UTC 24 9044059251 ps
T853 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/22.i2c_target_tx_stretch_ctrl.112310520 Aug 27 07:13:10 AM UTC 24 Aug 27 07:13:20 AM UTC 24 574970272 ps
T854 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_host_error_intr.3745704094 Aug 27 07:13:20 AM UTC 24 Aug 27 07:13:23 AM UTC 24 56015011 ps
T855 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_full.3933419890 Aug 27 07:12:17 AM UTC 24 Aug 27 07:13:23 AM UTC 24 7341073857 ps
T856 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/15.i2c_target_stress_all.1312145906 Aug 27 07:09:30 AM UTC 24 Aug 27 07:13:26 AM UTC 24 36705112596 ps
T857 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_reset_rx.3560881606 Aug 27 07:13:18 AM UTC 24 Aug 27 07:13:26 AM UTC 24 181530275 ps
T858 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/22.i2c_host_stretch_timeout.3906342560 Aug 27 07:12:51 AM UTC 24 Aug 27 07:13:28 AM UTC 24 2907640154 ps
T859 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_watermark.2846660877 Aug 27 07:09:09 AM UTC 24 Aug 27 07:13:29 AM UTC 24 4690420523 ps
T860 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_reset_acq.1311099693 Aug 27 07:13:28 AM UTC 24 Aug 27 07:13:31 AM UTC 24 233987274 ps
T861 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/19.i2c_host_perf.103848958 Aug 27 07:11:20 AM UTC 24 Aug 27 07:13:33 AM UTC 24 12983665182 ps
T862 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_reset_tx.2685973966 Aug 27 07:13:31 AM UTC 24 Aug 27 07:13:33 AM UTC 24 154045878 ps
T863 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_target_intr_smoke.2648966581 Aug 27 07:13:24 AM UTC 24 Aug 27 07:13:36 AM UTC 24 2616837593 ps
T864 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_watermark.2845221445 Aug 27 07:11:15 AM UTC 24 Aug 27 07:13:37 AM UTC 24 41637135012 ps
T865 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_target_timeout.2390239221 Aug 27 07:13:27 AM UTC 24 Aug 27 07:13:37 AM UTC 24 1119480824 ps
T866 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_target_stretch.4115265528 Aug 27 07:13:21 AM UTC 24 Aug 27 07:13:39 AM UTC 24 5053059542 ps
T867 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_target_hrst.1691111434 Aug 27 07:13:35 AM UTC 24 Aug 27 07:13:39 AM UTC 24 217620443 ps
T868 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_fmt_empty.3176036978 Aug 27 07:13:17 AM UTC 24 Aug 27 07:13:39 AM UTC 24 355268440 ps
T869 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_target_perf.2488750948 Aug 27 07:13:31 AM UTC 24 Aug 27 07:13:40 AM UTC 24 766669984 ps
T870 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_target_bad_addr.1683390198 Aug 27 07:13:34 AM UTC 24 Aug 27 07:13:42 AM UTC 24 1887169310 ps
T871 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_tx.3958996654 Aug 27 07:13:39 AM UTC 24 Aug 27 07:13:43 AM UTC 24 598588899 ps
T872 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_acq.915129669 Aug 27 07:13:38 AM UTC 24 Aug 27 07:13:43 AM UTC 24 374273743 ps
T873 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_target_smbus_maxlen.3488150769 Aug 27 07:13:39 AM UTC 24 Aug 27 07:13:44 AM UTC 24 3850979851 ps
T874 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_target_tx_stretch_ctrl.1736005798 Aug 27 07:13:39 AM UTC 24 Aug 27 07:13:45 AM UTC 24 119944461 ps
T875 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_host_may_nack.1390299298 Aug 27 07:13:38 AM UTC 24 Aug 27 07:13:45 AM UTC 24 570143572 ps
T876 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_alert_test.3524074419 Aug 27 07:13:44 AM UTC 24 Aug 27 07:13:46 AM UTC 24 43657455 ps
T877 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_target_stress_rd.3374726741 Aug 27 07:13:21 AM UTC 24 Aug 27 07:14:01 AM UTC 24 1785411380 ps
T878 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull.2543368648 Aug 27 07:13:40 AM UTC 24 Aug 27 07:13:46 AM UTC 24 1876670976 ps
T879 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull_addr.2201169702 Aug 27 07:13:40 AM UTC 24 Aug 27 07:13:47 AM UTC 24 1971772961 ps
T880 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_host_override.33844950 Aug 27 07:13:45 AM UTC 24 Aug 27 07:13:47 AM UTC 24 26549762 ps
T881 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/18.i2c_target_intr_stress_wr.642985536 Aug 27 07:10:57 AM UTC 24 Aug 27 07:13:47 AM UTC 24 12400022033 ps
T882 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_reset_fmt.2134763260 Aug 27 07:13:46 AM UTC 24 Aug 27 07:13:49 AM UTC 24 853054408 ps
T883 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/6.i2c_host_perf.2019647524 Aug 27 07:05:13 AM UTC 24 Aug 27 07:13:53 AM UTC 24 98991582462 ps
T884 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_host_stretch_timeout.3117205851 Aug 27 07:13:19 AM UTC 24 Aug 27 07:14:01 AM UTC 24 949621584 ps
T885 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_host_error_intr.3317088394 Aug 27 07:13:54 AM UTC 24 Aug 27 07:14:03 AM UTC 24 1004628235 ps
T92 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_target_smoke.3256024907 Aug 27 07:13:20 AM UTC 24 Aug 27 07:14:04 AM UTC 24 4626970124 ps
T886 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_target_stretch.2326592781 Aug 27 07:14:02 AM UTC 24 Aug 27 07:14:05 AM UTC 24 369492757 ps
T139 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/16.i2c_host_stress_all.466740878 Aug 27 07:09:44 AM UTC 24 Aug 27 07:14:06 AM UTC 24 40717299031 ps
T887 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_target_stress_rd.808889847 Aug 27 07:14:02 AM UTC 24 Aug 27 07:14:10 AM UTC 24 1046030269 ps
T888 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_host_perf.837720985 Aug 27 07:13:47 AM UTC 24 Aug 27 07:14:11 AM UTC 24 20678030897 ps
T889 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_acq.2697242611 Aug 27 07:14:10 AM UTC 24 Aug 27 07:14:14 AM UTC 24 388434462 ps
T890 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_target_intr_smoke.868430194 Aug 27 07:14:04 AM UTC 24 Aug 27 07:14:14 AM UTC 24 730250428 ps
T891 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_target_intr_stress_wr.2184382031 Aug 27 07:13:24 AM UTC 24 Aug 27 07:14:14 AM UTC 24 10182487274 ps
T892 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_tx.597580122 Aug 27 07:14:11 AM UTC 24 Aug 27 07:14:15 AM UTC 24 278137145 ps
T893 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_target_smoke.786888005 Aug 27 07:15:20 AM UTC 24 Aug 27 07:15:31 AM UTC 24 2735693109 ps
T894 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_target_smoke.2445397536 Aug 27 07:13:54 AM UTC 24 Aug 27 07:14:18 AM UTC 24 9243932651 ps
T895 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_target_timeout.652484304 Aug 27 07:14:05 AM UTC 24 Aug 27 07:14:20 AM UTC 24 6042965372 ps
T896 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_target_stress_wr.3184932456 Aug 27 07:13:20 AM UTC 24 Aug 27 07:14:20 AM UTC 24 31757181616 ps
T897 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_target_perf.618935721 Aug 27 07:14:12 AM UTC 24 Aug 27 07:14:20 AM UTC 24 3316347586 ps
T898 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_overflow.1286399508 Aug 27 07:12:17 AM UTC 24 Aug 27 07:14:21 AM UTC 24 1960774139 ps
T899 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_tx.3795426764 Aug 27 07:14:20 AM UTC 24 Aug 27 07:14:22 AM UTC 24 836645994 ps
T900 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_host_smoke.677607405 Aug 27 07:13:14 AM UTC 24 Aug 27 07:14:23 AM UTC 24 3192710129 ps
T901 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_target_tx_stretch_ctrl.784146923 Aug 27 07:14:21 AM UTC 24 Aug 27 07:14:25 AM UTC 24 76147079 ps
T902 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_acq.1981045952 Aug 27 07:14:19 AM UTC 24 Aug 27 07:14:25 AM UTC 24 528825145 ps
T262 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_host_may_nack.4099038629 Aug 27 07:14:19 AM UTC 24 Aug 27 07:14:26 AM UTC 24 2626785320 ps
T903 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_target_smbus_maxlen.4174459937 Aug 27 07:14:21 AM UTC 24 Aug 27 07:14:26 AM UTC 24 2374054732 ps
T904 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_alert_test.3587872498 Aug 27 07:14:26 AM UTC 24 Aug 27 07:14:28 AM UTC 24 24100152 ps
T905 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_target_bad_addr.3619385285 Aug 27 07:14:15 AM UTC 24 Aug 27 07:14:28 AM UTC 24 1184893374 ps
T906 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull.162269304 Aug 27 07:14:22 AM UTC 24 Aug 27 07:14:28 AM UTC 24 1548500865 ps
T907 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_target_nack_txstretch.3977102016 Aug 27 07:14:24 AM UTC 24 Aug 27 07:14:28 AM UTC 24 529082996 ps
T908 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull_addr.4053873682 Aug 27 07:14:23 AM UTC 24 Aug 27 07:14:28 AM UTC 24 944613200 ps
T909 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_host_override.2417431706 Aug 27 07:14:27 AM UTC 24 Aug 27 07:14:29 AM UTC 24 29644763 ps
T910 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_host_stretch_timeout.1987146002 Aug 27 07:13:50 AM UTC 24 Aug 27 07:14:29 AM UTC 24 854598140 ps
T911 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_fmt.3674967547 Aug 27 07:14:29 AM UTC 24 Aug 27 07:14:32 AM UTC 24 202705100 ps
T912 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_host_perf_precise.4258401835 Aug 27 07:14:30 AM UTC 24 Aug 27 07:14:34 AM UTC 24 61766385 ps
T913 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_host_error_intr.53202543 Aug 27 07:14:34 AM UTC 24 Aug 27 07:14:37 AM UTC 24 133454366 ps
T914 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_fmt_empty.641142303 Aug 27 07:14:29 AM UTC 24 Aug 27 07:14:40 AM UTC 24 728169017 ps
T915 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_rx.1211697496 Aug 27 07:14:29 AM UTC 24 Aug 27 07:14:40 AM UTC 24 532444244 ps
T916 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_host_stretch_timeout.1846422630 Aug 27 07:14:32 AM UTC 24 Aug 27 07:14:47 AM UTC 24 2662176275 ps
T917 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/21.i2c_target_stress_all.4267708694 Aug 27 07:12:34 AM UTC 24 Aug 27 07:14:49 AM UTC 24 51825766942 ps
T918 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_target_stress_wr.3357136144 Aug 27 07:14:02 AM UTC 24 Aug 27 07:14:50 AM UTC 24 12231792062 ps
T919 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_watermark.3155753251 Aug 27 07:13:46 AM UTC 24 Aug 27 07:14:50 AM UTC 24 2549957732 ps
T920 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_full.1923621633 Aug 27 07:13:47 AM UTC 24 Aug 27 07:14:52 AM UTC 24 2229336790 ps
T921 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_target_stress_wr.354258830 Aug 27 07:14:41 AM UTC 24 Aug 27 07:14:54 AM UTC 24 16790492386 ps
T922 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_target_stretch.1313288452 Aug 27 07:14:50 AM UTC 24 Aug 27 07:14:55 AM UTC 24 615707278 ps
T923 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_target_intr_smoke.527630547 Aug 27 07:14:51 AM UTC 24 Aug 27 07:14:59 AM UTC 24 799005941 ps
T924 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_target_stress_rd.890040555 Aug 27 07:14:48 AM UTC 24 Aug 27 07:14:59 AM UTC 24 462595319 ps
T925 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_acq.3509837046 Aug 27 07:14:56 AM UTC 24 Aug 27 07:14:59 AM UTC 24 369704080 ps
T926 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_tx.1487020492 Aug 27 07:14:57 AM UTC 24 Aug 27 07:15:00 AM UTC 24 354478413 ps
T927 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_target_hrst.1962363498 Aug 27 07:15:01 AM UTC 24 Aug 27 07:15:04 AM UTC 24 340217258 ps
T928 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/21.i2c_target_stress_wr.10266678 Aug 27 07:12:24 AM UTC 24 Aug 27 07:15:04 AM UTC 24 30490388985 ps
T929 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_target_perf.721901945 Aug 27 07:14:59 AM UTC 24 Aug 27 07:15:05 AM UTC 24 1014473115 ps
T930 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_host_perf.2180579944 Aug 27 07:13:18 AM UTC 24 Aug 27 07:15:06 AM UTC 24 25987014566 ps
T931 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_target_timeout.693335384 Aug 27 07:14:53 AM UTC 24 Aug 27 07:15:06 AM UTC 24 1390331281 ps
T932 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_target_smoke.3568535100 Aug 27 07:14:41 AM UTC 24 Aug 27 07:15:06 AM UTC 24 1217822172 ps
T933 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_target_tx_stretch_ctrl.1356200492 Aug 27 07:15:07 AM UTC 24 Aug 27 07:15:10 AM UTC 24 36797797 ps
T934 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_tx.1324642030 Aug 27 07:15:07 AM UTC 24 Aug 27 07:15:10 AM UTC 24 121337864 ps
T935 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_target_bad_addr.2474850783 Aug 27 07:15:01 AM UTC 24 Aug 27 07:15:10 AM UTC 24 4035611000 ps
T936 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_full.1116183880 Aug 27 07:13:18 AM UTC 24 Aug 27 07:15:11 AM UTC 24 4179219392 ps
T937 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_acq.2395486525 Aug 27 07:15:06 AM UTC 24 Aug 27 07:15:11 AM UTC 24 455120446 ps
T938 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_alert_test.1069119381 Aug 27 07:15:11 AM UTC 24 Aug 27 07:15:12 AM UTC 24 21370694 ps
T939 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_target_smbus_maxlen.2668626477 Aug 27 07:15:07 AM UTC 24 Aug 27 07:15:13 AM UTC 24 469684362 ps
T940 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_host_smoke.653358924 Aug 27 07:13:44 AM UTC 24 Aug 27 07:15:13 AM UTC 24 1916130445 ps
T941 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_host_stretch_timeout.772558925 Aug 27 07:15:16 AM UTC 24 Aug 27 07:15:30 AM UTC 24 3529782493 ps
T156 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_host_override.588714578 Aug 27 07:15:12 AM UTC 24 Aug 27 07:15:14 AM UTC 24 29427266 ps
T942 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull_addr.3434362017 Aug 27 07:15:09 AM UTC 24 Aug 27 07:15:14 AM UTC 24 1869170190 ps
T943 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull.1716035446 Aug 27 07:15:09 AM UTC 24 Aug 27 07:15:15 AM UTC 24 2495409538 ps
T944 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_overflow.1706920330 Aug 27 07:13:46 AM UTC 24 Aug 27 07:15:15 AM UTC 24 38168604159 ps
T945 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_target_intr_smoke.3494701814 Aug 27 07:15:24 AM UTC 24 Aug 27 07:15:32 AM UTC 24 640166097 ps
T946 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_fmt.2780212603 Aug 27 07:15:14 AM UTC 24 Aug 27 07:15:17 AM UTC 24 387657425 ps
T947 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_target_intr_stress_wr.984975252 Aug 27 07:14:51 AM UTC 24 Aug 27 07:15:17 AM UTC 24 12514914881 ps
T948 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_target_timeout.3935589045 Aug 27 07:15:25 AM UTC 24 Aug 27 07:15:34 AM UTC 24 2642970624 ps
T949 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_host_perf_precise.2223446950 Aug 27 07:13:18 AM UTC 24 Aug 27 07:15:19 AM UTC 24 2485849116 ps
T950 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_host_error_intr.3685375493 Aug 27 07:15:18 AM UTC 24 Aug 27 07:15:21 AM UTC 24 62791410 ps
T951 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_overflow.1753009690 Aug 27 07:13:16 AM UTC 24 Aug 27 07:15:21 AM UTC 24 23442412634 ps
T952 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_host_perf_precise.1550118972 Aug 27 07:15:16 AM UTC 24 Aug 27 07:15:22 AM UTC 24 197274884 ps
T953 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_rx.2482589080 Aug 27 07:15:14 AM UTC 24 Aug 27 07:15:23 AM UTC 24 115799760 ps
T954 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_host_perf.59635820 Aug 27 07:15:15 AM UTC 24 Aug 27 07:15:23 AM UTC 24 319272877 ps
T955 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/19.i2c_target_stress_all.3690054519 Aug 27 07:11:37 AM UTC 24 Aug 27 07:15:24 AM UTC 24 49888259486 ps
T956 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_overflow.2195201485 Aug 27 07:12:48 AM UTC 24 Aug 27 07:15:25 AM UTC 24 4355934519 ps
T957 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_host_smoke.385392948 Aug 27 07:14:26 AM UTC 24 Aug 27 07:15:27 AM UTC 24 9030518697 ps
T958 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_target_stretch.3247270416 Aug 27 07:15:23 AM UTC 24 Aug 27 07:15:29 AM UTC 24 2054477692 ps
T959 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_acq.2570544383 Aug 27 07:15:27 AM UTC 24 Aug 27 07:15:30 AM UTC 24 167761827 ps
T960 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_tx.383000935 Aug 27 07:15:32 AM UTC 24 Aug 27 07:15:34 AM UTC 24 1157974539 ps
T961 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_full.2935618695 Aug 27 07:12:48 AM UTC 24 Aug 27 07:15:35 AM UTC 24 11704708942 ps
T962 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_fmt_empty.2059129420 Aug 27 07:15:14 AM UTC 24 Aug 27 07:15:35 AM UTC 24 4106722839 ps
T963 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_host_may_nack.3932621257 Aug 27 07:16:40 AM UTC 24 Aug 27 07:16:50 AM UTC 24 2127218516 ps
T271 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_host_may_nack.2688826166 Aug 27 07:15:05 AM UTC 24 Aug 27 07:15:38 AM UTC 24 2588805641 ps
T964 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_host_perf.2513577889 Aug 27 07:14:29 AM UTC 24 Aug 27 07:15:40 AM UTC 24 2659517493 ps
T965 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_tx.1214343926 Aug 27 07:15:36 AM UTC 24 Aug 27 07:15:40 AM UTC 24 666875853 ps
T966 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_target_stress_wr.3050856588 Aug 27 07:15:22 AM UTC 24 Aug 27 07:15:40 AM UTC 24 12549508385 ps
T967 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_target_perf.1185834327 Aug 27 07:15:32 AM UTC 24 Aug 27 07:15:41 AM UTC 24 2598452888 ps
T968 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_target_tx_stretch_ctrl.3848437437 Aug 27 07:15:37 AM UTC 24 Aug 27 07:15:42 AM UTC 24 129342198 ps
T969 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_target_bad_addr.2943454063 Aug 27 07:15:32 AM UTC 24 Aug 27 07:15:42 AM UTC 24 11165441859 ps
T970 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_target_smbus_maxlen.2087812614 Aug 27 07:15:39 AM UTC 24 Aug 27 07:15:42 AM UTC 24 1765640694 ps
T971 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/16.i2c_target_intr_stress_wr.646665447 Aug 27 07:09:51 AM UTC 24 Aug 27 07:15:42 AM UTC 24 22630310489 ps
T972 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_acq.1281527156 Aug 27 07:15:36 AM UTC 24 Aug 27 07:15:42 AM UTC 24 998980460 ps
T973 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_alert_test.3633491612 Aug 27 07:15:41 AM UTC 24 Aug 27 07:15:43 AM UTC 24 17583652 ps
T974 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_target_nack_txstretch.1286324234 Aug 27 07:15:41 AM UTC 24 Aug 27 07:15:44 AM UTC 24 134092274 ps
T975 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull.2621364244 Aug 27 07:15:39 AM UTC 24 Aug 27 07:15:44 AM UTC 24 459499936 ps
T54 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull_addr.3802785179 Aug 27 07:15:41 AM UTC 24 Aug 27 07:15:45 AM UTC 24 986801818 ps
T976 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_host_override.3198875410 Aug 27 07:15:43 AM UTC 24 Aug 27 07:15:45 AM UTC 24 16090620 ps
T977 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_fmt.3539038606 Aug 27 07:15:43 AM UTC 24 Aug 27 07:15:46 AM UTC 24 432891998 ps
T978 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_target_stress_rd.3931588055 Aug 27 07:15:22 AM UTC 24 Aug 27 07:15:47 AM UTC 24 6129928311 ps
T979 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_watermark.404097431 Aug 27 07:13:15 AM UTC 24 Aug 27 07:15:49 AM UTC 24 10313107322 ps
T980 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_host_perf_precise.1456694306 Aug 27 07:15:46 AM UTC 24 Aug 27 07:15:49 AM UTC 24 116269521 ps
T981 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_watermark.3594632560 Aug 27 07:14:27 AM UTC 24 Aug 27 07:15:50 AM UTC 24 7845653606 ps
T982 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_host_error_intr.2735792430 Aug 27 07:15:48 AM UTC 24 Aug 27 07:15:52 AM UTC 24 89188351 ps
T983 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_fmt_empty.1238239194 Aug 27 07:15:43 AM UTC 24 Aug 27 07:15:55 AM UTC 24 369484504 ps
T984 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_rx.3933628880 Aug 27 07:15:43 AM UTC 24 Aug 27 07:15:57 AM UTC 24 771528373 ps
T985 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_target_stress_rd.1187236151 Aug 27 07:15:51 AM UTC 24 Aug 27 07:15:59 AM UTC 24 987494869 ps
T986 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_target_intr_stress_wr.3996997752 Aug 27 07:15:56 AM UTC 24 Aug 27 07:16:00 AM UTC 24 661126421 ps
T987 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_host_stretch_timeout.2724847810 Aug 27 07:15:46 AM UTC 24 Aug 27 07:16:00 AM UTC 24 1553650570 ps
T988 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_acq.247919738 Aug 27 07:16:01 AM UTC 24 Aug 27 07:16:03 AM UTC 24 116629549 ps
T989 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_tx.2022953946 Aug 27 07:16:01 AM UTC 24 Aug 27 07:16:04 AM UTC 24 219263832 ps
T266 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_host_may_nack.4104621878 Aug 27 07:15:34 AM UTC 24 Aug 27 07:16:07 AM UTC 24 1348266609 ps
T990 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_target_intr_smoke.3908867062 Aug 27 07:15:54 AM UTC 24 Aug 27 07:16:07 AM UTC 24 15664751278 ps
T991 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_overflow.148242755 Aug 27 07:14:28 AM UTC 24 Aug 27 07:16:10 AM UTC 24 5269683441 ps
T992 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_alert_test.1605445959 Aug 27 07:16:49 AM UTC 24 Aug 27 07:16:51 AM UTC 24 33889414 ps
T993 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_target_stress_all.3700923325 Aug 27 07:15:32 AM UTC 24 Aug 27 07:16:11 AM UTC 24 42832781325 ps
T994 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_target_timeout.792555750 Aug 27 07:15:58 AM UTC 24 Aug 27 07:16:12 AM UTC 24 6906260312 ps
T995 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_target_hrst.3636186196 Aug 27 07:16:07 AM UTC 24 Aug 27 07:16:12 AM UTC 24 1435727453 ps
T996 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_target_perf.3728513745 Aug 27 07:16:03 AM UTC 24 Aug 27 07:16:14 AM UTC 24 927620115 ps
T997 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/31.i2c_target_intr_smoke.3793624391 Aug 27 07:19:07 AM UTC 24 Aug 27 07:19:15 AM UTC 24 1470560554 ps
T93 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_target_smoke.4030388377 Aug 27 07:15:51 AM UTC 24 Aug 27 07:16:14 AM UTC 24 2398136698 ps
T998 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_target_bad_addr.1106504170 Aug 27 07:16:05 AM UTC 24 Aug 27 07:16:15 AM UTC 24 3815398842 ps
T999 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_tx.2787902897 Aug 27 07:16:12 AM UTC 24 Aug 27 07:16:15 AM UTC 24 89654012 ps
T1000 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_acq.1072521448 Aug 27 07:16:12 AM UTC 24 Aug 27 07:16:16 AM UTC 24 1310811610 ps
T1001 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/22.i2c_target_stress_wr.3709706790 Aug 27 07:12:55 AM UTC 24 Aug 27 07:16:16 AM UTC 24 45477574586 ps
T1002 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_target_nack_txstretch.1327044944 Aug 27 07:16:15 AM UTC 24 Aug 27 07:16:17 AM UTC 24 786954698 ps
T1003 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_target_smbus_maxlen.2848996824 Aug 27 07:16:13 AM UTC 24 Aug 27 07:16:18 AM UTC 24 426519026 ps
T1004 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_alert_test.1734012094 Aug 27 07:16:16 AM UTC 24 Aug 27 07:16:18 AM UTC 24 23068550 ps
T26 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/10.i2c_host_stress_all.364412169 Aug 27 07:06:58 AM UTC 24 Aug 27 07:16:18 AM UTC 24 50009717800 ps
T1005 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_host_override.1641624076 Aug 27 07:16:17 AM UTC 24 Aug 27 07:16:19 AM UTC 24 18621485 ps
T1006 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull_addr.1038676091 Aug 27 07:16:15 AM UTC 24 Aug 27 07:16:20 AM UTC 24 3985242057 ps
T1007 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull.1502567403 Aug 27 07:16:15 AM UTC 24 Aug 27 07:16:20 AM UTC 24 1084813693 ps
T1008 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_fmt.2210870587 Aug 27 07:16:18 AM UTC 24 Aug 27 07:16:21 AM UTC 24 210914547 ps
T1009 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_overflow.23354954 Aug 27 07:15:13 AM UTC 24 Aug 27 07:16:21 AM UTC 24 2552868135 ps
T1010 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_target_tx_stretch_ctrl.2888842105 Aug 27 07:16:12 AM UTC 24 Aug 27 07:16:22 AM UTC 24 430697436 ps
T1011 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_host_may_nack.2745990694 Aug 27 07:16:11 AM UTC 24 Aug 27 07:16:22 AM UTC 24 683450237 ps
T1012 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_watermark.351932514 Aug 27 07:15:13 AM UTC 24 Aug 27 07:16:23 AM UTC 24 7999593305 ps
T1013 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_host_smoke.3436316579 Aug 27 07:15:11 AM UTC 24 Aug 27 07:16:25 AM UTC 24 1546558676 ps
T1014 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_host_error_intr.2031855012 Aug 27 07:16:22 AM UTC 24 Aug 27 07:16:28 AM UTC 24 269444835 ps
T1015 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_host_perf_precise.2809562297 Aug 27 07:16:21 AM UTC 24 Aug 27 07:16:30 AM UTC 24 2510512441 ps
T1016 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_rx.2905706964 Aug 27 07:16:18 AM UTC 24 Aug 27 07:16:31 AM UTC 24 655376760 ps
T1017 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_fmt_empty.2186513832 Aug 27 07:16:18 AM UTC 24 Aug 27 07:16:31 AM UTC 24 1251717023 ps
T1018 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_host_stretch_timeout.674072139 Aug 27 07:16:22 AM UTC 24 Aug 27 07:16:33 AM UTC 24 1547292075 ps
T1019 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_host_perf.542687457 Aug 27 07:16:21 AM UTC 24 Aug 27 07:16:34 AM UTC 24 3134430247 ps
T1020 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_target_stretch.4200352202 Aug 27 07:16:26 AM UTC 24 Aug 27 07:16:36 AM UTC 24 1572634093 ps
T1021 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_host_smoke.2600441589 Aug 27 07:15:43 AM UTC 24 Aug 27 07:16:37 AM UTC 24 5909880005 ps
T309 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_acq.3944606270 Aug 27 07:16:34 AM UTC 24 Aug 27 07:16:37 AM UTC 24 649586574 ps
T1022 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_tx.3430522632 Aug 27 07:16:35 AM UTC 24 Aug 27 07:16:38 AM UTC 24 304719727 ps
T1023 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_target_intr_smoke.416069028 Aug 27 07:16:28 AM UTC 24 Aug 27 07:16:39 AM UTC 24 1278794744 ps
T1024 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_target_timeout.929118450 Aug 27 07:16:31 AM UTC 24 Aug 27 07:16:44 AM UTC 24 5178193347 ps
T1025 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_full.3429058874 Aug 27 07:14:29 AM UTC 24 Aug 27 07:16:44 AM UTC 24 2222080602 ps
T1026 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_target_bad_addr.280805278 Aug 27 07:16:38 AM UTC 24 Aug 27 07:16:46 AM UTC 24 782024229 ps
T1027 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_target_perf.1418042900 Aug 27 07:16:36 AM UTC 24 Aug 27 07:16:46 AM UTC 24 1615732023 ps
T1028 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_tx.1242861722 Aug 27 07:16:44 AM UTC 24 Aug 27 07:16:47 AM UTC 24 116938986 ps
T1029 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_acq.1791431153 Aug 27 07:16:43 AM UTC 24 Aug 27 07:16:48 AM UTC 24 1586349849 ps
T1030 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_target_tx_stretch_ctrl.3720665590 Aug 27 07:16:44 AM UTC 24 Aug 27 07:16:48 AM UTC 24 65600080 ps
T1031 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/12.i2c_host_perf.789872533 Aug 27 07:07:51 AM UTC 24 Aug 27 07:16:48 AM UTC 24 27040418391 ps
T1032 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_host_smoke.4175522632 Aug 27 07:16:16 AM UTC 24 Aug 27 07:16:49 AM UTC 24 6917735156 ps
T1033 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_full.2055783310 Aug 27 07:15:46 AM UTC 24 Aug 27 07:19:17 AM UTC 24 14171264148 ps
T1034 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_target_intr_stress_wr.452329542 Aug 27 07:16:31 AM UTC 24 Aug 27 07:16:51 AM UTC 24 8623620740 ps
T1035 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_target_smbus_maxlen.3476824944 Aug 27 07:16:47 AM UTC 24 Aug 27 07:16:52 AM UTC 24 514193685 ps
T1036 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_full.1741427353 Aug 27 07:15:15 AM UTC 24 Aug 27 07:16:52 AM UTC 24 14331826696 ps
T1037 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_host_override.1042123821 Aug 27 07:16:50 AM UTC 24 Aug 27 07:16:52 AM UTC 24 82365369 ps
T1038 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/30.i2c_target_stress_all.102211277 Aug 27 07:18:18 AM UTC 24 Aug 27 07:19:01 AM UTC 24 25143726985 ps
T1039 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull_addr.2939322045 Aug 27 07:16:48 AM UTC 24 Aug 27 07:16:53 AM UTC 24 507227442 ps
T1040 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull.2002785322 Aug 27 07:16:47 AM UTC 24 Aug 27 07:16:53 AM UTC 24 528792463 ps
T1041 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_target_stress_rd.2437631062 Aug 27 07:16:26 AM UTC 24 Aug 27 07:16:54 AM UTC 24 652324895 ps
T1042 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_fmt.381726725 Aug 27 07:16:52 AM UTC 24 Aug 27 07:16:55 AM UTC 24 385833036 ps
T1043 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_target_stress_all.2358832816 Aug 27 07:16:37 AM UTC 24 Aug 27 07:17:01 AM UTC 24 6408133400 ps
T1044 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_fmt_empty.50919776 Aug 27 07:16:53 AM UTC 24 Aug 27 07:17:01 AM UTC 24 512233041 ps
T1045 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_host_error_intr.3460952653 Aug 27 07:16:55 AM UTC 24 Aug 27 07:17:01 AM UTC 24 199504213 ps
T1046 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_rx.3036342024 Aug 27 07:16:53 AM UTC 24 Aug 27 07:17:01 AM UTC 24 712501400 ps
T1047 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_host_stretch_timeout.1393182132 Aug 27 07:16:55 AM UTC 24 Aug 27 07:17:04 AM UTC 24 1967709874 ps
T94 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_target_smoke.1753241600 Aug 27 07:16:23 AM UTC 24 Aug 27 07:17:06 AM UTC 24 1299491108 ps
T1048 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_target_stress_rd.1412378625 Aug 27 07:17:02 AM UTC 24 Aug 27 07:17:08 AM UTC 24 249281961 ps
T1049 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_target_stretch.2787761674 Aug 27 07:17:02 AM UTC 24 Aug 27 07:17:11 AM UTC 24 4072305974 ps
T1050 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_target_smoke.2279041074 Aug 27 07:17:01 AM UTC 24 Aug 27 07:17:14 AM UTC 24 3110555805 ps
T1051 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_target_intr_smoke.2728914862 Aug 27 07:17:05 AM UTC 24 Aug 27 07:17:14 AM UTC 24 1388147376 ps
T1052 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_full.4171327512 Aug 27 07:16:20 AM UTC 24 Aug 27 07:19:06 AM UTC 24 9546548149 ps
T1053 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_watermark.1582578704 Aug 27 07:15:43 AM UTC 24 Aug 27 07:17:15 AM UTC 24 5685503524 ps
T1054 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/28.i2c_target_stress_wr.451065855 Aug 27 07:16:24 AM UTC 24 Aug 27 07:17:16 AM UTC 24 17567414881 ps
T1055 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_acq.2044558360 Aug 27 07:17:16 AM UTC 24 Aug 27 07:17:19 AM UTC 24 299190305 ps
T1056 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_tx.4192049536 Aug 27 07:17:16 AM UTC 24 Aug 27 07:17:20 AM UTC 24 373320852 ps
T1057 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_target_timeout.3742935221 Aug 27 07:17:09 AM UTC 24 Aug 27 07:17:21 AM UTC 24 4921809825 ps
T1058 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_target_perf.3256686367 Aug 27 07:17:16 AM UTC 24 Aug 27 07:17:25 AM UTC 24 1734787986 ps
T1059 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/31.i2c_host_stretch_timeout.24539234 Aug 27 07:18:43 AM UTC 24 Aug 27 07:19:15 AM UTC 24 5845562550 ps
T1060 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/9.i2c_target_stress_wr.2464671826 Aug 27 07:06:21 AM UTC 24 Aug 27 07:17:28 AM UTC 24 54048189113 ps
T1061 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_tx.2746788373 Aug 27 07:17:25 AM UTC 24 Aug 27 07:17:28 AM UTC 24 930069990 ps
T1062 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_acq.768781519 Aug 27 07:17:22 AM UTC 24 Aug 27 07:17:29 AM UTC 24 595287029 ps
T1063 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_target_tx_stretch_ctrl.1939219539 Aug 27 07:17:26 AM UTC 24 Aug 27 07:17:29 AM UTC 24 102514807 ps
T274 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_host_may_nack.1889965207 Aug 27 07:17:20 AM UTC 24 Aug 27 07:17:30 AM UTC 24 3006337675 ps
T1064 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_watermark.1612252066 Aug 27 07:12:47 AM UTC 24 Aug 27 07:17:31 AM UTC 24 5103176612 ps
T1065 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_alert_test.1728763601 Aug 27 07:17:30 AM UTC 24 Aug 27 07:17:32 AM UTC 24 24141935 ps
T276 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/30.i2c_host_override.2158021194 Aug 27 07:17:31 AM UTC 24 Aug 27 07:17:33 AM UTC 24 180521097 ps
T1066 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/31.i2c_target_smoke.2643940792 Aug 27 07:18:47 AM UTC 24 Aug 27 07:19:02 AM UTC 24 2759720072 ps
T1067 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull.1125698422 Aug 27 07:17:29 AM UTC 24 Aug 27 07:17:33 AM UTC 24 4356485841 ps
T1068 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_target_smbus_maxlen.1589209083 Aug 27 07:17:29 AM UTC 24 Aug 27 07:17:34 AM UTC 24 468339543 ps
T1069 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_target_stress_wr.1872089541 Aug 27 07:17:02 AM UTC 24 Aug 27 07:17:34 AM UTC 24 30408889434 ps
T55 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull_addr.4154068776 Aug 27 07:17:29 AM UTC 24 Aug 27 07:17:34 AM UTC 24 570983885 ps
T1070 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_fmt.2030585391 Aug 27 07:17:34 AM UTC 24 Aug 27 07:17:37 AM UTC 24 120762327 ps
T1071 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_full.3599671860 Aug 27 07:16:54 AM UTC 24 Aug 27 07:17:39 AM UTC 24 1778513575 ps
T1072 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/30.i2c_host_error_intr.2127592045 Aug 27 07:17:40 AM UTC 24 Aug 27 07:17:43 AM UTC 24 155559656 ps
T1073 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_fmt_empty.2747613109 Aug 27 07:17:35 AM UTC 24 Aug 27 07:17:43 AM UTC 24 526985693 ps
T1074 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_rx.1336392476 Aug 27 07:17:35 AM UTC 24 Aug 27 07:17:46 AM UTC 24 508369586 ps
T1075 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/24.i2c_target_intr_stress_wr.4100672651 Aug 27 07:14:05 AM UTC 24 Aug 27 07:17:50 AM UTC 24 18193539633 ps
T1076 /workspaces/repo/scratch/os_regression_2024_08_26/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_overflow.857097882 Aug 27 07:16:52 AM UTC 24 Aug 27 07:18:00 AM UTC 24 10540154459 ps
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