| T178 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_reset_tx.63448725 |
|
|
Aug 28 10:24:22 PM UTC 24 |
Aug 28 10:24:26 PM UTC 24 |
1883455335 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/7.i2c_host_stretch_timeout.1000482225 |
|
|
Aug 28 10:23:32 PM UTC 24 |
Aug 28 10:24:27 PM UTC 24 |
4138931492 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_target_stress_rd.2683252954 |
|
|
Aug 28 10:25:14 PM UTC 24 |
Aug 28 10:25:28 PM UTC 24 |
2933317459 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_target_timeout.3520523609 |
|
|
Aug 28 10:24:18 PM UTC 24 |
Aug 28 10:24:28 PM UTC 24 |
1188961636 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_target_smoke.3113200755 |
|
|
Aug 28 10:24:11 PM UTC 24 |
Aug 28 10:24:28 PM UTC 24 |
3078692985 ps |
| T253 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/3.i2c_target_stress_all.4243105000 |
|
|
Aug 28 10:22:13 PM UTC 24 |
Aug 28 10:24:30 PM UTC 24 |
81163072510 ps |
| T415 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_watermarks_tx.2695080103 |
|
|
Aug 28 10:24:29 PM UTC 24 |
Aug 28 10:24:32 PM UTC 24 |
525438982 ps |
| T416 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_target_bad_addr.2451272330 |
|
|
Aug 28 10:24:25 PM UTC 24 |
Aug 28 10:24:33 PM UTC 24 |
886205016 ps |
| T250 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_host_perf_precise.4068747237 |
|
|
Aug 28 10:24:00 PM UTC 24 |
Aug 28 10:24:33 PM UTC 24 |
1595634352 ps |
| T289 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_target_fifo_watermarks_acq.3138844387 |
|
|
Aug 28 10:24:29 PM UTC 24 |
Aug 28 10:24:35 PM UTC 24 |
2203936756 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_target_bad_addr.2876968571 |
|
|
Aug 28 10:25:23 PM UTC 24 |
Aug 28 10:25:29 PM UTC 24 |
2892156812 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_target_tx_stretch_ctrl.1970404617 |
|
|
Aug 28 10:24:31 PM UTC 24 |
Aug 28 10:24:35 PM UTC 24 |
70683682 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/4.i2c_host_fifo_watermark.218818367 |
|
|
Aug 28 10:22:24 PM UTC 24 |
Aug 28 10:24:37 PM UTC 24 |
48260523879 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_alert_test.1602314668 |
|
|
Aug 28 10:24:36 PM UTC 24 |
Aug 28 10:24:37 PM UTC 24 |
38687494 ps |
| T284 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_host_may_nack.794474348 |
|
|
Aug 28 10:24:29 PM UTC 24 |
Aug 28 10:24:38 PM UTC 24 |
406433846 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_host_override.4033784064 |
|
|
Aug 28 10:24:36 PM UTC 24 |
Aug 28 10:24:38 PM UTC 24 |
29798528 ps |
| T179 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_target_nack_txstretch.21027091 |
|
|
Aug 28 10:24:34 PM UTC 24 |
Aug 28 10:24:38 PM UTC 24 |
140942049 ps |
| T420 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_target_nack_acqfull.2441704056 |
|
|
Aug 28 10:24:33 PM UTC 24 |
Aug 28 10:24:38 PM UTC 24 |
1680866796 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_target_smbus_maxlen.2663857712 |
|
|
Aug 28 10:24:33 PM UTC 24 |
Aug 28 10:24:38 PM UTC 24 |
1145064803 ps |
| T422 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_target_nack_acqfull_addr.1935614931 |
|
|
Aug 28 10:24:34 PM UTC 24 |
Aug 28 10:24:39 PM UTC 24 |
864873614 ps |
| T257 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_reset_fmt.1387452963 |
|
|
Aug 28 10:24:39 PM UTC 24 |
Aug 28 10:24:42 PM UTC 24 |
153913342 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_target_stress_wr.2187279276 |
|
|
Aug 28 10:24:11 PM UTC 24 |
Aug 28 10:24:44 PM UTC 24 |
16633661251 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/6.i2c_host_smoke.769382734 |
|
|
Aug 28 10:23:05 PM UTC 24 |
Aug 28 10:24:44 PM UTC 24 |
7041170126 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_host_stretch_timeout.1576066127 |
|
|
Aug 28 10:24:01 PM UTC 24 |
Aug 28 10:24:44 PM UTC 24 |
3151262747 ps |
| T426 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/7.i2c_host_perf.2867514344 |
|
|
Aug 28 10:23:31 PM UTC 24 |
Aug 28 10:24:45 PM UTC 24 |
2923137426 ps |
| T307 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_fmt_empty.3299754411 |
|
|
Aug 28 10:24:39 PM UTC 24 |
Aug 28 10:24:45 PM UTC 24 |
412107688 ps |
| T427 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_host_error_intr.1853229966 |
|
|
Aug 28 10:24:42 PM UTC 24 |
Aug 28 10:24:46 PM UTC 24 |
253131775 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_reset_rx.1702189957 |
|
|
Aug 28 10:24:39 PM UTC 24 |
Aug 28 10:24:47 PM UTC 24 |
3258623329 ps |
| T191 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/5.i2c_host_fifo_watermark.374337092 |
|
|
Aug 28 10:22:44 PM UTC 24 |
Aug 28 10:24:49 PM UTC 24 |
4812688669 ps |
| T429 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_host_stretch_timeout.382135654 |
|
|
Aug 28 10:24:40 PM UTC 24 |
Aug 28 10:24:51 PM UTC 24 |
1860168158 ps |
| T273 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_host_may_nack.2397154273 |
|
|
Aug 28 10:24:59 PM UTC 24 |
Aug 28 10:25:30 PM UTC 24 |
2568395627 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_host_perf.1854692699 |
|
|
Aug 28 10:24:39 PM UTC 24 |
Aug 28 10:24:52 PM UTC 24 |
3279802118 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_reset_acq.652207265 |
|
|
Aug 28 10:24:51 PM UTC 24 |
Aug 28 10:24:54 PM UTC 24 |
522018419 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_reset_tx.2638196706 |
|
|
Aug 28 10:24:52 PM UTC 24 |
Aug 28 10:24:56 PM UTC 24 |
772787590 ps |
| T432 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_target_stretch.2393964897 |
|
|
Aug 28 10:24:13 PM UTC 24 |
Aug 28 10:24:57 PM UTC 24 |
4982104802 ps |
| T433 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_target_intr_smoke.2891069260 |
|
|
Aug 28 10:24:47 PM UTC 24 |
Aug 28 10:24:57 PM UTC 24 |
9704132840 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_target_stretch.709466939 |
|
|
Aug 28 10:24:46 PM UTC 24 |
Aug 28 10:24:57 PM UTC 24 |
1639465064 ps |
| T64 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/6.i2c_target_stress_all.362773794 |
|
|
Aug 28 10:23:17 PM UTC 24 |
Aug 28 10:24:57 PM UTC 24 |
55205481691 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_target_timeout.1155622668 |
|
|
Aug 28 10:24:48 PM UTC 24 |
Aug 28 10:25:01 PM UTC 24 |
2027997580 ps |
| T436 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_host_perf_precise.3411661112 |
|
|
Aug 28 10:24:40 PM UTC 24 |
Aug 28 10:25:01 PM UTC 24 |
400868454 ps |
| T437 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_target_smoke.180512096 |
|
|
Aug 28 10:25:11 PM UTC 24 |
Aug 28 10:25:28 PM UTC 24 |
3833343796 ps |
| T201 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_target_hrst.662455262 |
|
|
Aug 28 10:24:56 PM UTC 24 |
Aug 28 10:25:01 PM UTC 24 |
1200557997 ps |
| T285 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_target_perf.2609768868 |
|
|
Aug 28 10:24:53 PM UTC 24 |
Aug 28 10:25:02 PM UTC 24 |
1066029969 ps |
| T438 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_target_stress_rd.1278098894 |
|
|
Aug 28 10:24:11 PM UTC 24 |
Aug 28 10:25:03 PM UTC 24 |
999117561 ps |
| T33 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_host_mode_toggle.223404806 |
|
|
Aug 28 10:24:59 PM UTC 24 |
Aug 28 10:25:04 PM UTC 24 |
1031567825 ps |
| T439 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_host_smoke.4219782740 |
|
|
Aug 28 10:24:36 PM UTC 24 |
Aug 28 10:25:05 PM UTC 24 |
1652791031 ps |
| T440 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_target_bad_addr.2307973195 |
|
|
Aug 28 10:24:54 PM UTC 24 |
Aug 28 10:25:05 PM UTC 24 |
1753873341 ps |
| T441 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_watermarks_tx.1942754967 |
|
|
Aug 28 10:25:02 PM UTC 24 |
Aug 28 10:25:05 PM UTC 24 |
109313692 ps |
| T442 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_target_fifo_watermarks_acq.2833102537 |
|
|
Aug 28 10:25:02 PM UTC 24 |
Aug 28 10:25:06 PM UTC 24 |
602021007 ps |
| T443 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_alert_test.4065093594 |
|
|
Aug 28 10:25:05 PM UTC 24 |
Aug 28 10:25:07 PM UTC 24 |
18142388 ps |
| T444 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_host_override.2635347207 |
|
|
Aug 28 10:25:05 PM UTC 24 |
Aug 28 10:25:07 PM UTC 24 |
161977767 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_target_nack_txstretch.346066349 |
|
|
Aug 28 10:25:04 PM UTC 24 |
Aug 28 10:25:08 PM UTC 24 |
136744736 ps |
| T445 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_target_tx_stretch_ctrl.3796289512 |
|
|
Aug 28 10:25:02 PM UTC 24 |
Aug 28 10:25:09 PM UTC 24 |
191427599 ps |
| T446 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_target_smbus_maxlen.2079756704 |
|
|
Aug 28 10:25:03 PM UTC 24 |
Aug 28 10:25:09 PM UTC 24 |
1897753042 ps |
| T447 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_target_nack_acqfull.2419479599 |
|
|
Aug 28 10:25:04 PM UTC 24 |
Aug 28 10:25:09 PM UTC 24 |
533224328 ps |
| T448 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_target_stress_wr.1620638500 |
|
|
Aug 28 10:24:46 PM UTC 24 |
Aug 28 10:25:09 PM UTC 24 |
19546701241 ps |
| T449 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_target_intr_stress_wr.3181839502 |
|
|
Aug 28 10:24:14 PM UTC 24 |
Aug 28 10:25:09 PM UTC 24 |
21557778942 ps |
| T52 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_target_nack_acqfull_addr.3108506563 |
|
|
Aug 28 10:25:04 PM UTC 24 |
Aug 28 10:25:09 PM UTC 24 |
915118750 ps |
| T290 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/0.i2c_target_stress_all.3124425806 |
|
|
Aug 28 10:21:30 PM UTC 24 |
Aug 28 10:25:10 PM UTC 24 |
43872794805 ps |
| T450 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_target_smoke.1490167573 |
|
|
Aug 28 10:24:45 PM UTC 24 |
Aug 28 10:25:11 PM UTC 24 |
4766509571 ps |
| T451 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_reset_fmt.2062551212 |
|
|
Aug 28 10:25:09 PM UTC 24 |
Aug 28 10:25:11 PM UTC 24 |
109201447 ps |
| T452 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/5.i2c_target_stress_wr.512585977 |
|
|
Aug 28 10:22:55 PM UTC 24 |
Aug 28 10:25:13 PM UTC 24 |
52892453118 ps |
| T453 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_host_perf_precise.2290123570 |
|
|
Aug 28 10:25:10 PM UTC 24 |
Aug 28 10:25:15 PM UTC 24 |
580343621 ps |
| T454 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_target_perf.2169987246 |
|
|
Aug 28 10:25:22 PM UTC 24 |
Aug 28 10:25:29 PM UTC 24 |
521055349 ps |
| T455 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_full.1385954885 |
|
|
Aug 28 10:24:00 PM UTC 24 |
Aug 28 10:25:16 PM UTC 24 |
8041448430 ps |
| T456 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_host_error_intr.3840750037 |
|
|
Aug 28 10:25:11 PM UTC 24 |
Aug 28 10:25:19 PM UTC 24 |
1017028523 ps |
| T457 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_reset_rx.1343088764 |
|
|
Aug 28 10:25:10 PM UTC 24 |
Aug 28 10:25:19 PM UTC 24 |
125467086 ps |
| T458 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_host_smoke.3897346664 |
|
|
Aug 28 10:23:57 PM UTC 24 |
Aug 28 10:25:19 PM UTC 24 |
1809652236 ps |
| T459 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_fmt_empty.3656548196 |
|
|
Aug 28 10:25:09 PM UTC 24 |
Aug 28 10:25:21 PM UTC 24 |
391937329 ps |
| T460 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/1.i2c_target_intr_stress_wr.1233566477 |
|
|
Aug 28 10:21:40 PM UTC 24 |
Aug 28 10:25:21 PM UTC 24 |
15188538367 ps |
| T461 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_target_stress_rd.3487446101 |
|
|
Aug 28 10:24:46 PM UTC 24 |
Aug 28 10:25:22 PM UTC 24 |
1558835364 ps |
| T462 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_reset_acq.2888578645 |
|
|
Aug 28 10:25:21 PM UTC 24 |
Aug 28 10:25:23 PM UTC 24 |
597011514 ps |
| T463 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_reset_tx.3405472333 |
|
|
Aug 28 10:25:22 PM UTC 24 |
Aug 28 10:25:24 PM UTC 24 |
2020222342 ps |
| T464 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_target_intr_smoke.1747040522 |
|
|
Aug 28 10:25:16 PM UTC 24 |
Aug 28 10:25:28 PM UTC 24 |
1310043104 ps |
| T311 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/5.i2c_target_stress_all.439555451 |
|
|
Aug 28 10:22:57 PM UTC 24 |
Aug 28 10:25:30 PM UTC 24 |
85725620388 ps |
| T465 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_watermarks_tx.206885324 |
|
|
Aug 28 10:25:29 PM UTC 24 |
Aug 28 10:25:32 PM UTC 24 |
179560571 ps |
| T466 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_target_timeout.252928166 |
|
|
Aug 28 10:25:20 PM UTC 24 |
Aug 28 10:25:32 PM UTC 24 |
1490510518 ps |
| T467 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_host_smoke.2559849298 |
|
|
Aug 28 10:25:05 PM UTC 24 |
Aug 28 10:25:32 PM UTC 24 |
4132014139 ps |
| T468 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_alert_test.1858497888 |
|
|
Aug 28 10:25:32 PM UTC 24 |
Aug 28 10:25:34 PM UTC 24 |
44408495 ps |
| T469 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_target_smbus_maxlen.3585519055 |
|
|
Aug 28 10:25:30 PM UTC 24 |
Aug 28 10:25:34 PM UTC 24 |
1751846312 ps |
| T182 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_target_nack_txstretch.589311462 |
|
|
Aug 28 10:25:32 PM UTC 24 |
Aug 28 10:25:34 PM UTC 24 |
142431482 ps |
| T277 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_host_override.1184042603 |
|
|
Aug 28 10:25:33 PM UTC 24 |
Aug 28 10:25:35 PM UTC 24 |
26264692 ps |
| T470 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_target_fifo_watermarks_acq.3938249835 |
|
|
Aug 28 10:25:29 PM UTC 24 |
Aug 28 10:25:35 PM UTC 24 |
1676666714 ps |
| T471 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_target_nack_acqfull.2075266363 |
|
|
Aug 28 10:25:30 PM UTC 24 |
Aug 28 10:25:36 PM UTC 24 |
559293576 ps |
| T472 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_target_nack_acqfull_addr.2793798961 |
|
|
Aug 28 10:25:32 PM UTC 24 |
Aug 28 10:25:37 PM UTC 24 |
797625364 ps |
| T473 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_reset_fmt.10271729 |
|
|
Aug 28 10:25:35 PM UTC 24 |
Aug 28 10:25:38 PM UTC 24 |
685127636 ps |
| T230 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_target_intr_stress_wr.804236339 |
|
|
Aug 28 10:24:48 PM UTC 24 |
Aug 28 10:25:39 PM UTC 24 |
18817861572 ps |
| T474 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_overflow.1467977634 |
|
|
Aug 28 10:24:39 PM UTC 24 |
Aug 28 10:25:39 PM UTC 24 |
3389057520 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_host_perf_precise.2998522818 |
|
|
Aug 28 10:25:37 PM UTC 24 |
Aug 28 10:25:40 PM UTC 24 |
99153173 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_reset_rx.3327861473 |
|
|
Aug 28 10:25:36 PM UTC 24 |
Aug 28 10:25:44 PM UTC 24 |
1589397335 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_fmt_empty.76201022 |
|
|
Aug 28 10:25:35 PM UTC 24 |
Aug 28 10:25:45 PM UTC 24 |
1593457652 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_full.229660889 |
|
|
Aug 28 10:23:07 PM UTC 24 |
Aug 28 10:25:46 PM UTC 24 |
40910299438 ps |
| T268 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_host_may_nack.4141673720 |
|
|
Aug 28 10:25:28 PM UTC 24 |
Aug 28 10:25:46 PM UTC 24 |
449264513 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_host_error_intr.2112306919 |
|
|
Aug 28 10:25:39 PM UTC 24 |
Aug 28 10:25:47 PM UTC 24 |
297163715 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_target_tx_stretch_ctrl.2212657200 |
|
|
Aug 28 10:25:30 PM UTC 24 |
Aug 28 10:25:49 PM UTC 24 |
836753664 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/1.i2c_host_fifo_watermark.3444216419 |
|
|
Aug 28 10:21:37 PM UTC 24 |
Aug 28 10:25:52 PM UTC 24 |
4520707748 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/3.i2c_host_fifo_watermark.1510495305 |
|
|
Aug 28 10:22:05 PM UTC 24 |
Aug 28 10:25:52 PM UTC 24 |
3757056675 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_target_intr_stress_wr.3731139621 |
|
|
Aug 28 10:25:16 PM UTC 24 |
Aug 28 10:25:53 PM UTC 24 |
10720548076 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_host_perf_precise.888877021 |
|
|
Aug 28 10:26:35 PM UTC 24 |
Aug 28 10:26:39 PM UTC 24 |
88658741 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_reset_acq.4274959524 |
|
|
Aug 28 10:25:52 PM UTC 24 |
Aug 28 10:25:55 PM UTC 24 |
169044737 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_reset_tx.2081936540 |
|
|
Aug 28 10:25:53 PM UTC 24 |
Aug 28 10:25:56 PM UTC 24 |
346496764 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_target_stress_rd.291818503 |
|
|
Aug 28 10:25:46 PM UTC 24 |
Aug 28 10:25:59 PM UTC 24 |
252069911 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_watermark.1288353468 |
|
|
Aug 28 10:24:38 PM UTC 24 |
Aug 28 10:26:00 PM UTC 24 |
6362447961 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_target_stretch.600394183 |
|
|
Aug 28 10:25:47 PM UTC 24 |
Aug 28 10:26:01 PM UTC 24 |
1240114403 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_target_intr_smoke.2865380895 |
|
|
Aug 28 10:25:47 PM UTC 24 |
Aug 28 10:26:03 PM UTC 24 |
1831280381 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_host_fifo_overflow.4150258140 |
|
|
Aug 28 10:23:58 PM UTC 24 |
Aug 28 10:26:40 PM UTC 24 |
5023223702 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_target_hrst.4067758075 |
|
|
Aug 28 10:25:59 PM UTC 24 |
Aug 28 10:26:03 PM UTC 24 |
1528033310 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_target_bad_addr.3476826051 |
|
|
Aug 28 10:25:56 PM UTC 24 |
Aug 28 10:26:04 PM UTC 24 |
1489094800 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_host_mode_toggle.3397823772 |
|
|
Aug 28 10:26:01 PM UTC 24 |
Aug 28 10:26:04 PM UTC 24 |
150011980 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_target_timeout.2367694632 |
|
|
Aug 28 10:25:50 PM UTC 24 |
Aug 28 10:26:05 PM UTC 24 |
2755061426 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_target_perf.2259048645 |
|
|
Aug 28 10:25:55 PM UTC 24 |
Aug 28 10:26:06 PM UTC 24 |
849090204 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_host_may_nack.3894920505 |
|
|
Aug 28 10:26:02 PM UTC 24 |
Aug 28 10:26:06 PM UTC 24 |
503312881 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_watermarks_tx.671764732 |
|
|
Aug 28 10:26:04 PM UTC 24 |
Aug 28 10:26:07 PM UTC 24 |
282583707 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_target_tx_stretch_ctrl.2722438588 |
|
|
Aug 28 10:26:04 PM UTC 24 |
Aug 28 10:26:08 PM UTC 24 |
80103302 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_target_fifo_watermarks_acq.1043737575 |
|
|
Aug 28 10:26:04 PM UTC 24 |
Aug 28 10:26:08 PM UTC 24 |
1505031836 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_alert_test.3328486174 |
|
|
Aug 28 10:26:07 PM UTC 24 |
Aug 28 10:26:09 PM UTC 24 |
16549942 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_alert_test.2193588506 |
|
|
Aug 28 10:26:31 PM UTC 24 |
Aug 28 10:26:33 PM UTC 24 |
22984968 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_overflow.2518147450 |
|
|
Aug 28 10:23:06 PM UTC 24 |
Aug 28 10:26:09 PM UTC 24 |
2577549617 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_host_stretch_timeout.3210310721 |
|
|
Aug 28 10:25:10 PM UTC 24 |
Aug 28 10:26:10 PM UTC 24 |
1030591102 ps |
| T152 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_host_override.351671683 |
|
|
Aug 28 10:26:08 PM UTC 24 |
Aug 28 10:26:10 PM UTC 24 |
26991351 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_target_smbus_maxlen.1828088838 |
|
|
Aug 28 10:26:05 PM UTC 24 |
Aug 28 10:26:10 PM UTC 24 |
661593844 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_target_nack_acqfull.575764068 |
|
|
Aug 28 10:26:05 PM UTC 24 |
Aug 28 10:26:11 PM UTC 24 |
2153191775 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_target_nack_acqfull_addr.3035653359 |
|
|
Aug 28 10:26:06 PM UTC 24 |
Aug 28 10:26:11 PM UTC 24 |
1860223211 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/4.i2c_target_stress_wr.3385150795 |
|
|
Aug 28 10:22:28 PM UTC 24 |
Aug 28 10:26:12 PM UTC 24 |
42388067252 ps |
| T118 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_watermark.2431003925 |
|
|
Aug 28 10:25:06 PM UTC 24 |
Aug 28 10:26:13 PM UTC 24 |
3270138875 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/6.i2c_target_intr_stress_wr.4040993931 |
|
|
Aug 28 10:23:12 PM UTC 24 |
Aug 28 10:26:13 PM UTC 24 |
17407308499 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_reset_fmt.3901986576 |
|
|
Aug 28 10:26:10 PM UTC 24 |
Aug 28 10:26:14 PM UTC 24 |
145877422 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_host_stretch_timeout.4027079266 |
|
|
Aug 28 10:25:38 PM UTC 24 |
Aug 28 10:26:15 PM UTC 24 |
775542933 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_host_fifo_full.564885253 |
|
|
Aug 28 10:24:39 PM UTC 24 |
Aug 28 10:26:15 PM UTC 24 |
9147872293 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_overflow.2147718016 |
|
|
Aug 28 10:23:30 PM UTC 24 |
Aug 28 10:26:16 PM UTC 24 |
9614208375 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_overflow.1562171070 |
|
|
Aug 28 10:25:35 PM UTC 24 |
Aug 28 10:26:18 PM UTC 24 |
5665282290 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_target_smoke.2775327552 |
|
|
Aug 28 10:25:41 PM UTC 24 |
Aug 28 10:26:18 PM UTC 24 |
4720759206 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_reset_rx.2559246743 |
|
|
Aug 28 10:26:11 PM UTC 24 |
Aug 28 10:26:19 PM UTC 24 |
165198337 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/6.i2c_target_stress_wr.2576777738 |
|
|
Aug 28 10:23:10 PM UTC 24 |
Aug 28 10:26:20 PM UTC 24 |
54501540593 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_fmt_empty.231373971 |
|
|
Aug 28 10:26:11 PM UTC 24 |
Aug 28 10:26:21 PM UTC 24 |
340425762 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_host_stretch_timeout.164306374 |
|
|
Aug 28 10:26:12 PM UTC 24 |
Aug 28 10:26:23 PM UTC 24 |
2524131372 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_host_error_intr.1559070351 |
|
|
Aug 28 10:26:37 PM UTC 24 |
Aug 28 10:26:40 PM UTC 24 |
174010833 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/4.i2c_target_stress_all.105524799 |
|
|
Aug 28 10:22:33 PM UTC 24 |
Aug 28 10:26:23 PM UTC 24 |
39507313239 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_target_intr_stress_wr.4070525925 |
|
|
Aug 28 10:26:18 PM UTC 24 |
Aug 28 10:26:24 PM UTC 24 |
1512609113 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_reset_acq.3040570827 |
|
|
Aug 28 10:26:22 PM UTC 24 |
Aug 28 10:26:24 PM UTC 24 |
217925617 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_reset_tx.1504244163 |
|
|
Aug 28 10:26:22 PM UTC 24 |
Aug 28 10:26:25 PM UTC 24 |
736457656 ps |
| T38 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_host_error_intr.504585881 |
|
|
Aug 28 10:26:13 PM UTC 24 |
Aug 28 10:26:26 PM UTC 24 |
915333131 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_target_stress_wr.3445433847 |
|
|
Aug 28 10:25:45 PM UTC 24 |
Aug 28 10:26:28 PM UTC 24 |
45881418727 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_target_hrst.28880352 |
|
|
Aug 28 10:26:24 PM UTC 24 |
Aug 28 10:26:28 PM UTC 24 |
1000518777 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_target_intr_smoke.1986180385 |
|
|
Aug 28 10:26:17 PM UTC 24 |
Aug 28 10:26:28 PM UTC 24 |
4857739464 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_target_bad_addr.1584787047 |
|
|
Aug 28 10:26:24 PM UTC 24 |
Aug 28 10:26:30 PM UTC 24 |
4722214656 ps |
| T83 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_host_mode_toggle.1516991293 |
|
|
Aug 28 10:26:25 PM UTC 24 |
Aug 28 10:26:30 PM UTC 24 |
142608680 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_target_timeout.3970149927 |
|
|
Aug 28 10:26:19 PM UTC 24 |
Aug 28 10:26:30 PM UTC 24 |
3176601841 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_watermarks_tx.1424473038 |
|
|
Aug 28 10:26:27 PM UTC 24 |
Aug 28 10:26:30 PM UTC 24 |
428347217 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_target_perf.3037994044 |
|
|
Aug 28 10:26:23 PM UTC 24 |
Aug 28 10:26:30 PM UTC 24 |
1066722823 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_host_smoke.4167370386 |
|
|
Aug 28 10:26:07 PM UTC 24 |
Aug 28 10:26:32 PM UTC 24 |
5214351023 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_target_fifo_watermarks_acq.870852052 |
|
|
Aug 28 10:26:26 PM UTC 24 |
Aug 28 10:26:32 PM UTC 24 |
583331613 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_target_stretch.1394187627 |
|
|
Aug 28 10:25:15 PM UTC 24 |
Aug 28 10:26:33 PM UTC 24 |
1694847538 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_target_smoke.2167206742 |
|
|
Aug 28 10:26:14 PM UTC 24 |
Aug 28 10:26:33 PM UTC 24 |
1874549972 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_host_override.488673774 |
|
|
Aug 28 10:26:32 PM UTC 24 |
Aug 28 10:26:34 PM UTC 24 |
87689579 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_target_nack_txstretch.1837678346 |
|
|
Aug 28 10:26:31 PM UTC 24 |
Aug 28 10:26:34 PM UTC 24 |
164381752 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_target_smbus_maxlen.4010965681 |
|
|
Aug 28 10:26:29 PM UTC 24 |
Aug 28 10:26:34 PM UTC 24 |
4543942547 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_target_nack_acqfull.1011148051 |
|
|
Aug 28 10:26:29 PM UTC 24 |
Aug 28 10:26:36 PM UTC 24 |
604924335 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_reset_fmt.2069429408 |
|
|
Aug 28 10:26:34 PM UTC 24 |
Aug 28 10:26:37 PM UTC 24 |
163470424 ps |
| T53 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_target_nack_acqfull_addr.3246811131 |
|
|
Aug 28 10:26:30 PM UTC 24 |
Aug 28 10:26:37 PM UTC 24 |
3642457788 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_target_tx_stretch_ctrl.3050605070 |
|
|
Aug 28 10:26:28 PM UTC 24 |
Aug 28 10:26:38 PM UTC 24 |
514669879 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_reset_rx.2185770395 |
|
|
Aug 28 10:26:34 PM UTC 24 |
Aug 28 10:26:43 PM UTC 24 |
676734855 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_host_may_nack.2767894348 |
|
|
Aug 28 10:26:25 PM UTC 24 |
Aug 28 10:26:44 PM UTC 24 |
384104811 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_target_stress_rd.2204958956 |
|
|
Aug 28 10:26:16 PM UTC 24 |
Aug 28 10:26:48 PM UTC 24 |
10433061958 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_target_intr_smoke.3864519136 |
|
|
Aug 28 10:26:42 PM UTC 24 |
Aug 28 10:26:50 PM UTC 24 |
7327145164 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_target_timeout.3805609725 |
|
|
Aug 28 10:26:45 PM UTC 24 |
Aug 28 10:26:54 PM UTC 24 |
1193022868 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_reset_acq.1032021481 |
|
|
Aug 28 10:26:51 PM UTC 24 |
Aug 28 10:26:54 PM UTC 24 |
670625981 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_full.3273101649 |
|
|
Aug 28 10:23:31 PM UTC 24 |
Aug 28 10:26:56 PM UTC 24 |
31966986617 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_reset_tx.567160979 |
|
|
Aug 28 10:26:53 PM UTC 24 |
Aug 28 10:26:56 PM UTC 24 |
264612483 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_host_fifo_fmt_empty.2169151382 |
|
|
Aug 28 10:26:34 PM UTC 24 |
Aug 28 10:26:57 PM UTC 24 |
967810751 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/9.i2c_target_stress_all.2182900478 |
|
|
Aug 28 10:24:53 PM UTC 24 |
Aug 28 10:26:58 PM UTC 24 |
30086922196 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_host_perf.867877757 |
|
|
Aug 28 10:26:35 PM UTC 24 |
Aug 28 10:26:58 PM UTC 24 |
5574024177 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_host_smoke.10119699 |
|
|
Aug 28 10:25:33 PM UTC 24 |
Aug 28 10:26:59 PM UTC 24 |
2114402225 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_target_hrst.2586061714 |
|
|
Aug 28 10:26:56 PM UTC 24 |
Aug 28 10:27:00 PM UTC 24 |
311434896 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_host_stretch_timeout.3034703873 |
|
|
Aug 28 10:26:37 PM UTC 24 |
Aug 28 10:27:00 PM UTC 24 |
1075824483 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_target_stress_wr.781514131 |
|
|
Aug 28 10:26:39 PM UTC 24 |
Aug 28 10:27:00 PM UTC 24 |
8268657239 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_overflow.2855734098 |
|
|
Aug 28 10:25:08 PM UTC 24 |
Aug 28 10:27:03 PM UTC 24 |
3283771390 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_watermarks_tx.745473155 |
|
|
Aug 28 10:27:01 PM UTC 24 |
Aug 28 10:27:04 PM UTC 24 |
291422030 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_target_smoke.1574922960 |
|
|
Aug 28 10:26:37 PM UTC 24 |
Aug 28 10:27:04 PM UTC 24 |
674795291 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_target_bad_addr.1274433093 |
|
|
Aug 28 10:26:56 PM UTC 24 |
Aug 28 10:27:04 PM UTC 24 |
2484987418 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_target_perf.2180109074 |
|
|
Aug 28 10:26:54 PM UTC 24 |
Aug 28 10:27:04 PM UTC 24 |
14237629589 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_target_smbus_maxlen.4251438942 |
|
|
Aug 28 10:27:01 PM UTC 24 |
Aug 28 10:27:05 PM UTC 24 |
1830243827 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_target_stress_rd.2148405639 |
|
|
Aug 28 10:26:40 PM UTC 24 |
Aug 28 10:27:05 PM UTC 24 |
4441461170 ps |
| T274 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_host_may_nack.153781652 |
|
|
Aug 28 10:27:00 PM UTC 24 |
Aug 28 10:27:06 PM UTC 24 |
1060764448 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_target_fifo_watermarks_acq.4260945057 |
|
|
Aug 28 10:27:00 PM UTC 24 |
Aug 28 10:27:06 PM UTC 24 |
473168763 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_host_smoke.3040212544 |
|
|
Aug 28 10:26:31 PM UTC 24 |
Aug 28 10:27:06 PM UTC 24 |
1839418336 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_alert_test.3509631744 |
|
|
Aug 28 10:27:04 PM UTC 24 |
Aug 28 10:27:06 PM UTC 24 |
18829109 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_target_nack_acqfull_addr.3690630318 |
|
|
Aug 28 10:27:02 PM UTC 24 |
Aug 28 10:27:06 PM UTC 24 |
1572291380 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_host_override.1832153143 |
|
|
Aug 28 10:27:04 PM UTC 24 |
Aug 28 10:27:06 PM UTC 24 |
86128332 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_target_nack_txstretch.3450588760 |
|
|
Aug 28 10:27:03 PM UTC 24 |
Aug 28 10:27:07 PM UTC 24 |
493521812 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_target_tx_stretch_ctrl.940375957 |
|
|
Aug 28 10:27:01 PM UTC 24 |
Aug 28 10:27:07 PM UTC 24 |
202444748 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_target_nack_acqfull.2888183021 |
|
|
Aug 28 10:27:01 PM UTC 24 |
Aug 28 10:27:07 PM UTC 24 |
2220118043 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_host_fifo_full.949681855 |
|
|
Aug 28 10:25:10 PM UTC 24 |
Aug 28 10:27:08 PM UTC 24 |
8846469785 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_reset_fmt.565419505 |
|
|
Aug 28 10:27:06 PM UTC 24 |
Aug 28 10:27:09 PM UTC 24 |
149036873 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_host_perf_precise.1042131160 |
|
|
Aug 28 10:27:08 PM UTC 24 |
Aug 28 10:27:11 PM UTC 24 |
99501465 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_watermark.1545427025 |
|
|
Aug 28 10:25:34 PM UTC 24 |
Aug 28 10:27:11 PM UTC 24 |
15238536151 ps |
| T39 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_host_error_intr.1277367109 |
|
|
Aug 28 10:27:08 PM UTC 24 |
Aug 28 10:27:12 PM UTC 24 |
504871082 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_host_stretch_timeout.1970417760 |
|
|
Aug 28 10:27:08 PM UTC 24 |
Aug 28 10:27:16 PM UTC 24 |
1073010228 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_target_stretch.3193397457 |
|
|
Aug 28 10:27:11 PM UTC 24 |
Aug 28 10:27:17 PM UTC 24 |
2663608485 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_host_fifo_full.2259125735 |
|
|
Aug 28 10:25:36 PM UTC 24 |
Aug 28 10:27:17 PM UTC 24 |
3309324914 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_reset_rx.1112805716 |
|
|
Aug 28 10:27:07 PM UTC 24 |
Aug 28 10:27:18 PM UTC 24 |
125711209 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_reset_acq.2179346019 |
|
|
Aug 28 10:27:18 PM UTC 24 |
Aug 28 10:27:20 PM UTC 24 |
242639937 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_host_perf.2015292996 |
|
|
Aug 28 10:25:10 PM UTC 24 |
Aug 28 10:27:48 PM UTC 24 |
12525098817 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_target_intr_stress_wr.2221149213 |
|
|
Aug 28 10:27:13 PM UTC 24 |
Aug 28 10:27:20 PM UTC 24 |
2660279155 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_reset_tx.1732268766 |
|
|
Aug 28 10:27:19 PM UTC 24 |
Aug 28 10:27:22 PM UTC 24 |
360365597 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_target_intr_smoke.1124814689 |
|
|
Aug 28 10:27:12 PM UTC 24 |
Aug 28 10:27:23 PM UTC 24 |
1092839274 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/7.i2c_host_fifo_watermark.3329149220 |
|
|
Aug 28 10:23:28 PM UTC 24 |
Aug 28 10:27:23 PM UTC 24 |
20624031683 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_target_stress_wr.1467132702 |
|
|
Aug 28 10:27:09 PM UTC 24 |
Aug 28 10:27:24 PM UTC 24 |
9083280295 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/6.i2c_host_fifo_watermark.3794132743 |
|
|
Aug 28 10:23:06 PM UTC 24 |
Aug 28 10:27:26 PM UTC 24 |
23774527769 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_host_fifo_fmt_empty.2273940285 |
|
|
Aug 28 10:27:07 PM UTC 24 |
Aug 28 10:27:28 PM UTC 24 |
391596890 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_target_timeout.3478545342 |
|
|
Aug 28 10:27:18 PM UTC 24 |
Aug 28 10:27:28 PM UTC 24 |
2916213388 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_watermarks_tx.357044323 |
|
|
Aug 28 10:27:26 PM UTC 24 |
Aug 28 10:27:29 PM UTC 24 |
516918971 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_target_bad_addr.1371483057 |
|
|
Aug 28 10:27:22 PM UTC 24 |
Aug 28 10:27:30 PM UTC 24 |
4192160058 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_target_fifo_watermarks_acq.4257877132 |
|
|
Aug 28 10:27:25 PM UTC 24 |
Aug 28 10:27:30 PM UTC 24 |
1798976958 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_target_perf.515691043 |
|
|
Aug 28 10:27:21 PM UTC 24 |
Aug 28 10:27:31 PM UTC 24 |
10017863123 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_target_tx_stretch_ctrl.1953380745 |
|
|
Aug 28 10:27:27 PM UTC 24 |
Aug 28 10:27:31 PM UTC 24 |
74272438 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_host_perf.2767281571 |
|
|
Aug 28 10:27:07 PM UTC 24 |
Aug 28 10:27:32 PM UTC 24 |
2235388070 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_target_smoke.2825358739 |
|
|
Aug 28 10:27:08 PM UTC 24 |
Aug 28 10:27:33 PM UTC 24 |
4058650557 ps |
| T264 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_host_may_nack.431135167 |
|
|
Aug 28 10:27:24 PM UTC 24 |
Aug 28 10:27:33 PM UTC 24 |
1654623578 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_target_nack_txstretch.3236624772 |
|
|
Aug 28 10:27:31 PM UTC 24 |
Aug 28 10:27:34 PM UTC 24 |
138033845 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_target_smbus_maxlen.1395291388 |
|
|
Aug 28 10:27:29 PM UTC 24 |
Aug 28 10:27:34 PM UTC 24 |
376345623 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_target_nack_acqfull.282182029 |
|
|
Aug 28 10:27:29 PM UTC 24 |
Aug 28 10:27:35 PM UTC 24 |
2189902669 ps |
| T54 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_target_nack_acqfull_addr.1861113125 |
|
|
Aug 28 10:27:31 PM UTC 24 |
Aug 28 10:27:36 PM UTC 24 |
876111326 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_target_stress_all.2693642389 |
|
|
Aug 28 10:26:55 PM UTC 24 |
Aug 28 10:27:37 PM UTC 24 |
20481621964 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/7.i2c_target_stress_wr.3914335700 |
|
|
Aug 28 10:23:35 PM UTC 24 |
Aug 28 10:27:53 PM UTC 24 |
67897863769 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_alert_test.1988938300 |
|
|
Aug 28 10:27:39 PM UTC 24 |
Aug 28 10:27:41 PM UTC 24 |
78035449 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/15.i2c_host_override.1699817464 |
|
|
Aug 28 10:27:39 PM UTC 24 |
Aug 28 10:27:41 PM UTC 24 |
46917203 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_watermark.3209959685 |
|
|
Aug 28 10:26:09 PM UTC 24 |
Aug 28 10:27:43 PM UTC 24 |
13115577583 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/15.i2c_host_perf_precise.751427819 |
|
|
Aug 28 10:27:41 PM UTC 24 |
Aug 28 10:27:43 PM UTC 24 |
121462338 ps |
| T258 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_reset_fmt.2319446344 |
|
|
Aug 28 10:27:40 PM UTC 24 |
Aug 28 10:27:43 PM UTC 24 |
263363904 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_target_intr_stress_wr.661887925 |
|
|
Aug 28 10:25:48 PM UTC 24 |
Aug 28 10:27:43 PM UTC 24 |
19501862965 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_target_stress_rd.1347277170 |
|
|
Aug 28 10:27:10 PM UTC 24 |
Aug 28 10:27:45 PM UTC 24 |
3844761223 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/15.i2c_host_error_intr.3348776640 |
|
|
Aug 28 10:27:42 PM UTC 24 |
Aug 28 10:27:46 PM UTC 24 |
802675051 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/13.i2c_target_stretch.4236001621 |
|
|
Aug 28 10:26:41 PM UTC 24 |
Aug 28 10:27:47 PM UTC 24 |
2828316114 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/15.i2c_target_intr_stress_wr.2271288885 |
|
|
Aug 28 10:27:45 PM UTC 24 |
Aug 28 10:27:50 PM UTC 24 |
447785708 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_host_smoke.675645454 |
|
|
Aug 28 10:27:04 PM UTC 24 |
Aug 28 10:27:51 PM UTC 24 |
928551493 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_acq.1426394741 |
|
|
Aug 28 10:27:49 PM UTC 24 |
Aug 28 10:27:52 PM UTC 24 |
211015753 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/15.i2c_target_fifo_reset_tx.3235956177 |
|
|
Aug 28 10:27:51 PM UTC 24 |
Aug 28 10:27:53 PM UTC 24 |
181276787 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/15.i2c_target_intr_smoke.1565022563 |
|
|
Aug 28 10:27:44 PM UTC 24 |
Aug 28 10:27:55 PM UTC 24 |
3954270389 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/15.i2c_target_timeout.3125479026 |
|
|
Aug 28 10:27:46 PM UTC 24 |
Aug 28 10:27:56 PM UTC 24 |
1168166155 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_fmt_empty.3368914688 |
|
|
Aug 28 10:27:41 PM UTC 24 |
Aug 28 10:27:57 PM UTC 24 |
1004893401 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/15.i2c_host_mode_toggle.2102944013 |
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|
Aug 28 10:27:54 PM UTC 24 |
Aug 28 10:27:57 PM UTC 24 |
293154787 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_target_stress_wr.63999966 |
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|
Aug 28 10:25:12 PM UTC 24 |
Aug 28 10:27:58 PM UTC 24 |
27542796363 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/15.i2c_target_smoke.2264266911 |
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|
Aug 28 10:27:42 PM UTC 24 |
Aug 28 10:27:59 PM UTC 24 |
2782635306 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/15.i2c_host_fifo_reset_rx.1494937866 |
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|
Aug 28 10:27:41 PM UTC 24 |
Aug 28 10:27:59 PM UTC 24 |
912766932 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/15.i2c_target_perf.1255170856 |
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|
Aug 28 10:27:52 PM UTC 24 |
Aug 28 10:28:00 PM UTC 24 |
748616491 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/15.i2c_host_stretch_timeout.1801803834 |
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|
Aug 28 10:27:41 PM UTC 24 |
Aug 28 10:28:01 PM UTC 24 |
936059970 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_target_stress_all.3049366639 |
|
|
Aug 28 10:27:21 PM UTC 24 |
Aug 28 10:28:01 PM UTC 24 |
79342940323 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/12.i2c_host_fifo_full.2919389619 |
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|
Aug 28 10:26:12 PM UTC 24 |
Aug 28 10:28:02 PM UTC 24 |
2294610241 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/15.i2c_target_bad_addr.1407886286 |
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Aug 28 10:27:53 PM UTC 24 |
Aug 28 10:28:02 PM UTC 24 |
3610728092 ps |