T850 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_target_smoke.50549527 |
|
|
Aug 28 10:32:08 PM UTC 24 |
Aug 28 10:32:23 PM UTC 24 |
869636390 ps |
T851 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_host_perf.3549379447 |
|
|
Aug 28 10:32:05 PM UTC 24 |
Aug 28 10:32:24 PM UTC 24 |
1329984853 ps |
T852 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_target_stress_wr.4130703178 |
|
|
Aug 28 10:33:35 PM UTC 24 |
Aug 28 10:34:37 PM UTC 24 |
39363745072 ps |
T853 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/2.i2c_host_stress_all.1924414472 |
|
|
Aug 28 10:21:51 PM UTC 24 |
Aug 28 10:32:25 PM UTC 24 |
10060069731 ps |
T854 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_reset_acq.3949299420 |
|
|
Aug 28 10:32:24 PM UTC 24 |
Aug 28 10:32:26 PM UTC 24 |
188723361 ps |
T855 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_target_intr_smoke.1008539500 |
|
|
Aug 28 10:32:17 PM UTC 24 |
Aug 28 10:32:27 PM UTC 24 |
4490992078 ps |
T856 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_target_stretch.58998222 |
|
|
Aug 28 10:32:12 PM UTC 24 |
Aug 28 10:32:28 PM UTC 24 |
3300726217 ps |
T857 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_reset_tx.2400730716 |
|
|
Aug 28 10:32:26 PM UTC 24 |
Aug 28 10:32:30 PM UTC 24 |
280886037 ps |
T858 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_host_stretch_timeout.898976719 |
|
|
Aug 28 10:32:05 PM UTC 24 |
Aug 28 10:32:31 PM UTC 24 |
2290320455 ps |
T859 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_target_perf.4203808170 |
|
|
Aug 28 10:32:26 PM UTC 24 |
Aug 28 10:32:33 PM UTC 24 |
2425240279 ps |
T860 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_target_stress_rd.485858432 |
|
|
Aug 28 10:32:12 PM UTC 24 |
Aug 28 10:32:33 PM UTC 24 |
1771599707 ps |
T861 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_host_error_intr.467623422 |
|
|
Aug 28 10:34:31 PM UTC 24 |
Aug 28 10:34:35 PM UTC 24 |
234319705 ps |
T862 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_target_timeout.1419982936 |
|
|
Aug 28 10:32:20 PM UTC 24 |
Aug 28 10:32:34 PM UTC 24 |
5848119905 ps |
T863 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_tx.1198208326 |
|
|
Aug 28 10:32:33 PM UTC 24 |
Aug 28 10:32:36 PM UTC 24 |
172090431 ps |
T864 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_target_fifo_watermarks_acq.3198327247 |
|
|
Aug 28 10:32:32 PM UTC 24 |
Aug 28 10:32:36 PM UTC 24 |
332886455 ps |
T865 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_target_tx_stretch_ctrl.1659372947 |
|
|
Aug 28 10:32:33 PM UTC 24 |
Aug 28 10:32:38 PM UTC 24 |
107159778 ps |
T866 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_target_bad_addr.1167415303 |
|
|
Aug 28 10:32:27 PM UTC 24 |
Aug 28 10:32:38 PM UTC 24 |
4851743168 ps |
T867 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_target_smbus_maxlen.2059740793 |
|
|
Aug 28 10:32:34 PM UTC 24 |
Aug 28 10:32:39 PM UTC 24 |
503350033 ps |
T868 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull.1220530828 |
|
|
Aug 28 10:32:34 PM UTC 24 |
Aug 28 10:32:40 PM UTC 24 |
1223779531 ps |
T869 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_target_nack_txstretch.1882953724 |
|
|
Aug 28 10:32:38 PM UTC 24 |
Aug 28 10:32:41 PM UTC 24 |
130746321 ps |
T870 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_alert_test.2609759292 |
|
|
Aug 28 10:32:39 PM UTC 24 |
Aug 28 10:32:41 PM UTC 24 |
30314937 ps |
T871 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_host_override.172077355 |
|
|
Aug 28 10:32:40 PM UTC 24 |
Aug 28 10:32:42 PM UTC 24 |
27236336 ps |
T872 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_target_nack_acqfull_addr.3237843199 |
|
|
Aug 28 10:32:38 PM UTC 24 |
Aug 28 10:32:44 PM UTC 24 |
621462719 ps |
T873 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_overflow.2610938056 |
|
|
Aug 28 10:31:17 PM UTC 24 |
Aug 28 10:32:44 PM UTC 24 |
2389974950 ps |
T874 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_reset_fmt.69428762 |
|
|
Aug 28 10:32:42 PM UTC 24 |
Aug 28 10:32:44 PM UTC 24 |
230615619 ps |
T875 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_reset_rx.808046753 |
|
|
Aug 28 10:32:44 PM UTC 24 |
Aug 28 10:32:50 PM UTC 24 |
115530250 ps |
T263 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_host_may_nack.333552983 |
|
|
Aug 28 10:32:30 PM UTC 24 |
Aug 28 10:32:50 PM UTC 24 |
1485249335 ps |
T876 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_fmt_empty.314805331 |
|
|
Aug 28 10:32:43 PM UTC 24 |
Aug 28 10:32:54 PM UTC 24 |
160704841 ps |
T877 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_host_perf_precise.1429819656 |
|
|
Aug 28 10:32:50 PM UTC 24 |
Aug 28 10:32:55 PM UTC 24 |
167637469 ps |
T878 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/2.i2c_host_perf.4091395998 |
|
|
Aug 28 10:21:51 PM UTC 24 |
Aug 28 10:32:57 PM UTC 24 |
48371267306 ps |
T879 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/16.i2c_host_stress_all.2202552822 |
|
|
Aug 28 10:28:08 PM UTC 24 |
Aug 28 10:32:58 PM UTC 24 |
44160963255 ps |
T880 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/14.i2c_host_stress_all.1226727234 |
|
|
Aug 28 10:27:08 PM UTC 24 |
Aug 28 10:32:58 PM UTC 24 |
62992549889 ps |
T881 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/16.i2c_target_stress_wr.2809501396 |
|
|
Aug 28 10:28:08 PM UTC 24 |
Aug 28 10:32:59 PM UTC 24 |
33693715145 ps |
T882 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_host_error_intr.119518070 |
|
|
Aug 28 10:32:56 PM UTC 24 |
Aug 28 10:33:01 PM UTC 24 |
144927170 ps |
T883 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/21.i2c_host_fifo_full.3908352224 |
|
|
Aug 28 10:30:40 PM UTC 24 |
Aug 28 10:33:03 PM UTC 24 |
2698640821 ps |
T884 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_host_smoke.775686043 |
|
|
Aug 28 10:32:02 PM UTC 24 |
Aug 28 10:33:05 PM UTC 24 |
5276582151 ps |
T885 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_host_smoke.2713495117 |
|
|
Aug 28 10:32:40 PM UTC 24 |
Aug 28 10:33:10 PM UTC 24 |
1778151099 ps |
T886 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_acq.3084331473 |
|
|
Aug 28 10:33:10 PM UTC 24 |
Aug 28 10:33:13 PM UTC 24 |
319127789 ps |
T887 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_reset_tx.2778039448 |
|
|
Aug 28 10:33:11 PM UTC 24 |
Aug 28 10:33:14 PM UTC 24 |
183549591 ps |
T888 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_target_intr_smoke.3440053347 |
|
|
Aug 28 10:33:02 PM UTC 24 |
Aug 28 10:33:15 PM UTC 24 |
4328356350 ps |
T889 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_target_smoke.2266455832 |
|
|
Aug 28 10:32:58 PM UTC 24 |
Aug 28 10:33:15 PM UTC 24 |
6917601407 ps |
T890 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_full.1997401979 |
|
|
Aug 28 10:31:18 PM UTC 24 |
Aug 28 10:33:16 PM UTC 24 |
23947425482 ps |
T891 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_overflow.181789232 |
|
|
Aug 28 10:32:03 PM UTC 24 |
Aug 28 10:33:17 PM UTC 24 |
9651914635 ps |
T892 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_target_timeout.838570204 |
|
|
Aug 28 10:33:05 PM UTC 24 |
Aug 28 10:33:18 PM UTC 24 |
2717231804 ps |
T893 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_host_stretch_timeout.2029506081 |
|
|
Aug 28 10:32:51 PM UTC 24 |
Aug 28 10:33:21 PM UTC 24 |
986584871 ps |
T894 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/20.i2c_target_stress_all.1521098405 |
|
|
Aug 28 10:30:25 PM UTC 24 |
Aug 28 10:33:22 PM UTC 24 |
58666652127 ps |
T895 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_target_perf.2514191842 |
|
|
Aug 28 10:33:14 PM UTC 24 |
Aug 28 10:33:23 PM UTC 24 |
2930158768 ps |
T896 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_target_stress_rd.3624200900 |
|
|
Aug 28 10:32:59 PM UTC 24 |
Aug 28 10:33:23 PM UTC 24 |
620061522 ps |
T897 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_host_perf.3559644988 |
|
|
Aug 28 10:32:45 PM UTC 24 |
Aug 28 10:33:25 PM UTC 24 |
7676372524 ps |
T898 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_tx.3424511900 |
|
|
Aug 28 10:33:24 PM UTC 24 |
Aug 28 10:33:27 PM UTC 24 |
130843297 ps |
T899 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_target_tx_stretch_ctrl.3437898296 |
|
|
Aug 28 10:33:24 PM UTC 24 |
Aug 28 10:33:28 PM UTC 24 |
78027742 ps |
T900 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_alert_test.4280550416 |
|
|
Aug 28 10:33:26 PM UTC 24 |
Aug 28 10:33:28 PM UTC 24 |
42433295 ps |
T901 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_target_nack_txstretch.600900427 |
|
|
Aug 28 10:33:25 PM UTC 24 |
Aug 28 10:33:28 PM UTC 24 |
169681562 ps |
T902 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_target_fifo_watermarks_acq.137933530 |
|
|
Aug 28 10:33:24 PM UTC 24 |
Aug 28 10:33:28 PM UTC 24 |
1119835928 ps |
T903 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_target_smbus_maxlen.3042388953 |
|
|
Aug 28 10:33:24 PM UTC 24 |
Aug 28 10:33:29 PM UTC 24 |
424709742 ps |
T904 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull_addr.389309181 |
|
|
Aug 28 10:34:22 PM UTC 24 |
Aug 28 10:34:28 PM UTC 24 |
2169455682 ps |
T905 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull_addr.468985551 |
|
|
Aug 28 10:33:24 PM UTC 24 |
Aug 28 10:33:30 PM UTC 24 |
2180445303 ps |
T906 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_target_nack_acqfull.843223359 |
|
|
Aug 28 10:33:24 PM UTC 24 |
Aug 28 10:33:30 PM UTC 24 |
970365839 ps |
T157 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_host_override.3347884886 |
|
|
Aug 28 10:33:29 PM UTC 24 |
Aug 28 10:33:30 PM UTC 24 |
116722844 ps |
T45 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/21.i2c_host_perf.2944757621 |
|
|
Aug 28 10:30:40 PM UTC 24 |
Aug 28 10:33:32 PM UTC 24 |
2538528227 ps |
T907 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_fmt.3976706404 |
|
|
Aug 28 10:33:30 PM UTC 24 |
Aug 28 10:33:32 PM UTC 24 |
103249358 ps |
T908 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_host_may_nack.694003544 |
|
|
Aug 28 10:33:24 PM UTC 24 |
Aug 28 10:33:33 PM UTC 24 |
899410555 ps |
T909 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_target_bad_addr.3052064641 |
|
|
Aug 28 10:33:24 PM UTC 24 |
Aug 28 10:33:34 PM UTC 24 |
1942419487 ps |
T910 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_target_stretch.768372221 |
|
|
Aug 28 10:33:00 PM UTC 24 |
Aug 28 10:33:36 PM UTC 24 |
2876952151 ps |
T911 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_target_intr_stress_wr.2930207858 |
|
|
Aug 28 10:33:04 PM UTC 24 |
Aug 28 10:33:37 PM UTC 24 |
12181594685 ps |
T912 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_host_error_intr.2387028154 |
|
|
Aug 28 10:33:33 PM UTC 24 |
Aug 28 10:33:37 PM UTC 24 |
87860829 ps |
T913 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/20.i2c_target_intr_stress_wr.70131355 |
|
|
Aug 28 10:30:13 PM UTC 24 |
Aug 28 10:33:38 PM UTC 24 |
18184627621 ps |
T914 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/19.i2c_host_fifo_watermark.1406624052 |
|
|
Aug 28 10:29:26 PM UTC 24 |
Aug 28 10:33:38 PM UTC 24 |
8815162191 ps |
T915 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_reset_rx.3507747780 |
|
|
Aug 28 10:33:31 PM UTC 24 |
Aug 28 10:33:40 PM UTC 24 |
1524595822 ps |
T916 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_fmt_empty.2635488164 |
|
|
Aug 28 10:33:30 PM UTC 24 |
Aug 28 10:33:41 PM UTC 24 |
1089833880 ps |
T917 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/22.i2c_host_perf.2357828517 |
|
|
Aug 28 10:31:18 PM UTC 24 |
Aug 28 10:33:43 PM UTC 24 |
12857469120 ps |
T918 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_target_stretch.3865042326 |
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|
Aug 28 10:33:38 PM UTC 24 |
Aug 28 10:33:44 PM UTC 24 |
1103668884 ps |
T919 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_acq.1981870977 |
|
|
Aug 28 10:33:42 PM UTC 24 |
Aug 28 10:33:45 PM UTC 24 |
166008857 ps |
T920 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_watermark.2782714618 |
|
|
Aug 28 10:32:03 PM UTC 24 |
Aug 28 10:33:45 PM UTC 24 |
3407326715 ps |
T921 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_reset_tx.415143147 |
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|
Aug 28 10:33:44 PM UTC 24 |
Aug 28 10:33:48 PM UTC 24 |
238732940 ps |
T922 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/22.i2c_target_stress_all.4041062505 |
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|
Aug 28 10:31:43 PM UTC 24 |
Aug 28 10:33:49 PM UTC 24 |
14696377043 ps |
T923 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_target_smoke.3552457874 |
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|
Aug 28 10:33:33 PM UTC 24 |
Aug 28 10:33:50 PM UTC 24 |
1405139133 ps |
T924 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_target_timeout.2488983735 |
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|
Aug 28 10:33:39 PM UTC 24 |
Aug 28 10:33:50 PM UTC 24 |
2420885733 ps |
T925 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_target_stress_all.2723264959 |
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|
Aug 28 10:32:26 PM UTC 24 |
Aug 28 10:33:52 PM UTC 24 |
75284281336 ps |
T926 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_target_intr_smoke.4122600234 |
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|
Aug 28 10:33:38 PM UTC 24 |
Aug 28 10:33:52 PM UTC 24 |
6121391173 ps |
T927 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/11.i2c_host_perf.2583861067 |
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|
Aug 28 10:25:37 PM UTC 24 |
Aug 28 10:33:52 PM UTC 24 |
27904517762 ps |
T928 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_host_mode_toggle.4138470207 |
|
|
Aug 28 10:33:48 PM UTC 24 |
Aug 28 10:33:53 PM UTC 24 |
101242120 ps |
T929 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_host_stretch_timeout.864409095 |
|
|
Aug 28 10:33:31 PM UTC 24 |
Aug 28 10:33:53 PM UTC 24 |
3663811061 ps |
T930 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_tx.3530817845 |
|
|
Aug 28 10:33:51 PM UTC 24 |
Aug 28 10:33:54 PM UTC 24 |
292475786 ps |
T931 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_target_perf.992653561 |
|
|
Aug 28 10:33:44 PM UTC 24 |
Aug 28 10:33:54 PM UTC 24 |
1923761900 ps |
T932 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_target_fifo_watermarks_acq.73951145 |
|
|
Aug 28 10:33:51 PM UTC 24 |
Aug 28 10:33:55 PM UTC 24 |
290014464 ps |
T933 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_target_intr_stress_wr.3916133703 |
|
|
Aug 28 10:33:39 PM UTC 24 |
Aug 28 10:33:55 PM UTC 24 |
9630628596 ps |
T934 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_target_bad_addr.1889665878 |
|
|
Aug 28 10:33:45 PM UTC 24 |
Aug 28 10:33:56 PM UTC 24 |
4378331012 ps |
T935 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_target_tx_stretch_ctrl.1689685885 |
|
|
Aug 28 10:33:51 PM UTC 24 |
Aug 28 10:33:56 PM UTC 24 |
145307647 ps |
T936 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_alert_test.327893590 |
|
|
Aug 28 10:33:54 PM UTC 24 |
Aug 28 10:33:56 PM UTC 24 |
35589051 ps |
T937 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_host_override.3682958142 |
|
|
Aug 28 10:33:55 PM UTC 24 |
Aug 28 10:33:57 PM UTC 24 |
50421843 ps |
T938 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull_addr.1763904668 |
|
|
Aug 28 10:33:53 PM UTC 24 |
Aug 28 10:33:57 PM UTC 24 |
2193727278 ps |
T939 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_target_nack_txstretch.2299476603 |
|
|
Aug 28 10:33:54 PM UTC 24 |
Aug 28 10:33:58 PM UTC 24 |
1267265853 ps |
T940 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_host_may_nack.1290115962 |
|
|
Aug 28 10:34:17 PM UTC 24 |
Aug 28 10:34:29 PM UTC 24 |
526412844 ps |
T941 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_host_may_nack.876398898 |
|
|
Aug 28 10:33:50 PM UTC 24 |
Aug 28 10:33:58 PM UTC 24 |
348745135 ps |
T942 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_target_smbus_maxlen.1410706407 |
|
|
Aug 28 10:33:53 PM UTC 24 |
Aug 28 10:33:58 PM UTC 24 |
1853111772 ps |
T943 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_target_nack_acqfull.3091288827 |
|
|
Aug 28 10:33:53 PM UTC 24 |
Aug 28 10:33:59 PM UTC 24 |
503992844 ps |
T944 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_fmt.3619932027 |
|
|
Aug 28 10:33:56 PM UTC 24 |
Aug 28 10:33:59 PM UTC 24 |
155641320 ps |
T945 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/18.i2c_host_fifo_watermark.1634090119 |
|
|
Aug 28 10:28:53 PM UTC 24 |
Aug 28 10:34:01 PM UTC 24 |
20727125625 ps |
T946 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_target_stress_rd.3869589086 |
|
|
Aug 28 10:33:37 PM UTC 24 |
Aug 28 10:34:02 PM UTC 24 |
1215819119 ps |
T947 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_host_perf_precise.1100172595 |
|
|
Aug 28 10:32:05 PM UTC 24 |
Aug 28 10:34:02 PM UTC 24 |
24778107621 ps |
T948 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_host_perf_precise.49195303 |
|
|
Aug 28 10:33:59 PM UTC 24 |
Aug 28 10:34:03 PM UTC 24 |
115587236 ps |
T24 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_host_error_intr.4207584585 |
|
|
Aug 28 10:33:59 PM UTC 24 |
Aug 28 10:34:03 PM UTC 24 |
173596539 ps |
T949 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_host_perf_precise.2625214718 |
|
|
Aug 28 10:33:31 PM UTC 24 |
Aug 28 10:34:07 PM UTC 24 |
2663576427 ps |
T950 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_host_smoke.383272193 |
|
|
Aug 28 10:33:28 PM UTC 24 |
Aug 28 10:34:09 PM UTC 24 |
4000234946 ps |
T951 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_reset_rx.2311812653 |
|
|
Aug 28 10:33:56 PM UTC 24 |
Aug 28 10:34:10 PM UTC 24 |
757014468 ps |
T952 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_acq.1368430237 |
|
|
Aug 28 10:34:11 PM UTC 24 |
Aug 28 10:34:14 PM UTC 24 |
483614513 ps |
T953 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_reset_tx.323502278 |
|
|
Aug 28 10:34:13 PM UTC 24 |
Aug 28 10:34:15 PM UTC 24 |
206615572 ps |
T90 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_target_smoke.4267940175 |
|
|
Aug 28 10:34:00 PM UTC 24 |
Aug 28 10:34:16 PM UTC 24 |
4425129604 ps |
T954 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_fmt_empty.2387082974 |
|
|
Aug 28 10:33:56 PM UTC 24 |
Aug 28 10:34:16 PM UTC 24 |
3457792637 ps |
T955 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_target_timeout.1449293828 |
|
|
Aug 28 10:34:04 PM UTC 24 |
Aug 28 10:34:17 PM UTC 24 |
1371960823 ps |
T956 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_fmt.931961528 |
|
|
Aug 28 10:34:26 PM UTC 24 |
Aug 28 10:34:29 PM UTC 24 |
992639564 ps |
T957 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/17.i2c_host_perf.2067224418 |
|
|
Aug 28 10:28:28 PM UTC 24 |
Aug 28 10:34:18 PM UTC 24 |
12865057553 ps |
T958 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_target_intr_smoke.174830041 |
|
|
Aug 28 10:34:03 PM UTC 24 |
Aug 28 10:34:18 PM UTC 24 |
12447172745 ps |
T959 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/22.i2c_target_intr_stress_wr.2993768029 |
|
|
Aug 28 10:31:42 PM UTC 24 |
Aug 28 10:34:19 PM UTC 24 |
10472875413 ps |
T960 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_target_stretch.3711511686 |
|
|
Aug 28 10:34:02 PM UTC 24 |
Aug 28 10:34:31 PM UTC 24 |
1533269198 ps |
T961 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_target_perf.1220691355 |
|
|
Aug 28 10:34:13 PM UTC 24 |
Aug 28 10:34:21 PM UTC 24 |
524369757 ps |
T962 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_host_stretch_timeout.3520045420 |
|
|
Aug 28 10:33:59 PM UTC 24 |
Aug 28 10:34:21 PM UTC 24 |
931768406 ps |
T963 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_tx.738280774 |
|
|
Aug 28 10:34:19 PM UTC 24 |
Aug 28 10:34:22 PM UTC 24 |
46850437 ps |
T964 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_alert_test.695932804 |
|
|
Aug 28 10:34:22 PM UTC 24 |
Aug 28 10:34:24 PM UTC 24 |
28419353 ps |
T965 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_target_smbus_maxlen.4043557686 |
|
|
Aug 28 10:34:19 PM UTC 24 |
Aug 28 10:34:25 PM UTC 24 |
484005716 ps |
T966 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_target_tx_stretch_ctrl.1008607667 |
|
|
Aug 28 10:34:19 PM UTC 24 |
Aug 28 10:34:25 PM UTC 24 |
144981040 ps |
T967 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_target_fifo_watermarks_acq.3511072474 |
|
|
Aug 28 10:34:19 PM UTC 24 |
Aug 28 10:34:26 PM UTC 24 |
651562363 ps |
T968 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_target_bad_addr.3783144502 |
|
|
Aug 28 10:34:15 PM UTC 24 |
Aug 28 10:34:26 PM UTC 24 |
1982451171 ps |
T969 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_target_nack_acqfull.3342132814 |
|
|
Aug 28 10:34:21 PM UTC 24 |
Aug 28 10:34:27 PM UTC 24 |
564518716 ps |
T970 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_host_override.314946064 |
|
|
Aug 28 10:34:26 PM UTC 24 |
Aug 28 10:34:28 PM UTC 24 |
44933684 ps |
T971 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_fmt_empty.2570334733 |
|
|
Aug 28 10:34:28 PM UTC 24 |
Aug 28 10:34:38 PM UTC 24 |
1384039397 ps |
T972 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_reset_rx.604812046 |
|
|
Aug 28 10:34:28 PM UTC 24 |
Aug 28 10:34:38 PM UTC 24 |
136989984 ps |
T123 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_watermark.2842490425 |
|
|
Aug 28 10:32:41 PM UTC 24 |
Aug 28 10:34:41 PM UTC 24 |
9948102923 ps |
T973 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_host_smoke.1438703176 |
|
|
Aug 28 10:33:54 PM UTC 24 |
Aug 28 10:34:42 PM UTC 24 |
2273718657 ps |
T974 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_host_perf.3081860002 |
|
|
Aug 28 10:34:28 PM UTC 24 |
Aug 28 10:34:44 PM UTC 24 |
2916835175 ps |
T975 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_host_stretch_timeout.4143135079 |
|
|
Aug 28 10:34:30 PM UTC 24 |
Aug 28 10:34:46 PM UTC 24 |
675184329 ps |
T976 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_overflow.3995933384 |
|
|
Aug 28 10:33:56 PM UTC 24 |
Aug 28 10:34:47 PM UTC 24 |
5859709906 ps |
T977 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_acq.2134859924 |
|
|
Aug 28 10:34:44 PM UTC 24 |
Aug 28 10:34:48 PM UTC 24 |
395021052 ps |
T978 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_reset_tx.3856568864 |
|
|
Aug 28 10:34:45 PM UTC 24 |
Aug 28 10:34:48 PM UTC 24 |
344161969 ps |
T979 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_host_smoke.3883861327 |
|
|
Aug 28 10:34:24 PM UTC 24 |
Aug 28 10:34:51 PM UTC 24 |
5573722332 ps |
T980 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_target_intr_stress_wr.1347374090 |
|
|
Aug 28 10:34:42 PM UTC 24 |
Aug 28 10:34:51 PM UTC 24 |
5451072029 ps |
T981 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_watermark.534461557 |
|
|
Aug 28 10:33:55 PM UTC 24 |
Aug 28 10:35:57 PM UTC 24 |
16992420454 ps |
T982 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_target_perf.684378782 |
|
|
Aug 28 10:34:47 PM UTC 24 |
Aug 28 10:34:52 PM UTC 24 |
1348790726 ps |
T983 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_target_intr_smoke.661214888 |
|
|
Aug 28 10:34:40 PM UTC 24 |
Aug 28 10:34:53 PM UTC 24 |
2743140083 ps |
T984 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_target_timeout.2234655966 |
|
|
Aug 28 10:34:43 PM UTC 24 |
Aug 28 10:34:57 PM UTC 24 |
1301776092 ps |
T985 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_target_bad_addr.1570793794 |
|
|
Aug 28 10:34:48 PM UTC 24 |
Aug 28 10:34:57 PM UTC 24 |
837862931 ps |
T986 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_target_stretch.2576471213 |
|
|
Aug 28 10:34:40 PM UTC 24 |
Aug 28 10:34:58 PM UTC 24 |
3012955507 ps |
T987 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_target_intr_smoke.1114096432 |
|
|
Aug 28 10:35:47 PM UTC 24 |
Aug 28 10:35:58 PM UTC 24 |
3579457766 ps |
T988 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_target_intr_stress_wr.1562133549 |
|
|
Aug 28 10:32:19 PM UTC 24 |
Aug 28 10:34:59 PM UTC 24 |
24594030573 ps |
T989 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_target_stress_rd.3219284853 |
|
|
Aug 28 10:34:40 PM UTC 24 |
Aug 28 10:35:00 PM UTC 24 |
428092081 ps |
T990 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_tx.432641693 |
|
|
Aug 28 10:34:57 PM UTC 24 |
Aug 28 10:35:00 PM UTC 24 |
242984478 ps |
T991 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_alert_test.2215285215 |
|
|
Aug 28 10:34:59 PM UTC 24 |
Aug 28 10:35:00 PM UTC 24 |
28951243 ps |
T992 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_target_fifo_watermarks_acq.2225215251 |
|
|
Aug 28 10:34:56 PM UTC 24 |
Aug 28 10:35:01 PM UTC 24 |
1126761792 ps |
T993 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_target_tx_stretch_ctrl.1617950732 |
|
|
Aug 28 10:34:57 PM UTC 24 |
Aug 28 10:35:02 PM UTC 24 |
118685755 ps |
T994 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_host_override.3547336810 |
|
|
Aug 28 10:35:00 PM UTC 24 |
Aug 28 10:35:02 PM UTC 24 |
33390662 ps |
T995 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_target_nack_txstretch.2279946185 |
|
|
Aug 28 10:34:58 PM UTC 24 |
Aug 28 10:35:02 PM UTC 24 |
1073880346 ps |
T996 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull_addr.3055979585 |
|
|
Aug 28 10:34:57 PM UTC 24 |
Aug 28 10:35:02 PM UTC 24 |
2807249013 ps |
T997 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_target_smbus_maxlen.1598811793 |
|
|
Aug 28 10:34:57 PM UTC 24 |
Aug 28 10:35:02 PM UTC 24 |
4622663074 ps |
T998 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_target_nack_acqfull.638533596 |
|
|
Aug 28 10:34:57 PM UTC 24 |
Aug 28 10:35:03 PM UTC 24 |
499863822 ps |
T999 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_target_bad_addr.3148360390 |
|
|
Aug 28 10:35:55 PM UTC 24 |
Aug 28 10:36:01 PM UTC 24 |
3551864163 ps |
T1000 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_fmt.3955012287 |
|
|
Aug 28 10:35:01 PM UTC 24 |
Aug 28 10:35:04 PM UTC 24 |
752683305 ps |
T286 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_target_smoke.2294103920 |
|
|
Aug 28 10:34:37 PM UTC 24 |
Aug 28 10:35:05 PM UTC 24 |
800265486 ps |
T1001 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/22.i2c_target_stress_wr.3748754094 |
|
|
Aug 28 10:31:30 PM UTC 24 |
Aug 28 10:35:06 PM UTC 24 |
30733574280 ps |
T1002 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_host_perf_precise.3671510237 |
|
|
Aug 28 10:35:03 PM UTC 24 |
Aug 28 10:35:06 PM UTC 24 |
98758063 ps |
T1003 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_host_perf.2842187401 |
|
|
Aug 28 10:35:03 PM UTC 24 |
Aug 28 10:35:07 PM UTC 24 |
492910015 ps |
T25 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_host_error_intr.4266131012 |
|
|
Aug 28 10:35:03 PM UTC 24 |
Aug 28 10:35:08 PM UTC 24 |
170795854 ps |
T1004 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_host_may_nack.3462234200 |
|
|
Aug 28 10:34:56 PM UTC 24 |
Aug 28 10:35:10 PM UTC 24 |
249048261 ps |
T1005 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_reset_rx.3225470334 |
|
|
Aug 28 10:35:02 PM UTC 24 |
Aug 28 10:35:12 PM UTC 24 |
218293587 ps |
T1006 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_fmt_empty.3280419258 |
|
|
Aug 28 10:35:02 PM UTC 24 |
Aug 28 10:35:12 PM UTC 24 |
334336653 ps |
T1007 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_acq.2295953640 |
|
|
Aug 28 10:35:13 PM UTC 24 |
Aug 28 10:35:16 PM UTC 24 |
604462847 ps |
T1008 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_target_intr_smoke.4168410319 |
|
|
Aug 28 10:35:08 PM UTC 24 |
Aug 28 10:35:18 PM UTC 24 |
1167971690 ps |
T1009 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_reset_tx.736063466 |
|
|
Aug 28 10:35:16 PM UTC 24 |
Aug 28 10:35:19 PM UTC 24 |
376656144 ps |
T1010 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_host_fifo_full.3413489786 |
|
|
Aug 28 10:32:05 PM UTC 24 |
Aug 28 10:35:19 PM UTC 24 |
6793333985 ps |
T1011 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_target_intr_stress_wr.3887753191 |
|
|
Aug 28 10:34:03 PM UTC 24 |
Aug 28 10:35:22 PM UTC 24 |
20115260478 ps |
T1012 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_full.324316894 |
|
|
Aug 28 10:33:31 PM UTC 24 |
Aug 28 10:35:22 PM UTC 24 |
11750721186 ps |
T1013 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_target_timeout.619779536 |
|
|
Aug 28 10:35:11 PM UTC 24 |
Aug 28 10:35:24 PM UTC 24 |
4830444898 ps |
T1014 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_target_stretch.2158494051 |
|
|
Aug 28 10:35:44 PM UTC 24 |
Aug 28 10:35:58 PM UTC 24 |
2928794131 ps |
T1015 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_target_perf.2268293876 |
|
|
Aug 28 10:35:17 PM UTC 24 |
Aug 28 10:35:25 PM UTC 24 |
646000228 ps |
T1016 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_host_mode_toggle.1420256699 |
|
|
Aug 28 10:35:23 PM UTC 24 |
Aug 28 10:35:26 PM UTC 24 |
326178036 ps |
T1017 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_target_bad_addr.1246081224 |
|
|
Aug 28 10:35:19 PM UTC 24 |
Aug 28 10:35:27 PM UTC 24 |
6898116958 ps |
T1018 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_tx.391478771 |
|
|
Aug 28 10:35:26 PM UTC 24 |
Aug 28 10:35:29 PM UTC 24 |
130993623 ps |
T1019 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_target_tx_stretch_ctrl.1731420472 |
|
|
Aug 28 10:35:26 PM UTC 24 |
Aug 28 10:35:29 PM UTC 24 |
110664351 ps |
T1020 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_host_stretch_timeout.2854638131 |
|
|
Aug 28 10:35:03 PM UTC 24 |
Aug 28 10:35:29 PM UTC 24 |
1810135272 ps |
T1021 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_target_fifo_watermarks_acq.4003779681 |
|
|
Aug 28 10:35:25 PM UTC 24 |
Aug 28 10:35:30 PM UTC 24 |
1653867501 ps |
T1022 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_target_smbus_maxlen.3474702336 |
|
|
Aug 28 10:35:27 PM UTC 24 |
Aug 28 10:35:32 PM UTC 24 |
575200388 ps |
T1023 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_target_stress_rd.1737870234 |
|
|
Aug 28 10:34:02 PM UTC 24 |
Aug 28 10:35:32 PM UTC 24 |
3187970224 ps |
T1024 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_alert_test.660791254 |
|
|
Aug 28 10:35:30 PM UTC 24 |
Aug 28 10:35:32 PM UTC 24 |
34942564 ps |
T1025 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull_addr.724131745 |
|
|
Aug 28 10:35:29 PM UTC 24 |
Aug 28 10:35:33 PM UTC 24 |
4053779612 ps |
T1026 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_target_nack_txstretch.3332330413 |
|
|
Aug 28 10:35:30 PM UTC 24 |
Aug 28 10:35:34 PM UTC 24 |
467905000 ps |
T1027 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_target_nack_acqfull.322802129 |
|
|
Aug 28 10:35:28 PM UTC 24 |
Aug 28 10:35:34 PM UTC 24 |
463173677 ps |
T1028 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_host_override.819836161 |
|
|
Aug 28 10:35:32 PM UTC 24 |
Aug 28 10:35:34 PM UTC 24 |
28304994 ps |
T124 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_watermark.3656919610 |
|
|
Aug 28 10:33:30 PM UTC 24 |
Aug 28 10:35:35 PM UTC 24 |
11433997544 ps |
T1029 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_target_stretch.2340699608 |
|
|
Aug 28 10:35:07 PM UTC 24 |
Aug 28 10:35:35 PM UTC 24 |
2548291486 ps |
T1030 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_host_smoke.513256951 |
|
|
Aug 28 10:35:00 PM UTC 24 |
Aug 28 10:35:35 PM UTC 24 |
1753327826 ps |
T1031 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_fmt.2651704322 |
|
|
Aug 28 10:35:35 PM UTC 24 |
Aug 28 10:35:37 PM UTC 24 |
478493485 ps |
T1032 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_reset_rx.3018542711 |
|
|
Aug 28 10:35:35 PM UTC 24 |
Aug 28 10:35:40 PM UTC 24 |
101751384 ps |
T1033 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_target_stress_rd.3136026950 |
|
|
Aug 28 10:35:07 PM UTC 24 |
Aug 28 10:35:40 PM UTC 24 |
5404756386 ps |
T1034 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_target_smoke.2323124504 |
|
|
Aug 28 10:35:05 PM UTC 24 |
Aug 28 10:35:41 PM UTC 24 |
3869090220 ps |
T1035 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_host_may_nack.775668689 |
|
|
Aug 28 10:35:23 PM UTC 24 |
Aug 28 10:35:43 PM UTC 24 |
469006020 ps |
T1036 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_overflow.1596712464 |
|
|
Aug 28 10:34:26 PM UTC 24 |
Aug 28 10:35:45 PM UTC 24 |
1387156456 ps |
T1037 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_target_stress_all.1047497173 |
|
|
Aug 28 10:33:15 PM UTC 24 |
Aug 28 10:35:47 PM UTC 24 |
12496782533 ps |
T1038 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_host_error_intr.2971629316 |
|
|
Aug 28 10:35:38 PM UTC 24 |
Aug 28 10:35:51 PM UTC 24 |
734001223 ps |
T1039 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_target_intr_stress_wr.881136077 |
|
|
Aug 28 10:35:48 PM UTC 24 |
Aug 28 10:35:51 PM UTC 24 |
208383872 ps |
T1040 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_target_stress_rd.1617158667 |
|
|
Aug 28 10:35:43 PM UTC 24 |
Aug 28 10:35:52 PM UTC 24 |
723877900 ps |
T1041 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_target_intr_stress_wr.1738770509 |
|
|
Aug 28 10:35:09 PM UTC 24 |
Aug 28 10:35:54 PM UTC 24 |
14501190497 ps |
T1042 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_acq.1327758063 |
|
|
Aug 28 10:35:52 PM UTC 24 |
Aug 28 10:35:54 PM UTC 24 |
295169172 ps |
T1043 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_host_perf_precise.2309680432 |
|
|
Aug 28 10:35:36 PM UTC 24 |
Aug 28 10:35:55 PM UTC 24 |
2542122681 ps |
T313 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_reset_tx.1613236779 |
|
|
Aug 28 10:35:53 PM UTC 24 |
Aug 28 10:35:56 PM UTC 24 |
264223141 ps |
T1044 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_host_fifo_full.331151654 |
|
|
Aug 28 10:32:44 PM UTC 24 |
Aug 28 10:35:57 PM UTC 24 |
3254105566 ps |
T1045 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_tx.1206638848 |
|
|
Aug 28 10:35:58 PM UTC 24 |
Aug 28 10:36:02 PM UTC 24 |
137034492 ps |
T1046 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_target_fifo_watermarks_acq.3169574716 |
|
|
Aug 28 10:35:58 PM UTC 24 |
Aug 28 10:36:04 PM UTC 24 |
1688869504 ps |
T1047 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_target_timeout.1270732117 |
|
|
Aug 28 10:35:51 PM UTC 24 |
Aug 28 10:36:05 PM UTC 24 |
5896655150 ps |
T1048 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_target_perf.1625424515 |
|
|
Aug 28 10:35:55 PM UTC 24 |
Aug 28 10:36:05 PM UTC 24 |
784179608 ps |
T125 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_watermark.42923925 |
|
|
Aug 28 10:34:26 PM UTC 24 |
Aug 28 10:36:05 PM UTC 24 |
13522307384 ps |
T1049 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_host_stretch_timeout.3965865895 |
|
|
Aug 28 10:35:36 PM UTC 24 |
Aug 28 10:36:07 PM UTC 24 |
1201031740 ps |
T1050 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_target_smbus_maxlen.347421011 |
|
|
Aug 28 10:36:03 PM UTC 24 |
Aug 28 10:36:07 PM UTC 24 |
996263510 ps |
T91 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_target_smoke.2558478871 |
|
|
Aug 28 10:35:41 PM UTC 24 |
Aug 28 10:36:08 PM UTC 24 |
2929935374 ps |
T1051 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_alert_test.2307763168 |
|
|
Aug 28 10:36:06 PM UTC 24 |
Aug 28 10:36:08 PM UTC 24 |
51922596 ps |
T276 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_host_mode_toggle.4058979020 |
|
|
Aug 28 10:35:57 PM UTC 24 |
Aug 28 10:36:08 PM UTC 24 |
230455963 ps |
T1052 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_fmt_empty.2837559988 |
|
|
Aug 28 10:35:35 PM UTC 24 |
Aug 28 10:36:08 PM UTC 24 |
1203177600 ps |
T1053 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull.2915819399 |
|
|
Aug 28 10:36:03 PM UTC 24 |
Aug 28 10:36:09 PM UTC 24 |
1133019567 ps |
T1054 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_host_may_nack.1247143005 |
|
|
Aug 28 10:35:58 PM UTC 24 |
Aug 28 10:36:09 PM UTC 24 |
1974127660 ps |
T1055 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_target_nack_txstretch.1392829742 |
|
|
Aug 28 10:36:06 PM UTC 24 |
Aug 28 10:36:09 PM UTC 24 |
594993136 ps |
T1056 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_target_tx_stretch_ctrl.3669450463 |
|
|
Aug 28 10:36:00 PM UTC 24 |
Aug 28 10:36:10 PM UTC 24 |
375211701 ps |
T1057 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_host_override.359569940 |
|
|
Aug 28 10:36:08 PM UTC 24 |
Aug 28 10:36:10 PM UTC 24 |
29262753 ps |
T1058 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_target_nack_acqfull_addr.1571591201 |
|
|
Aug 28 10:36:05 PM UTC 24 |
Aug 28 10:36:11 PM UTC 24 |
1152804566 ps |
T1059 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_fmt.3405632725 |
|
|
Aug 28 10:36:09 PM UTC 24 |
Aug 28 10:36:12 PM UTC 24 |
82758788 ps |
T1060 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_host_error_intr.538407054 |
|
|
Aug 28 10:36:11 PM UTC 24 |
Aug 28 10:36:14 PM UTC 24 |
119817999 ps |
T1061 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_reset_rx.1965531606 |
|
|
Aug 28 10:36:09 PM UTC 24 |
Aug 28 10:36:19 PM UTC 24 |
221133031 ps |
T1062 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_fmt_empty.1582683034 |
|
|
Aug 28 10:36:09 PM UTC 24 |
Aug 28 10:36:20 PM UTC 24 |
504337184 ps |
T1063 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_watermark.4145054680 |
|
|
Aug 28 10:35:01 PM UTC 24 |
Aug 28 10:36:20 PM UTC 24 |
33628755770 ps |
T1064 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_host_fifo_overflow.14459683 |
|
|
Aug 28 10:33:30 PM UTC 24 |
Aug 28 10:36:21 PM UTC 24 |
10500844363 ps |
T1065 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_host_smoke.1184709749 |
|
|
Aug 28 10:35:31 PM UTC 24 |
Aug 28 10:36:22 PM UTC 24 |
13085639585 ps |
T1066 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_target_stress_all.3738416552 |
|
|
Aug 28 10:34:47 PM UTC 24 |
Aug 28 10:36:23 PM UTC 24 |
49059442817 ps |
T1067 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_overflow.1301673587 |
|
|
Aug 28 10:35:34 PM UTC 24 |
Aug 28 10:36:24 PM UTC 24 |
1513572225 ps |
T1068 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_acq.4201541220 |
|
|
Aug 28 10:36:24 PM UTC 24 |
Aug 28 10:36:26 PM UTC 24 |
420224024 ps |
T1069 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_target_stretch.3363308205 |
|
|
Aug 28 10:36:20 PM UTC 24 |
Aug 28 10:36:27 PM UTC 24 |
1246415063 ps |
T1070 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_reset_tx.2704864673 |
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|
Aug 28 10:36:25 PM UTC 24 |
Aug 28 10:36:28 PM UTC 24 |
632665513 ps |
T1071 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_target_intr_smoke.708212616 |
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|
Aug 28 10:36:21 PM UTC 24 |
Aug 28 10:36:29 PM UTC 24 |
4486915769 ps |
T1072 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/16.i2c_target_stress_all.3161219735 |
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|
Aug 28 10:28:20 PM UTC 24 |
Aug 28 10:36:30 PM UTC 24 |
32144280077 ps |
T1073 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_target_intr_stress_wr.3687456795 |
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|
Aug 28 10:36:21 PM UTC 24 |
Aug 28 10:36:31 PM UTC 24 |
12029753529 ps |
T1074 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_overflow.1063376942 |
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|
Aug 28 10:35:01 PM UTC 24 |
Aug 28 10:36:33 PM UTC 24 |
23422032794 ps |
T1075 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_host_mode_toggle.3846612014 |
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|
Aug 28 10:36:30 PM UTC 24 |
Aug 28 10:36:34 PM UTC 24 |
86090634 ps |
T1076 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_target_timeout.3354200680 |
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|
Aug 28 10:36:21 PM UTC 24 |
Aug 28 10:36:36 PM UTC 24 |
5509738162 ps |
T1077 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_target_bad_addr.98347887 |
|
|
Aug 28 10:36:28 PM UTC 24 |
Aug 28 10:36:37 PM UTC 24 |
878361743 ps |
T1078 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_watermarks_acq.3217424523 |
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|
Aug 28 10:36:32 PM UTC 24 |
Aug 28 10:36:37 PM UTC 24 |
783523465 ps |
T1079 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_target_fifo_watermarks_tx.3947435352 |
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Aug 28 10:36:34 PM UTC 24 |
Aug 28 10:36:37 PM UTC 24 |
372558597 ps |
T1080 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_target_perf.1936477859 |
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Aug 28 10:36:26 PM UTC 24 |
Aug 28 10:36:38 PM UTC 24 |
5797832446 ps |
T1081 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_host_fifo_full.1260175194 |
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Aug 28 10:34:28 PM UTC 24 |
Aug 28 10:36:40 PM UTC 24 |
3356599020 ps |
T1082 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_target_tx_stretch_ctrl.3005319881 |
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Aug 28 10:36:35 PM UTC 24 |
Aug 28 10:36:40 PM UTC 24 |
119221966 ps |
T1083 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_host_may_nack.456143406 |
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Aug 28 10:36:30 PM UTC 24 |
Aug 28 10:36:41 PM UTC 24 |
2439522708 ps |
T1084 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_alert_test.1871807706 |
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Aug 28 10:36:40 PM UTC 24 |
Aug 28 10:36:42 PM UTC 24 |
49528098 ps |
T1085 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_target_smbus_maxlen.1198953432 |
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Aug 28 10:36:37 PM UTC 24 |
Aug 28 10:36:42 PM UTC 24 |
493564939 ps |
T1086 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_host_override.1639712087 |
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Aug 28 10:36:41 PM UTC 24 |
Aug 28 10:36:43 PM UTC 24 |
29310500 ps |