T92 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_target_smoke.2433097391 |
|
|
Aug 28 10:41:34 PM UTC 24 |
Aug 28 10:41:58 PM UTC 24 |
4653093072 ps |
T1329 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_overflow.2157999807 |
|
|
Aug 28 10:40:39 PM UTC 24 |
Aug 28 10:41:59 PM UTC 24 |
5595054403 ps |
T1330 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_target_bad_addr.3660127318 |
|
|
Aug 28 10:41:56 PM UTC 24 |
Aug 28 10:42:02 PM UTC 24 |
2454210248 ps |
T1331 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_fmt_empty.2660274048 |
|
|
Aug 28 10:41:27 PM UTC 24 |
Aug 28 10:42:03 PM UTC 24 |
1017817442 ps |
T1332 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_target_perf.1021865220 |
|
|
Aug 28 10:41:55 PM UTC 24 |
Aug 28 10:42:03 PM UTC 24 |
6482063426 ps |
T1333 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_watermarks_tx.2463812594 |
|
|
Aug 28 10:42:02 PM UTC 24 |
Aug 28 10:42:05 PM UTC 24 |
319314319 ps |
T1334 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_watermarks_acq.2889397391 |
|
|
Aug 28 10:42:00 PM UTC 24 |
Aug 28 10:42:06 PM UTC 24 |
2037023333 ps |
T1335 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_target_intr_stress_wr.1970273123 |
|
|
Aug 28 10:41:43 PM UTC 24 |
Aug 28 10:42:06 PM UTC 24 |
11439835225 ps |
T1336 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_host_stretch_timeout.32172330 |
|
|
Aug 28 10:41:28 PM UTC 24 |
Aug 28 10:42:07 PM UTC 24 |
802124543 ps |
T1337 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_host_perf.3709841628 |
|
|
Aug 28 10:41:27 PM UTC 24 |
Aug 28 10:42:08 PM UTC 24 |
2606229677 ps |
T1338 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_alert_test.1900375448 |
|
|
Aug 28 10:42:07 PM UTC 24 |
Aug 28 10:42:08 PM UTC 24 |
26005878 ps |
T1339 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_target_smbus_maxlen.2497368565 |
|
|
Aug 28 10:42:03 PM UTC 24 |
Aug 28 10:42:09 PM UTC 24 |
881176480 ps |
T1340 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull.1787028557 |
|
|
Aug 28 10:42:04 PM UTC 24 |
Aug 28 10:42:10 PM UTC 24 |
526814621 ps |
T1341 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_target_tx_stretch_ctrl.2307036081 |
|
|
Aug 28 10:42:02 PM UTC 24 |
Aug 28 10:42:13 PM UTC 24 |
379826675 ps |
T1342 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_overflow.1300891031 |
|
|
Aug 28 10:39:57 PM UTC 24 |
Aug 28 10:42:10 PM UTC 24 |
2244840038 ps |
T1343 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_target_nack_acqfull_addr.3080214486 |
|
|
Aug 28 10:42:05 PM UTC 24 |
Aug 28 10:42:10 PM UTC 24 |
901199842 ps |
T1344 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_fmt.2030959791 |
|
|
Aug 28 10:42:11 PM UTC 24 |
Aug 28 10:42:14 PM UTC 24 |
115491707 ps |
T1345 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_host_smoke.396102956 |
|
|
Aug 28 10:40:36 PM UTC 24 |
Aug 28 10:42:15 PM UTC 24 |
7189835545 ps |
T1346 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_target_stress_wr.305822593 |
|
|
Aug 28 10:42:21 PM UTC 24 |
Aug 28 10:43:46 PM UTC 24 |
54006680261 ps |
T1347 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_fmt_empty.2451843810 |
|
|
Aug 28 10:42:11 PM UTC 24 |
Aug 28 10:42:18 PM UTC 24 |
886877704 ps |
T1348 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_host_error_intr.3416032769 |
|
|
Aug 28 10:42:16 PM UTC 24 |
Aug 28 10:42:20 PM UTC 24 |
425283154 ps |
T1349 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_reset_rx.4277130074 |
|
|
Aug 28 10:42:11 PM UTC 24 |
Aug 28 10:42:20 PM UTC 24 |
453756496 ps |
T1350 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_target_stress_all.2506644146 |
|
|
Aug 28 10:33:45 PM UTC 24 |
Aug 28 10:42:24 PM UTC 24 |
36000511881 ps |
T1351 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_host_perf.4264751748 |
|
|
Aug 28 10:42:12 PM UTC 24 |
Aug 28 10:42:25 PM UTC 24 |
3088839597 ps |
T1352 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_host_may_nack.3583592036 |
|
|
Aug 28 10:41:59 PM UTC 24 |
Aug 28 10:42:26 PM UTC 24 |
495331324 ps |
T1353 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_host_perf_precise.458417310 |
|
|
Aug 28 10:40:52 PM UTC 24 |
Aug 28 10:42:29 PM UTC 24 |
5901729806 ps |
T1354 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_overflow.3025164803 |
|
|
Aug 28 10:41:26 PM UTC 24 |
Aug 28 10:42:29 PM UTC 24 |
9143493944 ps |
T1355 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_target_stress_wr.867210594 |
|
|
Aug 28 10:36:50 PM UTC 24 |
Aug 28 10:42:31 PM UTC 24 |
49455618698 ps |
T1356 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_target_stress_all.2059746291 |
|
|
Aug 28 10:39:20 PM UTC 24 |
Aug 28 10:42:31 PM UTC 24 |
37135984399 ps |
T1357 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_acq.2387950277 |
|
|
Aug 28 10:42:32 PM UTC 24 |
Aug 28 10:42:35 PM UTC 24 |
171448985 ps |
T1358 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_target_smoke.946103964 |
|
|
Aug 28 10:42:20 PM UTC 24 |
Aug 28 10:42:35 PM UTC 24 |
3732383363 ps |
T1359 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_reset_tx.3902812574 |
|
|
Aug 28 10:42:32 PM UTC 24 |
Aug 28 10:42:35 PM UTC 24 |
676941349 ps |
T1360 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_target_intr_smoke.1419533640 |
|
|
Aug 28 10:42:26 PM UTC 24 |
Aug 28 10:42:39 PM UTC 24 |
2721271662 ps |
T1361 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_target_hrst.3850356800 |
|
|
Aug 28 10:42:37 PM UTC 24 |
Aug 28 10:42:41 PM UTC 24 |
659779579 ps |
T1362 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_target_perf.1413338116 |
|
|
Aug 28 10:42:33 PM UTC 24 |
Aug 28 10:42:41 PM UTC 24 |
3101518929 ps |
T1363 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_target_smoke.3048070458 |
|
|
Aug 28 10:43:40 PM UTC 24 |
Aug 28 10:43:49 PM UTC 24 |
2473979736 ps |
T1364 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_target_timeout.2840559030 |
|
|
Aug 28 10:42:30 PM UTC 24 |
Aug 28 10:42:42 PM UTC 24 |
1110230238 ps |
T1365 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_target_bad_addr.2081040359 |
|
|
Aug 28 10:42:35 PM UTC 24 |
Aug 28 10:42:45 PM UTC 24 |
10788195725 ps |
T1366 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_tx.2045530223 |
|
|
Aug 28 10:42:43 PM UTC 24 |
Aug 28 10:42:46 PM UTC 24 |
443827249 ps |
T1367 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_target_fifo_watermarks_acq.3964817844 |
|
|
Aug 28 10:42:42 PM UTC 24 |
Aug 28 10:42:46 PM UTC 24 |
662925485 ps |
T1368 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_full.1390525637 |
|
|
Aug 28 10:41:27 PM UTC 24 |
Aug 28 10:42:48 PM UTC 24 |
9309821469 ps |
T1369 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_host_stretch_timeout.249531983 |
|
|
Aug 28 10:42:15 PM UTC 24 |
Aug 28 10:42:51 PM UTC 24 |
2565993494 ps |
T1370 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_target_smbus_maxlen.583124688 |
|
|
Aug 28 10:42:46 PM UTC 24 |
Aug 28 10:42:51 PM UTC 24 |
1855898023 ps |
T1371 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_target_nack_txstretch.1972799030 |
|
|
Aug 28 10:42:48 PM UTC 24 |
Aug 28 10:42:51 PM UTC 24 |
648845594 ps |
T1372 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_host_may_nack.987737233 |
|
|
Aug 28 10:42:42 PM UTC 24 |
Aug 28 10:42:52 PM UTC 24 |
1801316904 ps |
T1373 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull_addr.337657606 |
|
|
Aug 28 10:42:47 PM UTC 24 |
Aug 28 10:42:52 PM UTC 24 |
1957122466 ps |
T1374 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_target_nack_acqfull.2898254402 |
|
|
Aug 28 10:42:47 PM UTC 24 |
Aug 28 10:42:52 PM UTC 24 |
456532624 ps |
T1375 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_alert_test.1630071283 |
|
|
Aug 28 10:42:51 PM UTC 24 |
Aug 28 10:42:53 PM UTC 24 |
15671307 ps |
T1376 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_target_tx_stretch_ctrl.3650658308 |
|
|
Aug 28 10:42:43 PM UTC 24 |
Aug 28 10:42:54 PM UTC 24 |
531467682 ps |
T1377 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_host_override.2544270574 |
|
|
Aug 28 10:42:52 PM UTC 24 |
Aug 28 10:42:54 PM UTC 24 |
19366871 ps |
T259 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_fmt.915754961 |
|
|
Aug 28 10:42:54 PM UTC 24 |
Aug 28 10:42:56 PM UTC 24 |
254439201 ps |
T1378 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_target_stretch.3073054209 |
|
|
Aug 28 10:41:35 PM UTC 24 |
Aug 28 10:42:59 PM UTC 24 |
3817341279 ps |
T1379 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_target_stress_wr.838565196 |
|
|
Aug 28 10:36:13 PM UTC 24 |
Aug 28 10:42:59 PM UTC 24 |
61074845879 ps |
T1380 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_target_stress_rd.4230892797 |
|
|
Aug 28 10:42:22 PM UTC 24 |
Aug 28 10:43:00 PM UTC 24 |
694735543 ps |
T1381 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_host_perf.2510523567 |
|
|
Aug 28 10:35:36 PM UTC 24 |
Aug 28 10:43:02 PM UTC 24 |
27962550280 ps |
T1382 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_host_perf_precise.600440004 |
|
|
Aug 28 10:43:00 PM UTC 24 |
Aug 28 10:43:03 PM UTC 24 |
244876000 ps |
T1383 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_fmt_empty.3442512332 |
|
|
Aug 28 10:42:54 PM UTC 24 |
Aug 28 10:43:03 PM UTC 24 |
2259802797 ps |
T1384 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_reset_rx.1273880893 |
|
|
Aug 28 10:42:55 PM UTC 24 |
Aug 28 10:43:06 PM UTC 24 |
916717066 ps |
T1385 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_host_error_intr.4148002943 |
|
|
Aug 28 10:43:01 PM UTC 24 |
Aug 28 10:43:08 PM UTC 24 |
260968520 ps |
T1386 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_host_perf.3840579490 |
|
|
Aug 28 10:42:57 PM UTC 24 |
Aug 28 10:43:08 PM UTC 24 |
6917451253 ps |
T1387 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_target_intr_stress_wr.1198888877 |
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|
Aug 28 10:36:55 PM UTC 24 |
Aug 28 10:43:13 PM UTC 24 |
22431477570 ps |
T1388 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_target_stress_wr.1494753177 |
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|
Aug 28 10:39:01 PM UTC 24 |
Aug 28 10:43:17 PM UTC 24 |
60723582158 ps |
T1389 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_watermark.1649483571 |
|
|
Aug 28 10:42:09 PM UTC 24 |
Aug 28 10:43:19 PM UTC 24 |
3240077209 ps |
T1390 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_host_stretch_timeout.2040969100 |
|
|
Aug 28 10:43:00 PM UTC 24 |
Aug 28 10:43:19 PM UTC 24 |
778546258 ps |
T1391 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_target_intr_smoke.41659281 |
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|
Aug 28 10:43:10 PM UTC 24 |
Aug 28 10:43:21 PM UTC 24 |
1161144126 ps |
T1392 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_host_smoke.674016392 |
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|
Aug 28 10:42:52 PM UTC 24 |
Aug 28 10:43:22 PM UTC 24 |
6972639314 ps |
T1393 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_acq.1578942949 |
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|
Aug 28 10:43:20 PM UTC 24 |
Aug 28 10:43:23 PM UTC 24 |
219284894 ps |
T1394 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_reset_tx.1059273704 |
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|
Aug 28 10:43:22 PM UTC 24 |
Aug 28 10:43:25 PM UTC 24 |
231826912 ps |
T1395 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_target_timeout.3739951023 |
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|
Aug 28 10:43:18 PM UTC 24 |
Aug 28 10:43:27 PM UTC 24 |
19995345088 ps |
T1396 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_overflow.1718122346 |
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|
Aug 28 10:42:10 PM UTC 24 |
Aug 28 10:43:28 PM UTC 24 |
11642774852 ps |
T1397 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_target_intr_stress_wr.1842160767 |
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|
Aug 28 10:42:27 PM UTC 24 |
Aug 28 10:43:30 PM UTC 24 |
5464103133 ps |
T1398 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_target_perf.4199549774 |
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|
Aug 28 10:43:23 PM UTC 24 |
Aug 28 10:43:31 PM UTC 24 |
7032658186 ps |
T1399 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_target_hrst.975914693 |
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|
Aug 28 10:43:26 PM UTC 24 |
Aug 28 10:43:32 PM UTC 24 |
1266226989 ps |
T1400 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_target_stress_all.2913988095 |
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|
Aug 28 10:39:48 PM UTC 24 |
Aug 28 10:43:32 PM UTC 24 |
22035504520 ps |
T1401 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_host_smoke.1574827939 |
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|
Aug 28 10:42:08 PM UTC 24 |
Aug 28 10:43:33 PM UTC 24 |
1804597122 ps |
T1402 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_target_stretch.3021706568 |
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|
Aug 28 10:43:09 PM UTC 24 |
Aug 28 10:43:33 PM UTC 24 |
2200802286 ps |
T1403 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_full.332588236 |
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Aug 28 10:39:30 PM UTC 24 |
Aug 28 10:43:33 PM UTC 24 |
13957280499 ps |
T1404 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_target_bad_addr.86420129 |
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Aug 28 10:43:24 PM UTC 24 |
Aug 28 10:43:34 PM UTC 24 |
4045705141 ps |
T1405 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_watermarks_tx.2620304047 |
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|
Aug 28 10:43:32 PM UTC 24 |
Aug 28 10:43:35 PM UTC 24 |
263055417 ps |
T1406 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_host_perf_precise.3938934180 |
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|
Aug 28 10:42:14 PM UTC 24 |
Aug 28 10:43:45 PM UTC 24 |
6023279935 ps |
T1407 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_full.1255378895 |
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|
Aug 28 10:40:00 PM UTC 24 |
Aug 28 10:43:36 PM UTC 24 |
3253881860 ps |
T1408 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_alert_test.2905243416 |
|
|
Aug 28 10:43:35 PM UTC 24 |
Aug 28 10:43:37 PM UTC 24 |
28556253 ps |
T1409 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_target_fifo_watermarks_acq.2686587324 |
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|
Aug 28 10:43:31 PM UTC 24 |
Aug 28 10:43:37 PM UTC 24 |
1039867786 ps |
T1410 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_target_nack_txstretch.1164981649 |
|
|
Aug 28 10:43:34 PM UTC 24 |
Aug 28 10:43:37 PM UTC 24 |
617788568 ps |
T1411 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_host_may_nack.504673225 |
|
|
Aug 28 10:43:28 PM UTC 24 |
Aug 28 10:43:38 PM UTC 24 |
3784411697 ps |
T1412 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_host_override.4235526825 |
|
|
Aug 28 10:43:36 PM UTC 24 |
Aug 28 10:43:38 PM UTC 24 |
26581799 ps |
T1413 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull.3664989998 |
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|
Aug 28 10:43:34 PM UTC 24 |
Aug 28 10:43:38 PM UTC 24 |
1992819676 ps |
T1414 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_target_smbus_maxlen.2928298682 |
|
|
Aug 28 10:43:33 PM UTC 24 |
Aug 28 10:43:38 PM UTC 24 |
2019644925 ps |
T1415 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_target_stress_rd.3866291369 |
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|
Aug 28 10:43:07 PM UTC 24 |
Aug 28 10:43:39 PM UTC 24 |
2664076195 ps |
T1416 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_target_nack_acqfull_addr.3143216356 |
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|
Aug 28 10:43:34 PM UTC 24 |
Aug 28 10:43:39 PM UTC 24 |
1010221408 ps |
T1417 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_fmt.1243882239 |
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|
Aug 28 10:43:37 PM UTC 24 |
Aug 28 10:43:40 PM UTC 24 |
332190059 ps |
T1418 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_target_smoke.1457013696 |
|
|
Aug 28 10:43:03 PM UTC 24 |
Aug 28 10:43:40 PM UTC 24 |
3824696911 ps |
T1419 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_host_error_intr.4068895026 |
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|
Aug 28 10:43:40 PM UTC 24 |
Aug 28 10:43:43 PM UTC 24 |
1096826543 ps |
T1420 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_reset_rx.266300364 |
|
|
Aug 28 10:43:39 PM UTC 24 |
Aug 28 10:43:45 PM UTC 24 |
1299800014 ps |
T1421 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_fmt_empty.2191283451 |
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|
Aug 28 10:43:38 PM UTC 24 |
Aug 28 10:43:49 PM UTC 24 |
1480590710 ps |
T1422 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_acq.2248890841 |
|
|
Aug 28 10:43:51 PM UTC 24 |
Aug 28 10:43:53 PM UTC 24 |
194880042 ps |
T1423 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_host_stretch_timeout.2096107902 |
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|
Aug 28 10:43:40 PM UTC 24 |
Aug 28 10:43:53 PM UTC 24 |
574115086 ps |
T1424 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_target_stretch.167259933 |
|
|
Aug 28 10:43:43 PM UTC 24 |
Aug 28 10:43:55 PM UTC 24 |
2161640450 ps |
T1425 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_target_intr_smoke.1213826530 |
|
|
Aug 28 10:43:45 PM UTC 24 |
Aug 28 10:43:55 PM UTC 24 |
1794057359 ps |
T1426 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_target_stress_all.3609520203 |
|
|
Aug 28 10:43:23 PM UTC 24 |
Aug 28 10:43:56 PM UTC 24 |
5538835308 ps |
T1427 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_reset_tx.3217179094 |
|
|
Aug 28 10:43:54 PM UTC 24 |
Aug 28 10:43:56 PM UTC 24 |
155558575 ps |
T1428 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_target_timeout.1411499054 |
|
|
Aug 28 10:43:46 PM UTC 24 |
Aug 28 10:43:58 PM UTC 24 |
2567207427 ps |
T1429 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_host_perf_precise.3528451879 |
|
|
Aug 28 10:43:39 PM UTC 24 |
Aug 28 10:43:59 PM UTC 24 |
6423264444 ps |
T1430 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_host_perf.244130402 |
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|
Aug 28 10:40:52 PM UTC 24 |
Aug 28 10:45:03 PM UTC 24 |
9499522967 ps |
T1431 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_target_hrst.3623574987 |
|
|
Aug 28 10:43:56 PM UTC 24 |
Aug 28 10:44:00 PM UTC 24 |
317075216 ps |
T1432 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_target_bad_addr.3507815114 |
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|
Aug 28 10:43:56 PM UTC 24 |
Aug 28 10:44:03 PM UTC 24 |
7076389119 ps |
T1433 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_host_may_nack.850815897 |
|
|
Aug 28 10:43:57 PM UTC 24 |
Aug 28 10:44:03 PM UTC 24 |
492895924 ps |
T1434 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_watermarks_tx.3289855056 |
|
|
Aug 28 10:44:00 PM UTC 24 |
Aug 28 10:44:04 PM UTC 24 |
542690764 ps |
T1435 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_target_fifo_watermarks_acq.2299513571 |
|
|
Aug 28 10:43:59 PM UTC 24 |
Aug 28 10:44:06 PM UTC 24 |
587557262 ps |
T1436 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_target_smbus_maxlen.1977274903 |
|
|
Aug 28 10:44:00 PM UTC 24 |
Aug 28 10:44:06 PM UTC 24 |
457268200 ps |
T1437 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_target_perf.2906070130 |
|
|
Aug 28 10:43:54 PM UTC 24 |
Aug 28 10:44:06 PM UTC 24 |
2059869206 ps |
T1438 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_target_tx_stretch_ctrl.2190810001 |
|
|
Aug 28 10:44:00 PM UTC 24 |
Aug 28 10:44:07 PM UTC 24 |
151318450 ps |
T1439 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_target_nack_txstretch.2892483638 |
|
|
Aug 28 10:44:05 PM UTC 24 |
Aug 28 10:44:08 PM UTC 24 |
1279190997 ps |
T1440 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_overflow.961560765 |
|
|
Aug 28 10:42:53 PM UTC 24 |
Aug 28 10:44:08 PM UTC 24 |
9867352345 ps |
T1441 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_watermark.3023485094 |
|
|
Aug 28 10:38:08 PM UTC 24 |
Aug 28 10:44:08 PM UTC 24 |
5316226170 ps |
T1442 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull_addr.2210225507 |
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|
Aug 28 10:44:04 PM UTC 24 |
Aug 28 10:44:08 PM UTC 24 |
440105458 ps |
T1443 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_alert_test.1121381007 |
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|
Aug 28 10:44:07 PM UTC 24 |
Aug 28 10:44:09 PM UTC 24 |
27846421 ps |
T1444 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_host_override.314705011 |
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|
Aug 28 10:44:07 PM UTC 24 |
Aug 28 10:44:09 PM UTC 24 |
28707037 ps |
T1445 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_target_nack_acqfull.893399123 |
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|
Aug 28 10:44:04 PM UTC 24 |
Aug 28 10:44:09 PM UTC 24 |
509589083 ps |
T1446 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_target_stress_rd.659311473 |
|
|
Aug 28 10:43:41 PM UTC 24 |
Aug 28 10:44:11 PM UTC 24 |
2976743631 ps |
T1447 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_target_stress_all.1544575203 |
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|
Aug 28 10:34:13 PM UTC 24 |
Aug 28 10:44:11 PM UTC 24 |
35147026662 ps |
T1448 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_full.235541108 |
|
|
Aug 28 10:42:55 PM UTC 24 |
Aug 28 10:44:12 PM UTC 24 |
7247471052 ps |
T260 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_fmt.4154521648 |
|
|
Aug 28 10:44:09 PM UTC 24 |
Aug 28 10:44:12 PM UTC 24 |
158220636 ps |
T1449 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_host_perf_precise.216497504 |
|
|
Aug 28 10:44:10 PM UTC 24 |
Aug 28 10:44:14 PM UTC 24 |
63084669 ps |
T1450 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_reset_rx.3838455399 |
|
|
Aug 28 10:44:09 PM UTC 24 |
Aug 28 10:44:15 PM UTC 24 |
780625987 ps |
T1451 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_host_error_intr.948160957 |
|
|
Aug 28 10:44:12 PM UTC 24 |
Aug 28 10:44:16 PM UTC 24 |
137140264 ps |
T1452 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_host_perf.4119347346 |
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|
Aug 28 10:43:39 PM UTC 24 |
Aug 28 10:44:16 PM UTC 24 |
7173618543 ps |
T1453 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_watermark.4181841735 |
|
|
Aug 28 10:39:28 PM UTC 24 |
Aug 28 10:44:16 PM UTC 24 |
5308846863 ps |
T1454 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_target_stress_all.2113482611 |
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|
Aug 28 10:41:13 PM UTC 24 |
Aug 28 10:44:18 PM UTC 24 |
36356578421 ps |
T1455 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_target_stretch.3281508781 |
|
|
Aug 28 10:42:25 PM UTC 24 |
Aug 28 10:44:21 PM UTC 24 |
2647247169 ps |
T1456 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_host_smoke.2209008084 |
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|
Aug 28 10:43:36 PM UTC 24 |
Aug 28 10:44:21 PM UTC 24 |
7273116680 ps |
T1457 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_watermark.1766504504 |
|
|
Aug 28 10:40:38 PM UTC 24 |
Aug 28 10:44:23 PM UTC 24 |
3433534725 ps |
T1458 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_host_stretch_timeout.852570806 |
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|
Aug 28 10:44:12 PM UTC 24 |
Aug 28 10:44:23 PM UTC 24 |
971788806 ps |
T1459 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_acq.3240036735 |
|
|
Aug 28 10:44:21 PM UTC 24 |
Aug 28 10:44:24 PM UTC 24 |
289636229 ps |
T1460 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_reset_tx.4010308109 |
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|
Aug 28 10:44:23 PM UTC 24 |
Aug 28 10:44:26 PM UTC 24 |
534634584 ps |
T1461 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/21.i2c_target_stress_wr.3461441550 |
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|
Aug 28 10:30:44 PM UTC 24 |
Aug 28 10:44:26 PM UTC 24 |
50514683732 ps |
T1462 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_fmt_empty.2307412399 |
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|
Aug 28 10:44:09 PM UTC 24 |
Aug 28 10:44:27 PM UTC 24 |
2540226283 ps |
T1463 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_target_intr_smoke.2488259320 |
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|
Aug 28 10:44:17 PM UTC 24 |
Aug 28 10:44:29 PM UTC 24 |
1156144122 ps |
T1464 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_target_stress_rd.4228025174 |
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|
Aug 28 10:44:16 PM UTC 24 |
Aug 28 10:44:30 PM UTC 24 |
892232462 ps |
T1465 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_host_smoke.1131401684 |
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|
Aug 28 10:44:07 PM UTC 24 |
Aug 28 10:44:30 PM UTC 24 |
956979247 ps |
T1466 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_target_smoke.3873025667 |
|
|
Aug 28 10:44:13 PM UTC 24 |
Aug 28 10:44:30 PM UTC 24 |
2200287904 ps |
T1467 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_target_bad_addr.1707596699 |
|
|
Aug 28 10:44:25 PM UTC 24 |
Aug 28 10:44:32 PM UTC 24 |
4027889071 ps |
T1468 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_target_timeout.3290160493 |
|
|
Aug 28 10:44:18 PM UTC 24 |
Aug 28 10:44:32 PM UTC 24 |
1365042983 ps |
T1469 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_host_may_nack.2232546471 |
|
|
Aug 28 10:44:28 PM UTC 24 |
Aug 28 10:44:33 PM UTC 24 |
1059005669 ps |
T1470 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_tx.927234070 |
|
|
Aug 28 10:44:31 PM UTC 24 |
Aug 28 10:44:33 PM UTC 24 |
382537452 ps |
T1471 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_host_mode_toggle.71200082 |
|
|
Aug 28 10:44:27 PM UTC 24 |
Aug 28 10:44:34 PM UTC 24 |
521093318 ps |
T1472 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_target_tx_stretch_ctrl.371283078 |
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|
Aug 28 10:44:31 PM UTC 24 |
Aug 28 10:44:34 PM UTC 24 |
83672129 ps |
T1473 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_target_perf.2037483183 |
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|
Aug 28 10:44:25 PM UTC 24 |
Aug 28 10:44:35 PM UTC 24 |
6988213694 ps |
T1474 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_target_stretch.348069324 |
|
|
Aug 28 10:44:16 PM UTC 24 |
Aug 28 10:44:35 PM UTC 24 |
848151584 ps |
T1475 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_target_fifo_watermarks_acq.2463508635 |
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|
Aug 28 10:44:30 PM UTC 24 |
Aug 28 10:44:36 PM UTC 24 |
2590632319 ps |
T1476 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_target_smbus_maxlen.3141623820 |
|
|
Aug 28 10:44:31 PM UTC 24 |
Aug 28 10:44:36 PM UTC 24 |
1830803317 ps |
T1477 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_target_intr_smoke.4283116383 |
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|
Aug 28 10:44:49 PM UTC 24 |
Aug 28 10:44:59 PM UTC 24 |
1959320749 ps |
T1478 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_alert_test.3369202911 |
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|
Aug 28 10:44:34 PM UTC 24 |
Aug 28 10:44:36 PM UTC 24 |
16283376 ps |
T1479 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_target_stress_wr.3671053954 |
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|
Aug 28 10:35:06 PM UTC 24 |
Aug 28 10:44:37 PM UTC 24 |
42857728939 ps |
T1480 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_host_override.3997536081 |
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|
Aug 28 10:44:36 PM UTC 24 |
Aug 28 10:44:38 PM UTC 24 |
92412728 ps |
T1481 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull.2109737960 |
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|
Aug 28 10:44:32 PM UTC 24 |
Aug 28 10:44:38 PM UTC 24 |
2834928087 ps |
T1482 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_target_nack_acqfull_addr.845006275 |
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|
Aug 28 10:44:33 PM UTC 24 |
Aug 28 10:44:38 PM UTC 24 |
435217484 ps |
T1483 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_full.1381869784 |
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|
Aug 28 10:40:51 PM UTC 24 |
Aug 28 10:44:39 PM UTC 24 |
8340565764 ps |
T1484 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_fmt.3132683516 |
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|
Aug 28 10:44:37 PM UTC 24 |
Aug 28 10:44:39 PM UTC 24 |
321888251 ps |
T1485 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_host_error_intr.4025882753 |
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|
Aug 28 10:44:39 PM UTC 24 |
Aug 28 10:44:42 PM UTC 24 |
72991688 ps |
T1486 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_host_fifo_watermark.2550798943 |
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|
Aug 28 10:42:53 PM UTC 24 |
Aug 28 10:44:45 PM UTC 24 |
14636942155 ps |
T1487 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_full.4161788433 |
|
|
Aug 28 10:43:39 PM UTC 24 |
Aug 28 10:44:48 PM UTC 24 |
8784020803 ps |
T1488 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_target_intr_stress_wr.1232079553 |
|
|
Aug 28 10:44:17 PM UTC 24 |
Aug 28 10:44:48 PM UTC 24 |
7676347735 ps |
T1489 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_fmt_empty.101108704 |
|
|
Aug 28 10:44:37 PM UTC 24 |
Aug 28 10:44:49 PM UTC 24 |
1582808717 ps |
T1490 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_target_stretch.2298414907 |
|
|
Aug 28 10:44:46 PM UTC 24 |
Aug 28 10:44:50 PM UTC 24 |
1299695772 ps |
T1491 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_reset_rx.2819949114 |
|
|
Aug 28 10:44:37 PM UTC 24 |
Aug 28 10:44:51 PM UTC 24 |
610338276 ps |
T251 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_acq.969763253 |
|
|
Aug 28 10:44:52 PM UTC 24 |
Aug 28 10:44:55 PM UTC 24 |
357491369 ps |
T1492 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_target_smoke.1139980721 |
|
|
Aug 28 10:44:40 PM UTC 24 |
Aug 28 10:44:55 PM UTC 24 |
8497581198 ps |
T1493 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_reset_tx.1445532716 |
|
|
Aug 28 10:44:54 PM UTC 24 |
Aug 28 10:44:57 PM UTC 24 |
589749231 ps |
T1494 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_host_stretch_timeout.966716452 |
|
|
Aug 28 10:44:39 PM UTC 24 |
Aug 28 10:45:03 PM UTC 24 |
3540975386 ps |
T1495 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_target_perf.1640393787 |
|
|
Aug 28 10:44:55 PM UTC 24 |
Aug 28 10:45:05 PM UTC 24 |
14163185588 ps |
T1496 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_target_timeout.1408546318 |
|
|
Aug 28 10:44:51 PM UTC 24 |
Aug 28 10:45:06 PM UTC 24 |
5187187296 ps |
T1497 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/45.i2c_alert_test.1099988539 |
|
|
Aug 28 10:46:29 PM UTC 24 |
Aug 28 10:46:32 PM UTC 24 |
45940112 ps |
T1498 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_target_stress_rd.3853095813 |
|
|
Aug 28 10:44:45 PM UTC 24 |
Aug 28 10:45:06 PM UTC 24 |
5271328713 ps |
T1499 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_target_bad_addr.655751507 |
|
|
Aug 28 10:44:57 PM UTC 24 |
Aug 28 10:45:07 PM UTC 24 |
893606717 ps |
T1500 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_tx.3559941906 |
|
|
Aug 28 10:45:05 PM UTC 24 |
Aug 28 10:45:08 PM UTC 24 |
80718999 ps |
T1501 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_alert_test.1816384256 |
|
|
Aug 28 10:45:08 PM UTC 24 |
Aug 28 10:45:10 PM UTC 24 |
18669520 ps |
T1502 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_target_tx_stretch_ctrl.1374278295 |
|
|
Aug 28 10:45:06 PM UTC 24 |
Aug 28 10:45:10 PM UTC 24 |
81551957 ps |
T1503 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_target_nack_txstretch.1049179650 |
|
|
Aug 28 10:45:08 PM UTC 24 |
Aug 28 10:45:12 PM UTC 24 |
575965024 ps |
T1504 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_target_smbus_maxlen.3288512647 |
|
|
Aug 28 10:45:07 PM UTC 24 |
Aug 28 10:45:12 PM UTC 24 |
1492294693 ps |
T1505 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_target_fifo_watermarks_acq.283810845 |
|
|
Aug 28 10:45:05 PM UTC 24 |
Aug 28 10:45:12 PM UTC 24 |
725058591 ps |
T1506 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull_addr.1011977499 |
|
|
Aug 28 10:45:07 PM UTC 24 |
Aug 28 10:45:13 PM UTC 24 |
476982463 ps |
T1507 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_target_nack_acqfull.3951498880 |
|
|
Aug 28 10:45:07 PM UTC 24 |
Aug 28 10:45:13 PM UTC 24 |
1879635564 ps |
T1508 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_host_override.1346580353 |
|
|
Aug 28 10:45:11 PM UTC 24 |
Aug 28 10:45:13 PM UTC 24 |
110235004 ps |
T1509 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_fmt.3904221178 |
|
|
Aug 28 10:45:13 PM UTC 24 |
Aug 28 10:45:16 PM UTC 24 |
82711463 ps |
T1510 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_fmt_empty.2667862420 |
|
|
Aug 28 10:45:14 PM UTC 24 |
Aug 28 10:45:21 PM UTC 24 |
283258182 ps |
T1511 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_host_fifo_full.2261610827 |
|
|
Aug 28 10:42:11 PM UTC 24 |
Aug 28 10:45:21 PM UTC 24 |
3027827414 ps |
T1512 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_host_may_nack.2042768195 |
|
|
Aug 28 10:45:04 PM UTC 24 |
Aug 28 10:45:23 PM UTC 24 |
1296902907 ps |
T1513 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_reset_rx.3337068172 |
|
|
Aug 28 10:45:14 PM UTC 24 |
Aug 28 10:45:27 PM UTC 24 |
283737459 ps |
T1514 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_host_error_intr.3210879470 |
|
|
Aug 28 10:45:24 PM UTC 24 |
Aug 28 10:45:27 PM UTC 24 |
93653464 ps |
T1515 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_target_stress_all.4270978162 |
|
|
Aug 28 10:44:25 PM UTC 24 |
Aug 28 10:45:29 PM UTC 24 |
8230218773 ps |
T1516 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/10.i2c_target_stress_all.2854820872 |
|
|
Aug 28 10:25:23 PM UTC 24 |
Aug 28 10:45:34 PM UTC 24 |
49685038744 ps |
T1517 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_host_smoke.1123840381 |
|
|
Aug 28 10:44:34 PM UTC 24 |
Aug 28 10:45:35 PM UTC 24 |
1397881877 ps |
T1518 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_watermark.3269791222 |
|
|
Aug 28 10:41:25 PM UTC 24 |
Aug 28 10:45:35 PM UTC 24 |
3610366209 ps |
T287 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_target_stress_all.3532859030 |
|
|
Aug 28 10:43:55 PM UTC 24 |
Aug 28 10:45:36 PM UTC 24 |
9205564450 ps |
T1519 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_target_intr_stress_wr.937955042 |
|
|
Aug 28 10:44:50 PM UTC 24 |
Aug 28 10:45:39 PM UTC 24 |
19033968313 ps |
T1520 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/18.i2c_target_stress_wr.573853179 |
|
|
Aug 28 10:29:03 PM UTC 24 |
Aug 28 10:45:42 PM UTC 24 |
53233614806 ps |
T1521 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_target_stress_all.2472905907 |
|
|
Aug 28 10:42:35 PM UTC 24 |
Aug 28 10:45:43 PM UTC 24 |
49194370094 ps |
T1522 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_host_fifo_full.2879348476 |
|
|
Aug 28 10:44:38 PM UTC 24 |
Aug 28 10:45:44 PM UTC 24 |
4563140007 ps |
T1523 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_overflow.590059830 |
|
|
Aug 28 10:44:08 PM UTC 24 |
Aug 28 10:45:45 PM UTC 24 |
2504985774 ps |
T252 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_reset_acq.1161179251 |
|
|
Aug 28 10:45:44 PM UTC 24 |
Aug 28 10:45:46 PM UTC 24 |
183583727 ps |
T1524 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_host_perf_precise.2416320908 |
|
|
Aug 28 10:45:22 PM UTC 24 |
Aug 28 10:45:46 PM UTC 24 |
866305976 ps |
T1525 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_target_stress_rd.4199017270 |
|
|
Aug 28 10:45:34 PM UTC 24 |
Aug 28 10:45:46 PM UTC 24 |
716886789 ps |
T1526 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_target_stretch.2752125908 |
|
|
Aug 28 10:45:35 PM UTC 24 |
Aug 28 10:45:47 PM UTC 24 |
2989481305 ps |
T1527 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_reset_tx.1821720198 |
|
|
Aug 28 10:45:45 PM UTC 24 |
Aug 28 10:45:48 PM UTC 24 |
242067164 ps |
T1528 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_target_intr_smoke.2937299385 |
|
|
Aug 28 10:45:36 PM UTC 24 |
Aug 28 10:45:48 PM UTC 24 |
4064739081 ps |
T1529 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_watermarks_tx.4167797658 |
|
|
Aug 28 10:45:48 PM UTC 24 |
Aug 28 10:45:51 PM UTC 24 |
129825500 ps |
T1530 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_target_hrst.50964910 |
|
|
Aug 28 10:45:47 PM UTC 24 |
Aug 28 10:45:52 PM UTC 24 |
250993141 ps |
T1531 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_target_timeout.1690918031 |
|
|
Aug 28 10:45:40 PM UTC 24 |
Aug 28 10:45:52 PM UTC 24 |
2949492607 ps |
T1532 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_target_perf.2219639953 |
|
|
Aug 28 10:45:46 PM UTC 24 |
Aug 28 10:45:53 PM UTC 24 |
2853185740 ps |
T1533 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_target_fifo_watermarks_acq.4227864834 |
|
|
Aug 28 10:45:48 PM UTC 24 |
Aug 28 10:45:54 PM UTC 24 |
800236464 ps |
T1534 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_target_smoke.3234351600 |
|
|
Aug 28 10:45:28 PM UTC 24 |
Aug 28 10:45:54 PM UTC 24 |
594179059 ps |
T1535 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_target_smbus_maxlen.1306612545 |
|
|
Aug 28 10:45:51 PM UTC 24 |
Aug 28 10:45:56 PM UTC 24 |
438364653 ps |
T1536 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_alert_test.2640009339 |
|
|
Aug 28 10:45:54 PM UTC 24 |
Aug 28 10:45:56 PM UTC 24 |
17697125 ps |
T1537 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_target_nack_txstretch.2771993778 |
|
|
Aug 28 10:45:53 PM UTC 24 |
Aug 28 10:45:56 PM UTC 24 |
449516007 ps |
T1538 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_target_bad_addr.3980567955 |
|
|
Aug 28 10:45:47 PM UTC 24 |
Aug 28 10:45:56 PM UTC 24 |
2102261833 ps |
T1539 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_target_nack_acqfull.2771636464 |
|
|
Aug 28 10:45:52 PM UTC 24 |
Aug 28 10:45:57 PM UTC 24 |
485305613 ps |
T1540 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/45.i2c_host_override.1198849087 |
|
|
Aug 28 10:45:55 PM UTC 24 |
Aug 28 10:45:57 PM UTC 24 |
49225171 ps |
T1541 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_target_nack_acqfull_addr.3663614577 |
|
|
Aug 28 10:45:53 PM UTC 24 |
Aug 28 10:45:58 PM UTC 24 |
3195425816 ps |
T1542 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/41.i2c_host_fifo_overflow.564187726 |
|
|
Aug 28 10:43:37 PM UTC 24 |
Aug 28 10:45:58 PM UTC 24 |
9077207989 ps |
T1543 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_target_stress_wr.1702439728 |
|
|
Aug 28 10:44:15 PM UTC 24 |
Aug 28 10:45:59 PM UTC 24 |
22131960261 ps |
T1544 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_reset_fmt.4022091536 |
|
|
Aug 28 10:45:57 PM UTC 24 |
Aug 28 10:46:00 PM UTC 24 |
1960079239 ps |
T1545 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_target_tx_stretch_ctrl.3352787205 |
|
|
Aug 28 10:45:49 PM UTC 24 |
Aug 28 10:46:01 PM UTC 24 |
511026145 ps |
T1546 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/43.i2c_target_stress_wr.4172789347 |
|
|
Aug 28 10:44:42 PM UTC 24 |
Aug 28 10:46:02 PM UTC 24 |
35617724818 ps |
T1547 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/40.i2c_target_intr_stress_wr.1751347443 |
|
|
Aug 28 10:43:14 PM UTC 24 |
Aug 28 10:46:02 PM UTC 24 |
16059496957 ps |
T1548 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_host_perf.991414107 |
|
|
Aug 28 10:45:17 PM UTC 24 |
Aug 28 10:46:06 PM UTC 24 |
2868484707 ps |
T1549 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_fmt_empty.2488701462 |
|
|
Aug 28 10:45:57 PM UTC 24 |
Aug 28 10:46:06 PM UTC 24 |
441903618 ps |
T272 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_host_may_nack.3597784348 |
|
|
Aug 28 10:45:48 PM UTC 24 |
Aug 28 10:46:06 PM UTC 24 |
343114925 ps |
T1550 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_host_stretch_timeout.1640210098 |
|
|
Aug 28 10:45:22 PM UTC 24 |
Aug 28 10:46:07 PM UTC 24 |
3661223905 ps |
T1551 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/45.i2c_host_stretch_timeout.19120765 |
|
|
Aug 28 10:46:00 PM UTC 24 |
Aug 28 10:46:11 PM UTC 24 |
1941375875 ps |
T1552 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/45.i2c_host_fifo_reset_rx.408950082 |
|
|
Aug 28 10:45:57 PM UTC 24 |
Aug 28 10:46:11 PM UTC 24 |
335185552 ps |
T1553 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/45.i2c_host_error_intr.3672706334 |
|
|
Aug 28 10:46:01 PM UTC 24 |
Aug 28 10:46:11 PM UTC 24 |
540748895 ps |
T1554 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_reset_acq.2252084699 |
|
|
Aug 28 10:46:12 PM UTC 24 |
Aug 28 10:46:16 PM UTC 24 |
321828115 ps |
T1555 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/45.i2c_target_smoke.2285053194 |
|
|
Aug 28 10:46:03 PM UTC 24 |
Aug 28 10:46:16 PM UTC 24 |
1326985246 ps |
T203 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_host_stress_all.3908996636 |
|
|
Aug 28 10:38:14 PM UTC 24 |
Aug 28 10:46:17 PM UTC 24 |
12509605732 ps |
T1556 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/45.i2c_target_fifo_reset_tx.2084462797 |
|
|
Aug 28 10:46:14 PM UTC 24 |
Aug 28 10:46:18 PM UTC 24 |
1030811027 ps |
T1557 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/45.i2c_target_intr_smoke.2127433854 |
|
|
Aug 28 10:46:07 PM UTC 24 |
Aug 28 10:46:18 PM UTC 24 |
4508494857 ps |
T1558 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/45.i2c_host_perf_precise.4027342711 |
|
|
Aug 28 10:45:58 PM UTC 24 |
Aug 28 10:46:20 PM UTC 24 |
1504512936 ps |
T1559 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/42.i2c_host_fifo_full.3131137001 |
|
|
Aug 28 10:44:09 PM UTC 24 |
Aug 28 10:46:31 PM UTC 24 |
20027547455 ps |
T1560 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/45.i2c_target_timeout.3831493892 |
|
|
Aug 28 10:46:11 PM UTC 24 |
Aug 28 10:46:23 PM UTC 24 |
1234420182 ps |
T1561 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/44.i2c_host_fifo_full.2959213044 |
|
|
Aug 28 10:45:15 PM UTC 24 |
Aug 28 10:46:23 PM UTC 24 |
7217878282 ps |
T1562 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/45.i2c_target_perf.313587712 |
|
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Aug 28 10:46:17 PM UTC 24 |
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Aug 28 10:46:23 PM UTC 24 |
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Aug 28 10:46:23 PM UTC 24 |
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Aug 28 10:47:43 PM UTC 24 |
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