T1087 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_target_nack_txstretch.434076139 |
|
|
Aug 28 10:37:15 PM UTC 24 |
Aug 28 10:37:18 PM UTC 24 |
690030618 ps |
T1088 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_target_nack_acqfull.2942573565 |
|
|
Aug 28 10:36:37 PM UTC 24 |
Aug 28 10:36:43 PM UTC 24 |
949331262 ps |
T1089 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_host_smoke.110308333 |
|
|
Aug 28 10:36:06 PM UTC 24 |
Aug 28 10:36:43 PM UTC 24 |
5017977463 ps |
T1090 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_target_nack_acqfull_addr.2531585903 |
|
|
Aug 28 10:36:38 PM UTC 24 |
Aug 28 10:36:44 PM UTC 24 |
557594886 ps |
T1091 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_fmt.419494629 |
|
|
Aug 28 10:36:42 PM UTC 24 |
Aug 28 10:36:45 PM UTC 24 |
222531948 ps |
T1092 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_host_stretch_timeout.2251108436 |
|
|
Aug 28 10:36:11 PM UTC 24 |
Aug 28 10:36:46 PM UTC 24 |
2506838909 ps |
T1093 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_target_smoke.339081978 |
|
|
Aug 28 10:36:13 PM UTC 24 |
Aug 28 10:36:48 PM UTC 24 |
948029337 ps |
T1094 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_host_error_intr.3303307462 |
|
|
Aug 28 10:36:45 PM UTC 24 |
Aug 28 10:36:48 PM UTC 24 |
220581853 ps |
T1095 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_host_perf_precise.2679469382 |
|
|
Aug 28 10:36:44 PM UTC 24 |
Aug 28 10:36:49 PM UTC 24 |
274583163 ps |
T1096 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/25.i2c_host_perf.2256052822 |
|
|
Aug 28 10:33:31 PM UTC 24 |
Aug 28 10:36:51 PM UTC 24 |
12668171717 ps |
T1097 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_watermark.1367643418 |
|
|
Aug 28 10:35:32 PM UTC 24 |
Aug 28 10:36:53 PM UTC 24 |
23682473171 ps |
T1098 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_reset_rx.615783816 |
|
|
Aug 28 10:36:43 PM UTC 24 |
Aug 28 10:36:54 PM UTC 24 |
2138248559 ps |
T1099 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_host_stretch_timeout.1774505754 |
|
|
Aug 28 10:36:44 PM UTC 24 |
Aug 28 10:36:54 PM UTC 24 |
517030562 ps |
T1100 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_fmt_empty.3067784072 |
|
|
Aug 28 10:36:43 PM UTC 24 |
Aug 28 10:37:00 PM UTC 24 |
514892124 ps |
T1101 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_target_smoke.3927984101 |
|
|
Aug 28 10:36:49 PM UTC 24 |
Aug 28 10:37:04 PM UTC 24 |
3126985150 ps |
T1102 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_target_stress_rd.1997013754 |
|
|
Aug 28 10:36:15 PM UTC 24 |
Aug 28 10:37:05 PM UTC 24 |
977853978 ps |
T1103 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/22.i2c_host_fifo_watermark.2378355710 |
|
|
Aug 28 10:31:16 PM UTC 24 |
Aug 28 10:37:06 PM UTC 24 |
33747311279 ps |
T1104 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_reset_acq.2765505175 |
|
|
Aug 28 10:37:03 PM UTC 24 |
Aug 28 10:37:06 PM UTC 24 |
227491648 ps |
T1105 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_host_fifo_full.3973034481 |
|
|
Aug 28 10:35:02 PM UTC 24 |
Aug 28 10:37:07 PM UTC 24 |
43648528622 ps |
T1106 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_target_intr_smoke.4061235179 |
|
|
Aug 28 10:36:54 PM UTC 24 |
Aug 28 10:37:07 PM UTC 24 |
2796462694 ps |
T1107 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_reset_tx.1007359194 |
|
|
Aug 28 10:37:04 PM UTC 24 |
Aug 28 10:37:08 PM UTC 24 |
376902180 ps |
T1108 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_target_timeout.3214653502 |
|
|
Aug 28 10:36:55 PM UTC 24 |
Aug 28 10:37:09 PM UTC 24 |
2843691989 ps |
T1109 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_target_hrst.2137839651 |
|
|
Aug 28 10:37:07 PM UTC 24 |
Aug 28 10:37:11 PM UTC 24 |
1082332255 ps |
T1110 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_target_stretch.3320996057 |
|
|
Aug 28 10:36:52 PM UTC 24 |
Aug 28 10:37:11 PM UTC 24 |
3204992138 ps |
T1111 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_watermarks_tx.4020048424 |
|
|
Aug 28 10:37:10 PM UTC 24 |
Aug 28 10:37:13 PM UTC 24 |
266092464 ps |
T1112 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_host_override.3842811658 |
|
|
Aug 28 10:37:17 PM UTC 24 |
Aug 28 10:37:19 PM UTC 24 |
17665346 ps |
T1113 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_target_fifo_watermarks_acq.4048183891 |
|
|
Aug 28 10:37:09 PM UTC 24 |
Aug 28 10:37:14 PM UTC 24 |
457516889 ps |
T1114 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_target_perf.24388264 |
|
|
Aug 28 10:37:04 PM UTC 24 |
Aug 28 10:37:15 PM UTC 24 |
843121581 ps |
T1115 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_target_bad_addr.1803357547 |
|
|
Aug 28 10:37:07 PM UTC 24 |
Aug 28 10:37:15 PM UTC 24 |
1584588209 ps |
T1116 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_target_tx_stretch_ctrl.282465544 |
|
|
Aug 28 10:37:12 PM UTC 24 |
Aug 28 10:37:16 PM UTC 24 |
74236280 ps |
T1117 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_alert_test.2515680657 |
|
|
Aug 28 10:37:15 PM UTC 24 |
Aug 28 10:37:17 PM UTC 24 |
15883798 ps |
T1118 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_target_nack_acqfull.1597013733 |
|
|
Aug 28 10:37:12 PM UTC 24 |
Aug 28 10:37:17 PM UTC 24 |
1874021004 ps |
T1119 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_target_smbus_maxlen.2458529666 |
|
|
Aug 28 10:37:12 PM UTC 24 |
Aug 28 10:37:18 PM UTC 24 |
1027012159 ps |
T1120 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_target_nack_acqfull_addr.954200976 |
|
|
Aug 28 10:37:14 PM UTC 24 |
Aug 28 10:37:21 PM UTC 24 |
1150423080 ps |
T1121 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_reset_fmt.4028620969 |
|
|
Aug 28 10:37:19 PM UTC 24 |
Aug 28 10:37:22 PM UTC 24 |
196047914 ps |
T271 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_host_may_nack.2414507076 |
|
|
Aug 28 10:37:08 PM UTC 24 |
Aug 28 10:37:22 PM UTC 24 |
708129382 ps |
T1122 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_target_stress_rd.2903261315 |
|
|
Aug 28 10:36:50 PM UTC 24 |
Aug 28 10:37:24 PM UTC 24 |
630606955 ps |
T1123 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_target_stress_all.3512994821 |
|
|
Aug 28 10:36:27 PM UTC 24 |
Aug 28 10:37:30 PM UTC 24 |
7330854987 ps |
T1124 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_reset_rx.3166773508 |
|
|
Aug 28 10:37:20 PM UTC 24 |
Aug 28 10:37:31 PM UTC 24 |
1728079171 ps |
T1125 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/8.i2c_target_stress_all.3781243249 |
|
|
Aug 28 10:24:25 PM UTC 24 |
Aug 28 10:37:31 PM UTC 24 |
40457389453 ps |
T1126 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/20.i2c_target_stress_wr.2932815641 |
|
|
Aug 28 10:30:10 PM UTC 24 |
Aug 28 10:37:33 PM UTC 24 |
58167010217 ps |
T1127 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_host_perf_precise.3561052542 |
|
|
Aug 28 10:36:11 PM UTC 24 |
Aug 28 10:37:33 PM UTC 24 |
23353855232 ps |
T1128 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_host_error_intr.6857636 |
|
|
Aug 28 10:37:30 PM UTC 24 |
Aug 28 10:37:33 PM UTC 24 |
168293249 ps |
T1129 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_host_stretch_timeout.1929475589 |
|
|
Aug 28 10:37:25 PM UTC 24 |
Aug 28 10:37:37 PM UTC 24 |
2609884555 ps |
T1130 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_host_smoke.1958254111 |
|
|
Aug 28 10:36:40 PM UTC 24 |
Aug 28 10:37:38 PM UTC 24 |
2104768104 ps |
T1131 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_target_stress_wr.2039245533 |
|
|
Aug 28 10:34:00 PM UTC 24 |
Aug 28 10:37:39 PM UTC 24 |
31029128567 ps |
T1132 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_host_perf.3655472332 |
|
|
Aug 28 10:37:22 PM UTC 24 |
Aug 28 10:37:40 PM UTC 24 |
2887332575 ps |
T1133 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_fmt_empty.1971727527 |
|
|
Aug 28 10:37:19 PM UTC 24 |
Aug 28 10:37:41 PM UTC 24 |
372092528 ps |
T1134 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_reset_acq.1762324529 |
|
|
Aug 28 10:37:42 PM UTC 24 |
Aug 28 10:37:45 PM UTC 24 |
346825399 ps |
T1135 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_target_stretch.310274446 |
|
|
Aug 28 10:37:35 PM UTC 24 |
Aug 28 10:37:45 PM UTC 24 |
3748322728 ps |
T1136 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_reset_tx.3041051419 |
|
|
Aug 28 10:37:45 PM UTC 24 |
Aug 28 10:37:47 PM UTC 24 |
159305250 ps |
T1137 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_target_intr_smoke.378944871 |
|
|
Aug 28 10:37:38 PM UTC 24 |
Aug 28 10:37:50 PM UTC 24 |
1317952286 ps |
T1138 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_target_smoke.3608727260 |
|
|
Aug 28 10:37:32 PM UTC 24 |
Aug 28 10:37:52 PM UTC 24 |
3191487483 ps |
T1139 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_target_timeout.1286621274 |
|
|
Aug 28 10:37:40 PM UTC 24 |
Aug 28 10:37:53 PM UTC 24 |
4484542775 ps |
T1140 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_target_perf.967684754 |
|
|
Aug 28 10:37:46 PM UTC 24 |
Aug 28 10:37:55 PM UTC 24 |
789404304 ps |
T1141 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_target_bad_addr.771818221 |
|
|
Aug 28 10:37:48 PM UTC 24 |
Aug 28 10:37:57 PM UTC 24 |
1168357417 ps |
T1142 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_target_stress_rd.4011725810 |
|
|
Aug 28 10:37:33 PM UTC 24 |
Aug 28 10:37:58 PM UTC 24 |
1828342922 ps |
T1143 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/27.i2c_host_perf_precise.2696563040 |
|
|
Aug 28 10:34:30 PM UTC 24 |
Aug 28 10:37:59 PM UTC 24 |
24698930982 ps |
T1144 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_host_smoke.3963969963 |
|
|
Aug 28 10:37:16 PM UTC 24 |
Aug 28 10:38:02 PM UTC 24 |
1922841882 ps |
T1145 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_host_perf_precise.1057299250 |
|
|
Aug 28 10:37:23 PM UTC 24 |
Aug 28 10:38:05 PM UTC 24 |
2478078308 ps |
T1146 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_watermarks_tx.4066734574 |
|
|
Aug 28 10:38:04 PM UTC 24 |
Aug 28 10:38:07 PM UTC 24 |
531679902 ps |
T1147 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_host_perf.2186593439 |
|
|
Aug 28 10:36:44 PM UTC 24 |
Aug 28 10:38:07 PM UTC 24 |
7379221768 ps |
T1148 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_target_tx_stretch_ctrl.104366356 |
|
|
Aug 28 10:38:04 PM UTC 24 |
Aug 28 10:38:08 PM UTC 24 |
122487664 ps |
T1149 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_target_smoke.3511815713 |
|
|
Aug 28 10:38:57 PM UTC 24 |
Aug 28 10:39:18 PM UTC 24 |
3962751572 ps |
T1150 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_target_nack_acqfull_addr.252974543 |
|
|
Aug 28 10:38:04 PM UTC 24 |
Aug 28 10:38:08 PM UTC 24 |
1014283125 ps |
T1151 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_target_smbus_maxlen.179755151 |
|
|
Aug 28 10:38:04 PM UTC 24 |
Aug 28 10:38:09 PM UTC 24 |
969203138 ps |
T1152 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_target_fifo_watermarks_acq.2990411562 |
|
|
Aug 28 10:38:04 PM UTC 24 |
Aug 28 10:38:09 PM UTC 24 |
1805130247 ps |
T1153 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_alert_test.2713723367 |
|
|
Aug 28 10:38:07 PM UTC 24 |
Aug 28 10:38:09 PM UTC 24 |
24557147 ps |
T1154 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_target_nack_acqfull.2832957634 |
|
|
Aug 28 10:38:04 PM UTC 24 |
Aug 28 10:38:09 PM UTC 24 |
10588169509 ps |
T202 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_host_stress_all.3355113306 |
|
|
Aug 28 10:35:05 PM UTC 24 |
Aug 28 10:39:17 PM UTC 24 |
36305484510 ps |
T1155 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_host_override.778898194 |
|
|
Aug 28 10:38:08 PM UTC 24 |
Aug 28 10:38:10 PM UTC 24 |
83030173 ps |
T1156 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_reset_fmt.2614798027 |
|
|
Aug 28 10:38:09 PM UTC 24 |
Aug 28 10:38:12 PM UTC 24 |
1102392209 ps |
T1157 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_overflow.2498053552 |
|
|
Aug 28 10:37:19 PM UTC 24 |
Aug 28 10:38:13 PM UTC 24 |
13976660704 ps |
T1158 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_host_fifo_full.3219930558 |
|
|
Aug 28 10:33:59 PM UTC 24 |
Aug 28 10:38:14 PM UTC 24 |
10702262916 ps |
T1159 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_host_perf_precise.3616799054 |
|
|
Aug 28 10:38:11 PM UTC 24 |
Aug 28 10:38:16 PM UTC 24 |
222571705 ps |
T1160 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_host_stretch_timeout.370119966 |
|
|
Aug 28 10:38:11 PM UTC 24 |
Aug 28 10:38:20 PM UTC 24 |
1042693595 ps |
T261 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_host_stress_all.4279808812 |
|
|
Aug 28 10:33:59 PM UTC 24 |
Aug 28 10:38:21 PM UTC 24 |
139825688940 ps |
T1161 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_reset_rx.239723368 |
|
|
Aug 28 10:38:10 PM UTC 24 |
Aug 28 10:38:24 PM UTC 24 |
168114461 ps |
T1162 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_host_may_nack.1274358404 |
|
|
Aug 28 10:38:04 PM UTC 24 |
Aug 28 10:38:27 PM UTC 24 |
506827620 ps |
T1163 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_host_error_intr.1649553645 |
|
|
Aug 28 10:38:13 PM UTC 24 |
Aug 28 10:38:27 PM UTC 24 |
836280737 ps |
T1164 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_target_stretch.1797571591 |
|
|
Aug 28 10:38:21 PM UTC 24 |
Aug 28 10:38:27 PM UTC 24 |
1847081552 ps |
T1165 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_target_smoke.826594483 |
|
|
Aug 28 10:38:15 PM UTC 24 |
Aug 28 10:38:29 PM UTC 24 |
747364158 ps |
T1166 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_fmt_empty.1976986193 |
|
|
Aug 28 10:38:09 PM UTC 24 |
Aug 28 10:38:30 PM UTC 24 |
566607882 ps |
T1167 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_overflow.955072408 |
|
|
Aug 28 10:36:09 PM UTC 24 |
Aug 28 10:38:31 PM UTC 24 |
8136152705 ps |
T1168 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_target_stress_all.3944189797 |
|
|
Aug 28 10:37:05 PM UTC 24 |
Aug 28 10:38:31 PM UTC 24 |
26220987422 ps |
T1169 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/26.i2c_host_perf.2277278807 |
|
|
Aug 28 10:33:59 PM UTC 24 |
Aug 28 10:38:32 PM UTC 24 |
26005337172 ps |
T1170 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_reset_acq.3671430792 |
|
|
Aug 28 10:38:30 PM UTC 24 |
Aug 28 10:38:32 PM UTC 24 |
462388528 ps |
T1171 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_target_intr_smoke.3603084735 |
|
|
Aug 28 10:38:24 PM UTC 24 |
Aug 28 10:38:33 PM UTC 24 |
15419421448 ps |
T1172 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_target_intr_stress_wr.506334866 |
|
|
Aug 28 10:37:39 PM UTC 24 |
Aug 28 10:38:34 PM UTC 24 |
9350469923 ps |
T1173 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_reset_tx.1020882227 |
|
|
Aug 28 10:38:32 PM UTC 24 |
Aug 28 10:38:34 PM UTC 24 |
220142180 ps |
T1174 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_full.944644393 |
|
|
Aug 28 10:36:43 PM UTC 24 |
Aug 28 10:38:35 PM UTC 24 |
6197814535 ps |
T1175 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_watermarks_tx.1325648293 |
|
|
Aug 28 10:38:35 PM UTC 24 |
Aug 28 10:38:39 PM UTC 24 |
1109338793 ps |
T1176 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_target_fifo_watermarks_acq.1827585439 |
|
|
Aug 28 10:38:35 PM UTC 24 |
Aug 28 10:38:39 PM UTC 24 |
797997396 ps |
T1177 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_target_bad_addr.4280730308 |
|
|
Aug 28 10:38:32 PM UTC 24 |
Aug 28 10:38:40 PM UTC 24 |
2290201806 ps |
T1178 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_target_perf.2642082300 |
|
|
Aug 28 10:38:32 PM UTC 24 |
Aug 28 10:38:42 PM UTC 24 |
2862706947 ps |
T1179 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_target_tx_stretch_ctrl.444270738 |
|
|
Aug 28 10:38:36 PM UTC 24 |
Aug 28 10:38:43 PM UTC 24 |
140172755 ps |
T1180 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_target_timeout.2697696734 |
|
|
Aug 28 10:38:28 PM UTC 24 |
Aug 28 10:38:43 PM UTC 24 |
2473523290 ps |
T1181 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_target_smbus_maxlen.46833153 |
|
|
Aug 28 10:38:38 PM UTC 24 |
Aug 28 10:38:44 PM UTC 24 |
577134670 ps |
T1182 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_target_stress_all.611333662 |
|
|
Aug 28 10:37:46 PM UTC 24 |
Aug 28 10:38:45 PM UTC 24 |
78897271779 ps |
T1183 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_alert_test.2604853936 |
|
|
Aug 28 10:38:43 PM UTC 24 |
Aug 28 10:38:45 PM UTC 24 |
44129161 ps |
T1184 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_target_stress_wr.2059368438 |
|
|
Aug 28 10:37:33 PM UTC 24 |
Aug 28 10:38:45 PM UTC 24 |
26447153873 ps |
T1185 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_target_nack_acqfull_addr.2914858359 |
|
|
Aug 28 10:38:41 PM UTC 24 |
Aug 28 10:38:46 PM UTC 24 |
899266336 ps |
T1186 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_host_override.3359029240 |
|
|
Aug 28 10:38:44 PM UTC 24 |
Aug 28 10:38:46 PM UTC 24 |
43927056 ps |
T59 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_target_nack_acqfull.1842063507 |
|
|
Aug 28 10:38:40 PM UTC 24 |
Aug 28 10:38:46 PM UTC 24 |
2875120453 ps |
T1187 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_reset_fmt.4249928119 |
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|
Aug 28 10:38:46 PM UTC 24 |
Aug 28 10:38:50 PM UTC 24 |
122556658 ps |
T1188 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_host_smoke.2807491151 |
|
|
Aug 28 10:38:08 PM UTC 24 |
Aug 28 10:38:52 PM UTC 24 |
1668595169 ps |
T1189 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_watermark.3390240642 |
|
|
Aug 28 10:37:19 PM UTC 24 |
Aug 28 10:38:53 PM UTC 24 |
7903274380 ps |
T1190 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_host_error_intr.1380028587 |
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|
Aug 28 10:38:53 PM UTC 24 |
Aug 28 10:38:56 PM UTC 24 |
83905159 ps |
T1191 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_host_fifo_full.4175062809 |
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|
Aug 28 10:35:35 PM UTC 24 |
Aug 28 10:39:00 PM UTC 24 |
3404184537 ps |
T1192 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_fmt_empty.1218762176 |
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|
Aug 28 10:38:46 PM UTC 24 |
Aug 28 10:39:01 PM UTC 24 |
838583094 ps |
T1193 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_reset_rx.211314273 |
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|
Aug 28 10:38:46 PM UTC 24 |
Aug 28 10:39:03 PM UTC 24 |
937327354 ps |
T1194 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_host_may_nack.571021306 |
|
|
Aug 28 10:38:34 PM UTC 24 |
Aug 28 10:39:03 PM UTC 24 |
2941654567 ps |
T1195 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_overflow.687856505 |
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|
Aug 28 10:36:42 PM UTC 24 |
Aug 28 10:39:07 PM UTC 24 |
4204093316 ps |
T1196 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_reset_acq.135286120 |
|
|
Aug 28 10:39:14 PM UTC 24 |
Aug 28 10:39:18 PM UTC 24 |
378926411 ps |
T1197 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_target_intr_stress_wr.3445897284 |
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|
Aug 28 10:38:27 PM UTC 24 |
Aug 28 10:39:19 PM UTC 24 |
13834313247 ps |
T1198 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_overflow.2473265221 |
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|
Aug 28 10:38:09 PM UTC 24 |
Aug 28 10:39:19 PM UTC 24 |
4195539406 ps |
T1199 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_target_stress_rd.3577978895 |
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|
Aug 28 10:38:21 PM UTC 24 |
Aug 28 10:39:19 PM UTC 24 |
1294930780 ps |
T1200 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_target_intr_smoke.1950526231 |
|
|
Aug 28 10:39:04 PM UTC 24 |
Aug 28 10:39:20 PM UTC 24 |
2915609932 ps |
T1201 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_target_timeout.1479887165 |
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|
Aug 28 10:39:07 PM UTC 24 |
Aug 28 10:39:21 PM UTC 24 |
5620249628 ps |
T1202 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_reset_tx.2749027897 |
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|
Aug 28 10:39:19 PM UTC 24 |
Aug 28 10:39:21 PM UTC 24 |
420079445 ps |
T1203 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_target_stress_rd.1512040725 |
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|
Aug 28 10:39:02 PM UTC 24 |
Aug 28 10:39:22 PM UTC 24 |
944823592 ps |
T1204 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_full.348333570 |
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|
Aug 28 10:36:10 PM UTC 24 |
Aug 28 10:39:24 PM UTC 24 |
52307524824 ps |
T1205 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_host_stretch_timeout.3715333911 |
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|
Aug 28 10:38:51 PM UTC 24 |
Aug 28 10:39:24 PM UTC 24 |
2178706405 ps |
T1206 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_target_hrst.1771394348 |
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|
Aug 28 10:39:20 PM UTC 24 |
Aug 28 10:39:25 PM UTC 24 |
1577007210 ps |
T1207 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_target_perf.3545161168 |
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|
Aug 28 10:39:19 PM UTC 24 |
Aug 28 10:39:25 PM UTC 24 |
492357928 ps |
T1208 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_watermarks_tx.2071149100 |
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|
Aug 28 10:39:22 PM UTC 24 |
Aug 28 10:39:26 PM UTC 24 |
202685702 ps |
T1209 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/31.i2c_host_fifo_watermark.1068190035 |
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|
Aug 28 10:36:41 PM UTC 24 |
Aug 28 10:39:26 PM UTC 24 |
24531787386 ps |
T1210 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_target_fifo_watermarks_acq.1020452310 |
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|
Aug 28 10:39:22 PM UTC 24 |
Aug 28 10:39:26 PM UTC 24 |
2968939537 ps |
T1211 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_alert_test.409132123 |
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|
Aug 28 10:39:27 PM UTC 24 |
Aug 28 10:39:28 PM UTC 24 |
16528585 ps |
T1212 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_host_override.413018103 |
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|
Aug 28 10:39:27 PM UTC 24 |
Aug 28 10:39:29 PM UTC 24 |
18347547 ps |
T1213 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_target_bad_addr.2184613390 |
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|
Aug 28 10:39:20 PM UTC 24 |
Aug 28 10:39:29 PM UTC 24 |
1007726368 ps |
T1214 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_watermarks_acq.1898762902 |
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|
Aug 28 10:40:23 PM UTC 24 |
Aug 28 10:40:28 PM UTC 24 |
437482030 ps |
T1215 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_target_stretch.3141015778 |
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|
Aug 28 10:39:02 PM UTC 24 |
Aug 28 10:39:29 PM UTC 24 |
646876163 ps |
T1216 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_target_nack_acqfull_addr.2279441341 |
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|
Aug 28 10:39:25 PM UTC 24 |
Aug 28 10:39:30 PM UTC 24 |
406757070 ps |
T1217 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_target_smbus_maxlen.328108528 |
|
|
Aug 28 10:39:24 PM UTC 24 |
Aug 28 10:39:30 PM UTC 24 |
516885584 ps |
T1218 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_target_nack_acqfull.2119672533 |
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|
Aug 28 10:39:24 PM UTC 24 |
Aug 28 10:39:30 PM UTC 24 |
983553187 ps |
T1219 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_target_stress_all.1091620366 |
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|
Aug 28 10:38:32 PM UTC 24 |
Aug 28 10:39:30 PM UTC 24 |
32604724501 ps |
T1220 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_reset_fmt.4264859332 |
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|
Aug 28 10:39:30 PM UTC 24 |
Aug 28 10:39:33 PM UTC 24 |
138870760 ps |
T1221 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_host_perf_precise.2131110132 |
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|
Aug 28 10:39:31 PM UTC 24 |
Aug 28 10:39:34 PM UTC 24 |
79889199 ps |
T1222 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/22.i2c_host_stress_all.225530294 |
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|
Aug 28 10:31:26 PM UTC 24 |
Aug 28 10:39:34 PM UTC 24 |
12789201949 ps |
T1223 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_target_tx_stretch_ctrl.1251845273 |
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|
Aug 28 10:39:23 PM UTC 24 |
Aug 28 10:39:38 PM UTC 24 |
615665078 ps |
T1224 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_host_error_intr.2412062399 |
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|
Aug 28 10:39:31 PM UTC 24 |
Aug 28 10:39:38 PM UTC 24 |
273486736 ps |
T1225 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_host_may_nack.3551512325 |
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|
Aug 28 10:39:21 PM UTC 24 |
Aug 28 10:39:40 PM UTC 24 |
1437204021 ps |
T1226 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/29.i2c_target_stress_all.3486922551 |
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|
Aug 28 10:35:55 PM UTC 24 |
Aug 28 10:39:42 PM UTC 24 |
16704023178 ps |
T1227 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_host_perf.2943890111 |
|
|
Aug 28 10:38:47 PM UTC 24 |
Aug 28 10:39:44 PM UTC 24 |
6800540007 ps |
T1228 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_fmt_empty.1570840504 |
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|
Aug 28 10:39:30 PM UTC 24 |
Aug 28 10:39:44 PM UTC 24 |
478288944 ps |
T1229 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_reset_rx.1910924797 |
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|
Aug 28 10:39:30 PM UTC 24 |
Aug 28 10:39:44 PM UTC 24 |
184855315 ps |
T1230 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_target_stress_rd.2508119355 |
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|
Aug 28 10:39:39 PM UTC 24 |
Aug 28 10:39:45 PM UTC 24 |
326025136 ps |
T1231 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_host_stretch_timeout.4080321490 |
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|
Aug 28 10:39:31 PM UTC 24 |
Aug 28 10:39:47 PM UTC 24 |
2143442981 ps |
T1232 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_overflow.2523695982 |
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|
Aug 28 10:38:46 PM UTC 24 |
Aug 28 10:39:47 PM UTC 24 |
10518226631 ps |
T1233 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_reset_acq.1305303293 |
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|
Aug 28 10:39:45 PM UTC 24 |
Aug 28 10:39:47 PM UTC 24 |
370737578 ps |
T1234 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_target_stretch.1014926482 |
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|
Aug 28 10:39:39 PM UTC 24 |
Aug 28 10:39:48 PM UTC 24 |
1263210360 ps |
T1235 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_host_perf.2026602802 |
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|
Aug 28 10:39:31 PM UTC 24 |
Aug 28 10:39:49 PM UTC 24 |
4147796969 ps |
T1236 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_reset_tx.2972343245 |
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|
Aug 28 10:39:46 PM UTC 24 |
Aug 28 10:39:50 PM UTC 24 |
274225822 ps |
T1237 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_target_intr_smoke.614096786 |
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|
Aug 28 10:39:41 PM UTC 24 |
Aug 28 10:39:51 PM UTC 24 |
1179557963 ps |
T84 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_host_mode_toggle.2436144749 |
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|
Aug 28 10:39:50 PM UTC 24 |
Aug 28 10:39:53 PM UTC 24 |
178286471 ps |
T1238 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/16.i2c_host_perf_precise.4040789901 |
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|
Aug 28 10:28:07 PM UTC 24 |
Aug 28 10:39:53 PM UTC 24 |
24235257923 ps |
T1239 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_target_perf.3552908271 |
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|
Aug 28 10:39:47 PM UTC 24 |
Aug 28 10:39:54 PM UTC 24 |
2750619604 ps |
T1240 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_watermarks_tx.691653965 |
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|
Aug 28 10:39:52 PM UTC 24 |
Aug 28 10:39:55 PM UTC 24 |
106607493 ps |
T1241 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_target_stress_wr.2951386929 |
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|
Aug 28 10:38:17 PM UTC 24 |
Aug 28 10:39:55 PM UTC 24 |
38003876918 ps |
T1242 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_target_timeout.3270370869 |
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|
Aug 28 10:39:45 PM UTC 24 |
Aug 28 10:39:55 PM UTC 24 |
4223044202 ps |
T1243 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_target_bad_addr.1947185522 |
|
|
Aug 28 10:39:48 PM UTC 24 |
Aug 28 10:39:55 PM UTC 24 |
2249433909 ps |
T1244 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_target_fifo_watermarks_acq.2087393209 |
|
|
Aug 28 10:39:51 PM UTC 24 |
Aug 28 10:39:56 PM UTC 24 |
600774889 ps |
T1245 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_host_may_nack.1635797710 |
|
|
Aug 28 10:39:51 PM UTC 24 |
Aug 28 10:39:56 PM UTC 24 |
300158403 ps |
T1246 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_target_intr_stress_wr.2076532252 |
|
|
Aug 28 10:39:43 PM UTC 24 |
Aug 28 10:39:57 PM UTC 24 |
15807430688 ps |
T1247 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_target_tx_stretch_ctrl.3825518707 |
|
|
Aug 28 10:39:54 PM UTC 24 |
Aug 28 10:39:57 PM UTC 24 |
50785880 ps |
T1248 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_target_smoke.1811718770 |
|
|
Aug 28 10:39:36 PM UTC 24 |
Aug 28 10:39:57 PM UTC 24 |
1344393602 ps |
T1249 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_alert_test.4163463051 |
|
|
Aug 28 10:39:56 PM UTC 24 |
Aug 28 10:39:58 PM UTC 24 |
18886504 ps |
T1250 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_target_smbus_maxlen.1487751470 |
|
|
Aug 28 10:39:54 PM UTC 24 |
Aug 28 10:39:59 PM UTC 24 |
509130827 ps |
T1251 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_host_override.1355617696 |
|
|
Aug 28 10:39:57 PM UTC 24 |
Aug 28 10:39:59 PM UTC 24 |
131267157 ps |
T1252 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_target_nack_acqfull.662471048 |
|
|
Aug 28 10:39:55 PM UTC 24 |
Aug 28 10:39:59 PM UTC 24 |
529241169 ps |
T1253 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_target_nack_txstretch.2133543706 |
|
|
Aug 28 10:39:56 PM UTC 24 |
Aug 28 10:40:00 PM UTC 24 |
521055396 ps |
T1254 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_reset_fmt.2663358747 |
|
|
Aug 28 10:39:58 PM UTC 24 |
Aug 28 10:40:00 PM UTC 24 |
117601840 ps |
T1255 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_target_nack_acqfull_addr.729007702 |
|
|
Aug 28 10:39:55 PM UTC 24 |
Aug 28 10:40:01 PM UTC 24 |
518279003 ps |
T1256 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_host_perf_precise.1640769456 |
|
|
Aug 28 10:40:00 PM UTC 24 |
Aug 28 10:40:03 PM UTC 24 |
308537604 ps |
T1257 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_host_smoke.2860660624 |
|
|
Aug 28 10:38:44 PM UTC 24 |
Aug 28 10:40:04 PM UTC 24 |
5421820703 ps |
T1258 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_host_perf_precise.3389389477 |
|
|
Aug 28 10:38:47 PM UTC 24 |
Aug 28 10:40:06 PM UTC 24 |
6151465174 ps |
T1259 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_host_error_intr.64886278 |
|
|
Aug 28 10:40:01 PM UTC 24 |
Aug 28 10:40:07 PM UTC 24 |
311079505 ps |
T1260 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_fmt_empty.3734228187 |
|
|
Aug 28 10:39:59 PM UTC 24 |
Aug 28 10:40:11 PM UTC 24 |
526207833 ps |
T1261 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_target_smoke.1203618908 |
|
|
Aug 28 10:40:01 PM UTC 24 |
Aug 28 10:40:11 PM UTC 24 |
390844327 ps |
T1262 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/28.i2c_target_stress_all.3792877559 |
|
|
Aug 28 10:35:19 PM UTC 24 |
Aug 28 10:40:11 PM UTC 24 |
19095105475 ps |
T1263 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_reset_rx.2859050457 |
|
|
Aug 28 10:39:59 PM UTC 24 |
Aug 28 10:40:17 PM UTC 24 |
993754956 ps |
T1264 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_target_stress_wr.2606141406 |
|
|
Aug 28 10:40:04 PM UTC 24 |
Aug 28 10:40:17 PM UTC 24 |
10872722251 ps |
T1265 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_target_stretch.745702613 |
|
|
Aug 28 10:40:07 PM UTC 24 |
Aug 28 10:40:19 PM UTC 24 |
1658006517 ps |
T1266 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_target_intr_smoke.179704087 |
|
|
Aug 28 10:40:09 PM UTC 24 |
Aug 28 10:40:19 PM UTC 24 |
4055998261 ps |
T1267 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_host_perf.1447828144 |
|
|
Aug 28 10:40:00 PM UTC 24 |
Aug 28 10:40:20 PM UTC 24 |
4779658496 ps |
T1268 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_reset_acq.4205301589 |
|
|
Aug 28 10:40:18 PM UTC 24 |
Aug 28 10:40:20 PM UTC 24 |
397158170 ps |
T1269 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_reset_tx.1140690268 |
|
|
Aug 28 10:40:18 PM UTC 24 |
Aug 28 10:40:20 PM UTC 24 |
226679825 ps |
T1270 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_target_timeout.396958961 |
|
|
Aug 28 10:40:12 PM UTC 24 |
Aug 28 10:40:23 PM UTC 24 |
16249082010 ps |
T1271 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_target_perf.3092413458 |
|
|
Aug 28 10:40:18 PM UTC 24 |
Aug 28 10:40:24 PM UTC 24 |
585253085 ps |
T1272 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_target_fifo_watermarks_tx.2725243151 |
|
|
Aug 28 10:40:25 PM UTC 24 |
Aug 28 10:40:29 PM UTC 24 |
871590831 ps |
T291 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_host_may_nack.25983738 |
|
|
Aug 28 10:40:21 PM UTC 24 |
Aug 28 10:40:29 PM UTC 24 |
429181004 ps |
T1273 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_target_bad_addr.1934483884 |
|
|
Aug 28 10:40:20 PM UTC 24 |
Aug 28 10:40:31 PM UTC 24 |
2211451394 ps |
T1274 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_target_smbus_maxlen.1954099716 |
|
|
Aug 28 10:40:30 PM UTC 24 |
Aug 28 10:40:35 PM UTC 24 |
402091213 ps |
T1275 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_target_nack_txstretch.399050326 |
|
|
Aug 28 10:40:32 PM UTC 24 |
Aug 28 10:40:35 PM UTC 24 |
178765378 ps |
T1276 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_target_nack_acqfull_addr.3237775780 |
|
|
Aug 28 10:40:31 PM UTC 24 |
Aug 28 10:40:37 PM UTC 24 |
552794675 ps |
T60 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_target_nack_acqfull.76988469 |
|
|
Aug 28 10:40:31 PM UTC 24 |
Aug 28 10:40:38 PM UTC 24 |
600854461 ps |
T1277 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_alert_test.1667970822 |
|
|
Aug 28 10:40:36 PM UTC 24 |
Aug 28 10:40:38 PM UTC 24 |
35315213 ps |
T1278 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_host_smoke.832348398 |
|
|
Aug 28 10:39:56 PM UTC 24 |
Aug 28 10:40:38 PM UTC 24 |
1836977915 ps |
T292 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_host_stretch_timeout.2346716829 |
|
|
Aug 28 10:40:00 PM UTC 24 |
Aug 28 10:40:39 PM UTC 24 |
2942778386 ps |
T1279 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_host_override.243904369 |
|
|
Aug 28 10:40:38 PM UTC 24 |
Aug 28 10:40:40 PM UTC 24 |
17568066 ps |
T1280 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_target_tx_stretch_ctrl.3102226299 |
|
|
Aug 28 10:40:30 PM UTC 24 |
Aug 28 10:40:40 PM UTC 24 |
337255518 ps |
T1281 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_host_fifo_overflow.2555272650 |
|
|
Aug 28 10:39:29 PM UTC 24 |
Aug 28 10:40:40 PM UTC 24 |
8786817748 ps |
T1282 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/30.i2c_host_fifo_watermark.1664640603 |
|
|
Aug 28 10:36:08 PM UTC 24 |
Aug 28 10:40:42 PM UTC 24 |
17278990742 ps |
T1283 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_reset_fmt.785893435 |
|
|
Aug 28 10:40:39 PM UTC 24 |
Aug 28 10:40:42 PM UTC 24 |
341027183 ps |
T1284 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_target_intr_stress_wr.3824554647 |
|
|
Aug 28 10:39:04 PM UTC 24 |
Aug 28 10:40:43 PM UTC 24 |
13450928496 ps |
T1285 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_host_smoke.305287873 |
|
|
Aug 28 10:39:27 PM UTC 24 |
Aug 28 10:40:47 PM UTC 24 |
4708933637 ps |
T1286 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_reset_rx.1067543196 |
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|
Aug 28 10:40:40 PM UTC 24 |
Aug 28 10:40:48 PM UTC 24 |
377107219 ps |
T1287 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_host_fifo_fmt_empty.2989364492 |
|
|
Aug 28 10:40:39 PM UTC 24 |
Aug 28 10:40:49 PM UTC 24 |
2094973903 ps |
T1288 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_host_error_intr.1036473742 |
|
|
Aug 28 10:40:53 PM UTC 24 |
Aug 28 10:40:57 PM UTC 24 |
108467848 ps |
T1289 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_host_fifo_watermark.1514528517 |
|
|
Aug 28 10:39:57 PM UTC 24 |
Aug 28 10:41:02 PM UTC 24 |
5974435130 ps |
T1290 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/24.i2c_target_stress_wr.3785629265 |
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|
Aug 28 10:32:59 PM UTC 24 |
Aug 28 10:41:07 PM UTC 24 |
40253890952 ps |
T1291 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_target_intr_smoke.2755173302 |
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|
Aug 28 10:40:58 PM UTC 24 |
Aug 28 10:41:07 PM UTC 24 |
909867508 ps |
T1292 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_target_stress_rd.3681191214 |
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|
Aug 28 10:40:53 PM UTC 24 |
Aug 28 10:41:08 PM UTC 24 |
660935442 ps |
T1293 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_host_stretch_timeout.3407956212 |
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|
Aug 28 10:40:53 PM UTC 24 |
Aug 28 10:41:11 PM UTC 24 |
883160142 ps |
T1294 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_target_stretch.4125467827 |
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|
Aug 28 10:40:58 PM UTC 24 |
Aug 28 10:41:11 PM UTC 24 |
4233989943 ps |
T1295 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_target_smoke.2720263973 |
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|
Aug 28 10:40:53 PM UTC 24 |
Aug 28 10:41:12 PM UTC 24 |
5489173997 ps |
T1296 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_reset_acq.1142115170 |
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|
Aug 28 10:41:09 PM UTC 24 |
Aug 28 10:41:12 PM UTC 24 |
609728861 ps |
T1297 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/35.i2c_target_stress_wr.1928697779 |
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|
Aug 28 10:39:36 PM UTC 24 |
Aug 28 10:41:14 PM UTC 24 |
23854674646 ps |
T1298 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_target_stress_rd.1114955373 |
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|
Aug 28 10:40:05 PM UTC 24 |
Aug 28 10:41:15 PM UTC 24 |
1280418947 ps |
T1299 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_reset_tx.1884950567 |
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|
Aug 28 10:41:12 PM UTC 24 |
Aug 28 10:41:16 PM UTC 24 |
1090374305 ps |
T1300 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_target_timeout.3879829998 |
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|
Aug 28 10:41:07 PM UTC 24 |
Aug 28 10:41:18 PM UTC 24 |
1346180489 ps |
T1301 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_target_perf.182028128 |
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|
Aug 28 10:41:12 PM UTC 24 |
Aug 28 10:41:18 PM UTC 24 |
405099368 ps |
T1302 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/32.i2c_host_fifo_full.190316126 |
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|
Aug 28 10:37:22 PM UTC 24 |
Aug 28 10:41:19 PM UTC 24 |
6774534297 ps |
T1303 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_full.1661735357 |
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|
Aug 28 10:38:46 PM UTC 24 |
Aug 28 10:41:20 PM UTC 24 |
10975387535 ps |
T1304 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/39.i2c_host_override.2297861121 |
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|
Aug 28 10:42:09 PM UTC 24 |
Aug 28 10:42:11 PM UTC 24 |
29814687 ps |
T1305 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_watermarks_tx.227897276 |
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|
Aug 28 10:41:19 PM UTC 24 |
Aug 28 10:41:22 PM UTC 24 |
614088790 ps |
T1306 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_target_fifo_watermarks_acq.461471683 |
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|
Aug 28 10:41:17 PM UTC 24 |
Aug 28 10:41:22 PM UTC 24 |
461964818 ps |
T1307 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_target_smbus_maxlen.2769919425 |
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|
Aug 28 10:41:19 PM UTC 24 |
Aug 28 10:41:24 PM UTC 24 |
432708161 ps |
T1308 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_alert_test.2898362788 |
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|
Aug 28 10:41:23 PM UTC 24 |
Aug 28 10:41:24 PM UTC 24 |
17224548 ps |
T1309 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_target_nack_txstretch.4012667478 |
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|
Aug 28 10:41:23 PM UTC 24 |
Aug 28 10:41:25 PM UTC 24 |
507008998 ps |
T1310 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_target_nack_acqfull.1062682125 |
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|
Aug 28 10:41:20 PM UTC 24 |
Aug 28 10:41:25 PM UTC 24 |
1212738443 ps |
T1311 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_target_bad_addr.3329490672 |
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|
Aug 28 10:41:13 PM UTC 24 |
Aug 28 10:41:26 PM UTC 24 |
5539323041 ps |
T1312 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_target_nack_acqfull_addr.3822579156 |
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|
Aug 28 10:41:21 PM UTC 24 |
Aug 28 10:41:26 PM UTC 24 |
568793429 ps |
T1313 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_host_override.3692615760 |
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|
Aug 28 10:41:25 PM UTC 24 |
Aug 28 10:41:27 PM UTC 24 |
164443861 ps |
T1314 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/23.i2c_target_stress_wr.973933186 |
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|
Aug 28 10:32:08 PM UTC 24 |
Aug 28 10:41:27 PM UTC 24 |
42643440614 ps |
T1315 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_fmt.1148995405 |
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|
Aug 28 10:41:26 PM UTC 24 |
Aug 28 10:41:29 PM UTC 24 |
131696918 ps |
T1316 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_host_perf_precise.1084935686 |
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|
Aug 28 10:41:27 PM UTC 24 |
Aug 28 10:41:33 PM UTC 24 |
62906012 ps |
T1317 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_host_error_intr.464280186 |
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|
Aug 28 10:41:30 PM UTC 24 |
Aug 28 10:41:33 PM UTC 24 |
275926012 ps |
T1318 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/33.i2c_host_fifo_full.3442876862 |
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|
Aug 28 10:38:10 PM UTC 24 |
Aug 28 10:41:33 PM UTC 24 |
2997002734 ps |
T1319 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/34.i2c_host_fifo_watermark.1273894734 |
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Aug 28 10:38:45 PM UTC 24 |
Aug 28 10:41:33 PM UTC 24 |
10503362945 ps |
T1320 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/37.i2c_host_may_nack.2346186200 |
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Aug 28 10:41:16 PM UTC 24 |
Aug 28 10:41:34 PM UTC 24 |
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T1321 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_host_fifo_reset_rx.3839007667 |
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Aug 28 10:41:27 PM UTC 24 |
Aug 28 10:41:38 PM UTC 24 |
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T1322 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/36.i2c_target_stress_all.2586613047 |
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Aug 28 10:40:19 PM UTC 24 |
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T1323 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_host_smoke.516297577 |
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Aug 28 10:41:24 PM UTC 24 |
Aug 28 10:41:47 PM UTC 24 |
1062906879 ps |
T1324 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_target_intr_smoke.2957606983 |
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Aug 28 10:41:39 PM UTC 24 |
Aug 28 10:41:47 PM UTC 24 |
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/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_target_stress_rd.3541057077 |
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Aug 28 10:41:34 PM UTC 24 |
Aug 28 10:41:55 PM UTC 24 |
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T1326 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_reset_tx.1529759540 |
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Aug 28 10:41:52 PM UTC 24 |
Aug 28 10:41:55 PM UTC 24 |
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T1327 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_target_fifo_reset_acq.346976177 |
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Aug 28 10:41:52 PM UTC 24 |
Aug 28 10:41:55 PM UTC 24 |
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T1328 |
/workspaces/repo/scratch/os_regression_2024_08_28/i2c-sim-vcs/coverage/default/38.i2c_target_timeout.569850245 |
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Aug 28 10:41:44 PM UTC 24 |
Aug 28 10:41:57 PM UTC 24 |
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