Module Definition
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Module : lc_ctrl_kmac_if
SCORELINECONDTOGGLEFSMBRANCHASSERT
0.00 0.00 0.00 0.00 0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_lc_ctrl_0.1/rtl/lc_ctrl_kmac_if.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.u_lc_ctrl_kmac_if 0.00 0.00 0.00 0.00 0.00



Module Instance : tb.dut.u_lc_ctrl_kmac_if

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
0.00 0.00 0.00 0.00 0.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
0.00 0.00 0.00 0.00 0.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
15.56 0.00 0.00 62.24 0.00 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_prim_flop_2sync 0.00 0.00 0.00
u_prim_sync_reqack_data_in 0.00 0.00 0.00 0.00
u_state_regs 0.00 0.00 0.00


Since this is the module's only instance, the coverage report is the same as for the module.
Line Coverage for Module : lc_ctrl_kmac_if
Line No.TotalCoveredPercent
TOTAL4100.00
CONT_ASSIGN44100.00
CONT_ASSIGN81100.00
ALWAYS88800.00
CONT_ASSIGN102100.00
CONT_ASSIGN103100.00
CONT_ASSIGN104100.00
CONT_ASSIGN107100.00
ALWAYS1592100.00
ALWAYS203300.00
ALWAYS206300.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_lc_ctrl_0.1/rtl/lc_ctrl_kmac_if.sv' or '../src/lowrisc_ip_lc_ctrl_0.1/rtl/lc_ctrl_kmac_if.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
44 0 1
81 0 1
88 0 1
89 0 1
90 0 1
91 0 1
93 0 1
95 0 1
96 0 1
97 0 1
==> MISSING_ELSE
102 0 1
103 0 1
104 0 1
107 0 1
159 0 1
160 0 1
161 0 1
162 0 1
164 0 1
168 0 1
169 0 1
170 0 1
171 0 1
172 0 1
173 0 1
==> MISSING_ELSE
==> MISSING_ELSE
179 0 1
180 0 1
181 0 1
182 0 1
183 0 1
184 0 1
==> MISSING_ELSE
189 0 1
190 0 1
191 0 1
==> MISSING_ELSE
196 0 1
203 0 3
206 0 1
207 0 1
209 0 1


Cond Coverage for Module : lc_ctrl_kmac_if
TotalCoveredPercent
Conditions600.00
Logical600.00
Non-Logical00
Event00

 LINE       95
 EXPRESSION (token_hash_req_i && token_hash_ack_d)
             --------1-------    --------2-------
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

 LINE       107
 EXPRESSION (token_hash_req_i & ((~token_hash_ack_q)))
             --------1-------   ----------2----------
-1--2-StatusTests
01Not Covered
10Not Covered
11Not Covered

FSM Coverage for Module : lc_ctrl_kmac_if
Summary for FSM :: state_q
TotalCoveredPercent
States 4 0 0.00 (Not included in score)
Transitions 6 0 0.00
Sequences 0 0

State, Transition and Sequence Details for FSM :: state_q
statesLine No.CoveredTests
DoneSt 191 Not Covered
FirstSt 203 Not Covered
SecondSt 173 Not Covered
WaitSt 184 Not Covered


transitionsLine No.CoveredTests
DoneSt->FirstSt 203 Not Covered
FirstSt->SecondSt 173 Not Covered
SecondSt->FirstSt 203 Not Covered
SecondSt->WaitSt 184 Not Covered
WaitSt->DoneSt 191 Not Covered
WaitSt->FirstSt 203 Not Covered



Branch Coverage for Module : lc_ctrl_kmac_if
Line No.TotalCoveredPercent
Branches 16 0 0.00
IF 88 3 0 0.00
CASE 164 9 0 0.00
IF 203 2 0 0.00
IF 206 2 0 0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_lc_ctrl_0.1/rtl/lc_ctrl_kmac_if.sv' or '../src/lowrisc_ip_lc_ctrl_0.1/rtl/lc_ctrl_kmac_if.sv was not found/opened, so annotated branch coverage report could not be generated.

LineNo. Expression -1-: 88 if ((!rst_ni)) -2-: 95 if ((token_hash_req_i && token_hash_ack_d))

Branches:
-1--2-StatusTests
1 - Not Covered
0 1 Not Covered
0 0 Not Covered


LineNo. Expression -1-: 164 case (state_q) -2-: 168 if (kmac_req) -3-: 172 if (kmac_data_i.ready) -4-: 183 if (kmac_data_i.ready) -5-: 189 if (kmac_data_i.done)

Branches:
-1--2--3--4--5-StatusTests
FirstSt 1 1 - - Not Covered
FirstSt 1 0 - - Not Covered
FirstSt 0 - - - Not Covered
SecondSt - - 1 - Not Covered
SecondSt - - 0 - Not Covered
WaitSt - - - 1 Not Covered
WaitSt - - - 0 Not Covered
DoneSt - - - - Not Covered
default - - - - Not Covered


LineNo. Expression -1-: 203 if ((!rst_kmac_ni))

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered


LineNo. Expression -1-: 206 if ((!rst_kmac_ni))

Branches:
-1-StatusTests
1 Not Covered
0 Not Covered

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