OTBN Simulation Results

Sunday May 21 2023 07:04:58 UTC

GitHub Revision: `e3fb01b5e`

Branch: os_regression

Simulator: XCELIUM

Build randomization enabled with --build-seed 3002339765

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	otbn_smoke	10.000s	22.306us	1	1	100.00
V1	single_binary	otbn_single	57.000s	262.237us	91	100	91.00
V1	csr_hw_reset	otbn_csr_hw_reset	7.000s	24.932us	5	5	100.00
V1	csr_rw	otbn_csr_rw	5.000s	51.432us	20	20	100.00
V1	csr_bit_bash	otbn_csr_bit_bash	9.000s	532.666us	5	5	100.00
V1	csr_aliasing	otbn_csr_aliasing	6.000s	74.686us	5	5	100.00
V1	csr_mem_rw_with_rand_reset	otbn_csr_mem_rw_with_rand_reset	10.000s	22.817us	20	20	100.00
V1	regwen_csr_and_corresponding_lockable_csr	otbn_csr_rw	5.000s	51.432us	20	20	100.00
		otbn_csr_aliasing	6.000s	74.686us	5	5	100.00
V1	mem_walk	otbn_mem_walk	32.000s	765.120us	5	5	100.00
V1	mem_partial_access	otbn_mem_partial_access	15.000s	1.077ms	5	5	100.00
V1		TOTAL			157	166	94.58
V2	reset_recovery	otbn_reset	28.000s	358.517us	10	10	100.00
V2	multi_error	otbn_multi_err	51.000s	470.337us	1	1	100.00
V2	back_to_back	otbn_multi	1.217m	294.385us	10	10	100.00
V2	stress_all	otbn_stress_all	1.633m	1.668ms	9	10	90.00
V2	lc_escalation	otbn_escalate	21.000s	165.858us	42	60	70.00
V2	zero_state_err_urnd	otbn_zero_state_err_urnd	9.000s	33.994us	3	5	60.00
V2	sw_errs_fatal_chk	otbn_sw_errs_fatal_chk	15.000s	119.425us	8	10	80.00
V2	alert_test	otbn_alert_test	8.000s	27.931us	50	50	100.00
V2	intr_test	otbn_intr_test	7.000s	19.325us	50	50	100.00
V2	tl_d_oob_addr_access	otbn_tl_errors	11.000s	211.587us	20	20	100.00
V2	tl_d_illegal_access	otbn_tl_errors	11.000s	211.587us	20	20	100.00
V2	tl_d_outstanding_access	otbn_csr_hw_reset	7.000s	24.932us	5	5	100.00
		otbn_csr_rw	5.000s	51.432us	20	20	100.00
		otbn_csr_aliasing	6.000s	74.686us	5	5	100.00
		otbn_same_csr_outstanding	7.000s	24.508us	20	20	100.00
V2	tl_d_partial_access	otbn_csr_hw_reset	7.000s	24.932us	5	5	100.00
		otbn_csr_rw	5.000s	51.432us	20	20	100.00
		otbn_csr_aliasing	6.000s	74.686us	5	5	100.00
		otbn_same_csr_outstanding	7.000s	24.508us	20	20	100.00
V2		TOTAL			223	246	90.65
V2S	mem_integrity	otbn_imem_err	10.000s	34.446us	9	10	90.00
		otbn_dmem_err	12.000s	39.620us	14	15	93.33
V2S	internal_integrity	otbn_alu_bignum_mod_err	17.000s	628.161us	4	5	80.00
		otbn_controller_ispr_rdata_err	9.000s	15.620us	4	5	80.00
		otbn_mac_bignum_acc_err	10.000s	46.219us	5	5	100.00
		otbn_urnd_err	8.000s	200.613us	2	2	100.00
V2S	illegal_bus_access	otbn_illegal_mem_acc	8.000s	25.181us	5	5	100.00
V2S	otbn_mem_gnt_acc_err	otbn_mem_gnt_acc_err	7.000s	26.161us	1	2	50.00
V2S	tl_intg_err	otbn_sec_cm	4.633m	2.860ms	5	5	100.00
		otbn_tl_intg_err	1.233m	518.637us	20	20	100.00
V2S	passthru_mem_tl_intg_err	otbn_passthru_mem_tl_intg_err	1.067m	481.728us	20	20	100.00
V2S	prim_fsm_check	otbn_sec_cm	4.633m	2.860ms	5	5	100.00
V2S	prim_count_check	otbn_sec_cm	4.633m	2.860ms	5	5	100.00
V2S	sec_cm_mem_scramble	otbn_smoke	10.000s	22.306us	1	1	100.00
V2S	sec_cm_data_mem_integrity	otbn_dmem_err	12.000s	39.620us	14	15	93.33
V2S	sec_cm_instruction_mem_integrity	otbn_imem_err	10.000s	34.446us	9	10	90.00
V2S	sec_cm_bus_integrity	otbn_tl_intg_err	1.233m	518.637us	20	20	100.00
V2S	sec_cm_controller_fsm_global_esc	otbn_escalate	21.000s	165.858us	42	60	70.00
V2S	sec_cm_controller_fsm_local_esc	otbn_imem_err	10.000s	34.446us	9	10	90.00
		otbn_dmem_err	12.000s	39.620us	14	15	93.33
		otbn_zero_state_err_urnd	9.000s	33.994us	3	5	60.00
		otbn_illegal_mem_acc	8.000s	25.181us	5	5	100.00
		otbn_sec_cm	4.633m	2.860ms	5	5	100.00
V2S	sec_cm_controller_fsm_sparse	otbn_sec_cm	4.633m	2.860ms	5	5	100.00
V2S	sec_cm_scramble_key_sideload	otbn_single	57.000s	262.237us	91	100	91.00
V2S	sec_cm_scramble_ctrl_fsm_local_esc	otbn_imem_err	10.000s	34.446us	9	10	90.00
		otbn_dmem_err	12.000s	39.620us	14	15	93.33
		otbn_zero_state_err_urnd	9.000s	33.994us	3	5	60.00
		otbn_illegal_mem_acc	8.000s	25.181us	5	5	100.00
		otbn_sec_cm	4.633m	2.860ms	5	5	100.00
V2S	sec_cm_scramble_ctrl_fsm_sparse	otbn_sec_cm	4.633m	2.860ms	5	5	100.00
V2S	sec_cm_start_stop_ctrl_fsm_global_esc	otbn_escalate	21.000s	165.858us	42	60	70.00
V2S	sec_cm_start_stop_ctrl_fsm_local_esc	otbn_imem_err	10.000s	34.446us	9	10	90.00
		otbn_dmem_err	12.000s	39.620us	14	15	93.33
		otbn_zero_state_err_urnd	9.000s	33.994us	3	5	60.00
		otbn_illegal_mem_acc	8.000s	25.181us	5	5	100.00
		otbn_sec_cm	4.633m	2.860ms	5	5	100.00
V2S	sec_cm_start_stop_ctrl_fsm_sparse	otbn_sec_cm	4.633m	2.860ms	5	5	100.00
V2S	sec_cm_data_reg_sw_sca	otbn_single	57.000s	262.237us	91	100	91.00
V2S	sec_cm_ctrl_redun	otbn_ctrl_redun	9.000s	25.057us	9	12	75.00
V2S	sec_cm_pc_ctrl_flow_redun	otbn_pc_ctrl_flow_redun	9.000s	67.701us	5	5	100.00
V2S	sec_cm_rnd_bus_consistency	otbn_rnd_sec_cm	28.000s	152.369us	5	5	100.00
V2S	sec_cm_rnd_rng_digest	otbn_rnd_sec_cm	28.000s	152.369us	5	5	100.00
V2S	sec_cm_rf_base_data_reg_sw_integrity	otbn_rf_base_intg_err	11.000s	39.255us	8	10	80.00
V2S	sec_cm_rf_base_data_reg_sw_glitch_detect	otbn_sec_cm	4.633m	2.860ms	5	5	100.00
V2S	sec_cm_stack_wr_ptr_ctr_redun	otbn_sec_cm	4.633m	2.860ms	5	5	100.00
V2S	sec_cm_rf_bignum_data_reg_sw_integrity	otbn_rf_bignum_intg_err	11.000s	30.877us	10	10	100.00
V2S	sec_cm_rf_bignum_data_reg_sw_glitch_detect	otbn_sec_cm	4.633m	2.860ms	5	5	100.00
V2S	sec_cm_loop_stack_ctr_redun	otbn_sec_cm	4.633m	2.860ms	5	5	100.00
V2S	sec_cm_loop_stack_addr_integrity	otbn_stack_addr_integ_chk	1.200m	10.002ms	4	5	80.00
V2S	sec_cm_call_stack_addr_integrity	otbn_stack_addr_integ_chk	1.200m	10.002ms	4	5	80.00
V2S	sec_cm_start_stop_ctrl_state_consistency	otbn_sec_wipe_err	12.000s	37.335us	7	7	100.00
V2S	sec_cm_data_mem_sec_wipe	otbn_single	57.000s	262.237us	91	100	91.00
V2S	sec_cm_instruction_mem_sec_wipe	otbn_single	57.000s	262.237us	91	100	91.00
V2S	sec_cm_data_reg_sw_sec_wipe	otbn_single	57.000s	262.237us	91	100	91.00
V2S	sec_cm_write_mem_integrity	otbn_multi	1.217m	294.385us	10	10	100.00
V2S	sec_cm_ctrl_flow_count	otbn_single	57.000s	262.237us	91	100	91.00
V2S	sec_cm_ctrl_flow_sca	otbn_single	57.000s	262.237us	91	100	91.00
V2S	sec_cm_data_mem_sw_noaccess	otbn_sw_no_acc	10.000s	173.199us	5	5	100.00
V2S	sec_cm_key_sideload	otbn_single	57.000s	262.237us	91	100	91.00
V2S	sec_cm_tlul_fifo_ctr_redun	otbn_sec_cm	4.633m	2.860ms	5	5	100.00
V2S		TOTAL			142	153	92.81
V3	stress_all_with_rand_reset	otbn_stress_all_with_rand_reset	5.833m	8.161ms	4	10	40.00
V3		TOTAL			4	10	40.00
		TOTAL			526	575	91.48

Testplan Progress

Items	Total	Written	Passing	Progress
V1	9	9	8	88.89
V2	11	11	7	63.64
V2S	19	19	11	57.89
V3	1	1	0	0.00

Coverage Results

Coverage Dashboard

Score	Block	Branch	Statement	Expression	Toggle	Fsm	Assertion	CoverGroup
98.77	99.53	94.46	99.63	90.97	93.27	97.44	91.17	99.16

Failure Buckets

Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_*/tb.sv,270): Assertion MatchingStatus_A has failed has 7 failures:

Test otbn_rf_base_intg_err has 2 failures.

0.otbn_rf_base_intg_err.2951851679
Line 243, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/0.otbn_rf_base_intg_err/latest/run.log

  xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_0.1/tb.sv,270): (time 39255230 PS) Assertion tb.MatchingStatus_A has failed
  xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 39255230 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
  UVM_ERROR @  39255230 ps: (tb.sv:270) [ASSERT FAILED] MatchingStatus_A
  UVM_INFO @  39255230 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

1.otbn_rf_base_intg_err.2887682461
Line 243, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/1.otbn_rf_base_intg_err/latest/run.log

  xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_0.1/tb.sv,270): (time 113258187 PS) Assertion tb.MatchingStatus_A has failed
  xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 113258187 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
  UVM_ERROR @ 113258187 ps: (tb.sv:270) [ASSERT FAILED] MatchingStatus_A
  UVM_INFO @ 113258187 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Test otbn_escalate has 5 failures.

1.otbn_escalate.3433588782
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/1.otbn_escalate/latest/run.log

  xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_0.1/tb.sv,270): (time 121617226 PS) Assertion tb.MatchingStatus_A has failed
  xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 121617226 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
  UVM_ERROR @ 121617226 ps: (tb.sv:270) [ASSERT FAILED] MatchingStatus_A
  UVM_INFO @ 121617226 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

18.otbn_escalate.2656375079
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/18.otbn_escalate/latest/run.log

  xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_sim_0.1/tb.sv,270): (time 8710134 PS) Assertion tb.MatchingStatus_A has failed
  UVM_ERROR @   8710134 ps: (tb.sv:270) [ASSERT FAILED] MatchingStatus_A
  UVM_INFO @   8710134 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 3 more failures.

UVM_FATAL (otbn_base_vseq.sv:582) [otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 6 failures:

Test otbn_stress_all_with_rand_reset has 1 failures.

5.otbn_stress_all_with_rand_reset.2503064117
Line 290, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/5.otbn_stress_all_with_rand_reset/latest/run.log

  UVM_FATAL @ 454566097 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) &&                       !cfg.trace_vif.locking_o)
  UVM_INFO @ 454566097 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Test otbn_single has 5 failures.

23.otbn_single.3576971083
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/23.otbn_single/latest/run.log

  UVM_FATAL @  23144804 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) &&                       !cfg.trace_vif.locking_o)
  UVM_INFO @  23144804 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

48.otbn_single.533475488
Line 240, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/48.otbn_single/latest/run.log

  UVM_FATAL @  13274602 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) &&                       !cfg.trace_vif.locking_o)
  UVM_INFO @  13274602 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 3 more failures.

Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_*/otbn_model_if.sv,137): Assertion NoModelErrs has failed has 5 failures:

Test otbn_escalate has 5 failures.

19.otbn_escalate.1826322108
Line 260, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/19.otbn_escalate/latest/run.log

  xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,137): (time 3486040 PS) Assertion tb.model_if.NoModelErrs has failed
  UVM_ERROR @   3486040 ps: (otbn_model_if.sv:137) [ASSERT FAILED] NoModelErrs
  UVM_INFO @   3486040 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

28.otbn_escalate.160553550
Line 262, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/28.otbn_escalate/latest/run.log

  xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,137): (time 3243896 PS) Assertion tb.model_if.NoModelErrs has failed
  UVM_ERROR @   3243896 ps: (otbn_model_if.sv:137) [ASSERT FAILED] NoModelErrs
  UVM_INFO @   3243896 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 3 more failures.

UVM_FATAL (otbn_base_vseq.sv:582) [otbn_dmem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 3 failures:

Test otbn_stress_all_with_rand_reset has 2 failures.

1.otbn_stress_all_with_rand_reset.3369839719
Line 281, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/1.otbn_stress_all_with_rand_reset/latest/run.log

  UVM_FATAL @  14090234 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) &&                       !cfg.trace_vif.locking_o)
  UVM_INFO @  14090234 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

3.otbn_stress_all_with_rand_reset.1411492300
Line 309, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_stress_all_with_rand_reset/latest/run.log

  UVM_FATAL @ 764690100 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) &&                       !cfg.trace_vif.locking_o)
  UVM_INFO @ 764690100 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Test otbn_dmem_err has 1 failures.

11.otbn_dmem_err.2028313819
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/11.otbn_dmem_err/latest/run.log

  UVM_FATAL @   7412560 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) &&                       !cfg.trace_vif.locking_o)
  UVM_INFO @   7412560 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Exit reason: Error: User command failed xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_*/otbn_insn_cnt_if.sv,21): Assertion InsnCntMatches_A has failed has 3 failures:

Test otbn_escalate has 1 failures.

2.otbn_escalate.1911346118
Line 243, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/2.otbn_escalate/latest/run.log

  xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 75606228 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
  UVM_ERROR @  75606228 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A
  UVM_INFO @  75606228 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Test otbn_zero_state_err_urnd has 1 failures.

2.otbn_zero_state_err_urnd.2379158452
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/2.otbn_zero_state_err_urnd/latest/run.log

  xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 33994217 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
  UVM_ERROR @  33994217 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A
  UVM_INFO @  33994217 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Test otbn_ctrl_redun has 1 failures.

7.otbn_ctrl_redun.2597258234
Line 248, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/7.otbn_ctrl_redun/latest/run.log

  xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_env_0.1/otbn_insn_cnt_if.sv,21): (time 9312792 PS) Assertion tb.insn_cnt_if.InsnCntMatches_A has failed
  xmsim: *E,ASRTST (/workspace/default/src/lowrisc_dv_otbn_model_agent_0.1/otbn_model_if.sv,137): (time 9312792 PS) Assertion tb.model_if.NoModelErrs has failed
  UVM_ERROR @   9312792 ps: (otbn_insn_cnt_if.sv:21) [ASSERT FAILED] InsnCntMatches_A
  UVM_INFO @   9312792 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

UVM_FATAL (otbn_base_vseq.sv:369) [otbn_single_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 3 failures:

Test otbn_single has 3 failures.

7.otbn_single.1138823932
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/7.otbn_single/latest/run.log

  UVM_FATAL @  19161800 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
  UVM_INFO @  19161800 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

21.otbn_single.2815814997
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/21.otbn_single/latest/run.log

  UVM_FATAL @  24948360 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
  UVM_INFO @  24948360 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

... and 1 more failures.

Exit reason: Error: User command failed UVM_FATAL (otbn_scoreboard.sv:495) scoreboard [scoreboard] A fatal alert arrived * cycles ago and we still don't think it should have done. has 2 failures:

Test otbn_mem_gnt_acc_err has 1 failures.

1.otbn_mem_gnt_acc_err.2680117565
Line 244, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/1.otbn_mem_gnt_acc_err/latest/run.log

  UVM_FATAL @  26161394 ps: (otbn_scoreboard.sv:495) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] A fatal alert arrived 400 cycles ago and we still don't think it should have done.
  UVM_INFO @  26161394 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Test otbn_escalate has 1 failures.

12.otbn_escalate.2205383244
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/12.otbn_escalate/latest/run.log

  UVM_FATAL @   6855142 ps: (otbn_scoreboard.sv:495) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] A fatal alert arrived 400 cycles ago and we still don't think it should have done.
  UVM_INFO @   6855142 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Exit reason: Error: User command failed UVM_FATAL (otbn_base_vseq.sv:582) [otbn_sw_errs_fatal_chk_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 2 failures:

Test otbn_sw_errs_fatal_chk has 2 failures.

3.otbn_sw_errs_fatal_chk.1938099049
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_sw_errs_fatal_chk/latest/run.log

  UVM_FATAL @   8424151 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_sw_errs_fatal_chk_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) &&                       !cfg.trace_vif.locking_o)
  UVM_INFO @   8424151 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

8.otbn_sw_errs_fatal_chk.846640637
Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/8.otbn_sw_errs_fatal_chk/latest/run.log

  UVM_FATAL @  26473319 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_sw_errs_fatal_chk_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) &&                       !cfg.trace_vif.locking_o)
  UVM_INFO @  26473319 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

UVM_FATAL (otbn_base_vseq.sv:582) [otbn_imem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 2 failures:

Test otbn_stress_all_with_rand_reset has 1 failures.

6.otbn_stress_all_with_rand_reset.3201345230
Line 299, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/6.otbn_stress_all_with_rand_reset/latest/run.log

  UVM_FATAL @  53321160 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_imem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) &&                       !cfg.trace_vif.locking_o)
  UVM_INFO @  53321160 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Test otbn_stress_all has 1 failures.

8.otbn_stress_all.498871489
Line 296, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/8.otbn_stress_all/latest/run.log

  UVM_FATAL @ 806096292 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_imem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) &&                       !cfg.trace_vif.locking_o)
  UVM_INFO @ 806096292 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

UVM_FATAL (otbn_base_vseq.sv:369) [otbn_ctrl_redun_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 2 failures:

Test otbn_ctrl_redun has 2 failures.

10.otbn_ctrl_redun.2359580049
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/10.otbn_ctrl_redun/latest/run.log

  UVM_FATAL @  11006520 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_ctrl_redun_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
  UVM_INFO @  11006520 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

11.otbn_ctrl_redun.3860060068
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/11.otbn_ctrl_redun/latest/run.log

  UVM_FATAL @  10134299 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_ctrl_redun_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
  UVM_INFO @  10134299 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Exit reason: Error: User command failed UVM_FATAL (otbn_scoreboard.sv:538) scoreboard [scoreboard] We saw a STATUS change * cycles ago that implied we'd get a fatal alert but it still hasn't arrived. has 2 failures:

Test otbn_escalate has 2 failures.

14.otbn_escalate.4073411641
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/14.otbn_escalate/latest/run.log

  UVM_FATAL @   6992396 ps: (otbn_scoreboard.sv:538) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] We saw a STATUS change 30 cycles ago that implied we'd get a fatal alert but it still hasn't arrived.
  UVM_INFO @   6992396 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

30.otbn_escalate.3640900991
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/30.otbn_escalate/latest/run.log

  UVM_FATAL @   6850808 ps: (otbn_scoreboard.sv:538) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] We saw a STATUS change 30 cycles ago that implied we'd get a fatal alert but it still hasn't arrived.
  UVM_INFO @   6850808 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Exit reason: Error: User command failed UVM_FATAL (otbn_base_vseq.sv:582) [otbn_alu_bignum_mod_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
- Test otbn_alu_bignum_mod_err has 1 failures.
  - 0.otbn_alu_bignum_mod_err.788780947
    Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/0.otbn_alu_bignum_mod_err/latest/run.log
```
  UVM_FATAL @  11889331 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_alu_bignum_mod_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) &&                       !cfg.trace_vif.locking_o)
  UVM_INFO @  11889331 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_dmem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 1 failures:
- Test otbn_stress_all_with_rand_reset has 1 failures.
  - 0.otbn_stress_all_with_rand_reset.1132058645
    Line 280, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/0.otbn_stress_all_with_rand_reset/latest/run.log
```
  UVM_FATAL @   8437280 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_dmem_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
  UVM_INFO @   8437280 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (otbn_base_vseq.sv:369) [otbn_controller_ispr_rdata_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution has 1 failures:
- Test otbn_controller_ispr_rdata_err has 1 failures.
  - 2.otbn_controller_ispr_rdata_err.3740233231
    Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/2.otbn_controller_ispr_rdata_err/latest/run.log
```
  UVM_FATAL @  13350507 ps: (otbn_base_vseq.sv:369) [uvm_test_top.env.virtual_sequencer.otbn_controller_ispr_rdata_err_vseq] Check failed (cfg.model_agent_cfg.vif.status == otbn_pkg::StatusIdle) Timed out waiting for OTBN to be idle before execution
  UVM_INFO @  13350507 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (otbn_stack_addr_integ_chk_vseq.sv:58) [otbn_stack_addr_integ_chk_vseq] timeout occurred! has 1 failures:
- Test otbn_stack_addr_integ_chk has 1 failures.
  - 2.otbn_stack_addr_integ_chk.2283495209
    Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/2.otbn_stack_addr_integ_chk/latest/run.log
```
  UVM_FATAL @ 10001867488 ps: (otbn_stack_addr_integ_chk_vseq.sv:58) [uvm_test_top.env.virtual_sequencer.otbn_stack_addr_integ_chk_vseq] timeout occurred!
  UVM_INFO @ 10001867488 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
Exit reason: Error: User command failed UVM_FATAL (otbn_base_vseq.sv:582) [otbn_imem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
- Test otbn_imem_err has 1 failures.
  - 3.otbn_imem_err.228175713
    Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_imem_err/latest/run.log
```
  UVM_FATAL @  19742220 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_imem_err_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) &&                       !cfg.trace_vif.locking_o)
  UVM_INFO @  19742220 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (otbn_scoreboard.sv:495) scoreboard [scoreboard] A fatal alert arrived * cycles ago and we still don't think it should have done. has 1 failures:
- Test otbn_zero_state_err_urnd has 1 failures.
  - 3.otbn_zero_state_err_urnd.2971819289
    Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/3.otbn_zero_state_err_urnd/latest/run.log
```
  UVM_FATAL @  18884598 ps: (otbn_scoreboard.sv:495) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] A fatal alert arrived 400 cycles ago and we still don't think it should have done.
  UVM_INFO @  18884598 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_ERROR (cip_base_vseq.sv:717) [otbn_common_vseq] Check failed has_outstanding_access() == * (* [*] vs * [*]) No CSR outstanding items after reset! has 1 failures:
- Test otbn_stress_all_with_rand_reset has 1 failures.
  - 8.otbn_stress_all_with_rand_reset.3377919328
    Line 290, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/8.otbn_stress_all_with_rand_reset/latest/run.log
```
  UVM_ERROR @ 193343428 ps: (cip_base_vseq.sv:717) [uvm_test_top.env.virtual_sequencer.otbn_common_vseq] Check failed has_outstanding_access() == 0 (1 [0x1] vs 0 [0x0]) No CSR outstanding items after reset!
  UVM_INFO @ 193343428 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```

UVM_FATAL (otbn_base_vseq.sv:582) [otbn_escalate_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:

Test otbn_escalate has 1 failures.

27.otbn_escalate.3271252829
Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/27.otbn_escalate/latest/run.log

  UVM_FATAL @  30695661 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_escalate_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) &&                       !cfg.trace_vif.locking_o)
  UVM_INFO @  30695661 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---

Exit reason: Error: User command failed UVM_FATAL (otbn_model_if.sv:77) [otbn_model_if] Check failed (u_model.otbn_model_step_crc(handle, item, crc_state) == *) Failed to update CRC has 1 failures:
- Test otbn_escalate has 1 failures.
  - 36.otbn_escalate.834906449
    Line 260, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/36.otbn_escalate/latest/run.log
```
  UVM_FATAL @   7946834 ps: (otbn_model_if.sv:77) [otbn_model_if] Check failed (u_model.otbn_model_step_crc(handle, item, crc_state) == 0) Failed to update CRC
  UVM_INFO @   7946834 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
Exit reason: Error: User command failed UVM_FATAL (otbn_base_vseq.sv:582) [otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
- Test otbn_single has 1 failures.
  - 49.otbn_single.3314855979
    Line 241, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/49.otbn_single/latest/run.log
```
  UVM_FATAL @  13653323 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_single_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) &&                       !cfg.trace_vif.locking_o)
  UVM_INFO @  13653323 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
UVM_FATAL (otbn_scoreboard.sv:538) scoreboard [scoreboard] We saw a STATUS change * cycles ago that implied we'd get a fatal alert but it still hasn't arrived. has 1 failures:
- Test otbn_escalate has 1 failures.
  - 57.otbn_escalate.2234018990
    Line 242, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/57.otbn_escalate/latest/run.log
```
  UVM_FATAL @  13704735 ps: (otbn_scoreboard.sv:538) uvm_test_top.env.scoreboard [uvm_test_top.env.scoreboard] We saw a STATUS change 30 cycles ago that implied we'd get a fatal alert but it still hasn't arrived.
  UVM_INFO @  13704735 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```
Exit reason: Error: User command failed UVM_FATAL (otbn_base_vseq.sv:582) [otbn_escalate_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) && !cfg.trace_vif.locking_o) has 1 failures:
- Test otbn_escalate has 1 failures.
  - 58.otbn_escalate.322963470
    Line 243, in log /container/opentitan-public/scratch/os_regression/otbn-sim-xcelium/58.otbn_escalate/latest/run.log
```
  UVM_FATAL @ 166753843 ps: (otbn_base_vseq.sv:582) [uvm_test_top.env.virtual_sequencer.otbn_escalate_vseq] Check failed (!(cfg.loop_vif.loop_stack_push || cfg.loop_vif.loop_stack_pop) &&                       !cfg.trace_vif.locking_o)
  UVM_INFO @ 166753843 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
  --- UVM Report catcher Summary ---
```