| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
| 0.00 | 0.00 |
| NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
| tb.dut.gen_fsm_scramble_enabled.u_checker_fsm.u_compare.u_done_sender | 0.00 | 0.00 |
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
| 0.00 | 0.00 |
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
| 0.00 | 0.00 | 0.00 |
| SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
| 0.00 | 0.00 | 0.00 | 0.00 | 0.00 | u_compare |
| NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
| gen_flops.u_prim_flop | 0.00 | 0.00 | 0.00 |
| Line No. | Total | Covered | Percent | |
|---|---|---|---|---|
| TOTAL | 3 | 0 | 0.00 | |
| CONT_ASSIGN | 34 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 82 | 1 | 0 | 0.00 |
| CONT_ASSIGN | 85 | 1 | 0 | 0.00 |
| Line No. | Covered | Statements | |
|---|---|---|---|
| 34 | 0 | 1 | |
| 82 | 0 | 1 | |
| 85 | 0 | 1 |
| 0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |