Unified Coverage Report :: Module :: prim_rom_adv

Module : prim_rom_adv

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_prim_rom_adv_0.1/rtl/prim_rom_adv.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.gen_rom_scramble_enabled.u_rom.u_rom	0.00	0.00				0.00

---

Module Instance : tb.dut.gen_rom_scramble_enabled.u_rom.u_rom

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00				0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
0.00	0.00						gen_rom_scramble_enabled.u_rom

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
u_prim_rom	0.00	0.00				0.00

---

Since this is the module's only instance, the coverage report is the same as for the module.

Line Coverage for Module : prim_rom_adv

	Line No.	Total	Covered	Percent
TOTAL		3	0	0.00
ALWAYS	40	3	0	0.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_prim_rom_adv_0.1/rtl/prim_rom_adv.sv' or '../src/lowrisc_prim_rom_adv_0.1/rtl/prim_rom_adv.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
40	0	1
41	0	1
43	0	1

---

Branch Coverage for Module : prim_rom_adv

	Line No.	Total	Covered	Percent
Branches		2	0	0.00
IF	40	2	0	0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_prim_rom_adv_0.1/rtl/prim_rom_adv.sv' or '../src/lowrisc_prim_rom_adv_0.1/rtl/prim_rom_adv.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	40	if ((!rst_ni))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered