Module Definition
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Module : rom_ctrl_scrambled_rom
SCORELINECONDTOGGLEFSMBRANCHASSERT
0.00 0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_rom_ctrl_0.1/rtl/rom_ctrl_scrambled_rom.sv

Module self-instances :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
tb.dut.gen_rom_scramble_enabled.u_rom 0.00 0.00



Module Instance : tb.dut.gen_rom_scramble_enabled.u_rom

Instance :
SCORELINECONDTOGGLEFSMBRANCHASSERT
0.00 0.00


Instance's subtree :
SCORELINECONDTOGGLEFSMBRANCHASSERT
0.00 0.00 0.00 0.00


Parent :
SCORELINECONDTOGGLEFSMBRANCHASSERTNAME
24.25 0.00 0.00 97.02 0.00 dut


Subtrees :
NAMESCORELINECONDTOGGLEFSMBRANCHASSERT
u_prince 0.00 0.00
u_rom 0.00 0.00 0.00
u_seed_anchor 0.00 0.00
u_sp_addr 0.00 0.00


Since this is the module's only instance, the coverage report is the same as for the module.
Line Coverage for Module : rom_ctrl_scrambled_rom
Line No.TotalCoveredPercent
TOTAL400.00
CONT_ASSIGN81100.00
CONT_ASSIGN8200
CONT_ASSIGN128100.00
CONT_ASSIGN149100.00
CONT_ASSIGN153100.00
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_rom_ctrl_0.1/rtl/rom_ctrl_scrambled_rom.sv' or '../src/lowrisc_ip_rom_ctrl_0.1/rtl/rom_ctrl_scrambled_rom.sv' was not found, so annotated line coverage report could not be generated.
Line No.CoveredStatements
81 0 1
82 unreachable
128 0 1
149 0 1
153 0 1

0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%