Line Coverage for Module :
spi_passthrough
| Line No. | Total | Covered | Percent |
TOTAL | | 200 | 0 | 0.00 |
CONT_ASSIGN | 271 | 1 | 0 | 0.00 |
CONT_ASSIGN | 276 | 1 | 0 | 0.00 |
CONT_ASSIGN | 326 | 1 | 0 | 0.00 |
CONT_ASSIGN | 333 | 1 | 0 | 0.00 |
ALWAYS | 336 | 4 | 0 | 0.00 |
ALWAYS | 345 | 4 | 0 | 0.00 |
ALWAYS | 349 | 3 | 0 | 0.00 |
CONT_ASSIGN | 355 | 1 | 0 | 0.00 |
ALWAYS | 360 | 4 | 0 | 0.00 |
CONT_ASSIGN | 372 | 1 | 0 | 0.00 |
CONT_ASSIGN | 373 | 1 | 0 | 0.00 |
ALWAYS | 376 | 4 | 0 | 0.00 |
ALWAYS | 400 | 8 | 0 | 0.00 |
ALWAYS | 414 | 4 | 0 | 0.00 |
ALWAYS | 425 | 4 | 0 | 0.00 |
CONT_ASSIGN | 439 | 0 | 0 | |
ALWAYS | 449 | 4 | 0 | 0.00 |
CONT_ASSIGN | 463 | 1 | 0 | 0.00 |
ALWAYS | 466 | 3 | 0 | 0.00 |
CONT_ASSIGN | 475 | 1 | 0 | 0.00 |
ALWAYS | 478 | 3 | 0 | 0.00 |
ALWAYS | 486 | 6 | 0 | 0.00 |
CONT_ASSIGN | 497 | 1 | 0 | 0.00 |
ALWAYS | 506 | 3 | 0 | 0.00 |
ALWAYS | 520 | 4 | 0 | 0.00 |
ALWAYS | 528 | 3 | 0 | 0.00 |
ALWAYS | 533 | 6 | 0 | 0.00 |
ALWAYS | 539 | 3 | 0 | 0.00 |
CONT_ASSIGN | 543 | 1 | 0 | 0.00 |
CONT_ASSIGN | 546 | 1 | 0 | 0.00 |
ALWAYS | 561 | 5 | 0 | 0.00 |
CONT_ASSIGN | 570 | 1 | 0 | 0.00 |
CONT_ASSIGN | 572 | 1 | 0 | 0.00 |
CONT_ASSIGN | 575 | 1 | 0 | 0.00 |
CONT_ASSIGN | 576 | 1 | 0 | 0.00 |
ALWAYS | 582 | 6 | 0 | 0.00 |
CONT_ASSIGN | 589 | 1 | 0 | 0.00 |
ALWAYS | 596 | 6 | 0 | 0.00 |
CONT_ASSIGN | 604 | 1 | 0 | 0.00 |
CONT_ASSIGN | 609 | 1 | 0 | 0.00 |
ALWAYS | 613 | 3 | 0 | 0.00 |
CONT_ASSIGN | 616 | 1 | 0 | 0.00 |
ALWAYS | 685 | 13 | 0 | 0.00 |
ALWAYS | 713 | 3 | 0 | 0.00 |
CONT_ASSIGN | 728 | 1 | 0 | 0.00 |
CONT_ASSIGN | 734 | 1 | 0 | 0.00 |
CONT_ASSIGN | 737 | 1 | 0 | 0.00 |
ALWAYS | 745 | 3 | 0 | 0.00 |
ALWAYS | 753 | 68 | 0 | 0.00 |
WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_spi_device_0.1/rtl/spi_passthrough.sv' or '../src/lowrisc_ip_spi_device_0.1/rtl/spi_passthrough.sv' was not found, so annotated line coverage report could not be generated.
Line No. | Covered | Statements | |
271 |
0 |
1 |
276 |
0 |
1 |
326 |
0 |
1 |
333 |
0 |
1 |
336 |
0 |
1 |
337 |
0 |
1 |
338 |
0 |
1 |
339 |
0 |
1 |
|
|
|
==> MISSING_ELSE |
345 |
0 |
2 |
346 |
0 |
2 |
|
|
|
==> MISSING_ELSE |
349 |
0 |
2 |
350 |
0 |
1 |
355 |
0 |
1 |
360 |
0 |
1 |
361 |
0 |
1 |
362 |
0 |
1 |
363 |
0 |
1 |
|
|
|
==> MISSING_ELSE |
372 |
0 |
1 |
373 |
0 |
1 |
376 |
0 |
1 |
377 |
0 |
1 |
378 |
0 |
1 |
386 |
0 |
1 |
|
|
|
==> MISSING_ELSE |
400 |
0 |
1 |
401 |
0 |
1 |
402 |
0 |
1 |
403 |
0 |
1 |
404 |
0 |
1 |
405 |
0 |
1 |
406 |
0 |
1 |
407 |
0 |
1 |
|
|
|
==> MISSING_ELSE |
|
|
|
==> MISSING_ELSE |
|
|
|
==> MISSING_ELSE |
414 |
0 |
1 |
415 |
0 |
1 |
416 |
0 |
1 |
419 |
0 |
1 |
|
|
|
==> MISSING_ELSE |
425 |
0 |
1 |
426 |
0 |
1 |
427 |
0 |
1 |
430 |
0 |
1 |
|
|
|
==> MISSING_ELSE |
439 |
|
unreachable |
449 |
0 |
1 |
451 |
0 |
1 |
454 |
0 |
1 |
456 |
0 |
1 |
|
|
|
==> MISSING_ELSE |
463 |
0 |
1 |
466 |
0 |
1 |
467 |
0 |
1 |
468 |
0 |
1 |
|
|
|
==> MISSING_ELSE |
475 |
0 |
1 |
478 |
0 |
1 |
479 |
0 |
1 |
481 |
0 |
1 |
486 |
0 |
1 |
487 |
0 |
1 |
488 |
0 |
1 |
489 |
0 |
1 |
490 |
0 |
1 |
491 |
0 |
1 |
|
|
|
==> MISSING_ELSE |
497 |
0 |
1 |
506 |
0 |
2 |
507 |
0 |
1 |
520 |
0 |
1 |
521 |
0 |
1 |
522 |
0 |
1 |
523 |
0 |
1 |
|
|
|
==> MISSING_ELSE |
528 |
0 |
2 |
529 |
0 |
1 |
533 |
0 |
2 |
534 |
0 |
2 |
535 |
0 |
2 |
|
|
|
==> MISSING_ELSE |
539 |
0 |
2 |
540 |
0 |
1 |
543 |
0 |
1 |
546 |
0 |
1 |
561 |
0 |
1 |
562 |
0 |
1 |
563 |
0 |
1 |
565 |
0 |
1 |
566 |
0 |
1 |
570 |
0 |
1 |
572 |
0 |
1 |
575 |
0 |
1 |
576 |
0 |
1 |
582 |
0 |
2 |
583 |
0 |
1 |
584 |
0 |
1 |
585 |
0 |
1 |
586 |
0 |
1 |
|
|
|
==> MISSING_ELSE |
589 |
0 |
1 |
596 |
0 |
1 |
597 |
0 |
1 |
598 |
0 |
1 |
599 |
0 |
1 |
600 |
0 |
1 |
601 |
0 |
1 |
|
|
|
==> MISSING_ELSE |
604 |
0 |
1 |
609 |
0 |
1 |
613 |
0 |
2 |
614 |
0 |
1 |
616 |
0 |
1 |
685 |
0 |
1 |
686 |
0 |
1 |
687 |
0 |
1 |
689 |
0 |
1 |
690 |
0 |
1 |
691 |
0 |
1 |
693 |
0 |
1 |
695 |
0 |
1 |
696 |
0 |
1 |
697 |
0 |
1 |
700 |
0 |
1 |
701 |
0 |
1 |
702 |
0 |
1 |
713 |
0 |
2 |
714 |
0 |
1 |
728 |
0 |
1 |
734 |
0 |
1 |
737 |
0 |
1 |
745 |
0 |
1 |
746 |
0 |
1 |
748 |
0 |
1 |
753 |
0 |
1 |
756 |
0 |
1 |
759 |
0 |
1 |
762 |
0 |
1 |
765 |
0 |
1 |
768 |
0 |
1 |
771 |
0 |
1 |
772 |
0 |
1 |
775 |
0 |
1 |
776 |
0 |
1 |
778 |
0 |
1 |
780 |
0 |
1 |
781 |
0 |
1 |
782 |
0 |
1 |
783 |
0 |
1 |
784 |
0 |
1 |
787 |
0 |
1 |
788 |
0 |
1 |
798 |
0 |
1 |
799 |
0 |
1 |
801 |
0 |
1 |
802 |
0 |
1 |
803 |
0 |
1 |
805 |
0 |
1 |
806 |
0 |
1 |
807 |
0 |
1 |
809 |
0 |
1 |
810 |
0 |
1 |
812 |
0 |
1 |
814 |
0 |
1 |
|
|
|
==> MISSING_ELSE |
818 |
0 |
1 |
820 |
0 |
1 |
821 |
0 |
1 |
|
|
|
==> MISSING_ELSE |
826 |
0 |
1 |
827 |
0 |
1 |
829 |
0 |
1 |
830 |
0 |
1 |
832 |
0 |
1 |
838 |
0 |
1 |
839 |
0 |
1 |
840 |
0 |
1 |
845 |
0 |
1 |
848 |
0 |
1 |
849 |
0 |
1 |
854 |
0 |
1 |
857 |
0 |
1 |
858 |
0 |
1 |
862 |
0 |
1 |
863 |
0 |
1 |
864 |
0 |
1 |
866 |
0 |
1 |
867 |
0 |
1 |
868 |
0 |
1 |
870 |
0 |
1 |
|
|
|
==> MISSING_ELSE |
876 |
0 |
1 |
877 |
0 |
1 |
878 |
0 |
1 |
880 |
0 |
1 |
881 |
0 |
1 |
882 |
0 |
1 |
884 |
0 |
1 |
885 |
0 |
1 |
886 |
0 |
1 |
888 |
0 |
1 |
889 |
0 |
1 |
891 |
0 |
1 |
893 |
0 |
1 |
896 |
0 |
1 |
|
|
|
==> MISSING_ELSE |
Cond Coverage for Module :
spi_passthrough
| Total | Covered | Percent |
Conditions | 97 | 0 | 0.00 |
Logical | 97 | 0 | 0.00 |
Non-Logical | 0 | 0 | |
Event | 0 | 0 | |
LINE 271
EXPRESSION (spi_mode_i == PassThrough)
-------------1-------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 355
SUB-EXPRESSION (filter | csb_deassert)
---1-- ------2-----
-1- | -2- | Status | Tests |
0 | 0 | Not Covered | |
0 | 1 | Not Covered | |
1 | 0 | Not Covered | |
LINE 362
EXPRESSION (bitcnt != '1)
-------1------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 372
EXPRESSION (bitcnt == 6'(6))
--------1--------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 373
EXPRESSION (bitcnt == 6'(7))
--------1--------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 404
EXPRESSION (cmd_info_i[i].opcode == {opcode_d[6:0], 1'b1})
-----------------------1-----------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 406
EXPRESSION (cmd_info_i[i].opcode == {opcode_d[6:0], 1'b0})
-----------------------1-----------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 467
EXPRESSION (addr_mode == Addr4B)
----------1----------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 475
EXPRESSION (st == StAddress)
--------1--------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 490
EXPRESSION (addrcnt_outclk != '0)
-----------1----------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 497
EXPRESSION (cfg_addr_mask_i[addrcnt_outclk] ? cfg_addr_value_i[addrcnt_outclk] : host_s_i[0])
---------------1---------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 522
EXPRESSION ((payloadcnt != '0) && payload_replace)
---------1-------- -------2-------
-1- | -2- | Status | Tests |
0 | 1 | Not Covered | |
1 | 0 | Not Covered | |
1 | 1 | Not Covered | |
LINE 522
SUB-EXPRESSION (payloadcnt != '0)
---------1--------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 543
EXPRESSION (payloadcnt == '0)
---------1--------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 546
EXPRESSION (cfg_payload_mask_i[payloadcnt_outclk] ? cfg_payload_data_i[payloadcnt_outclk] : host_s_i[0])
------------------1------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 570
EXPRESSION (addr_phase_outclk & cmd_info_addr_swap_en_outclk)
--------1-------- --------------2-------------
-1- | -2- | Status | Tests |
0 | 1 | Not Covered | |
1 | 0 | Not Covered | |
1 | 1 | Not Covered | |
LINE 572
EXPRESSION (payload_replace_outclk & cmd_info_payload_swap_en_outclk)
-----------1---------- ---------------2---------------
-1- | -2- | Status | Tests |
0 | 1 | Not Covered | |
1 | 0 | Not Covered | |
1 | 1 | Not Covered | |
LINE 575
EXPRESSION (addr_swap_en | payload_swap_en)
------1----- -------2-------
-1- | -2- | Status | Tests |
0 | 0 | Not Covered | |
0 | 1 | Not Covered | |
1 | 0 | Not Covered | |
LINE 576
EXPRESSION (addr_swap_en ? addr_swap : payload_swap)
------1-----
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 585
EXPRESSION (st == StHighZ)
-------1-------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 589
EXPRESSION (dummycnt == '0)
--------1-------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 600
EXPRESSION (st == StMByte)
-------1-------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 604
EXPRESSION (mbyte_cnt == '0)
--------1--------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 609
EXPRESSION (swap_en ? ({host_s_i[3:1], swap_data}) : host_s_i)
---1---
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 734
EXPRESSION (host_csb_i | csb_deassert_outclk)
-----1---- ---------2---------
-1- | -2- | Status | Tests |
0 | 0 | Not Covered | |
0 | 1 | Not Covered | |
1 | 0 | Not Covered | |
LINE 737
EXPRESSION (is_active && ((!passthrough_block_i)))
----1---- ------------2-----------
-1- | -2- | Status | Tests |
0 | 1 | Not Covered | |
1 | 0 | Not Covered | |
1 | 1 | Not Covered | |
LINE 782
EXPRESSION (cmd_8th && cmd_filter[host_s_i[0]])
---1--- -----------2-----------
-1- | -2- | Status | Tests |
0 | 1 | Not Covered | |
1 | 0 | Not Covered | |
1 | 1 | Not Covered | |
LINE 787
EXPRESSION (cmd_8th && cmd_info_d.valid)
---1--- --------2-------
-1- | -2- | Status | Tests |
0 | 1 | Not Covered | |
1 | 0 | Not Covered | |
1 | 1 | Not Covered | |
LINE 798
EXPRESSION (cmd_info_d.addr_mode != AddrDisabled)
-------------------1------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 807
EXPRESSION (cmd_info_d.payload_en != 4'b0)
---------------1---------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 809
EXPRESSION (cmd_info_d.payload_dir == PayloadOut)
-------------------1------------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 864
EXPRESSION (dummycnt_zero && (cmd_info.payload_dir == PayloadOut))
------1------ ------------------2-----------------
-1- | -2- | Status | Tests |
0 | 1 | Not Covered | |
1 | 0 | Not Covered | |
1 | 1 | Not Covered | |
LINE 864
SUB-EXPRESSION (cmd_info.payload_dir == PayloadOut)
------------------1-----------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 867
EXPRESSION (dummycnt_zero && (cmd_info.payload_dir == PayloadIn))
------1------ -----------------2-----------------
-1- | -2- | Status | Tests |
0 | 1 | Not Covered | |
1 | 0 | Not Covered | |
1 | 1 | Not Covered | |
LINE 867
SUB-EXPRESSION (cmd_info.payload_dir == PayloadIn)
-----------------1-----------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 876
EXPRESSION (addrcnt_outclk == '0)
-----------1----------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 886
EXPRESSION ((cmd_info.payload_en != 4'b0) && (cmd_info.payload_dir == PayloadOut))
--------------1-------------- ------------------2-----------------
-1- | -2- | Status | Tests |
0 | 1 | Not Covered | |
1 | 0 | Not Covered | |
1 | 1 | Not Covered | |
LINE 886
SUB-EXPRESSION (cmd_info.payload_en != 4'b0)
--------------1--------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 886
SUB-EXPRESSION (cmd_info.payload_dir == PayloadOut)
------------------1-----------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 889
EXPRESSION ((cmd_info.payload_en != 4'b0) && (cmd_info.payload_dir == PayloadIn))
--------------1-------------- -----------------2-----------------
-1- | -2- | Status | Tests |
0 | 1 | Not Covered | |
1 | 0 | Not Covered | |
1 | 1 | Not Covered | |
LINE 889
SUB-EXPRESSION (cmd_info.payload_en != 4'b0)
--------------1--------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
LINE 889
SUB-EXPRESSION (cmd_info.payload_dir == PayloadIn)
-----------------1-----------------
-1- | Status | Tests |
0 | Not Covered | |
1 | Not Covered | |
FSM Coverage for Module :
spi_passthrough
Summary for FSM :: st
| Total | Covered | Percent | |
States |
7 |
0 |
0.00 |
(Not included in score) |
Transitions |
12 |
0 |
0.00 |
|
Sequences |
0 |
0 |
|
|
State, Transition and Sequence Details for FSM :: st
states | Line No. | Covered | Tests |
StAddress |
799 |
Not Covered |
|
StDriving |
812 |
Not Covered |
|
StFilter |
783 |
Not Covered |
|
StHighZ |
803 |
Not Covered |
|
StIdle |
781 |
Not Covered |
|
StMByte |
832 |
Not Covered |
|
StWait |
810 |
Not Covered |
|
transitions | Line No. | Covered | Tests |
StAddress->StDriving |
891 |
Not Covered |
|
StAddress->StHighZ |
882 |
Not Covered |
|
StAddress->StMByte |
878 |
Not Covered |
|
StAddress->StWait |
888 |
Not Covered |
|
StHighZ->StDriving |
868 |
Not Covered |
|
StHighZ->StWait |
866 |
Not Covered |
|
StIdle->StAddress |
799 |
Not Covered |
|
StIdle->StDriving |
812 |
Not Covered |
|
StIdle->StFilter |
783 |
Not Covered |
|
StIdle->StHighZ |
803 |
Not Covered |
|
StIdle->StWait |
810 |
Not Covered |
|
StMByte->StHighZ |
827 |
Not Covered |
|
Branch Coverage for Module :
spi_passthrough
| Line No. | Total | Covered | Percent |
Branches |
|
96 |
0 |
0.00 |
TERNARY |
497 |
2 |
0 |
0.00 |
TERNARY |
546 |
2 |
0 |
0.00 |
TERNARY |
576 |
2 |
0 |
0.00 |
TERNARY |
609 |
2 |
0 |
0.00 |
IF |
336 |
3 |
0 |
0.00 |
IF |
345 |
3 |
0 |
0.00 |
IF |
349 |
2 |
0 |
0.00 |
IF |
360 |
3 |
0 |
0.00 |
IF |
376 |
3 |
0 |
0.00 |
IF |
401 |
2 |
0 |
0.00 |
IF |
414 |
3 |
0 |
0.00 |
IF |
425 |
3 |
0 |
0.00 |
IF |
451 |
2 |
0 |
0.00 |
IF |
467 |
2 |
0 |
0.00 |
IF |
478 |
2 |
0 |
0.00 |
IF |
486 |
4 |
0 |
0.00 |
IF |
506 |
2 |
0 |
0.00 |
IF |
520 |
3 |
0 |
0.00 |
IF |
528 |
2 |
0 |
0.00 |
IF |
533 |
4 |
0 |
0.00 |
IF |
539 |
2 |
0 |
0.00 |
IF |
561 |
2 |
0 |
0.00 |
IF |
582 |
4 |
0 |
0.00 |
IF |
596 |
4 |
0 |
0.00 |
IF |
613 |
2 |
0 |
0.00 |
CASE |
693 |
3 |
0 |
0.00 |
IF |
713 |
2 |
0 |
0.00 |
IF |
745 |
2 |
0 |
0.00 |
CASE |
778 |
24 |
0 |
0.00 |
WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_spi_device_0.1/rtl/spi_passthrough.sv' or '../src/lowrisc_ip_spi_device_0.1/rtl/spi_passthrough.sv was not found/opened, so annotated branch coverage report could not be generated.
LineNo. Expression
-1-: 497 (cfg_addr_mask_i[addrcnt_outclk]) ?
Branches:
-1- | Status | Tests |
1 |
Not Covered |
|
0 |
Not Covered |
|
LineNo. Expression
-1-: 546 (cfg_payload_mask_i[payloadcnt_outclk]) ?
Branches:
-1- | Status | Tests |
1 |
Not Covered |
|
0 |
Not Covered |
|
LineNo. Expression
-1-: 576 (addr_swap_en) ?
Branches:
-1- | Status | Tests |
1 |
Not Covered |
|
0 |
Not Covered |
|
LineNo. Expression
-1-: 609 (swap_en) ?
Branches:
-1- | Status | Tests |
1 |
Not Covered |
|
0 |
Not Covered |
|
LineNo. Expression
-1-: 336 if ((!rst_ni))
-2-: 338 if ((bitcnt < 6'(8)))
Branches:
-1- | -2- | Status | Tests |
1 |
- |
Not Covered |
|
0 |
1 |
Not Covered |
|
0 |
0 |
Not Covered |
|
LineNo. Expression
-1-: 345 if ((!rst_ni))
-2-: 346 if (filter)
Branches:
-1- | -2- | Status | Tests |
1 |
- |
Not Covered |
|
0 |
1 |
Not Covered |
|
0 |
0 |
Not Covered |
|
LineNo. Expression
-1-: 349 if ((!rst_out_ni))
Branches:
-1- | Status | Tests |
1 |
Not Covered |
|
0 |
Not Covered |
|
LineNo. Expression
-1-: 360 if ((!rst_ni))
-2-: 362 if ((bitcnt != '1))
Branches:
-1- | -2- | Status | Tests |
1 |
- |
Not Covered |
|
0 |
1 |
Not Covered |
|
0 |
0 |
Not Covered |
|
LineNo. Expression
-1-: 376 if ((!rst_ni))
-2-: 378 if (cmd_7th)
Branches:
-1- | -2- | Status | Tests |
1 |
- |
Not Covered |
|
0 |
1 |
Not Covered |
|
0 |
0 |
Not Covered |
|
LineNo. Expression
-1-: 401 if (cmd_7th)
Branches:
-1- | Status | Tests |
1 |
Not Covered |
|
0 |
Not Covered |
|
LineNo. Expression
-1-: 414 if ((!rst_ni))
-2-: 416 if (cmd_7th)
Branches:
-1- | -2- | Status | Tests |
1 |
- |
Not Covered |
|
0 |
1 |
Not Covered |
|
0 |
0 |
Not Covered |
|
LineNo. Expression
-1-: 425 if ((!rst_ni))
-2-: 427 if (cmd_info_latch)
Branches:
-1- | -2- | Status | Tests |
1 |
- |
Not Covered |
|
0 |
1 |
Not Covered |
|
0 |
0 |
Not Covered |
|
LineNo. Expression
-1-: 451 if (cmd_8th)
Branches:
-1- | Status | Tests |
1 |
Not Covered |
|
0 |
Not Covered |
|
LineNo. Expression
-1-: 467 if ((addr_mode == Addr4B))
Branches:
-1- | Status | Tests |
1 |
Not Covered |
|
0 |
Not Covered |
|
LineNo. Expression
-1-: 478 if ((!rst_ni))
Branches:
-1- | Status | Tests |
1 |
Not Covered |
|
0 |
Not Covered |
|
LineNo. Expression
-1-: 486 if ((!rst_out_ni))
-2-: 488 if (addr_set_q)
-3-: 490 if ((addrcnt_outclk != '0))
Branches:
-1- | -2- | -3- | Status | Tests |
1 |
- |
- |
Not Covered |
|
0 |
1 |
- |
Not Covered |
|
0 |
0 |
1 |
Not Covered |
|
0 |
0 |
0 |
Not Covered |
|
LineNo. Expression
-1-: 506 if ((!rst_out_ni))
Branches:
-1- | Status | Tests |
1 |
Not Covered |
|
0 |
Not Covered |
|
LineNo. Expression
-1-: 520 if ((!rst_ni))
-2-: 522 if (((payloadcnt != '0) && payload_replace))
Branches:
-1- | -2- | Status | Tests |
1 |
- |
Not Covered |
|
0 |
1 |
Not Covered |
|
0 |
0 |
Not Covered |
|
LineNo. Expression
-1-: 528 if ((!rst_out_ni))
Branches:
-1- | Status | Tests |
1 |
Not Covered |
|
0 |
Not Covered |
|
LineNo. Expression
-1-: 533 if ((!rst_ni))
-2-: 534 if (payload_replace_set)
-3-: 535 if (payload_replace_clr)
Branches:
-1- | -2- | -3- | Status | Tests |
1 |
- |
- |
Not Covered |
|
0 |
1 |
- |
Not Covered |
|
0 |
0 |
1 |
Not Covered |
|
0 |
0 |
0 |
Not Covered |
|
LineNo. Expression
-1-: 539 if ((!rst_out_ni))
Branches:
-1- | Status | Tests |
1 |
Not Covered |
|
0 |
Not Covered |
|
LineNo. Expression
-1-: 561 if ((!rst_out_ni))
Branches:
-1- | Status | Tests |
1 |
Not Covered |
|
0 |
Not Covered |
|
LineNo. Expression
-1-: 582 if ((!rst_ni))
-2-: 583 if (dummy_set)
-3-: 585 if ((st == StHighZ))
Branches:
-1- | -2- | -3- | Status | Tests |
1 |
- |
- |
Not Covered |
|
0 |
1 |
- |
Not Covered |
|
0 |
0 |
1 |
Not Covered |
|
0 |
0 |
0 |
Not Covered |
|
LineNo. Expression
-1-: 596 if ((!rst_ni))
-2-: 598 if (mbyte_set)
-3-: 600 if ((st == StMByte))
Branches:
-1- | -2- | -3- | Status | Tests |
1 |
- |
- |
Not Covered |
|
0 |
1 |
- |
Not Covered |
|
0 |
0 |
1 |
Not Covered |
|
0 |
0 |
0 |
Not Covered |
|
LineNo. Expression
-1-: 613 if ((!rst_out_ni))
Branches:
-1- | Status | Tests |
1 |
Not Covered |
|
0 |
Not Covered |
|
LineNo. Expression
-1-: 693 case (cmd_info.read_pipeline_mode)
Branches:
-1- | Status | Tests |
RdPipeTwoStageFullCycle |
Not Covered |
|
RdPipeTwoStageHalfCycle |
Not Covered |
|
default |
Not Covered |
|
LineNo. Expression
-1-: 713 if ((!rst_out_ni))
Branches:
-1- | Status | Tests |
1 |
Not Covered |
|
0 |
Not Covered |
|
LineNo. Expression
-1-: 745 if ((!rst_ni))
Branches:
-1- | Status | Tests |
1 |
Not Covered |
|
0 |
Not Covered |
|
LineNo. Expression
-1-: 778 case (st)
-2-: 780 if ((!is_active))
-3-: 782 if ((cmd_8th && cmd_filter[host_s_i[0]]))
-4-: 787 if ((cmd_8th && cmd_info_d.valid))
-5-: 798 if ((cmd_info_d.addr_mode != AddrDisabled))
-6-: 802 if (cmd_info_d.dummy_en)
-7-: 807 if ((cmd_info_d.payload_en != 4'b0))
-8-: 809 if ((cmd_info_d.payload_dir == PayloadOut))
-9-: 818 if (cmd_8th)
-10-: 826 if (mbytecnt_zero)
-11-: 864 if ((dummycnt_zero && (cmd_info.payload_dir == PayloadOut)))
-12-: 867 if ((dummycnt_zero && (cmd_info.payload_dir == PayloadIn)))
-13-: 876 if ((addrcnt_outclk == '0))
-14-: 877 if (cmd_info.mbyte_en)
-15-: 881 if (cmd_info.dummy_en)
-16-: 886 if (((cmd_info.payload_en != 4'b0) && (cmd_info.payload_dir == PayloadOut)))
-17-: 889 if (((cmd_info.payload_en != 4'b0) && (cmd_info.payload_dir == PayloadIn)))
Branches:
-1- | -2- | -3- | -4- | -5- | -6- | -7- | -8- | -9- | -10- | -11- | -12- | -13- | -14- | -15- | -16- | -17- | Status | Tests |
StIdle |
1 |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
Not Covered |
|
StIdle |
0 |
1 |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
Not Covered |
|
StIdle |
0 |
0 |
1 |
1 |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
Not Covered |
|
StIdle |
0 |
0 |
1 |
0 |
1 |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
Not Covered |
|
StIdle |
0 |
0 |
1 |
0 |
0 |
1 |
1 |
- |
- |
- |
- |
- |
- |
- |
- |
- |
Not Covered |
|
StIdle |
0 |
0 |
1 |
0 |
0 |
1 |
0 |
- |
- |
- |
- |
- |
- |
- |
- |
- |
Not Covered |
|
StIdle |
0 |
0 |
1 |
0 |
0 |
0 |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
Not Covered |
|
StIdle |
0 |
0 |
0 |
- |
- |
- |
- |
1 |
- |
- |
- |
- |
- |
- |
- |
- |
Not Covered |
|
StIdle |
0 |
0 |
0 |
- |
- |
- |
- |
0 |
- |
- |
- |
- |
- |
- |
- |
- |
Not Covered |
|
StMByte |
- |
- |
- |
- |
- |
- |
- |
- |
1 |
- |
- |
- |
- |
- |
- |
- |
Not Covered |
|
StMByte |
- |
- |
- |
- |
- |
- |
- |
- |
0 |
- |
- |
- |
- |
- |
- |
- |
Not Covered |
|
StFilter |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
Not Covered |
|
StWait |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
Not Covered |
|
StDriving |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
Not Covered |
|
StHighZ |
- |
- |
- |
- |
- |
- |
- |
- |
- |
1 |
- |
- |
- |
- |
- |
- |
Not Covered |
|
StHighZ |
- |
- |
- |
- |
- |
- |
- |
- |
- |
0 |
1 |
- |
- |
- |
- |
- |
Not Covered |
|
StHighZ |
- |
- |
- |
- |
- |
- |
- |
- |
- |
0 |
0 |
- |
- |
- |
- |
- |
Not Covered |
|
StAddress |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
1 |
1 |
- |
- |
- |
Not Covered |
|
StAddress |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
1 |
0 |
1 |
- |
- |
Not Covered |
|
StAddress |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
1 |
0 |
0 |
1 |
- |
Not Covered |
|
StAddress |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
1 |
0 |
0 |
0 |
1 |
Not Covered |
|
StAddress |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
1 |
0 |
0 |
0 |
0 |
Not Covered |
|
StAddress |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
0 |
- |
- |
- |
- |
Not Covered |
|
default |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
- |
Not Covered |
|