Unified Coverage Report :: Module :: spi_cmdparse

Module : spi_cmdparse

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Source File(s) :
/workspace/default/sim-vcs/../src/lowrisc_ip_spi_device_0.1/rtl/spi_cmdparse.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.u_cmdparse	0.00	0.00	0.00		0.00	0.00

---

Module Instance : tb.dut.u_cmdparse

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
0.00	0.00	0.00		0.00	0.00

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
18.78	0.00	0.00	75.11		0.00		dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
no children

---

Since this is the module's only instance, the coverage report is the same as for the module.

Line Coverage for Module : spi_cmdparse

	Line No.	Total	Covered	Percent
TOTAL		108	0	0.00
CONT_ASSIGN	85	1	0	0.00
ALWAYS	90	3	0	0.00
CONT_ASSIGN	156	1	0	0.00
CONT_ASSIGN	160	1	0	0.00
ALWAYS	185	4	0	0.00
CONT_ASSIGN	194	1	0	0.00
CONT_ASSIGN	196	1	0	0.00
CONT_ASSIGN	198	1	0	0.00
CONT_ASSIGN	200	1	0	0.00
CONT_ASSIGN	202	1	0	0.00
CONT_ASSIGN	204	1	0	0.00
ALWAYS	208	4	0	0.00
ALWAYS	218	6	0	0.00
ALWAYS	233	7	0	0.00
CONT_ASSIGN	253	1	0	0.00
CONT_ASSIGN	254	1	0	0.00
ALWAYS	263	5	0	0.00
CONT_ASSIGN	279	1	0	0.00
ALWAYS	283	11	0	0.00
CONT_ASSIGN	295	1	0	0.00
CONT_ASSIGN	302	1	0	0.00
CONT_ASSIGN	303	1	0	0.00
CONT_ASSIGN	304	1	0	0.00
ALWAYS	307	4	0	0.00
ALWAYS	315	48	0	0.00

WARNING: The source file '/workspace/default/sim-vcs/../src/lowrisc_ip_spi_device_0.1/rtl/spi_cmdparse.sv' or '../src/lowrisc_ip_spi_device_0.1/rtl/spi_cmdparse.sv' was not found, so annotated line coverage report could not be generated.

Line No.	Covered	Statements
85	0	1
90	0	1
91	0	1
92	0	1
156	0	1
160	0	1
185	0	1
186	0	1
187	0	1
189	0	1
			==> MISSING_ELSE
194	0	1
196	0	1
198	0	1
200	0	1
202	0	1
204	0	1
208	0	1
209	0	1
210	0	1
211	0	1
			==> MISSING_ELSE
218	0	1
219	0	1
225	0	1
226	0	1
227	0	1
228	0	1
			==> MISSING_ELSE
233	0	1
239	0	1
240	0	1
241	0	1
242	0	1
243	0	1
244	0	1
			==> MISSING_ELSE
			==> MISSING_ELSE
253	0	1
254	0	1
263	0	1
269	0	1
271	0	1
272	0	1
273	0	1
			==> MISSING_ELSE
279	0	1
283	0	1
284	0	1
285	0	1
286	0	1
287	0	1
288	0	2
			==> MISSING_ELSE
289	0	2
			==> MISSING_ELSE
290	0	2
			==> MISSING_ELSE
			==> MISSING_ELSE
295	0	1
302	0	1
303	0	1
304	0	1
307	0	1
308	0	1
309	0	1
310	0	1
			==> MISSING_ELSE
315	0	1
317	0	1
318	0	1
320	0	1
321	0	1
323	0	1
325	0	1
327	0	1
329	0	1
330	0	1
332	0	1
334	0	1
335	0	1
336	0	1
337	0	1
338	0	1
340	0	1
345	0	1
346	0	1
347	0	1
348	0	1
349	0	1
351	0	1
357	0	1
358	0	1
359	0	1
360	0	1
361	0	1
364	0	1
372	0	1
376	0	1
377	0	1
381	0	1
384	0	1
388	0	1
391	0	1
401	0	1
403	0	1
404	0	1
			==> MISSING_ELSE
409	0	1
411	0	1
413	0	1
415	0	1
417	0	1
419	0	1
421	0	1
424	0	1
426	0	1

---

Cond Coverage for Module : spi_cmdparse

	Total	Covered	Percent
Conditions	89	0	0.00
Logical	89	0	0.00
Non-Logical	0	0
Event	0	0

 LINE       187
 EXPRESSION (cmd_info_i[(CmdInfoReadStatus1 + i)].valid && (data_i == cmd_info_i[(CmdInfoReadStatus1 + i)].opcode))
             ---------------------1--------------------    ---------------------------2---------------------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       187
 SUB-EXPRESSION (data_i == cmd_info_i[(CmdInfoReadStatus1 + i)].opcode)
                ---------------------------1---------------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       194
 EXPRESSION (cmd_info_i[CmdInfoReadJedecId].valid && (data_i == cmd_info_i[CmdInfoReadJedecId].opcode))
             ------------------1-----------------    ------------------------2------------------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       194
 SUB-EXPRESSION (data_i == cmd_info_i[CmdInfoReadJedecId].opcode)
                ------------------------1------------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       196
 EXPRESSION (cmd_info_i[CmdInfoReadSfdp].valid && (data_i == cmd_info_i[CmdInfoReadSfdp].opcode))
             ----------------1----------------    -----------------------2----------------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       196
 SUB-EXPRESSION (data_i == cmd_info_i[CmdInfoReadSfdp].opcode)
                -----------------------1----------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       198
 EXPRESSION (((!sck_status_busy_i)) && cmd_info_i[CmdInfoEn4B].valid && (data_i == cmd_info_i[CmdInfoEn4B].opcode))
             -----------1----------    --------------2--------------    ---------------------3--------------------

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       198
 SUB-EXPRESSION (data_i == cmd_info_i[CmdInfoEn4B].opcode)
                ---------------------1--------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       200
 EXPRESSION (((!sck_status_busy_i)) && cmd_info_i[CmdInfoEx4B].valid && (data_i == cmd_info_i[CmdInfoEx4B].opcode))
             -----------1----------    --------------2--------------    ---------------------3--------------------

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       200
 SUB-EXPRESSION (data_i == cmd_info_i[CmdInfoEx4B].opcode)
                ---------------------1--------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       202
 EXPRESSION (((!sck_status_busy_i)) && cmd_info_i[CmdInfoWrEn].valid && (data_i == cmd_info_i[CmdInfoWrEn].opcode))
             -----------1----------    --------------2--------------    ---------------------3--------------------

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       202
 SUB-EXPRESSION (data_i == cmd_info_i[CmdInfoWrEn].opcode)
                ---------------------1--------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       204
 EXPRESSION (((!sck_status_busy_i)) && cmd_info_i[CmdInfoWrDi].valid && (data_i == cmd_info_i[CmdInfoWrDi].opcode))
             -----------1----------    --------------2--------------    ---------------------3--------------------

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       204
 SUB-EXPRESSION (data_i == cmd_info_i[CmdInfoWrDi].opcode)
                ---------------------1--------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       210
 EXPRESSION (cmd_info_i[i].valid && (data_i == cmd_info_i[i].opcode))
             ---------1---------    ----------------2---------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       210
 SUB-EXPRESSION (data_i == cmd_info_i[i].opcode)
                ----------------1---------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       240
 EXPRESSION ((st == StIdle) && module_active && data_valid_i)
             -------1------    ------2------    ------3-----

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       240
 SUB-EXPRESSION (st == StIdle)
                -------1------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       242
 EXPRESSION (cmd_info_i[i].valid && (data_i == cmd_info_i[i].opcode))
             ---------1---------    ----------------2---------------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       242
 SUB-EXPRESSION (data_i == cmd_info_i[i].opcode)
                ----------------1---------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       271
 EXPRESSION ((st == StIdle) && module_active && data_valid_i)
             -------1------    ------2------    ------3-----

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       271
 SUB-EXPRESSION (st == StIdle)
                -------1------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       279
 EXPRESSION (cmd_info_d.upload && ((!sck_status_busy_i)))
             --------1--------    -----------2----------

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

 LINE       295
 EXPRESSION ((cmd_info_q.read_pipeline_mode == RdPipeTwoStageHalfCycle) || (cmd_info_q.read_pipeline_mode == RdPipeTwoStageFullCycle))
             -----------------------------1----------------------------    -----------------------------2----------------------------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       295
 SUB-EXPRESSION (cmd_info_q.read_pipeline_mode == RdPipeTwoStageHalfCycle)
                -----------------------------1----------------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       295
 SUB-EXPRESSION (cmd_info_q.read_pipeline_mode == RdPipeTwoStageFullCycle)
                -----------------------------1----------------------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       302
 EXPRESSION (spi_mode_i == FlashMode)
            ------------1------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       303
 EXPRESSION (spi_mode_i == PassThrough)
            -------------1-------------

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       304
 EXPRESSION (in_flashmode || in_passthrough)
             ------1-----    -------2------

-1-	-2-	Status	Tests
0	0	Not Covered
0	1	Not Covered
1	0	Not Covered

 LINE       327
 EXPRESSION (module_active && data_valid_i && cmd_info_d.valid)
             ------1------    ------2-----    --------3-------

-1-	-2-	-3-	Status	Tests
0	1	1	Not Covered
1	0	1	Not Covered
1	1	0	Not Covered
1	1	1	Not Covered

 LINE       384
 EXPRESSION (opcode_en4b ? DpEn4B : DpEx4B)
             -----1-----

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       391
 EXPRESSION (opcode_wren ? DpWrEn : DpWrDi)
             -----1-----

-1-	Status	Tests
0	Not Covered
1	Not Covered

 LINE       401
 EXPRESSION (module_active && data_valid_i)
             ------1------    ------2-----

-1-	-2-	Status	Tests
0	1	Not Covered
1	0	Not Covered
1	1	Not Covered

---

FSM Coverage for Module : spi_cmdparse

Summary for FSM :: st

	Total	Covered	Percent
States	9	0	0.00	(Not included in score)
Transitions	8	0	0.00
Sequences	0	0

State, Transition and Sequence Details for FSM :: st

---

states	Line No.	Covered	Tests
StAddr4B	381	Not Covered
StIdle	240	Not Covered
StJedec	346	Not Covered
StReadCmd	372	Not Covered
StSfdp	358	Not Covered
StStatus	335	Not Covered
StUpload	376	Not Covered
StWait	340	Not Covered
StWrEn	388	Not Covered

transitions	Line No.	Covered	Tests
StIdle->StAddr4B	381	Not Covered
StIdle->StJedec	346	Not Covered
StIdle->StReadCmd	372	Not Covered
StIdle->StSfdp	358	Not Covered
StIdle->StStatus	335	Not Covered
StIdle->StUpload	376	Not Covered
StIdle->StWait	340	Not Covered
StIdle->StWrEn	388	Not Covered

---

Branch Coverage for Module : spi_cmdparse

	Line No.	Total	Covered	Percent
Branches		49	0	0.00
IF	187	2	0	0.00
IF	210	2	0	0.00
IF	218	3	0	0.00
IF	240	2	0	0.00
IF	271	2	0	0.00
IF	283	8	0	0.00
IF	307	3	0	0.00
CASE	325	27	0	0.00

WARNING: The source file /workspace/default/sim-vcs/../src/lowrisc_ip_spi_device_0.1/rtl/spi_cmdparse.sv' or '../src/lowrisc_ip_spi_device_0.1/rtl/spi_cmdparse.sv was not found/opened, so annotated branch coverage report could not be generated.

	LineNo.	Expression
-1-:	187	if ((cmd_info_i[(CmdInfoReadStatus1 + i)].valid && (data_i == cmd_info_i[(CmdInfoReadStatus1 + i)].opcode)))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	210	if ((cmd_info_i[i].valid && (data_i == cmd_info_i[i].opcode)))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	218	if ((!rst_ni))
-2-:	226	if (latch_cmdinfo)

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered

	LineNo.	Expression
-1-:	240	if ((((st == StIdle) && module_active) && data_valid_i))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	271	if ((((st == StIdle) && module_active) && data_valid_i))

Branches:

-1-	Status	Tests
1	Not Covered
0	Not Covered

	LineNo.	Expression
-1-:	283	if ((!rst_ni))
-2-:	287	if (intercept_d)
-3-:	288	if (opcode_readstatus)
-4-:	289	if (opcode_readjedec)
-5-:	290	if (opcode_readsfdp)

Branches:

-1-	-2-	-3-	-4-	-5-	Status	Tests
1	-	-	-	-	Not Covered
0	1	1	-	-	Not Covered
0	1	0	-	-	Not Covered
0	1	-	1	-	Not Covered
0	1	-	0	-	Not Covered
0	1	-	-	1	Not Covered
0	1	-	-	0	Not Covered
0	0	-	-	-	Not Covered

	LineNo.	Expression
-1-:	307	if ((!rst_ni))
-2-:	309	if (module_active)

Branches:

-1-	-2-	Status	Tests
1	-	Not Covered
0	1	Not Covered
0	0	Not Covered

	LineNo.	Expression
-1-:	325	case (st)
-2-:	327	if (((module_active && data_valid_i) && cmd_info_d.valid))
-3-:	332	case (1'b1)
-4-:	334	if (in_flashmode)
-5-:	336	if (cfg_intercept_en_status_i)
-6-:	345	if (in_flashmode)
-7-:	347	if (cfg_intercept_en_jedec_i)
-8-:	357	if (in_flashmode)
-9-:	359	if (cfg_intercept_en_sfdp_i)
-10-:	384	(opcode_en4b) ? 
-11-:	391	(opcode_wren) ? 
-12-:	401	if ((module_active && data_valid_i))

Branches:

-1-	-2-	-3-	-4-	-5-	-6-	-7-	-8-	-9-	-10-	-11-	-12-	Status	Tests
StIdle	1	opcode_readstatus	1	-	-	-	-	-	-	-	-	Not Covered
StIdle	1	opcode_readstatus	0	1	-	-	-	-	-	-	-	Not Covered
StIdle	1	opcode_readstatus	0	0	-	-	-	-	-	-	-	Not Covered
StIdle	1	opcode_readjedec	-	-	1	-	-	-	-	-	-	Not Covered
StIdle	1	opcode_readjedec	-	-	0	1	-	-	-	-	-	Not Covered
StIdle	1	opcode_readjedec	-	-	0	0	-	-	-	-	-	Not Covered
StIdle	1	opcode_readsfdp	-	-	-	-	1	-	-	-	-	Not Covered
StIdle	1	opcode_readsfdp	-	-	-	-	0	1	-	-	-	Not Covered
StIdle	1	opcode_readsfdp	-	-	-	-	0	0	-	-	-	Not Covered
StIdle	1	opcode_readcmd	-	-	-	-	-	-	-	-	-	Not Covered
StIdle	1	upload	-	-	-	-	-	-	-	-	-	Not Covered
StIdle	1	opcode_en4b opcode_ex4b	-	-	-	-	-	-	1	-	-	Not Covered
StIdle	1	opcode_en4b opcode_ex4b	-	-	-	-	-	-	0	-	-	Not Covered
StIdle	1	opcode_wren opcode_wrdi	-	-	-	-	-	-	-	1	-	Not Covered
StIdle	1	opcode_wren opcode_wrdi	-	-	-	-	-	-	-	0	-	Not Covered
StIdle	1	default	-	-	-	-	-	-	-	-	-	Not Covered
StIdle	0	-	-	-	-	-	-	-	-	-	1	Not Covered
StIdle	0	-	-	-	-	-	-	-	-	-	0	Not Covered
StStatus	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StJedec	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StSfdp	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StReadCmd	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StUpload	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StAddr4B	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StWrEn	-	-	-	-	-	-	-	-	-	-	-	Not Covered
StWait	-	-	-	-	-	-	-	-	-	-	-	Not Covered
default	-	-	-	-	-	-	-	-	-	-	-	Not Covered