| Name |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.77671534573352185148574000369631618969715444943027097838840173340484268644098 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.55463029822207436965198577677370798155867372064810384530660350053608247921646 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.73506251104599959907197125012983945993190343559821940488057152114874441488107 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.31151297542882181734008777778513858307734846636601993562460852147034137156789 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.61165113511442705793176420017562603902104835420693767331688977341754970228273 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.71461085596839642352803879595430879560378065862907186126103312436007685792137 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.5498193194699947925986336642794049335573016442929163104494856031632776245022 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.21303005843898178506414549872606275834121661495410015147939063825696292395803 |
| /workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.40731725216397540708136331474712153000829677266943249815020029463131138626306 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.6461806534861362036476013141340844237734983074995272098094728913622277812237 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.99010753011305628975578792118893773372497492980128916830987536097104182810107 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.81368886264710465322790727508751245229257594866695137754487804066591484420838 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.96726415734964811810006189543143620458148880611764893493721536817109366085210 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.114133135089823081968350807840182562493155794938048668986148029318386510347082 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.86085289985713739840595274710705586414745367072192828158575234386002106340481 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.25294721308175567514993254976722528917299882410905878572740491685430232856766 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.10885563205416197970303094457582796116174452380453849967305400827122979936436 |
| /workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.55221053937313941714682830054523459849425731071978088749963934026457451836324 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.114283093249972753519544059163280145238877828691890222249201778493596217284581 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.77850814228922720028417556196782502103366539157994972371591181652984735536001 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.33693274085043288077818723938727364666718150358285048397796726177616089780344 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.102090798558225618714210810727550317983958953969827899520034138960125332011419 |
| /workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.68109867432021687773944888846384548275465514344895265475989834070233950254274 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.85496929916767435639680743766685541201224599722134428551832343324307592513926 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.26524079794436608048423006079806256528702133554301221361608200135576180001883 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.12007403740571077682143060438531484021851132880453236427796077681288908619192 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.35070764332577133522023776168424856803168778388003523459817123391255297576574 |
| /workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.92671118812612931593232787075399846656642063783120464243574390679823797845647 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.28396412284469339667035682003936544637390369771046962410348706978768367213249 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.44220108766693112709492361897463513828073568436381713752027570358251885829304 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.92574553490816719080025078389496148714434730316639409294916197198109586833345 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.59391605579866802736515735894551934200191260117311480031394669696021290131010 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.65285733560913185608747064657468406533206180832871939261534633031473635919958 |
| /workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.84952136589659008873558452297705090695454886572909421823031433341265979803810 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.13525278061176384095880825966787844948115315772018649129197307819184383394919 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.53816298029072511586735132513698933336994263970034695183116912633790502469652 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.96396940503270038670510401781606454616779767948761192222955774361836651067004 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.28073842112919194892892491907513496988301990300477062212391666735974195218595 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.103680850422852171897616120267898621110313585011291848358813567312066038662763 |
| /workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.72161406910027710784534158897122708640283592612319816121028284997280108894667 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.2753388801222790784762166359440804078639770071694006766118366200426597588409 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.109220307288222441580776216968852381357820340614090908571963114148021718277220 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.24316379693410198168974636929809471582256986702887037812267831414456456057521 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.54686919289222119138480301159059662212359808631906554940257505090982479677821 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.74935775348446543620301075272505320928479133810301673103428548837526370744580 |
| /workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.42050395587334384894656781291956537119223233963363281496803716727506309072098 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.6129430770868737286973581567024016833421007710427826296709374708963229912445 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.16429328088108863185898691246250559479438832487975219700557897932524774752405 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.64596020427356262482596168260181124629404187252242605454597679794562494336051 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.114092636433972087775584276278459075461230008302917764472870171503756737264008 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.16683384380872382608109423910533040996479431321485118877128881171439546085399 |
| /workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.90825624285135790952516004537182304776109446870412989668834352134893236194858 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.53810410784606333883194070254548636685283471011541262397516351879783948885699 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.61331131106322234623729956527645991018858235272319968808253478362482250641217 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.8879784263405482895945722070460820040732480522934155339997508095189025040025 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.77822413249595707897252258113948291680051378124373947410563850541335562034463 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.49419978625018015794611224626327874289390174943024976804298062610448369315291 |
| /workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.111310604526398987070910091953818569414716403451129193805330663881140262935069 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.103893343158297421828240478497285892365340947681963054671970279335716151949800 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.8504768809475117202033563294205174532521568729423800640749744222698954520162 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.30289478462768985131349709593073352066062995234609903602155646809383155898260 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.106808613613331305943048798644930206514255581797305763679951723873959143396349 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.10442951025476605586555108735105628130177658322680207608493995930848957996942 |
| /workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2346890792682761939360708380453632925945306326042678579217651325001808196692 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.61378348831018304818619751485286270084179009106281752041078773751199544397140 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.5727840388464264007023930061384418554495343448625228506613591880054243251736 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.10802973449096983307588226112716846497332216127285774938199724404191272368627 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.113661322765775341675056646452898103562040629050166301453843348576760878391144 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.670164647643522888858581715613672606021799275848467541082507969987344764391 |
| /workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.87761969234963493236196594210753723056734620983425640195630620833280474463000 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.30046181533722445649216928368539379611345409597366649536827707570970045291802 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.90266491336684871862364616748606484752062607572496498991776158605503272681099 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.103211154912372674403456714302975642778037012914020900030594641927353276934887 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.75587944230571732010444725210334378489945169878858737366499074575992622797087 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.38241638472650502841811160385397340316368123576822575179486301835705613421667 |
| /workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.103069340598747431990071044771124132974926048755095464332150456962950656345182 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.73983361105693687217764672700484913355352697285945388662574935674259925671288 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.15474479891670548892218945944925612429787134237901825443147620343188064944576 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.78708103697583881776286149189657531401819402409069497086150817836179386540092 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.39757538203191427449273522235785879739277651992642770010268199798723259966846 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.87952917610482111939900079438745538750371900184082431092991745369464661417712 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.97516860504755559732182431463975439449917216778530988356167022781947515403288 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.21669999302620157421332876632725765636041480744236003361825489026203340085192 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.42601008519622297573023060351469273407969513590554830449226457863712482144882 |
| /workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.55281314534479351765588494765018590137523459564421829253345281065317904877562 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.62746283545692386397693538652031091269369409791532639912643354838406043443197 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.82899458900857819930128144140838487631744732028535471085671289552582166294886 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.69125063116818918079171883624956482020463431849939686088877450514117108743938 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.10265965801160319342922288048165964291537045583674172312225960399636336660992 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.31964992380519496049604698737831435414377928201654282352330966619603322384514 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.104198086280643600581056486010368836519799598592726634244625540625924061023894 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.51171154468460862196607619170892472631347097569251722943895126288100848924039 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.54091580787935463831960597657937433038328151556659657103207428682468429234458 |
| /workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.85371674674149293606425275792358827613741264280915777957752733551617481132194 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.114760855771495887991376764846292605452052750410043571839176427366505061161949 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.36012596917899307105210684084039466729713262532777076937320645785368242115444 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.38247381663261697107512461027348987333602112273802272993611563404847626532502 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.49472841528790214190133861162965304815358432458210030085774297281173150063161 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.72131591288988861383020352033415336699431853766037642850533996771049478034949 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.93177519516785476753792694427293544757138130934456272902746426281181831409984 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.52402300398668724933108397378185348010901923032624895689961037248468315250539 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.93558634982218313494583045095251791402617731873897691126627425580921147750503 |
| /workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.40615128841264764863536184555350119168682709041229061669522262383641545366356 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.32512268922028897778247421190217845357111061731622474120974990474610047567793 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.106100637150894289721600707371789813228252766636754291294535629738724247824334 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.52154708174082915490241353810147950748445221552037214695548416931211604076811 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.95537291622258273661265236646308842766500278177520440952985819582440148088893 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.76218344811629093157643678602429730359749804024530230882560518490799230779788 |
| /workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.106953177646651158281561049400073966757182732385531125813202582949523697747936 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.10776305821613019645643104123423593926092886353154496470179951236060021424861 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.72498509719034281865012652999048648258712613855664347778004318442270176984504 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.6147690435437613040930997881488506146754508728024833274372063123670348107368 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.26465664620752747247334714167694387205265917088641784305717029628519905471485 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.38365065300502150476387525339988660965742068399935273786135530148099501637769 |
| /workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.93054744943016274227569424506859463866541600163312695192472309128606683173865 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.17055585524241717329211729386568134570967571914794990420049006738434426384269 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.62865182040719649560217832902292039833816057136984017361081556473910268152324 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1788505344261904705647516108466418990679600893545237429181790121243170224085 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.54470711131283528066830022597444772227365863781056551929231569781259233604481 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.51864385224181930031316165096451777802934021714034290839245171000842046081810 |
| /workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.6717016130418538571827433867789769714057226571462556995737811320253518184733 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.48441691054872613505342829509943036320569742589463830561039792090198530359861 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.57551692702204569504893566368013001463646312994454454612563704876046250376580 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.100378487120127451095545822979861728130367066941935269374968904261612857818345 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.50260613777827375233379027488079298649020262073251618283318702229172874656880 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.89810490053213331165134152149133561089994378667025560410798718438104862799469 |
| /workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.107561028670912098466949084365539322444596124217628596728834945832299718783748 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.63924063712984168663822962045398062650331678972911578669295397800587258099799 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.98422744247689494619722581158429349373909871206550051599214947549081620751950 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.10526243101749363336146484349002130946591912372913208928135092944157395404304 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.26209100846828647687021217690865422260712389168770831560647202968697977603411 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.104253788264897596578876015016003926725164304813835885977560003265426639186042 |
| /workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.85674737186548614548316117704908961218873631332261808521826276765077681400303 |
| /workspace/coverage/default/0.sram_ctrl_alert_test.112809873363349528972392864898077135181306272668744478382512681107687817217554 |
| /workspace/coverage/default/0.sram_ctrl_bijection.14236853175365790837420994345329792466505124407444047651439458105105871243319 |
| /workspace/coverage/default/0.sram_ctrl_executable.50053472331875680528654747997343673619588764459331200674534996910204644310432 |
| /workspace/coverage/default/0.sram_ctrl_lc_escalation.14316558283802171417493146248402980722688950856079795747261678811767122688992 |
| /workspace/coverage/default/0.sram_ctrl_max_throughput.85652975483871234728381981842917060815707291328649225938429152912811534675205 |
| /workspace/coverage/default/0.sram_ctrl_mem_partial_access.79153322629509074238243547559406800928198004633996058580909034171827797765521 |
| /workspace/coverage/default/0.sram_ctrl_mem_walk.12866653507669721460422948692204691748231331895054698292526095045144583380998 |
| /workspace/coverage/default/0.sram_ctrl_multiple_keys.103813192958839404615839212678928050024085286358311912008590536902985794078392 |
| /workspace/coverage/default/0.sram_ctrl_partial_access.99575018609465906086995141259168136387291956090829967925219877066169849432490 |
| /workspace/coverage/default/0.sram_ctrl_partial_access_b2b.60322399172968119777093966662978641990499401866523112121258917292617252926637 |
| /workspace/coverage/default/0.sram_ctrl_ram_cfg.69449508693335185162731949899036543490901198779082267224880417653392503992909 |
| /workspace/coverage/default/0.sram_ctrl_regwen.107297785454567685038307186258119697339366234560768921711455021964528067944913 |
| /workspace/coverage/default/0.sram_ctrl_smoke.97672599528330236192942045119989877698878615016547966009305707559228181242001 |
| /workspace/coverage/default/0.sram_ctrl_stress_all_with_rand_reset.57626811586187221322169999392960958158109599636693584295757640925692214697935 |
| /workspace/coverage/default/0.sram_ctrl_stress_pipeline.114477218268314570846733036185158609380496033008494203138794822546902358087391 |
| /workspace/coverage/default/0.sram_ctrl_throughput_w_partial_write.38711735526398738190532800360396338930063547184392042502234130036187585646520 |
| /workspace/coverage/default/1.sram_ctrl_access_during_key_req.86848055439220614350805965016649565636996623524747237169182259414244574683084 |
| /workspace/coverage/default/1.sram_ctrl_alert_test.3784617781505200413903724876986551372773407261379642724891136635944632944759 |
| /workspace/coverage/default/1.sram_ctrl_bijection.23819635589509637366062558660310180490308599132930925093865020353634112922575 |
| /workspace/coverage/default/1.sram_ctrl_executable.34742728431912817542883885338988671308477904232337415100174357295879045868621 |
| /workspace/coverage/default/1.sram_ctrl_lc_escalation.74617542037004636652741300235135838693542823657918374609564727249464413365933 |
| /workspace/coverage/default/1.sram_ctrl_max_throughput.61163402776535538230857521363775249160778641809063539061045292897798968275286 |
| /workspace/coverage/default/1.sram_ctrl_mem_partial_access.17651771502651172777502700922211279672003241460407553354565263008748135679360 |
| /workspace/coverage/default/1.sram_ctrl_mem_walk.54345307656035657241134135983740707102611792545987693951561583715973283628855 |
| /workspace/coverage/default/1.sram_ctrl_multiple_keys.8181650315877850080548491325064569744762337523649434429218517889801716275628 |
| /workspace/coverage/default/1.sram_ctrl_partial_access.15880121183995594582963746141282029343938481337945523626505652259950753403119 |
| /workspace/coverage/default/1.sram_ctrl_partial_access_b2b.104374162890066184764856889487323050134984476502831978645826577925100163868538 |
| /workspace/coverage/default/1.sram_ctrl_ram_cfg.71303009588920609749847813355830880482365359057078640167562394503485861667377 |
| /workspace/coverage/default/1.sram_ctrl_regwen.97581121378408147199760825372724387577701015050083311031617585739317200246662 |
| /workspace/coverage/default/1.sram_ctrl_sec_cm.78697229452657256874857329639802786284763244256602691738185079493550208149396 |
| /workspace/coverage/default/1.sram_ctrl_smoke.35212588445775237340485611638125259500683250865409133677951932658538244423109 |
| /workspace/coverage/default/1.sram_ctrl_stress_all_with_rand_reset.77013796694343981999319957735185713861208210660528262281324120117884276113829 |
| /workspace/coverage/default/1.sram_ctrl_stress_pipeline.22034292843912522763281539341761366903346535258173443158484639204601466201200 |
| /workspace/coverage/default/1.sram_ctrl_throughput_w_partial_write.100283415645294570649960989799759482527753497564584561331194317385134333319344 |
| /workspace/coverage/default/10.sram_ctrl_access_during_key_req.78295387342906768555146807273939534448140297905591086790721603898014902142558 |
| /workspace/coverage/default/10.sram_ctrl_alert_test.1820972545689654327373802500370241730806403197402453894980984415998278993266 |
| /workspace/coverage/default/10.sram_ctrl_bijection.112540147403982170934804616840696440180986479954051139037849140966550252515330 |
| /workspace/coverage/default/10.sram_ctrl_executable.34832647289644940590347170646353240339852442365227873862916705844602441463462 |
| /workspace/coverage/default/10.sram_ctrl_lc_escalation.71271543813604498035142155892459876421841699829735101919662650411071619323900 |
| /workspace/coverage/default/10.sram_ctrl_max_throughput.43771713896864027706121533382090869642732018485116716499663955467260416473300 |
| /workspace/coverage/default/10.sram_ctrl_mem_partial_access.4160904248690155320319594872148471905637860784053621870117286229513688189543 |
| /workspace/coverage/default/10.sram_ctrl_mem_walk.81339386144484500615042459106474808209861276915293285803736733511154366447426 |
| /workspace/coverage/default/10.sram_ctrl_multiple_keys.91335809470540223544602720429995434915865818290569560338340445349470177611934 |
| /workspace/coverage/default/10.sram_ctrl_partial_access.99634353628997104058971577551266126392101418875864294040443601077326313091842 |
| /workspace/coverage/default/10.sram_ctrl_partial_access_b2b.63296679439965636533613506908147783398482615268328693658994415675931057442810 |
| /workspace/coverage/default/10.sram_ctrl_ram_cfg.15272213846248682612675919931050794842408466057859747531741551438774463187812 |
| /workspace/coverage/default/10.sram_ctrl_regwen.16698653681883382364484455777460293154610756022955893569678272473688855478200 |
| /workspace/coverage/default/10.sram_ctrl_smoke.71569320930495032181545335246410134007879804239601298913866140691067188519629 |
| /workspace/coverage/default/10.sram_ctrl_stress_all_with_rand_reset.104316390072420374319870056094060578487212257400203556131051070749802719512333 |
| /workspace/coverage/default/10.sram_ctrl_stress_pipeline.40294297540232927778334388078720640898489170566465282225649163523485045188870 |
| /workspace/coverage/default/10.sram_ctrl_throughput_w_partial_write.40392266418090842235842311942105770636337364928449250026328923066919100074002 |
| /workspace/coverage/default/11.sram_ctrl_access_during_key_req.15064598150323865400946681521429663685404510225230199012391889645535077252481 |
| /workspace/coverage/default/11.sram_ctrl_alert_test.32640424409486980645006551611462358898402607264205560081660824745544184028014 |
| /workspace/coverage/default/11.sram_ctrl_bijection.94567558145300147761921332221055391419187896041212940157421527266307624918430 |
| /workspace/coverage/default/11.sram_ctrl_executable.91762344062453192387735312909807169704666147256268900994048456910235711475092 |
| /workspace/coverage/default/11.sram_ctrl_lc_escalation.36730963147197501108298017079648655583959453028983281362662620015478363287176 |
| /workspace/coverage/default/11.sram_ctrl_max_throughput.47278336623854218803103932032245833077827419352509502963244915226424927636641 |
| /workspace/coverage/default/11.sram_ctrl_mem_partial_access.48739311568081635918883939726971405210993705835650790358163928921537980401455 |
| /workspace/coverage/default/11.sram_ctrl_mem_walk.113358069922254369363955964460283425350072815025673393060721049060599403786989 |
| /workspace/coverage/default/11.sram_ctrl_multiple_keys.43896697481078286182682952405436287265275354564270390027421694540038451932702 |
| /workspace/coverage/default/11.sram_ctrl_partial_access.76563944905194740929275334525420659083036828293580270629282502547220811481142 |
| /workspace/coverage/default/11.sram_ctrl_partial_access_b2b.75699531533517815694557142712618720028796750296971168060537553846463846190945 |
| /workspace/coverage/default/11.sram_ctrl_ram_cfg.91756484503571847540499783965559176708292495216170506896176136247052672672748 |
| /workspace/coverage/default/11.sram_ctrl_smoke.89670178055763676321883738736013322575073595869931205174563048315926115777305 |
| /workspace/coverage/default/11.sram_ctrl_stress_all_with_rand_reset.92297796798872436447988990897439193602217678520393545007065640586490984709178 |
| /workspace/coverage/default/11.sram_ctrl_stress_pipeline.94566916753977620486751088543293061761623474882021004564755636678424417796482 |
| /workspace/coverage/default/11.sram_ctrl_throughput_w_partial_write.15357777738368425574205823354918225420530640919349964141062309412898199612414 |
| /workspace/coverage/default/12.sram_ctrl_access_during_key_req.53733283498830787486025502382808433428899308982172073489090483063763278401557 |
| /workspace/coverage/default/12.sram_ctrl_bijection.38271302603396034366809515719586621176667138255285263420609053421516432641676 |
| /workspace/coverage/default/12.sram_ctrl_executable.83015794451167867588709093090640235422253462632805005603733453815401402350110 |
| /workspace/coverage/default/12.sram_ctrl_lc_escalation.74338491368089705711872487970685067245104056722746905801017157361546868493884 |
| /workspace/coverage/default/12.sram_ctrl_max_throughput.43597377986235563365978746760352656878702233502104176505929010581465922619105 |
| /workspace/coverage/default/12.sram_ctrl_mem_partial_access.12226508748301500209453661144212639577679328058200360924964044299823446630897 |
| /workspace/coverage/default/12.sram_ctrl_mem_walk.28995607836990060929882415920185932759342231074593301268868015625814081997186 |
| /workspace/coverage/default/12.sram_ctrl_multiple_keys.105696714819742047455206491526535702242324760008479903843416420134348809806531 |
| /workspace/coverage/default/12.sram_ctrl_partial_access.105701769554508972811302893890140640360659578095479158445788335264184982906558 |
| /workspace/coverage/default/12.sram_ctrl_partial_access_b2b.69554273526720662201186459108129187826069792599572390099958323126213747235898 |
| /workspace/coverage/default/12.sram_ctrl_ram_cfg.20677156860764593241515162828403708772549167171071784448811513240977509705819 |
| /workspace/coverage/default/12.sram_ctrl_regwen.19552600604423705769363906076205344330139576503023217734457442480624266275066 |
| /workspace/coverage/default/12.sram_ctrl_smoke.100730811282970285803723010683339137397127523689577803644912050872074606985742 |
| /workspace/coverage/default/12.sram_ctrl_stress_all_with_rand_reset.92108622493368827305875768906779651274836009463198247923116920920583327395969 |
| /workspace/coverage/default/12.sram_ctrl_stress_pipeline.63876671114010302730337387881594155563683167269132519333392668586837317898956 |
| /workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.84312528736275254052644743390534747583914399559551967657171303983581492166889 |
| /workspace/coverage/default/13.sram_ctrl_access_during_key_req.2844877470588187446826195650948634644537087236657359783773763851723142929450 |
| /workspace/coverage/default/13.sram_ctrl_alert_test.62061697479568573998675581668803202481556467315997405760843130387615448053772 |
| /workspace/coverage/default/13.sram_ctrl_bijection.105850257911630294257978996856118816467388809929004131464673923308190818501448 |
| /workspace/coverage/default/13.sram_ctrl_executable.114588513386423180282663990401324484932130176186593739206631566854726767328374 |
| /workspace/coverage/default/13.sram_ctrl_lc_escalation.959393740518167349986682417246064638396913996905356991609730491421872786966 |
| /workspace/coverage/default/13.sram_ctrl_max_throughput.8561102205623849734430862651063193566483682170986383036830440878285300564020 |
| /workspace/coverage/default/13.sram_ctrl_mem_partial_access.30760328185372152549276691211379360483698900858485034006656096565675124734666 |
| /workspace/coverage/default/13.sram_ctrl_mem_walk.30844947952459994631288897081406390401224017586433604765099190825509177764532 |
| /workspace/coverage/default/13.sram_ctrl_multiple_keys.88022087401299231351383463833886266496995032986173285310131440233697631540376 |
| /workspace/coverage/default/13.sram_ctrl_partial_access.28461579224738705352674596998513206741238143194549823397491555328506906757846 |
| /workspace/coverage/default/13.sram_ctrl_partial_access_b2b.22665604742996489002441929973296033405497085532902709442354661475882292943423 |
| /workspace/coverage/default/13.sram_ctrl_ram_cfg.112083371973444327469369795819130300718428078055563065779913247696120457433235 |
| /workspace/coverage/default/13.sram_ctrl_regwen.32420283149322171653664428401156253841442633912899655379807728212429412885575 |
| /workspace/coverage/default/13.sram_ctrl_smoke.27254529455110058827891803311150852312365404008806724003663392767044543673677 |
| /workspace/coverage/default/13.sram_ctrl_stress_all_with_rand_reset.31342624169660234699404031988278376526797938287381949410500125641462656151324 |
| /workspace/coverage/default/13.sram_ctrl_stress_pipeline.86214541454427303232245346088711491481490857056308436524626036899990263371124 |
| /workspace/coverage/default/13.sram_ctrl_throughput_w_partial_write.44474049413164534375309748170518876753380902437104481328726623802635602346310 |
| /workspace/coverage/default/14.sram_ctrl_access_during_key_req.24750137753452791108876723449910718521509640937749735735933932507808718421555 |
| /workspace/coverage/default/14.sram_ctrl_alert_test.1915489783793400716692169033799684492363125029078432516116676430539684594837 |
| /workspace/coverage/default/14.sram_ctrl_bijection.27190003799475646944026550181515978595733625867127159765446004143860381435956 |
| /workspace/coverage/default/14.sram_ctrl_executable.98174202291538497887943670299603644215706276643363576592987634837458190485433 |
| /workspace/coverage/default/14.sram_ctrl_lc_escalation.4590356316745180477694680870202857654060134108769071485927132325883624928166 |
| /workspace/coverage/default/14.sram_ctrl_max_throughput.2004531777933684782330822211369183975811376453689667297314477522701219094616 |
| /workspace/coverage/default/14.sram_ctrl_mem_partial_access.34211557462938058434430518627321214791614921312145638757692416892602272558919 |
| /workspace/coverage/default/14.sram_ctrl_mem_walk.85594607609585756532817463135867865698206937735636466325099038280413098099189 |
| /workspace/coverage/default/14.sram_ctrl_multiple_keys.8258077801808688950884783394947505629723756203087515965163361309687563413301 |
| /workspace/coverage/default/14.sram_ctrl_partial_access.53199036150544922024386070323716599472574357562983982570180713656799238482650 |
| /workspace/coverage/default/14.sram_ctrl_partial_access_b2b.26496178508254375919362205388428167330100119551467552649598426807186071806281 |
| /workspace/coverage/default/14.sram_ctrl_ram_cfg.45378232298444185736789048206659088647356037758691092321248127701740825462261 |
| /workspace/coverage/default/14.sram_ctrl_regwen.35510907709521384062067732414387727522505459133560525432189440763208088507929 |
| /workspace/coverage/default/14.sram_ctrl_smoke.113068490126761410536147742537300776189101558477613973987858697311715102417109 |
| /workspace/coverage/default/14.sram_ctrl_stress_all_with_rand_reset.7513280565685746618685806259552349153634068672198503890950758988337329467749 |
| /workspace/coverage/default/14.sram_ctrl_stress_pipeline.84780865084192019883012583638088589753961438307488715880844004994238214197599 |
| /workspace/coverage/default/14.sram_ctrl_throughput_w_partial_write.75545058730503344163066596134556164355251182179712674697812385207382092657156 |
| /workspace/coverage/default/15.sram_ctrl_access_during_key_req.35931381824593632987218291788601368603651147543303112936294855406474494104839 |
| /workspace/coverage/default/15.sram_ctrl_alert_test.79409834359400708856301331718826916284550458155548313841277356195378814287124 |
| /workspace/coverage/default/15.sram_ctrl_bijection.112741635325622324396781206335183698697059929475066152909083205781327638719505 |
| /workspace/coverage/default/15.sram_ctrl_executable.20650826174749108037045927234475721218462542612567838400679320898728145701125 |
| /workspace/coverage/default/15.sram_ctrl_lc_escalation.29873461971224156052629564868349722822614900877385018048097453918016809391452 |
| /workspace/coverage/default/15.sram_ctrl_max_throughput.91815639230652012147950171340733554280345364917193907975442893243623729249744 |
| /workspace/coverage/default/15.sram_ctrl_mem_partial_access.101849600205718104502918889709366997979571189422636223350125682782910747219638 |
| /workspace/coverage/default/15.sram_ctrl_mem_walk.89834793035270434199439988891336707288553484626333531249577939183077802449146 |
| /workspace/coverage/default/15.sram_ctrl_multiple_keys.91644436968765977810162317123932864212795042318296104118281105537988194613956 |
| /workspace/coverage/default/15.sram_ctrl_partial_access.16048700891261296252435459057837590215068110745754615072415250479891434602158 |
| /workspace/coverage/default/15.sram_ctrl_partial_access_b2b.5706782459546526096897190274077471077833478831086848447494360801591444830491 |
| /workspace/coverage/default/15.sram_ctrl_ram_cfg.110465380861960047015989230244116002702120677891286488985293252698021411367025 |
| /workspace/coverage/default/15.sram_ctrl_regwen.109190861869912521671946782774780139427679318218475552293482472775547944355174 |
| /workspace/coverage/default/15.sram_ctrl_smoke.5970118569503750734989565291200028956737500039084475091797460788887291736156 |
| /workspace/coverage/default/15.sram_ctrl_stress_all_with_rand_reset.94231334619638750995141052919221984316091131512873616191567031615977783644816 |
| /workspace/coverage/default/15.sram_ctrl_stress_pipeline.24376610032743614085397632241187073902554870023675338350333929442903361125539 |
| /workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.106811414164843765756792522226006415292669157043624455373820930992033432957173 |
| /workspace/coverage/default/16.sram_ctrl_access_during_key_req.102703595264357632224481482077335011584028716240925251558581324616384711343246 |
| /workspace/coverage/default/16.sram_ctrl_alert_test.78350143842123360629745927342865214679894090770309127471568400128495881052819 |
| /workspace/coverage/default/16.sram_ctrl_bijection.65326532910713526934138083472741591386976442931705688626963234824384099467735 |
| /workspace/coverage/default/16.sram_ctrl_executable.106940786598521730967802865927891989751217277662889262958195040901306084574772 |
| /workspace/coverage/default/16.sram_ctrl_max_throughput.55992064750154653665120466959305300640433697205298613339654475924268378929630 |
| /workspace/coverage/default/16.sram_ctrl_mem_partial_access.38171894869294863013760767260140880923100857452118142990833556995340857458981 |
| /workspace/coverage/default/16.sram_ctrl_mem_walk.31826243918918317444858699567817948084849142241227214026586057583307891326899 |
| /workspace/coverage/default/16.sram_ctrl_multiple_keys.4072209334563683596464622309052107926450764424893912894437681524368892913688 |
| /workspace/coverage/default/16.sram_ctrl_partial_access.43028369447828460030828416863699600933066298605274981566112960510608964184467 |
| /workspace/coverage/default/16.sram_ctrl_partial_access_b2b.87430746624652618413618686872392113758268047647713434473722313089823856060468 |
| /workspace/coverage/default/16.sram_ctrl_ram_cfg.30890972788301477744110947229308241774180662613203488874551056783734336486799 |
| /workspace/coverage/default/16.sram_ctrl_regwen.107889197396681137610076462431774698064105581869244337383820114740934644173686 |
| /workspace/coverage/default/16.sram_ctrl_smoke.7034390366851252515846920555921541684089257975633460438752017633189000699414 |
| /workspace/coverage/default/16.sram_ctrl_stress_all_with_rand_reset.4978206322932935475132483877512764175713461242087225247722178851174867586336 |
| /workspace/coverage/default/16.sram_ctrl_stress_pipeline.87761745542554751633026825000407639025471115134034321801125934345089610718233 |
| /workspace/coverage/default/16.sram_ctrl_throughput_w_partial_write.46828441300570107030647390740444002382627970259948997733062752968126425843499 |
| /workspace/coverage/default/17.sram_ctrl_access_during_key_req.102617421266852684588327479085519555067172789294010339148929925582261502892612 |
| /workspace/coverage/default/17.sram_ctrl_alert_test.13990121283724769217268585237326255389368044155316652322125412270061526892823 |
| /workspace/coverage/default/17.sram_ctrl_bijection.114535423405506613323558216844113594371317987526751552470072597427945562488926 |
| /workspace/coverage/default/17.sram_ctrl_executable.107049778849075706080363240220934224086138464596641515169404588908462648002406 |
| /workspace/coverage/default/17.sram_ctrl_lc_escalation.51949284885184848952700305238183920767464724140739659529166616908221167592636 |
| /workspace/coverage/default/17.sram_ctrl_max_throughput.37280575077858540754785626237040137076901344162405532937559629904797056759071 |
| /workspace/coverage/default/17.sram_ctrl_mem_partial_access.31597266741867244481067568364386300570474786341427271872959996694335704888816 |
| /workspace/coverage/default/17.sram_ctrl_mem_walk.76326916799107143752950485615326585779023859998417687166576948291386248157522 |
| /workspace/coverage/default/17.sram_ctrl_multiple_keys.16686215553983864261829765444293065453383513275020482731639721573576270564442 |
| /workspace/coverage/default/17.sram_ctrl_partial_access.24892313832722449785825377964237069533578869167489468057940172077356142357121 |
| /workspace/coverage/default/17.sram_ctrl_partial_access_b2b.49928978493105519676685769231456321046800597078989649589400634428131004832590 |
| /workspace/coverage/default/17.sram_ctrl_ram_cfg.46602710155964998096919208353445166801773245713700857631193161957935563975876 |
| /workspace/coverage/default/17.sram_ctrl_regwen.95664672409971462500662574790994152351677395958178250082920843508138943879364 |
| /workspace/coverage/default/17.sram_ctrl_smoke.31377705510593371987571525973129561643318701721527740271834935700920167889489 |
| /workspace/coverage/default/17.sram_ctrl_stress_all_with_rand_reset.27940177714923765773462253616283750550672891140669482405107896666917773910000 |
| /workspace/coverage/default/17.sram_ctrl_stress_pipeline.77821556652183158434885703203431830311048665593510389441885105509597914690848 |
| /workspace/coverage/default/17.sram_ctrl_throughput_w_partial_write.37128604054060234527272023560162887930239199248298782394744319878435396028268 |
| /workspace/coverage/default/18.sram_ctrl_access_during_key_req.12057857139972953262060379967775720408636630457868853003160238685229774065276 |
| /workspace/coverage/default/18.sram_ctrl_alert_test.93242344686330138514057025902253108960106973975725723369482434888761183001868 |
| /workspace/coverage/default/18.sram_ctrl_bijection.82648891117661201283086133853492569417101216924295133637094750306154958669218 |
| /workspace/coverage/default/18.sram_ctrl_executable.6108544153117086010118348244899762563141001846304611105988222024043734546849 |
| /workspace/coverage/default/18.sram_ctrl_lc_escalation.85955272828484431602817142999735276025496440474100728213663987543318306648878 |
| /workspace/coverage/default/18.sram_ctrl_max_throughput.66752410564357833543903843467688781678702079569266988927211629705917381883336 |
| /workspace/coverage/default/18.sram_ctrl_mem_partial_access.10457976343755819223109798488690879424301101977286354706507388273700074294779 |
| /workspace/coverage/default/18.sram_ctrl_mem_walk.41449909161355230882121405665017221315236279220240264034032780773373610327769 |
| /workspace/coverage/default/18.sram_ctrl_multiple_keys.111416591950219340514049620696577863664017873908889853774922684938944714754230 |
| /workspace/coverage/default/18.sram_ctrl_partial_access.72560551457667753265074218313107160161548287672715700758228194149733597785763 |
| /workspace/coverage/default/18.sram_ctrl_partial_access_b2b.101839037033852991836323107550827636477578546387657123968238975694769135242297 |
| /workspace/coverage/default/18.sram_ctrl_ram_cfg.94381856655303101560505734898047770691233103500797858422532853340380472035463 |
| /workspace/coverage/default/18.sram_ctrl_regwen.95898024780089884580471214435519298684337878572840213677441478996510904841059 |
| /workspace/coverage/default/18.sram_ctrl_smoke.46144317135586959411519535913193286956987105147681974697741738777348722024355 |
| /workspace/coverage/default/18.sram_ctrl_stress_all_with_rand_reset.105003182911112234733474697567948453563560601485319497610783430763452558962874 |
| /workspace/coverage/default/18.sram_ctrl_stress_pipeline.59775394302855025265042629330642083733435463193133392630018850624277079723866 |
| /workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.18217850030673032648306319224791878908073586008499901995704630230685952967789 |
| /workspace/coverage/default/19.sram_ctrl_access_during_key_req.41953776197155724946430497963750665750240538822234664464651326112983930614787 |
| /workspace/coverage/default/19.sram_ctrl_alert_test.39481370189828629188896668598739101327862579460391290613931920115007515374009 |
| /workspace/coverage/default/19.sram_ctrl_bijection.7488803540532577937460679299969233099995371334751721410288304089866089043687 |
| /workspace/coverage/default/19.sram_ctrl_executable.24124963162554785800132319562780636613622437920098521394690136529519024813691 |
| /workspace/coverage/default/19.sram_ctrl_lc_escalation.3491796460357932741891796931911150614155746142390840978327808332218514913813 |
| /workspace/coverage/default/19.sram_ctrl_max_throughput.51234561885161516733370699505124031324514766509228860953364016919094178954193 |
| /workspace/coverage/default/19.sram_ctrl_mem_partial_access.100696312781752067234687477586756662918688158371347128643475868849179233036584 |
| /workspace/coverage/default/19.sram_ctrl_mem_walk.38721964564818971263548621525049042914843623676156000227680447502145874353552 |
| /workspace/coverage/default/19.sram_ctrl_multiple_keys.113785817895634857736813058919558253354553865166435367511141612116699158819547 |
| /workspace/coverage/default/19.sram_ctrl_partial_access.21363015002366665488548835327163984877523572827228080012255774466644912086327 |
| /workspace/coverage/default/19.sram_ctrl_partial_access_b2b.47678856833653359498732535770501306142473020443053053212480940665037394205781 |
| /workspace/coverage/default/19.sram_ctrl_ram_cfg.55381236624696457272702460601748373205081080752181917721057604850784862059831 |
| /workspace/coverage/default/19.sram_ctrl_regwen.110683447596910266133685514971535421813563860031818983920630544968903923575475 |
| /workspace/coverage/default/19.sram_ctrl_smoke.24652599586261991848906881999306354103917182373254167424342372172608046061887 |
| /workspace/coverage/default/19.sram_ctrl_stress_all_with_rand_reset.109107868646612364844910763729269436320529295076598876184620902407870757465634 |
| /workspace/coverage/default/19.sram_ctrl_stress_pipeline.71330817175347587547972050601041357848957877098733645360693081818122837250985 |
| /workspace/coverage/default/19.sram_ctrl_throughput_w_partial_write.41496296697418645612784144497048992759255604460784192875409062463024428142946 |
| /workspace/coverage/default/2.sram_ctrl_access_during_key_req.36633260171279416796328785820136983818319372945882724550152639396999420141038 |
| /workspace/coverage/default/2.sram_ctrl_alert_test.95395660652582139058018372167972137592600631049812847435043105369658074271292 |
| /workspace/coverage/default/2.sram_ctrl_bijection.57860237628164388481965034091881555330737147120078002151234615207755058516277 |
| /workspace/coverage/default/2.sram_ctrl_executable.7745016435907713719135435141402815047450556275897511134573539486613281079916 |
| /workspace/coverage/default/2.sram_ctrl_lc_escalation.69051013191969961906681473188025150455950962620643109063331507621151836501673 |
| /workspace/coverage/default/2.sram_ctrl_max_throughput.73058362475170429976431835800188485497131028164472328890721263436476799338127 |
| /workspace/coverage/default/2.sram_ctrl_mem_partial_access.24358108455417966612533444978210927948878431257059008392214128061939991770931 |
| /workspace/coverage/default/2.sram_ctrl_mem_walk.15012098295363177823845164163961866402139229468513485193180744588144304497224 |
| /workspace/coverage/default/2.sram_ctrl_multiple_keys.52720461667914266800863096230877028011119192412669138847079386881521365157339 |
| /workspace/coverage/default/2.sram_ctrl_partial_access.107342562868949019702770640961260822683855483719016497049826902477377907019725 |
| /workspace/coverage/default/2.sram_ctrl_partial_access_b2b.74075858969977856908552538678977049872174033098500144197094000165352522764031 |
| /workspace/coverage/default/2.sram_ctrl_regwen.31292248498677221770169231580775040708300180716279129803775455515683849718545 |
| /workspace/coverage/default/2.sram_ctrl_sec_cm.75668097987430080264928916519636709144575755584681963209520445000737793668255 |
| /workspace/coverage/default/2.sram_ctrl_smoke.18871252523357014941858006583808342990722432352533907974611981194066078942144 |
| /workspace/coverage/default/2.sram_ctrl_stress_all_with_rand_reset.19741918599664555346456677627625719332733560211347364106625299561610682779506 |
| /workspace/coverage/default/2.sram_ctrl_stress_pipeline.14743301300654775287851155011431637967381987683963806015961233918616580609137 |
| /workspace/coverage/default/2.sram_ctrl_throughput_w_partial_write.78771247127464952379127593013889199909048709415022672961673004368133133125020 |
| /workspace/coverage/default/20.sram_ctrl_access_during_key_req.82196554509378104856162792360530432840324419977751300044328031162210558545865 |
| /workspace/coverage/default/20.sram_ctrl_alert_test.81038312005076686062904662127424311099887466279261974599003092754770193948802 |
| /workspace/coverage/default/20.sram_ctrl_bijection.13107051609915471190359102953453716355993457973583740788751231226912045363400 |
| /workspace/coverage/default/20.sram_ctrl_executable.85363066048326301784789382061960063199987850837889198856006753302135514450941 |
| /workspace/coverage/default/20.sram_ctrl_lc_escalation.85609703325282521030450817882248964397810277221177813794518098137665040336228 |
| /workspace/coverage/default/20.sram_ctrl_max_throughput.75285702035325743248002636375230304621570401374031542536826317271618965560595 |
| /workspace/coverage/default/20.sram_ctrl_mem_partial_access.65767587816148386748878622607329826489370748418893207071675035948014465317603 |
| /workspace/coverage/default/20.sram_ctrl_mem_walk.42346466323676235252446395125191902899281353333970629061511913990276394426708 |
| /workspace/coverage/default/20.sram_ctrl_multiple_keys.20402959751433360530044875468736197282173733133224801406507280190660384319092 |
| /workspace/coverage/default/20.sram_ctrl_partial_access.24733939036341673376904423564052340010247309885288924425919733467043290622495 |
| /workspace/coverage/default/20.sram_ctrl_partial_access_b2b.109823630389452689175761857477618364572170425174809755981973149286528447492145 |
| /workspace/coverage/default/20.sram_ctrl_ram_cfg.77205332449846106363383983845960975436321745440888347756694133632699537437556 |
| /workspace/coverage/default/20.sram_ctrl_regwen.61669075240175882145540177414045291532733876611704292110849414594322095994638 |
| /workspace/coverage/default/20.sram_ctrl_smoke.36887264514257275799314783952763603469380595870190357822941446764161648491178 |
| /workspace/coverage/default/20.sram_ctrl_stress_all_with_rand_reset.23589700146980345047941371167549403051587223642539718879805256891926629174092 |
| /workspace/coverage/default/20.sram_ctrl_stress_pipeline.3591757767892938191842997359468518659942778069412005941295332692362298373310 |
| /workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.111361904846248141806797983085832339261721084748630704594850873801500897833952 |
| /workspace/coverage/default/21.sram_ctrl_access_during_key_req.87005508989434857250588017944937022246687607173719053345334914326967039694655 |
| /workspace/coverage/default/21.sram_ctrl_alert_test.42151710758020254534406361365622310981144422707564633759089823259910968859536 |
| /workspace/coverage/default/21.sram_ctrl_bijection.46352732074536492390406864795074519939749554109025799605002587390601713520292 |
| /workspace/coverage/default/21.sram_ctrl_executable.52060595081352575001880108066294764577471840817677277488188545252546621906701 |
| /workspace/coverage/default/21.sram_ctrl_lc_escalation.43994856128588555525273055961296683220065455778841762636991650823090089085651 |
| /workspace/coverage/default/21.sram_ctrl_max_throughput.114428881117759822274332829858417188683914053283653169309775787642761818623445 |
| /workspace/coverage/default/21.sram_ctrl_mem_partial_access.13268264982215206276778147542145249668781680441815245666726115094576849400234 |
| /workspace/coverage/default/21.sram_ctrl_mem_walk.6151432524917473670957831809249674551659515830610337373335634251756157139605 |
| /workspace/coverage/default/21.sram_ctrl_multiple_keys.113916024150543722347091873669021126661478505806789977481315512876119331944131 |
| /workspace/coverage/default/21.sram_ctrl_partial_access.18152810040112457980884965760832168778159691643678979616247765076335008824332 |
| /workspace/coverage/default/21.sram_ctrl_partial_access_b2b.14916066366019188013817332907561445929843487301293462894922154340215793481789 |
| /workspace/coverage/default/21.sram_ctrl_ram_cfg.14041097237628763952611545808716246664724584401093342282041253484302015198069 |
| /workspace/coverage/default/21.sram_ctrl_regwen.30218398886526219127427501308770666935269123411816508797937106938723464036315 |
| /workspace/coverage/default/21.sram_ctrl_smoke.33300377311285779323759311637419609822511684732842485311079495780310124427366 |
| /workspace/coverage/default/21.sram_ctrl_stress_all_with_rand_reset.66779462821097208800694726783957806909832144979360577696364894981957680547016 |
| /workspace/coverage/default/21.sram_ctrl_stress_pipeline.93278992181250049782501954643462756384936951172277503721829603117386964381698 |
| /workspace/coverage/default/21.sram_ctrl_throughput_w_partial_write.48825259845798022767200028753861049400760937746506998988676448170247884889594 |
| /workspace/coverage/default/22.sram_ctrl_access_during_key_req.9860163381422896432748056959347849865992449636858510788991077708701263614674 |
| /workspace/coverage/default/22.sram_ctrl_alert_test.48568844147245060302533813889880592125809687553411803930634236574000490022464 |
| /workspace/coverage/default/22.sram_ctrl_bijection.59782266868987338606195520368936906557864729103549503881119867098082984943543 |
| /workspace/coverage/default/22.sram_ctrl_executable.71563913326519892822028640137520369132629392939645287227117133477806660235257 |
| /workspace/coverage/default/22.sram_ctrl_lc_escalation.50280806647767012242414628701299182613613945969423241292411933440182576109679 |
| /workspace/coverage/default/22.sram_ctrl_max_throughput.34048450681017480580066035426612861224344785977502090976074876426973209628910 |
| /workspace/coverage/default/22.sram_ctrl_mem_partial_access.22034230303643971210186712465717928281006311417036508654684250112181019392913 |
| /workspace/coverage/default/22.sram_ctrl_mem_walk.60332625588961380605464988759955797232267163517443960741982021080486071559153 |
| /workspace/coverage/default/22.sram_ctrl_multiple_keys.50780868758909995715816472527083983392890962046176981924413088604943299530356 |
| /workspace/coverage/default/22.sram_ctrl_partial_access.38722444175317569349361949199798417655504605441764003214724436737637192292908 |
| /workspace/coverage/default/22.sram_ctrl_partial_access_b2b.2194083945625318622486001997661311636624764113469753261085004815199613404945 |
| /workspace/coverage/default/22.sram_ctrl_ram_cfg.112595673139969423302761350653929880488086862174129521582901150347982825981044 |
| /workspace/coverage/default/22.sram_ctrl_regwen.88447987956252265996281810433023539989116634681470028382372802795046727248933 |
| /workspace/coverage/default/22.sram_ctrl_smoke.62860671088627549536922132272296249565458883443062697827328165403107262861026 |
| /workspace/coverage/default/22.sram_ctrl_stress_all_with_rand_reset.98407341398966671863374533412619110409604878517931381949257732086084829268211 |
| /workspace/coverage/default/22.sram_ctrl_stress_pipeline.58710148265580561083822536944393564019026291173096509275899463882919306624363 |
| /workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.50422925436755349559165612712339394426129096377039814733896493596340499791567 |
| /workspace/coverage/default/23.sram_ctrl_access_during_key_req.45300542004848483107714264862310996003520060989240096293365018819707382032655 |
| /workspace/coverage/default/23.sram_ctrl_alert_test.40112574239276150679232205024462922440169366073088670972693242233351416207775 |
| /workspace/coverage/default/23.sram_ctrl_bijection.12413211755757316004029160477983487431493895491157424830080914763121753971105 |
| /workspace/coverage/default/23.sram_ctrl_executable.23672169165983942869688336583350555320526685259825489231026442356703682246139 |
| /workspace/coverage/default/23.sram_ctrl_lc_escalation.47055454269059721263546711477190845552841418087099070088495043684607772948851 |
| /workspace/coverage/default/23.sram_ctrl_max_throughput.6455075806798252180675612855339997341219162403905519454016978026673448571441 |
| /workspace/coverage/default/23.sram_ctrl_mem_partial_access.18925083120601703775492371549462810071916905587280283461098992410929064244262 |
| /workspace/coverage/default/23.sram_ctrl_mem_walk.45207178340446478158572213375079247072247992646523552230514385242789496090838 |
| /workspace/coverage/default/23.sram_ctrl_multiple_keys.40051652075309415904579464463883329634569313755080422721263487566286835362365 |
| /workspace/coverage/default/23.sram_ctrl_partial_access.83600253138806848663026411176868948544752890812342804393257793126116297235181 |
| /workspace/coverage/default/23.sram_ctrl_partial_access_b2b.52976986384827756141646158154957112644369480703274485987565608689977404484814 |
| /workspace/coverage/default/23.sram_ctrl_ram_cfg.74325632490492450018417728132142480039230782308761865320097341515564610106516 |
| /workspace/coverage/default/23.sram_ctrl_regwen.4233760943593005474905764455524659628575727815591181160064700526410616497037 |
| /workspace/coverage/default/23.sram_ctrl_smoke.6287094297135588737948991784245067098462845026704555244479870518368220343572 |
| /workspace/coverage/default/23.sram_ctrl_stress_all_with_rand_reset.50331177651817338490068289073433692023931774842934929404410292265404676764621 |
| /workspace/coverage/default/23.sram_ctrl_stress_pipeline.35756850921890578285149376383755458514939378583386466604697764667285653619687 |
| /workspace/coverage/default/23.sram_ctrl_throughput_w_partial_write.109604443241149142447747349082883098446234135615133525806930269931869296924781 |
| /workspace/coverage/default/24.sram_ctrl_access_during_key_req.57841287435760943475030617422491507418047484714906900206727074407154369053488 |
| /workspace/coverage/default/24.sram_ctrl_alert_test.47009931853501751822633900891696687225640163613539209896437379113610433244517 |
| /workspace/coverage/default/24.sram_ctrl_bijection.90025672945876178608009589305346524391740509088008383048339726684972658725476 |
| /workspace/coverage/default/24.sram_ctrl_executable.3099644964393052079182846923050628032584283630858998756114176262210296772476 |
| /workspace/coverage/default/24.sram_ctrl_lc_escalation.38996845127948848087303887649161762893801936993627798631522621580561082990404 |
| /workspace/coverage/default/24.sram_ctrl_max_throughput.43422598264552219197252824198045238425661466275795939094855708537789576397420 |
| /workspace/coverage/default/24.sram_ctrl_mem_partial_access.37856441497490735232772385923192005821807448481636337015073599833146732624949 |
| /workspace/coverage/default/24.sram_ctrl_mem_walk.42712161618016160535776313570838128066713168120733352703604264421258816910461 |
| /workspace/coverage/default/24.sram_ctrl_multiple_keys.105383713462397021567072893922416741329690904156088892323633774376861263016050 |
| /workspace/coverage/default/24.sram_ctrl_partial_access.76435445624249256566200485885414182411273931763989745273586104681313418928545 |
| /workspace/coverage/default/24.sram_ctrl_partial_access_b2b.29300716446572105425899103246774172552581449230974231690264115150399148413246 |
| /workspace/coverage/default/24.sram_ctrl_ram_cfg.18654861670807026311102307689073720556760269949793297072790370784858065587922 |
| /workspace/coverage/default/24.sram_ctrl_regwen.70499092221266894607616050484857890638629600176435354811222638997285105301227 |
| /workspace/coverage/default/24.sram_ctrl_smoke.58654544257864788318216591203616402170986608831095972987178799702674952796718 |
| /workspace/coverage/default/24.sram_ctrl_stress_all_with_rand_reset.97220560141677314473211484740640901714418148156349795239775307860330700307554 |
| /workspace/coverage/default/24.sram_ctrl_stress_pipeline.27426022085729766674751374854834151155836438771779133591600830096275855047108 |
| /workspace/coverage/default/24.sram_ctrl_throughput_w_partial_write.22845984289649760749501583469985013976370074580370087382748655387970001193841 |
| /workspace/coverage/default/25.sram_ctrl_access_during_key_req.7595557551495408345890688385717838124103723376122669723041087092211042780840 |
| /workspace/coverage/default/25.sram_ctrl_alert_test.41593127561462716651218751305360598510639211929372587150205020070000829677148 |
| /workspace/coverage/default/25.sram_ctrl_bijection.106238657245000166460704836953804349648957106403812299804654974575796600421221 |
| /workspace/coverage/default/25.sram_ctrl_executable.59360450927184922350318137319970383978422944506573837226970694775579872379886 |
| /workspace/coverage/default/25.sram_ctrl_lc_escalation.105735745859239714550126216054104341743823974451986059801971799018579941350782 |
| /workspace/coverage/default/25.sram_ctrl_max_throughput.82542735823679971968124154923093732584354056901400777369656096718520420624167 |
| /workspace/coverage/default/25.sram_ctrl_mem_partial_access.18983872577140397262285234310276238180882536759025680447600814477702019495658 |
| /workspace/coverage/default/25.sram_ctrl_mem_walk.3787605747663566589653501336423557669704648376062180293613486594139466630314 |
| /workspace/coverage/default/25.sram_ctrl_multiple_keys.48419650153612422391004466968134835744611991398717678184239095631678436848615 |
| /workspace/coverage/default/25.sram_ctrl_partial_access.131998598740320006165766882993740871803682390575337490236361048014685742755 |
| /workspace/coverage/default/25.sram_ctrl_partial_access_b2b.82594608290622981656886664116019337970390838767514373096132369432183153320509 |
| /workspace/coverage/default/25.sram_ctrl_ram_cfg.16422829074147680226309656381506859755731452506845646241199584519875679319436 |
| /workspace/coverage/default/25.sram_ctrl_regwen.67753774373124696901902254268741198761427253250953962291220871580657437186656 |
| /workspace/coverage/default/25.sram_ctrl_smoke.72764243242055576377797031815972742092803987276508424912917560799603360530765 |
| /workspace/coverage/default/25.sram_ctrl_stress_all_with_rand_reset.77245224098620096529204608192522844056165793863675417431385092306223543280150 |
| /workspace/coverage/default/25.sram_ctrl_stress_pipeline.16703936748779888319512421074963763645227585013470315227134503395099491157703 |
| /workspace/coverage/default/25.sram_ctrl_throughput_w_partial_write.2089528353824115406358661095669777566762333457080584780429040194877062703734 |
| /workspace/coverage/default/26.sram_ctrl_access_during_key_req.24313659124725377436310875378817160362214016990333398726375481454907415410461 |
| /workspace/coverage/default/26.sram_ctrl_alert_test.56441651653424492419244037852764964143242147274954343708119820238220878987194 |
| /workspace/coverage/default/26.sram_ctrl_bijection.82406194974144047800143352229854403540799263565529924460388912512757720737037 |
| /workspace/coverage/default/26.sram_ctrl_executable.19162857130371756830822059441080555334183144800423173168107226046942689626600 |
| /workspace/coverage/default/26.sram_ctrl_lc_escalation.67329332952058922945642249174726527429766224749108391727788495556164746876486 |
| /workspace/coverage/default/26.sram_ctrl_max_throughput.25108693211950500984868047189456142667064276053533111616361686209926538048151 |
| /workspace/coverage/default/26.sram_ctrl_mem_partial_access.93505251794622152016126605513988972438779658139999489105786245575448690076461 |
| /workspace/coverage/default/26.sram_ctrl_mem_walk.32612139772642488741598567946352540368182443053041850634039526652087108386671 |
| /workspace/coverage/default/26.sram_ctrl_multiple_keys.68130848788928886928546010829478924491658255496206760688048741083185055707381 |
| /workspace/coverage/default/26.sram_ctrl_partial_access.10921809800050932710144433032066066416644024550310773592664632854836618626898 |
| /workspace/coverage/default/26.sram_ctrl_partial_access_b2b.46839457415934113709443131573439204873889836457048269574615436742410584857317 |
| /workspace/coverage/default/26.sram_ctrl_ram_cfg.90064635712808067412079882097767192872270137362768380461657575604886466813141 |
| /workspace/coverage/default/26.sram_ctrl_regwen.27390867141873846985196151950074682826199651653645963784366783079832572832297 |
| /workspace/coverage/default/26.sram_ctrl_smoke.27704790670124467001105854140054500124803481838083736108649035019460982657045 |
| /workspace/coverage/default/26.sram_ctrl_stress_all_with_rand_reset.22654687715587345850730870738958311374303617989186370526970421370032874057416 |
| /workspace/coverage/default/26.sram_ctrl_stress_pipeline.86449957788710387246433180365943389279850804715818089217761387546567262228108 |
| /workspace/coverage/default/26.sram_ctrl_throughput_w_partial_write.43664551500023086314312109946927838294049480572673008516510763831938645113811 |
| /workspace/coverage/default/27.sram_ctrl_access_during_key_req.32251814890815425101713039508760785658414571067421583345450416916288317157924 |
| /workspace/coverage/default/27.sram_ctrl_alert_test.29113145535570614229278822599195154624423538817568696063561914574577253584832 |
| /workspace/coverage/default/27.sram_ctrl_bijection.96423693120682871844179731739397830129225443534172134511732452501015727380271 |
| /workspace/coverage/default/27.sram_ctrl_executable.77321349434825344506951295511706132948161952149860269189180163368108642427573 |
| /workspace/coverage/default/27.sram_ctrl_lc_escalation.13922202754422007563679635669044858673985856476183440229687729762609455301476 |
| /workspace/coverage/default/27.sram_ctrl_max_throughput.111646539978171940174325245772602202607362092792568388919896422221463369468715 |
| /workspace/coverage/default/27.sram_ctrl_mem_partial_access.23521227892992050481506459782818898248365787857963315782061513243004755332531 |
| /workspace/coverage/default/27.sram_ctrl_mem_walk.81697929558535171023819641888257190651015120544831737204769541553884406981156 |
| /workspace/coverage/default/27.sram_ctrl_multiple_keys.97916272559070598216534974644199870563403238829379214474535707665343245197188 |
| /workspace/coverage/default/27.sram_ctrl_partial_access.1658576409713877934228031121432536503320478115628595325358155453050594001116 |
| /workspace/coverage/default/27.sram_ctrl_partial_access_b2b.3912857692180187091634343275057729694712985576983234506400826128209271071454 |
| /workspace/coverage/default/27.sram_ctrl_ram_cfg.29892131953870217019591829075175051950974601523394236013484661345104477007967 |
| /workspace/coverage/default/27.sram_ctrl_regwen.20544292802065967355302111219794036027174447096697887547177875173258391927392 |
| /workspace/coverage/default/27.sram_ctrl_smoke.59130077269332144754624207384779390510731667630577599282406785677226398531904 |
| /workspace/coverage/default/27.sram_ctrl_stress_all_with_rand_reset.92676551723609765351919628593224785630783488136129682761241577651247746940723 |
| /workspace/coverage/default/27.sram_ctrl_stress_pipeline.50820689106156364250526105498521638840896272198827071661969277832583220051116 |
| /workspace/coverage/default/27.sram_ctrl_throughput_w_partial_write.100711183190809799664911073565198779292460675659868794974912425814391001072761 |
| /workspace/coverage/default/28.sram_ctrl_access_during_key_req.39976662087478753278685201731720148200670744756107484754664912030121228433107 |
| /workspace/coverage/default/28.sram_ctrl_alert_test.97614114071954600221686701157841540554439682623616371082011414814663327927963 |
| /workspace/coverage/default/28.sram_ctrl_bijection.92689978700679257941619839138590611267192047765859015416645152136972671156154 |
| /workspace/coverage/default/28.sram_ctrl_executable.24850411772512343546780149649407070098601955816738127979618165647025442118519 |
| /workspace/coverage/default/28.sram_ctrl_lc_escalation.58745901258272105434505511935918947060969362343087706512222051339355486497249 |
| /workspace/coverage/default/28.sram_ctrl_max_throughput.62014475693522555095737417963038931917201104754555959548572855415888252960077 |
| /workspace/coverage/default/28.sram_ctrl_mem_partial_access.46448542111123012523554749767215596187416991673085447059586058117769436811531 |
| /workspace/coverage/default/28.sram_ctrl_mem_walk.43445554546756780472162189314871689616694950558740811654575175739403566550351 |
| /workspace/coverage/default/28.sram_ctrl_multiple_keys.97811685290178731894810901566673963354123597239128445328467806743929147403281 |
| /workspace/coverage/default/28.sram_ctrl_partial_access.31208411551668938474994102731603016385629722745421333908127112692566992356798 |
| /workspace/coverage/default/28.sram_ctrl_partial_access_b2b.3966901297996731689350867286084208421775509841119222539361240825291728535947 |
| /workspace/coverage/default/28.sram_ctrl_ram_cfg.38992787188562896944100470688980070434798143572461016918544391810603204104673 |
| /workspace/coverage/default/28.sram_ctrl_regwen.37041799974621041045825550250519013707424750443396161953149256720587711145310 |
| /workspace/coverage/default/28.sram_ctrl_smoke.34379266823024498249891533738120674017793041968688210019472624054456822136806 |
| /workspace/coverage/default/28.sram_ctrl_stress_all_with_rand_reset.43711491722633257954107230264484795133901709726591275619355688742405780974775 |
| /workspace/coverage/default/28.sram_ctrl_stress_pipeline.110040884733603922689838384802443488492934970032287782646750352484944106176295 |
| /workspace/coverage/default/28.sram_ctrl_throughput_w_partial_write.114933525505018457542553349484964217492102511163555677704625760087811960908481 |
| /workspace/coverage/default/29.sram_ctrl_access_during_key_req.30663530816260711234860790461112851246668083223002720215699564777756787117923 |
| /workspace/coverage/default/29.sram_ctrl_alert_test.109112963080123280944291559790648167104430610632301215069223180750063281205477 |
| /workspace/coverage/default/29.sram_ctrl_bijection.1398360790013502445662206392112566367488386020396673913168382833010400308538 |
| /workspace/coverage/default/29.sram_ctrl_executable.115436456683706574833132744691855544120718543891166852030870524170244286322669 |
| /workspace/coverage/default/29.sram_ctrl_lc_escalation.28484581239370797324375690251957330449168672778999545682949627047408333501558 |
| /workspace/coverage/default/29.sram_ctrl_max_throughput.95077339745519363042735836995226232741678684188974952554686985688323573843629 |
| /workspace/coverage/default/29.sram_ctrl_mem_partial_access.62967935467795987627563882198739943309563920612721214100067941087531163592301 |
| /workspace/coverage/default/29.sram_ctrl_mem_walk.58604607531008610537466429324248617520169881739274279867621925861423333934188 |
| /workspace/coverage/default/29.sram_ctrl_multiple_keys.2342544793525473240990331617739839227778934531659200880022252094697387980274 |
| /workspace/coverage/default/29.sram_ctrl_partial_access.69693962084969749972568058539812502999145100469585158180218044708133708948858 |
| /workspace/coverage/default/29.sram_ctrl_partial_access_b2b.15402216294457349776817097149524923460137619741348558020340018306127216994562 |
| /workspace/coverage/default/29.sram_ctrl_ram_cfg.11296484102765231048813376447482452514425092096527598924723746033742671747210 |
| /workspace/coverage/default/29.sram_ctrl_regwen.103848063293595661815152408095072264703918241081152731495406737000412585420369 |
| /workspace/coverage/default/29.sram_ctrl_smoke.38135125610840429612384831353003471029110882434624191835151514180673908228874 |
| /workspace/coverage/default/29.sram_ctrl_stress_all_with_rand_reset.9275550850712727527756341910759490770196977533299614592448012321193314728839 |
| /workspace/coverage/default/29.sram_ctrl_stress_pipeline.39653159488151772003749718619305623209835897695865663040838541810176327023330 |
| /workspace/coverage/default/29.sram_ctrl_throughput_w_partial_write.17982143772372522531366313357905710595984910717468664544798084772172851328638 |
| /workspace/coverage/default/3.sram_ctrl_access_during_key_req.32214027692825344062780486159594544483279899960056117107994468499431194138472 |
| /workspace/coverage/default/3.sram_ctrl_alert_test.73477378402306336466987833033244630051700527794113511260666068466194689288228 |
| /workspace/coverage/default/3.sram_ctrl_bijection.98712045378617750676628268743574731251461721786196001417806087432204105089889 |
| /workspace/coverage/default/3.sram_ctrl_executable.70373955163153609951554746866942802028140229150027259656050380304140275761115 |
| /workspace/coverage/default/3.sram_ctrl_lc_escalation.84705427247150356951693946712708923458174703980861080479312063795493704146451 |
| /workspace/coverage/default/3.sram_ctrl_max_throughput.58960635882585830013513944938818915805206768296930814233539528890551880208926 |
| /workspace/coverage/default/3.sram_ctrl_mem_partial_access.105025907989423617573331296326744652475459722092215863184617168360131346464653 |
| /workspace/coverage/default/3.sram_ctrl_mem_walk.40698455516425713392716288399395747894667195212657273010290880413125004291911 |
| /workspace/coverage/default/3.sram_ctrl_multiple_keys.99669523554986995117448522075482120764967762871405571944774127915081926985734 |
| /workspace/coverage/default/3.sram_ctrl_partial_access.73950529998517768387635231923234677268642221123251778388257488913101573684742 |
| /workspace/coverage/default/3.sram_ctrl_partial_access_b2b.89363462085898431090316707198898096284788245456751924818407620466430588107865 |
| /workspace/coverage/default/3.sram_ctrl_ram_cfg.86511347897409308009243449063779776809633524957804356592158579577285252144064 |
| /workspace/coverage/default/3.sram_ctrl_regwen.83352148008405772788647614666266808105000387953342324801092549584318765469181 |
| /workspace/coverage/default/3.sram_ctrl_sec_cm.11649788384939314101327735162523106162731914603074395343856964757601650411147 |
| /workspace/coverage/default/3.sram_ctrl_smoke.114674890991487967912451468788510589419951411567045988502046987372033308184523 |
| /workspace/coverage/default/3.sram_ctrl_stress_all_with_rand_reset.59418765429074480685876878977182214398724874284757977447566215218609687959448 |
| /workspace/coverage/default/3.sram_ctrl_stress_pipeline.91707247974699571964625933480647548979616666667276740832927176817569732120854 |
| /workspace/coverage/default/3.sram_ctrl_throughput_w_partial_write.13872810442066626594212591781701397331070361701468308617688617259816032208364 |
| /workspace/coverage/default/30.sram_ctrl_access_during_key_req.17588889393210929877699582787642651193187453482711209697365279856079983294462 |
| /workspace/coverage/default/30.sram_ctrl_alert_test.73594625043195208420977379577087241472491171879037176023731966388954645024023 |
| /workspace/coverage/default/30.sram_ctrl_bijection.38714949493521046113827897193556493062679604343661264945776478960888512695442 |
| /workspace/coverage/default/30.sram_ctrl_executable.21530775677461038870514654964625250795536244932335746653829680982562712321568 |
| /workspace/coverage/default/30.sram_ctrl_lc_escalation.23900762091601072627094313169769567068177579881404002573822431497939340006611 |
| /workspace/coverage/default/30.sram_ctrl_max_throughput.7818571356374555986703376786362293905823911022163094566460336339287246132801 |
| /workspace/coverage/default/30.sram_ctrl_mem_partial_access.91873407580769837355221183028588564884574386161944765342110292689178822745214 |
| /workspace/coverage/default/30.sram_ctrl_mem_walk.36360675248386450314163217619154966275625980660602274364181812928835135194183 |
| /workspace/coverage/default/30.sram_ctrl_multiple_keys.95830961083777633588520763343990317676757341197748257529835357487919787394459 |
| /workspace/coverage/default/30.sram_ctrl_partial_access.72747090408770576403556619829429744086609726464372932489801420852096345188772 |
| /workspace/coverage/default/30.sram_ctrl_partial_access_b2b.24785348461995533982232216723814428534869183869405182300200134469778579203735 |
| /workspace/coverage/default/30.sram_ctrl_ram_cfg.115293677084918470913324104152563095341597221739206003266245099199641135595512 |
| /workspace/coverage/default/30.sram_ctrl_regwen.11393104290923828500565518653076225524679638738105050520528101998018421481604 |
| /workspace/coverage/default/30.sram_ctrl_smoke.24265793801018093744796673636541407989197492754895357752807698843943564263513 |
| /workspace/coverage/default/30.sram_ctrl_stress_all_with_rand_reset.20084946614398365236644662669625655420390325393454562351033970762117812588099 |
| /workspace/coverage/default/30.sram_ctrl_stress_pipeline.53872919051169979555544128322588059914047669539856133800387765102889773219500 |
| /workspace/coverage/default/30.sram_ctrl_throughput_w_partial_write.105570111984086637843990773490401833360978445471503880093187382582627125622217 |
| /workspace/coverage/default/31.sram_ctrl_access_during_key_req.22794181751631717761436734434572184271773747005259774961947085411447826701401 |
| /workspace/coverage/default/31.sram_ctrl_alert_test.4308242794931653420655323061114387781305318544751227600785423317831583718176 |
| /workspace/coverage/default/31.sram_ctrl_bijection.103506454577100922044262633299046514714018634711262633636512367208224399957738 |
| /workspace/coverage/default/31.sram_ctrl_executable.1423801950687985736497072945637831573547945171288318670032767847165448160391 |
| /workspace/coverage/default/31.sram_ctrl_lc_escalation.106536107355116942162790551467456510328417225619052037218972300398383135953190 |
| /workspace/coverage/default/31.sram_ctrl_max_throughput.54639721877920763931091341101987609299924503841113766544928541185093510457101 |
| /workspace/coverage/default/31.sram_ctrl_mem_partial_access.75805460121964158196241290419503369524304767214454416937247060821131746021177 |
| /workspace/coverage/default/31.sram_ctrl_mem_walk.93744793908871203507954898493978743258074630134493650105479826282293283388425 |
| /workspace/coverage/default/31.sram_ctrl_multiple_keys.27503611860069054293328027736221983896079219017867057479404630527983799225889 |
| /workspace/coverage/default/31.sram_ctrl_partial_access.81289480902161927610039447347778641600756178511290723803638816377387305561678 |
| /workspace/coverage/default/31.sram_ctrl_partial_access_b2b.76064151858763415194269462099956007007217681226291767583508507880981933655198 |
| /workspace/coverage/default/31.sram_ctrl_ram_cfg.5132577693921704554858969659936640286172202273452657926601937897752281658070 |
| /workspace/coverage/default/31.sram_ctrl_regwen.27416228395012778529840119097603835198130931075398828093969139696117930139526 |
| /workspace/coverage/default/31.sram_ctrl_smoke.65577434491513818864292069161705200322458717695473585145056413597983597208849 |
| /workspace/coverage/default/31.sram_ctrl_stress_all_with_rand_reset.77784107997666428795848615936079279784413685456999301646550486950038483213968 |
| /workspace/coverage/default/31.sram_ctrl_stress_pipeline.15449524847236373348770622966887365580495147619578440166418382002607175020716 |
| /workspace/coverage/default/31.sram_ctrl_throughput_w_partial_write.43594091765730442106609531782725301297777014612431665819336152544024286154603 |
| /workspace/coverage/default/32.sram_ctrl_access_during_key_req.15398330020297284846043576464081542185780409893847828598050766517973473311906 |
| /workspace/coverage/default/32.sram_ctrl_alert_test.85898214444470970515811055853133366439158120897065140301883410261050163687708 |
| /workspace/coverage/default/32.sram_ctrl_bijection.44134302814279234166247017610546299953564527264094679088336185547175794702009 |
| /workspace/coverage/default/32.sram_ctrl_executable.7126114057613727236095418678439134044936444524005335209818999729228990124121 |
| /workspace/coverage/default/32.sram_ctrl_lc_escalation.93608229287002883160653796762218367396719347125459635292596903712907594856189 |
| /workspace/coverage/default/32.sram_ctrl_max_throughput.107986098538850129210215130414889583541783908598984924564055420364166540153304 |
| /workspace/coverage/default/32.sram_ctrl_mem_partial_access.3000614722796924193446635959145080751015434392657237206061148384460777560886 |
| /workspace/coverage/default/32.sram_ctrl_mem_walk.22731662865262698177914549503461827896862718397123777972940562015032025278011 |
| /workspace/coverage/default/32.sram_ctrl_multiple_keys.62037127939656897368483590963527459053822183206883319789448221820189553179654 |
| /workspace/coverage/default/32.sram_ctrl_partial_access.60285546051398254619194266005402864635804291555595216735152543545564404598630 |
| /workspace/coverage/default/32.sram_ctrl_partial_access_b2b.67431320223298341844455542114738841637730732613408629402609729609139060651872 |
| /workspace/coverage/default/32.sram_ctrl_ram_cfg.113012573273461409443896176246560653867384055926289424849046789529037227897399 |
| /workspace/coverage/default/32.sram_ctrl_regwen.63332981488535464755475405332662832742463545729576834721013374549532047177196 |
| /workspace/coverage/default/32.sram_ctrl_smoke.3578768317674469288403406451171549708094897884175535383083414141035667352660 |
| /workspace/coverage/default/32.sram_ctrl_stress_all_with_rand_reset.78722191229875160389667114212923345369392557976448968842026365822040484678724 |
| /workspace/coverage/default/32.sram_ctrl_stress_pipeline.40830703600054094219408329203665638302601342865174264531737469682359788575008 |
| /workspace/coverage/default/32.sram_ctrl_throughput_w_partial_write.81150740998011153623897760732886764706888931605480030406853587644597828199682 |
| /workspace/coverage/default/33.sram_ctrl_access_during_key_req.29899142655805441115723941305157648765651969104306251235976296700527794757831 |
| /workspace/coverage/default/33.sram_ctrl_alert_test.77002416641414423003952225845068557470793380546622735897998674035769469158537 |
| /workspace/coverage/default/33.sram_ctrl_bijection.61592764640079468339838025915002426246511827206570247204701561365830840806082 |
| /workspace/coverage/default/33.sram_ctrl_executable.72399948868073070571392281425960498559490103984047570242469233691345140907695 |
| /workspace/coverage/default/33.sram_ctrl_lc_escalation.23739879044926001430174205600269163319013271083128539708440605175448253290194 |
| /workspace/coverage/default/33.sram_ctrl_max_throughput.51662373707233623303289145674123344167474375507606678709771123168836075396896 |
| /workspace/coverage/default/33.sram_ctrl_mem_partial_access.208257571154743917110747055135652531899129976197213189126403169656009712425 |
| /workspace/coverage/default/33.sram_ctrl_mem_walk.74295683145947341579383154037047914497316095850687096029797242674879222521096 |
| /workspace/coverage/default/33.sram_ctrl_multiple_keys.41335447567461592146112702211846556313294951385470112374700508181886292431124 |
| /workspace/coverage/default/33.sram_ctrl_partial_access.103593411459995085873075130715414254372656234698681892386816909506372437598109 |
| /workspace/coverage/default/33.sram_ctrl_partial_access_b2b.90229773131214919519151734546960748577914425113672080577070120142450876624513 |
| /workspace/coverage/default/33.sram_ctrl_ram_cfg.106995347456735828003561835885403435556821774837025670550563926985077360031980 |
| /workspace/coverage/default/33.sram_ctrl_regwen.73651424523608268968747639348874304942392827565087392444708287660349718909096 |
| /workspace/coverage/default/33.sram_ctrl_smoke.109536957068181689899183144703601237937000662077835817219962497591982738574229 |
| /workspace/coverage/default/33.sram_ctrl_stress_all_with_rand_reset.7286873354261973957700977128628170788988790113325547176992209083850305566571 |
| /workspace/coverage/default/33.sram_ctrl_stress_pipeline.54373157071095779754698978417369768721731336134407037661300806494351865752523 |
| /workspace/coverage/default/33.sram_ctrl_throughput_w_partial_write.44506422316821263836915088221686559677792474173270636767155308586198527632067 |
| /workspace/coverage/default/34.sram_ctrl_access_during_key_req.82190037803333032058365642676694403992969374988455437264198371864495878635289 |
| /workspace/coverage/default/34.sram_ctrl_alert_test.52201084803120919030452148415274154848040250622734140865097414797572686676889 |
| /workspace/coverage/default/34.sram_ctrl_bijection.87977463917745921286522224736599027829174074932587616683624775391597904593838 |
| /workspace/coverage/default/34.sram_ctrl_executable.9498873710822285234970570937535496705038631272043449628796574898660542182948 |
| /workspace/coverage/default/34.sram_ctrl_lc_escalation.68578686470665214061876408546985708922726249661382868539244925849345640071059 |
| /workspace/coverage/default/34.sram_ctrl_max_throughput.28667884218492239507468629321095040122907566491715398987271174911285430056135 |
| /workspace/coverage/default/34.sram_ctrl_mem_partial_access.52201174756099600630854594348662727755022995266869341676969500946576714770057 |
| /workspace/coverage/default/34.sram_ctrl_mem_walk.82956360044676677478772562548159297224761738223293200854960098584361576615231 |
| /workspace/coverage/default/34.sram_ctrl_multiple_keys.79154898739785819443794038636297594838960729988362692980313608861923444464490 |
| /workspace/coverage/default/34.sram_ctrl_partial_access.79690226011454862946281613515575567198073956246936408383848447269616792176235 |
| /workspace/coverage/default/34.sram_ctrl_partial_access_b2b.32795828260602876389556450352809108622514676417419864044535192387655567620038 |
| /workspace/coverage/default/34.sram_ctrl_ram_cfg.57227398368148081982930734182262467922063582655702384640579139084968332647560 |
| /workspace/coverage/default/34.sram_ctrl_regwen.24126434444600306550725096595247571987288515048997993938816423256675479835798 |
| /workspace/coverage/default/34.sram_ctrl_smoke.100402601544450098298222369865462294965396361917568535451806958331110526384915 |
| /workspace/coverage/default/34.sram_ctrl_stress_all_with_rand_reset.87243327530353853268668658251934026349918591339641118425769711248784055461616 |
| /workspace/coverage/default/34.sram_ctrl_stress_pipeline.16921806083075200949920920101092736987679304229285350430219786279608109341899 |
| /workspace/coverage/default/34.sram_ctrl_throughput_w_partial_write.94292077997172572883449446562125852544876356285313504301196413773916967681251 |
| /workspace/coverage/default/35.sram_ctrl_access_during_key_req.11661294588224036361485674111255930206305700129767227834240081854120279801144 |
| /workspace/coverage/default/35.sram_ctrl_alert_test.17068106108228267560780613832307307576179674580007919372235563676624204714960 |
| /workspace/coverage/default/35.sram_ctrl_bijection.100731651320455290594090329194194876996961626055413980943631233468393187412527 |
| /workspace/coverage/default/35.sram_ctrl_executable.75053617968069208460862835801008530319015713191011369967840955623448308417732 |
| /workspace/coverage/default/35.sram_ctrl_lc_escalation.36315286697769896124129428172773932622111942054747895283622100691607115541728 |
| /workspace/coverage/default/35.sram_ctrl_max_throughput.98695052462029185844791697845923642856949208639742803639451263909791699547415 |
| /workspace/coverage/default/35.sram_ctrl_mem_partial_access.47245868682126866576476338184303603461565579450210072324370923225436553227872 |
| /workspace/coverage/default/35.sram_ctrl_mem_walk.37076414356729749279693114167688840226111712453936597819977196094096802185535 |
| /workspace/coverage/default/35.sram_ctrl_multiple_keys.56963274442479364656076181303183696223383675603680843534292155305494275105928 |
| /workspace/coverage/default/35.sram_ctrl_partial_access.1316076884956611263430846668369433890294609719524604101586594594677916100422 |
| /workspace/coverage/default/35.sram_ctrl_partial_access_b2b.85897369651807382915839856006983293793657440980109803057375067056055461825160 |
| /workspace/coverage/default/35.sram_ctrl_ram_cfg.72996725147362958598219311827384973930115721347792952956916415387241519351684 |
| /workspace/coverage/default/35.sram_ctrl_regwen.249095944332486127729293394130891832904205094404766405831946290489203881940 |
| /workspace/coverage/default/35.sram_ctrl_smoke.50813585665712812478427933478573113592211039927563619584700856510374705780840 |
| /workspace/coverage/default/35.sram_ctrl_stress_all_with_rand_reset.52122101929598311338855182533226757461958519624688932938978663903749951015361 |
| /workspace/coverage/default/35.sram_ctrl_stress_pipeline.52330622628994026425435822093576027872328704636852400648281107642934809908100 |
| /workspace/coverage/default/35.sram_ctrl_throughput_w_partial_write.89728300076405509086103304650787430289103988395382791923738748133961561031259 |
| /workspace/coverage/default/36.sram_ctrl_access_during_key_req.87562193688731191266452594972679877883308362802923228622927635956730978539137 |
| /workspace/coverage/default/36.sram_ctrl_alert_test.84705385896864626927481458058248432955750801364588174053087446182331765645635 |
| /workspace/coverage/default/36.sram_ctrl_bijection.105193094535483714844872544281207657801972482491276796861712101581580915129980 |
| /workspace/coverage/default/36.sram_ctrl_executable.12855434829414845135527653813949338107238080635092199653913476110435834100090 |
| /workspace/coverage/default/36.sram_ctrl_lc_escalation.76223199221685896448251480885957819859135364812353216447271908908701538427759 |
| /workspace/coverage/default/36.sram_ctrl_max_throughput.19110897249859128951060721289567038327922173806498756309187778578650545687047 |
| /workspace/coverage/default/36.sram_ctrl_mem_partial_access.22043520663430161257414770571493924445718783967910235710911975591919085420353 |
| /workspace/coverage/default/36.sram_ctrl_mem_walk.74970769801280865540686380466535004765713244638392025304268644361009238207558 |
| /workspace/coverage/default/36.sram_ctrl_multiple_keys.90815727318057904607444491449043072468873097577684081916039275652328261924605 |
| /workspace/coverage/default/36.sram_ctrl_partial_access.52150251779741359924693691361012151962035095866283953469890240568344186332943 |
| /workspace/coverage/default/36.sram_ctrl_partial_access_b2b.44600697952367689978462185657674990985130999417142434274431303891750948476864 |
| /workspace/coverage/default/36.sram_ctrl_ram_cfg.110110458426339301985127392722856139925481377290108059811435473177848799851259 |
| /workspace/coverage/default/36.sram_ctrl_regwen.62307982455950884751365872066666041332797691274169856575080274753699546199842 |
| /workspace/coverage/default/36.sram_ctrl_smoke.108325564920742785734416567968791505710411249868732803551958250075743475702864 |
| /workspace/coverage/default/36.sram_ctrl_stress_all_with_rand_reset.102368997976555376267361705160721654908356934926699138980328839964676696513767 |
| /workspace/coverage/default/36.sram_ctrl_stress_pipeline.21603020713033623735238156394542090654470632580767302735065205239098807577520 |
| /workspace/coverage/default/36.sram_ctrl_throughput_w_partial_write.88320076030398873199585699704991634393952664189495241422895066052681096533594 |
| /workspace/coverage/default/37.sram_ctrl_access_during_key_req.114346420042087711565982589589701360225720307282038237338541685755385717936792 |
| /workspace/coverage/default/37.sram_ctrl_alert_test.75657295621288676170368420425066570151633563959994716994329173050897508578492 |
| /workspace/coverage/default/37.sram_ctrl_bijection.44602356180633733702285494857334330019584774211446421271486108674811050564124 |
| /workspace/coverage/default/37.sram_ctrl_executable.54432305805330321039037673629734240891761093911063908735109865126806274007877 |
| /workspace/coverage/default/37.sram_ctrl_lc_escalation.44134011058515930491646826222262648674868965502023744992416183894440472925593 |
| /workspace/coverage/default/37.sram_ctrl_max_throughput.33303725719218494204346271096983450484305023222147512225931023498853493173474 |
| /workspace/coverage/default/37.sram_ctrl_mem_partial_access.17205778229473446099319106103099986125965617817991942581425988029559745433805 |
| /workspace/coverage/default/37.sram_ctrl_mem_walk.103851882710681783369752967406881566141139198216326482875551473249844078618426 |
| /workspace/coverage/default/37.sram_ctrl_multiple_keys.900926893051005991284449800105610208099522215279061189173414384931748957592 |
| /workspace/coverage/default/37.sram_ctrl_partial_access.43754925797754263790345646227920119121546918138416808676181810018664281742209 |
| /workspace/coverage/default/37.sram_ctrl_partial_access_b2b.3381712537472595842095161957008492340346944109855315742166551121666800378702 |
| /workspace/coverage/default/37.sram_ctrl_ram_cfg.78463973383072057189214075432218576056975208160017616562191973177016033658088 |
| /workspace/coverage/default/37.sram_ctrl_regwen.86395880569733162336951939425182209671510236742075413851979181162844710060220 |
| /workspace/coverage/default/37.sram_ctrl_smoke.65367019345679478419857375450005750387657099640465995761082446777600735533712 |
| /workspace/coverage/default/37.sram_ctrl_stress_all_with_rand_reset.66854663679532477894743093357594428564817598992256046596781194500252828030532 |
| /workspace/coverage/default/37.sram_ctrl_stress_pipeline.19608932683205075364089915578041697891498560757897379659382393292333542186904 |
| /workspace/coverage/default/37.sram_ctrl_throughput_w_partial_write.114751904522240563823415875018483432625682716427760108686365024668403508533821 |
| /workspace/coverage/default/38.sram_ctrl_access_during_key_req.19328237840184942201790055183128751134008240216242445550563566742584880626374 |
| /workspace/coverage/default/38.sram_ctrl_alert_test.86580180762063962361962053069156801817757226393996422296676863535951323950741 |
| /workspace/coverage/default/38.sram_ctrl_bijection.110771919754261677022545992248119452891857259762349262972088850591899679749741 |
| /workspace/coverage/default/38.sram_ctrl_executable.72084163875470856898064728419751495286333367190841305246749749348384032623593 |
| /workspace/coverage/default/38.sram_ctrl_lc_escalation.51791548675083148346517323207151823302144100660802798912886071735858946704661 |
| /workspace/coverage/default/38.sram_ctrl_max_throughput.70121227276988698262618321374438300728651712041346335420145451585145600332286 |
| /workspace/coverage/default/38.sram_ctrl_mem_partial_access.44265874371442963590998448772182683807760902034973303618497922682391871407247 |
| /workspace/coverage/default/38.sram_ctrl_mem_walk.39754068259059653937449656862943416085762014304626448758293620615079595834133 |
| /workspace/coverage/default/38.sram_ctrl_multiple_keys.45884557439662093237824619866388004235413777549810610529736598853441084750864 |
| /workspace/coverage/default/38.sram_ctrl_partial_access.89148292826568407425882032098855544508955327521114279739457566404026792122171 |
| /workspace/coverage/default/38.sram_ctrl_partial_access_b2b.59015011173049538936240159346923575589672958507370985891103977813337040319831 |
| /workspace/coverage/default/38.sram_ctrl_ram_cfg.49920883607760877312706712563492771093697173221931315061922057109293219155150 |
| /workspace/coverage/default/38.sram_ctrl_regwen.108018975213382549280179418836203037511847801945515954825803910566195485126689 |
| /workspace/coverage/default/38.sram_ctrl_smoke.81668904463587375157435643687697582545863517586637447336894144303543512038504 |
| /workspace/coverage/default/38.sram_ctrl_stress_pipeline.81817349645573421206024420298262545856333806326504897595070196359659190142030 |
| /workspace/coverage/default/38.sram_ctrl_throughput_w_partial_write.17904989559326418779320820254947316233572194466000368756912468147830491171113 |
| /workspace/coverage/default/39.sram_ctrl_access_during_key_req.17576526508777412180660126583946173617506772596571048410707033963447109799904 |
| /workspace/coverage/default/39.sram_ctrl_alert_test.20553349979514760296853788944258794058438211014435538841053446829063562528476 |
| /workspace/coverage/default/39.sram_ctrl_bijection.32968259489382438196346535577488404782488573182385831785699700767027199877499 |
| /workspace/coverage/default/39.sram_ctrl_executable.60816276539070885268144314143501002571136613908952331842111003440400775812383 |
| /workspace/coverage/default/39.sram_ctrl_lc_escalation.46455225594263558323970738618487204582986815920175819038778529027261073003640 |
| /workspace/coverage/default/39.sram_ctrl_max_throughput.98548593667592119031598439451159085611166679020696862644940852675680934829415 |
| /workspace/coverage/default/39.sram_ctrl_mem_partial_access.48869948700450274565363325836072421677170893126698253756135140083752742354041 |
| /workspace/coverage/default/39.sram_ctrl_mem_walk.22239616931141311000666627986256954588423158076955429168544292685138784901522 |
| /workspace/coverage/default/39.sram_ctrl_multiple_keys.42551197099507480740930915472839066110086032701629148166307304764192704929520 |
| /workspace/coverage/default/39.sram_ctrl_partial_access.5412085516736960284211680810206859439661726142591168226545514999150128919261 |
| /workspace/coverage/default/39.sram_ctrl_partial_access_b2b.25873578498341103532309778636349489537888402650520699001742666069652420492002 |
| /workspace/coverage/default/39.sram_ctrl_ram_cfg.103895272733032074793231045357004878586427414792840984783180957394603103988239 |
| /workspace/coverage/default/39.sram_ctrl_regwen.30742445205885625517637163976937298712401923044942903643110818927352830519968 |
| /workspace/coverage/default/39.sram_ctrl_smoke.94261125006198334714919928581322008179434518021362837208571967467889195724864 |
| /workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.47044178176370285875022113477906748836019063274715862115242036959400066512873 |
| /workspace/coverage/default/39.sram_ctrl_stress_pipeline.84719006454999921081753048856301739903396775876462484569633047679864014240736 |
| /workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.55672454685500271081098256860801444396039491953514338040830518729305503476966 |
| /workspace/coverage/default/4.sram_ctrl_access_during_key_req.53276804272455960131596773357186180467866883197140343377423496132752830330701 |
| /workspace/coverage/default/4.sram_ctrl_alert_test.17567089085791457701283252175618353479915605661995422175673613501514155737795 |
| /workspace/coverage/default/4.sram_ctrl_bijection.81493687150881062315197486123772082202435413509324700149127004368114148721826 |
| /workspace/coverage/default/4.sram_ctrl_executable.91231296166581456973120500402960554362365301669725968516301878006635898182062 |
| /workspace/coverage/default/4.sram_ctrl_lc_escalation.85879920270239234296237992465392637311792927516480550187132522145257591206581 |
| /workspace/coverage/default/4.sram_ctrl_max_throughput.33417121669638035989610098003270704078733397101518369626099125120892188946970 |
| /workspace/coverage/default/4.sram_ctrl_mem_partial_access.29918625018118436882535956124933733737891396940139441782534773977732346271344 |
| /workspace/coverage/default/4.sram_ctrl_mem_walk.86559821670723081194281807155427630786073954644061637225324375654696814914974 |
| /workspace/coverage/default/4.sram_ctrl_multiple_keys.103787441265129693181933545611904629022010010324664441538671940904208013731392 |
| /workspace/coverage/default/4.sram_ctrl_partial_access.25531637686081075642291501355951970986988056103206612673842244790880558727232 |
| /workspace/coverage/default/4.sram_ctrl_partial_access_b2b.73338947530284451646132270999938009753354384537854434305400727515757753196099 |
| /workspace/coverage/default/4.sram_ctrl_ram_cfg.23544183102529801035311026988898207791938329870035770129049304437683965416387 |
| /workspace/coverage/default/4.sram_ctrl_regwen.85052753629445687767015557897398219625568939811271210667177656422214538750627 |
| /workspace/coverage/default/4.sram_ctrl_sec_cm.94862616190992729263057295706826492395745614968360716304602738992705684462267 |
| /workspace/coverage/default/4.sram_ctrl_smoke.70167178323678993264300057179126396012806735295723911889731673079760023308258 |
| /workspace/coverage/default/4.sram_ctrl_stress_all_with_rand_reset.43320943159546433670105093199957010620578722692140357934667982145912590333332 |
| /workspace/coverage/default/4.sram_ctrl_stress_pipeline.45783218660530032571917965237479938475955886911087427097371182437614847547922 |
| /workspace/coverage/default/4.sram_ctrl_throughput_w_partial_write.77060691526591415744016096133051562746257959009826663340760492877953539715221 |
| /workspace/coverage/default/40.sram_ctrl_access_during_key_req.107201670992146482473667604447335184950176483344613467371784522811649488138025 |
| /workspace/coverage/default/40.sram_ctrl_alert_test.61636101433488135313113484038512219639931351743227083105606283856221370119931 |
| /workspace/coverage/default/40.sram_ctrl_bijection.81108153299753179696564026456400937391596269862294071083266482765719565572197 |
| /workspace/coverage/default/40.sram_ctrl_executable.20834879841020864713704555881652947334000795972107671918433113178548282858823 |
| /workspace/coverage/default/40.sram_ctrl_lc_escalation.11148056542127265053661292916756651358526812686661409996596598200949057092081 |
| /workspace/coverage/default/40.sram_ctrl_max_throughput.1391789905303654615558701302244845933707226877432167007960379021537863762831 |
| /workspace/coverage/default/40.sram_ctrl_mem_partial_access.48437189816544566373340210398352915614997231282704164173442983400460606422663 |
| /workspace/coverage/default/40.sram_ctrl_mem_walk.13724513492180425006469210074286003374175706832904607416022493430280825678651 |
| /workspace/coverage/default/40.sram_ctrl_multiple_keys.52554916513604576865022613543792651613663550473655947591745842569294463299933 |
| /workspace/coverage/default/40.sram_ctrl_partial_access.27148801290965838874803931818627324611960760488671217615471711273445965637530 |
| /workspace/coverage/default/40.sram_ctrl_partial_access_b2b.46367048847650477155887575591136320492647244408526273689233148848320445695698 |
| /workspace/coverage/default/40.sram_ctrl_ram_cfg.76689190498658819692025059610073734264295842670954446719792118342926033341610 |
| /workspace/coverage/default/40.sram_ctrl_regwen.33671592663780506484187779661683428052119130143215088926596109679151155631807 |
| /workspace/coverage/default/40.sram_ctrl_smoke.43698978876317467424344775476383738792538643679796437664203448387100835683179 |
| /workspace/coverage/default/40.sram_ctrl_stress_all_with_rand_reset.20787457245158070061187041479544195945603802595047817619859837811704823658869 |
| /workspace/coverage/default/40.sram_ctrl_stress_pipeline.90981264123470559164011072456608307314117931913063698010278467525939192418980 |
| /workspace/coverage/default/40.sram_ctrl_throughput_w_partial_write.89375234650950147384113434632117571164702383324817190552060838041804308765081 |
| /workspace/coverage/default/41.sram_ctrl_access_during_key_req.81813567286114882489926477698917233205423423409735740926145129581817848310767 |
| /workspace/coverage/default/41.sram_ctrl_alert_test.74661918891317525212334162876016954846047189935705520235960487574766296359582 |
| /workspace/coverage/default/41.sram_ctrl_bijection.103123802111579255018085555572488500996053592934193285259871826750007756439185 |
| /workspace/coverage/default/41.sram_ctrl_executable.9207852291945114986506082862439692220643467444837742436176791899823091349533 |
| /workspace/coverage/default/41.sram_ctrl_lc_escalation.78579896755877094086952294071991157473671985203145277584862155886541026080093 |
| /workspace/coverage/default/41.sram_ctrl_max_throughput.115236525092740361979088392488218156599720202435683570905982193951658598250016 |
| /workspace/coverage/default/41.sram_ctrl_mem_partial_access.25732866058195862692473390119177763595835934093235118213634009885663687052248 |
| /workspace/coverage/default/41.sram_ctrl_mem_walk.33557788446502920470996585444194899035678574748786547592716882803061781666281 |
| /workspace/coverage/default/41.sram_ctrl_multiple_keys.32122242900849580456427354527195404919152151570957329457098675972801631791866 |
| /workspace/coverage/default/41.sram_ctrl_partial_access.59716614613485936166952464457906400211785858228314758102861286149652012715452 |
| /workspace/coverage/default/41.sram_ctrl_partial_access_b2b.90944555222722784184390002244702682658988105576254809183323325468716580255641 |
| /workspace/coverage/default/41.sram_ctrl_ram_cfg.50033937734227916439050514969389958742160617180796022890233361715859292124566 |
| /workspace/coverage/default/41.sram_ctrl_regwen.5489070818668393457906265752680159512661812127531365002948269425257982288955 |
| /workspace/coverage/default/41.sram_ctrl_smoke.13946639589127913900452834002414677958282991052313625588463639708247695469713 |
| /workspace/coverage/default/41.sram_ctrl_stress_all_with_rand_reset.52550108142396070677858716695431826313322645886976701424453715590924320135560 |
| /workspace/coverage/default/41.sram_ctrl_stress_pipeline.28730897555928499362853426347202410038105083220374336307039974026964826754549 |
| /workspace/coverage/default/41.sram_ctrl_throughput_w_partial_write.69913545251791849862830654501886831135963317677415935824136715302852960862108 |
| /workspace/coverage/default/42.sram_ctrl_access_during_key_req.10357539733983662590471830319031583037332584577758030130387331362622119072025 |
| /workspace/coverage/default/42.sram_ctrl_alert_test.48147010184622431322357868887134670754244819785718647322925651538795459535933 |
| /workspace/coverage/default/42.sram_ctrl_bijection.26554778980327317510376231654076838504831068937244878634244259824810579825344 |
| /workspace/coverage/default/42.sram_ctrl_executable.98527383043194447457253207251360695343688393240048080022996785513721515537416 |
| /workspace/coverage/default/42.sram_ctrl_lc_escalation.42938404189725941993755645437285453429847474520951528199593496133174577262496 |
| /workspace/coverage/default/42.sram_ctrl_max_throughput.66150211890001667082202689680778824692154911244116097916977993845686128598803 |
| /workspace/coverage/default/42.sram_ctrl_mem_partial_access.52412802430688189175713955931554012624415696188234865168914811301780543173446 |
| /workspace/coverage/default/42.sram_ctrl_mem_walk.37837651801430289550191506322963282088238884893261492805358112331738844654668 |
| /workspace/coverage/default/42.sram_ctrl_multiple_keys.23309389073774053300987657847071660297473896051058607948442378967399969863687 |
| /workspace/coverage/default/42.sram_ctrl_partial_access.38700000725089547732228726924581501624056841887228594812372592300899275568205 |
| /workspace/coverage/default/42.sram_ctrl_partial_access_b2b.12009702370980687489173292276593207000183184115557048912629876173600869836784 |
| /workspace/coverage/default/42.sram_ctrl_ram_cfg.19387482073610279008477401016235139746083860753517595769098411107588309063527 |
| /workspace/coverage/default/42.sram_ctrl_regwen.137730516076642370989709231641699550276875186435603475818428795252839687746 |
| /workspace/coverage/default/42.sram_ctrl_smoke.93935149631149575777560804004870117365124250252141642798027529481334177391558 |
| /workspace/coverage/default/42.sram_ctrl_stress_all_with_rand_reset.111589572823822414375847944635928814080721615319557463735099939497582709168919 |
| /workspace/coverage/default/42.sram_ctrl_stress_pipeline.13921134411191487329787517974406047123365909027816343310569751039706637663326 |
| /workspace/coverage/default/42.sram_ctrl_throughput_w_partial_write.100448248408629527269210811065442291462832915861908290159529317469710873771231 |
| /workspace/coverage/default/43.sram_ctrl_access_during_key_req.69354047678141778331902502834216526978046309372010089758735065426373319907733 |
| /workspace/coverage/default/43.sram_ctrl_alert_test.11677680995045534522873307454067886256657889721969617609217304296809166323783 |
| /workspace/coverage/default/43.sram_ctrl_bijection.32671346467957841022105067713129227906475949970470872362794108785261087495641 |
| /workspace/coverage/default/43.sram_ctrl_executable.90172692597022359026582731206386559224002438225512207214059509126037627385936 |
| /workspace/coverage/default/43.sram_ctrl_lc_escalation.111043014605477921377464576042413020723297909952933548906405478589872230626863 |
| /workspace/coverage/default/43.sram_ctrl_max_throughput.42020294284426308119504911889793537696808098847335852589066536704484710676555 |
| /workspace/coverage/default/43.sram_ctrl_mem_partial_access.40029441951695429704949316490693307756025349476479444668324150011205978858512 |
| /workspace/coverage/default/43.sram_ctrl_mem_walk.13909226387064132200367668789459834270552476160863614668812986645290148322329 |
| /workspace/coverage/default/43.sram_ctrl_multiple_keys.55066225346670846363135770793631066721052803903965224245944138751494240317030 |
| /workspace/coverage/default/43.sram_ctrl_partial_access.3118250718077209793733441169074779027424959943285676217246303403947254510202 |
| /workspace/coverage/default/43.sram_ctrl_partial_access_b2b.47030040766206898390652754985531755095215694810065439383717092985803395115791 |
| /workspace/coverage/default/43.sram_ctrl_ram_cfg.103066189151984872390176728502471511915040567746949777249714653555568109390553 |
| /workspace/coverage/default/43.sram_ctrl_regwen.106547785855157451305923607429301661716403521612485981403791946861733663828933 |
| /workspace/coverage/default/43.sram_ctrl_smoke.13302040049934794721027685970819328572359480040380452372558963580493798528481 |
| /workspace/coverage/default/43.sram_ctrl_stress_all_with_rand_reset.112147665134793346556775463086493777370039872534181186296953305741118203920336 |
| /workspace/coverage/default/43.sram_ctrl_stress_pipeline.32988869547217264149296037700408827475226082724612759851666419516453335898135 |
| /workspace/coverage/default/43.sram_ctrl_throughput_w_partial_write.60321064134651552250741169738813711231346782524877088302290996733303667266943 |
| /workspace/coverage/default/44.sram_ctrl_access_during_key_req.107196578770366991636238925440818077513741074208142730388540771229226644205062 |
| /workspace/coverage/default/44.sram_ctrl_alert_test.98711589901653226013508476118207529846384481314377257086278905787051956601731 |
| /workspace/coverage/default/44.sram_ctrl_bijection.96007243982652836601371269325025900220413773965827005160526220948828816719636 |
| /workspace/coverage/default/44.sram_ctrl_executable.4517579085897255043001857427785304814289510075833768435257426840090151058332 |
| /workspace/coverage/default/44.sram_ctrl_lc_escalation.72392220264116461258506030909398013869573392271264975777628661044586530164451 |
| /workspace/coverage/default/44.sram_ctrl_max_throughput.12315340759943355512664984839500356621025098150738939932871525650973484545539 |
| /workspace/coverage/default/44.sram_ctrl_mem_partial_access.3986536056053191272460467963061897930032325192255645457141799998927660795273 |
| /workspace/coverage/default/44.sram_ctrl_mem_walk.58092729646422406524979646571195565119543125356136836407184926249843554552797 |
| /workspace/coverage/default/44.sram_ctrl_multiple_keys.48704958079615834002534685589970371121806111759073502282844496069101530674468 |
| /workspace/coverage/default/44.sram_ctrl_partial_access.112854553273973187734226024846935513008006300514554102474908929244994645274971 |
| /workspace/coverage/default/44.sram_ctrl_partial_access_b2b.58070683195160400829391589217265215483910686162472156596691381508730226854262 |
| /workspace/coverage/default/44.sram_ctrl_ram_cfg.100830790360376088529903978790832541392689458078075258287335173612117600622262 |
| /workspace/coverage/default/44.sram_ctrl_regwen.28766242378867504035591456851740980803989163576831979194442836504280771110052 |
| /workspace/coverage/default/44.sram_ctrl_smoke.43275286209630884567179477552151673080133975674667090992499407887445394585952 |
| /workspace/coverage/default/44.sram_ctrl_stress_all_with_rand_reset.76394143259891863188544599407180068362641105178892201617539781165286417766697 |
| /workspace/coverage/default/44.sram_ctrl_stress_pipeline.31347206366021660731453737456107027459606764578762180700925590624509028939414 |
| /workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.57401241000720770747446001600806665883940054648410914673226326176224114005190 |
| /workspace/coverage/default/45.sram_ctrl_access_during_key_req.10166387311563545568446565678934943598689530522108952290518255170624536479509 |
| /workspace/coverage/default/45.sram_ctrl_alert_test.51961321166367206588312203808665332835765747319983165048039364380690170500216 |
| /workspace/coverage/default/45.sram_ctrl_bijection.1921377752269692838661618528114667518818760175566460363144359772185299323188 |
| /workspace/coverage/default/45.sram_ctrl_executable.106317762880479615883226399605694337070550342522907051405774205667351597689940 |
| /workspace/coverage/default/45.sram_ctrl_lc_escalation.4559139940114826572017761608795074876499918477233135673954866060913813560906 |
| /workspace/coverage/default/45.sram_ctrl_max_throughput.86393279049904485760086648458139612815170816527078749987899057479346080347627 |
| /workspace/coverage/default/45.sram_ctrl_mem_partial_access.69095453795686027252599683541337856182713758982764598212630790831412075216069 |
| /workspace/coverage/default/45.sram_ctrl_mem_walk.60712173949020285879648534426662503152958863028646769795404168457320327012117 |
| /workspace/coverage/default/45.sram_ctrl_multiple_keys.48046143105038044094534615695898361307841067942130326794125951879835366630524 |
| /workspace/coverage/default/45.sram_ctrl_partial_access.46306390380069756061212966388990231237489052511815211915348629679738345665747 |
| /workspace/coverage/default/45.sram_ctrl_partial_access_b2b.63153675436842114804874307210651498193549230656077143570357180378131978125982 |
| /workspace/coverage/default/45.sram_ctrl_ram_cfg.112672165140608483232100512925327916459788915715284291154197857370497004450048 |
| /workspace/coverage/default/45.sram_ctrl_regwen.86631821222482795546772661218730889584473999562640194345378268031657798870704 |
| /workspace/coverage/default/45.sram_ctrl_smoke.95125434252259660796512650567017678885114179199485607708501082707537648516663 |
| /workspace/coverage/default/45.sram_ctrl_stress_all_with_rand_reset.33736115873766677796347744859418466660986994699192669943269458770709260932104 |
| /workspace/coverage/default/45.sram_ctrl_stress_pipeline.10657166697164871967077600534942605322214486456591667255297721196023224974802 |
| /workspace/coverage/default/45.sram_ctrl_throughput_w_partial_write.10917571167172060674681843982468791425248426540234734159005483067763069260161 |
| /workspace/coverage/default/46.sram_ctrl_access_during_key_req.112829128829711642317724159369852398728715725769411620516587812646518300708037 |
| /workspace/coverage/default/46.sram_ctrl_alert_test.76047902680570177148929634640193701899205845793433931271511946487876694409108 |
| /workspace/coverage/default/46.sram_ctrl_bijection.46380155454824362851517129777515245574048075828564421388916744018871601213754 |
| /workspace/coverage/default/46.sram_ctrl_executable.107628686823709468994739473634154098952601528798725235326838085164508659231068 |
| /workspace/coverage/default/46.sram_ctrl_lc_escalation.106834389152398109472086770783951321355412188890936175993758817011393377784632 |
| /workspace/coverage/default/46.sram_ctrl_max_throughput.92276119218079078362731226048003704234020400553813572841563246669535427783833 |
| /workspace/coverage/default/46.sram_ctrl_mem_partial_access.104193429715012263762290357885815748723612938461484837431989328674297183572371 |
| /workspace/coverage/default/46.sram_ctrl_mem_walk.105394243876632214032652293376253321025963192931630367845188387757800613633907 |
| /workspace/coverage/default/46.sram_ctrl_multiple_keys.111072205059559223484432933873198032882943240129951526142190211135515753587693 |
| /workspace/coverage/default/46.sram_ctrl_partial_access.21081992262738602977289610060099171952648638136795500546091632948281800580861 |
| /workspace/coverage/default/46.sram_ctrl_partial_access_b2b.62521797604419582756554224442469152689709004307806924390303946255032872554998 |
| /workspace/coverage/default/46.sram_ctrl_ram_cfg.93069926518663622756814547426112659359943664379758443989513316529975424704826 |
| /workspace/coverage/default/46.sram_ctrl_regwen.64877377778536679717295382968723974669323211709705431909488710480975691771864 |
| /workspace/coverage/default/46.sram_ctrl_smoke.104804472716365616289650838809990992570863649214669135223777508578479119023977 |
| /workspace/coverage/default/46.sram_ctrl_stress_all_with_rand_reset.3109839682380101941845871417334310444698122262889432160282066338647757870286 |
| /workspace/coverage/default/46.sram_ctrl_stress_pipeline.79434631846857001781614325995551939336171966829792152671381812560744338863500 |
| /workspace/coverage/default/46.sram_ctrl_throughput_w_partial_write.88568583036330028144548720247768801486029628467373765022688020228661875596857 |
| /workspace/coverage/default/47.sram_ctrl_access_during_key_req.76412885372498138021850435258278869437648852566943916200603248471582690971383 |
| /workspace/coverage/default/47.sram_ctrl_alert_test.22342060555500297485253501114614226475212180356454190038950338826913203272214 |
| /workspace/coverage/default/47.sram_ctrl_bijection.84420512045173481293129304159186337980092371204087528985850583797793822741140 |
| /workspace/coverage/default/47.sram_ctrl_executable.52696245884594912039411789052627636990867442142783394043989686848315465855320 |
| /workspace/coverage/default/47.sram_ctrl_lc_escalation.77090052606012925286491248360510387322968705906100091716303691985995068917427 |
| /workspace/coverage/default/47.sram_ctrl_max_throughput.97464425940267751668362965850674356875411904402131985080545038535454184802607 |
| /workspace/coverage/default/47.sram_ctrl_mem_partial_access.37566966840750595155796128065359667250276728982624196007890719813038455684885 |
| /workspace/coverage/default/47.sram_ctrl_mem_walk.5286087994287677523214287374611530177545488732647372885375999274936884723593 |
| /workspace/coverage/default/47.sram_ctrl_multiple_keys.81298309424623664525568047960716248997246619035782835211575162398444273551038 |
| /workspace/coverage/default/47.sram_ctrl_partial_access.71938657414100530351895506547118377513607437510947641446286718454496477382411 |
| /workspace/coverage/default/47.sram_ctrl_partial_access_b2b.3553927664429362214543277242600463551041236528238157113159220887372098272101 |
| /workspace/coverage/default/47.sram_ctrl_ram_cfg.97762740373290348467905550490106329625789706590870675206561151010909785917051 |
| /workspace/coverage/default/47.sram_ctrl_regwen.5658685198424597079133859482076375498682968395603671282020683530376282491349 |
| /workspace/coverage/default/47.sram_ctrl_smoke.78973204064977986635302584271311953285112101963451396102922803140560962281627 |
| /workspace/coverage/default/47.sram_ctrl_stress_all_with_rand_reset.48412645814854914783746376973973472992258429319833668595426475817379994666286 |
| /workspace/coverage/default/47.sram_ctrl_stress_pipeline.41899765179820596960047493353545848183078511028252526000742819029449875243957 |
| /workspace/coverage/default/47.sram_ctrl_throughput_w_partial_write.45354731109821598571378094607771769872629069219167841505177482596015180688590 |
| /workspace/coverage/default/48.sram_ctrl_access_during_key_req.78590107220036670872765928053200098765802184476858040141131284504018726613558 |
| /workspace/coverage/default/48.sram_ctrl_alert_test.104088809827073130036936858285966753704450228344335938996328119715219913777349 |
| /workspace/coverage/default/48.sram_ctrl_bijection.89811061634449675443139165128447771184483183587815725400730601054482132890114 |
| /workspace/coverage/default/48.sram_ctrl_executable.41149178694468628462684995744734376752219213707358845142709826837042087597477 |
| /workspace/coverage/default/48.sram_ctrl_lc_escalation.2098239010684946790612084963890981095143942798605545730283818383041837486085 |
| /workspace/coverage/default/48.sram_ctrl_max_throughput.64647420309797065029237542367658563373508035537234565777947909139069953511332 |
| /workspace/coverage/default/48.sram_ctrl_mem_partial_access.4992841181409713679703256779701040642924192936897093423434251113341104583033 |
| /workspace/coverage/default/48.sram_ctrl_mem_walk.28044681112341300684347415165322074731020726563321117763875162249260318271248 |
| /workspace/coverage/default/48.sram_ctrl_multiple_keys.40011869501420242255201735992675675110751763521243586244222704019541139234577 |
| /workspace/coverage/default/48.sram_ctrl_partial_access.24567878638505232062756135635310790579735409788006607561501719171318509233247 |
| /workspace/coverage/default/48.sram_ctrl_partial_access_b2b.3691624191321070142278266637718006606902331353866526680452535118482157851675 |
| /workspace/coverage/default/48.sram_ctrl_ram_cfg.4615850392545358122187005024774353204588776035953841574632898575425804318594 |
| /workspace/coverage/default/48.sram_ctrl_regwen.50271664782769172079447091745961925820341678214431959719570310391788288174915 |
| /workspace/coverage/default/48.sram_ctrl_smoke.69099818452968902168928869380570811139665720143796435244220711294208203827906 |
| /workspace/coverage/default/48.sram_ctrl_stress_all_with_rand_reset.7442252227346184195671398787544675368356971417780599551839123890543518082513 |
| /workspace/coverage/default/48.sram_ctrl_stress_pipeline.14234033645597402799100310123012769508515924949764897004684959542983080546663 |
| /workspace/coverage/default/48.sram_ctrl_throughput_w_partial_write.89808313137886991356097375445137986817629222033992155640329155966729567060012 |
| /workspace/coverage/default/49.sram_ctrl_access_during_key_req.108767298176388597187350584688388943845700835102983536038829219917848332996376 |
| /workspace/coverage/default/49.sram_ctrl_alert_test.90886941699910329589604253058268331435167948038507840110367476489532052137786 |
| /workspace/coverage/default/49.sram_ctrl_bijection.58348131086001003563326618354558374665730579997604546132012407656969775036763 |
| /workspace/coverage/default/49.sram_ctrl_executable.10843331122080262486161841996059669080454382406793046456754119853817717910139 |
| /workspace/coverage/default/49.sram_ctrl_lc_escalation.52226390314423620070253765244112940505359500385325868108106596468291532671461 |
| /workspace/coverage/default/49.sram_ctrl_max_throughput.18003198491722677836428836853728474060225642734898218081892344038699016926332 |
| /workspace/coverage/default/49.sram_ctrl_mem_partial_access.107152840507035618865148839583928174571245360355104590656041417639827502608780 |
| /workspace/coverage/default/49.sram_ctrl_mem_walk.115603393235978463129376258675199154966027194181021762610970725077124888050216 |
| /workspace/coverage/default/49.sram_ctrl_multiple_keys.70586391532034761857273383149262828399695045484056633265495423769725171337959 |
| /workspace/coverage/default/49.sram_ctrl_partial_access.75843620366666554589457024463829575509106801391863781296313324614097004348257 |
| /workspace/coverage/default/49.sram_ctrl_partial_access_b2b.65244728499427050398585401189204721566523540157703533875757165108568184166623 |
| /workspace/coverage/default/49.sram_ctrl_ram_cfg.43008476459499284227224041666811383809525118990032511111811914453776698560024 |
| /workspace/coverage/default/49.sram_ctrl_regwen.65136745524426823013695220452767464518589255437491267131155694836854492848069 |
| /workspace/coverage/default/49.sram_ctrl_smoke.53743558366974966682160792969840176812339087246351580258314061135144850193665 |
| /workspace/coverage/default/49.sram_ctrl_stress_all_with_rand_reset.1419254284051700224128733722599549630159848685259732068869802020218899312667 |
| /workspace/coverage/default/49.sram_ctrl_stress_pipeline.54238847366030347195305921511681504467898201371467168269914218009362952263897 |
| /workspace/coverage/default/49.sram_ctrl_throughput_w_partial_write.112653607518444256768650824095321067464890033491846586314556317132098107094382 |
| /workspace/coverage/default/5.sram_ctrl_access_during_key_req.34120419841211027920056112560723199252494243983140705124147854622779166319401 |
| /workspace/coverage/default/5.sram_ctrl_alert_test.43920589289279934344790675281418879049520608168748007887334928363453170977284 |
| /workspace/coverage/default/5.sram_ctrl_bijection.20557991652474699150635211045452630704752669606939458118117546001053797623174 |
| /workspace/coverage/default/5.sram_ctrl_executable.91776827247244288881392354337845331073978723515427290965230787407627823736548 |
| /workspace/coverage/default/5.sram_ctrl_lc_escalation.84571802172034863713122680112928596206633416699385322828348310498328367903310 |
| /workspace/coverage/default/5.sram_ctrl_max_throughput.87180035477830084964338814972079665862590378776554254783759911963579368773718 |
| /workspace/coverage/default/5.sram_ctrl_mem_partial_access.35833620963117231667787188645963267319686189090017733101146468112930405175755 |
| /workspace/coverage/default/5.sram_ctrl_mem_walk.41407746302284660528217387702065578912362682412930551864894188718835805025625 |
| /workspace/coverage/default/5.sram_ctrl_multiple_keys.107907240717704071074667170415711036680416472249873398212699980841010925907443 |
| /workspace/coverage/default/5.sram_ctrl_partial_access.8445774694325154530674045486235214190224832361833223485454550401391562092370 |
| /workspace/coverage/default/5.sram_ctrl_ram_cfg.54713373240759441902078367458752323423257830798342892552236353391454838761691 |
| /workspace/coverage/default/5.sram_ctrl_regwen.22478793642770209803943369672576002111575714404824752711847557614835206466952 |
| /workspace/coverage/default/5.sram_ctrl_smoke.8956970619679677708599784527456026146613907139684334030281938822954967523131 |
| /workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.45344416460221750361013200076000972846866650674626384013083906695774141301124 |
| /workspace/coverage/default/5.sram_ctrl_stress_pipeline.85828727901509455345763046026384688337261776839413274636025061863637599900457 |
| /workspace/coverage/default/5.sram_ctrl_throughput_w_partial_write.81164926440714900944250202222477735949535612010529507896385923011495516967713 |
| /workspace/coverage/default/6.sram_ctrl_access_during_key_req.53495168289895495218886579714740186949293969901327736879624417580143644319971 |
| /workspace/coverage/default/6.sram_ctrl_alert_test.5616802863889510673594583480712683351768576954011780755040991659145609068462 |
| /workspace/coverage/default/6.sram_ctrl_bijection.102748158618039133091634252200586740617455684010858829559040778094405829115102 |
| /workspace/coverage/default/6.sram_ctrl_executable.67115242294128130532754715715254747254249536910416760414468155273498923832474 |
| /workspace/coverage/default/6.sram_ctrl_lc_escalation.45676316894798971622451815964755312881383040844059310665579417952272754044570 |
| /workspace/coverage/default/6.sram_ctrl_max_throughput.88620919540147095445186739418184537606555046568364243035781742984869161638621 |
| /workspace/coverage/default/6.sram_ctrl_mem_partial_access.48011374824075938714111374739357047895004338311964244052673223575895809149199 |
| /workspace/coverage/default/6.sram_ctrl_mem_walk.95889045330545241430044198529172259115391201664297222909761381102490650178975 |
| /workspace/coverage/default/6.sram_ctrl_multiple_keys.73709710915786807133773723448611371686224262009984286658431576614490049245307 |
| /workspace/coverage/default/6.sram_ctrl_partial_access.10255021083601663162926901658845296391188374288493341690300566477421138298713 |
| /workspace/coverage/default/6.sram_ctrl_partial_access_b2b.30322514275796336139321951335578151797100446032233660466199313204728111929667 |
| /workspace/coverage/default/6.sram_ctrl_ram_cfg.81192753793892655224272644402494780125740403450963153649216175966865144232829 |
| /workspace/coverage/default/6.sram_ctrl_regwen.13354317017420224409285386887133055062061748711906211399413125731182473615870 |
| /workspace/coverage/default/6.sram_ctrl_smoke.85897682959419541130346706608501654673341479460401171833431376666351335264765 |
| /workspace/coverage/default/6.sram_ctrl_stress_all_with_rand_reset.35865417501885320436376053190256772302916723705429979906486923567454798972139 |
| /workspace/coverage/default/6.sram_ctrl_stress_pipeline.2857311998563646903301929970316430515443928033074045545387733516550099513960 |
| /workspace/coverage/default/6.sram_ctrl_throughput_w_partial_write.106681548153619422267918595478159181602815068447625709651404535389973404531158 |
| /workspace/coverage/default/7.sram_ctrl_access_during_key_req.80554517119117779950336760462864058390311212480092005929725901909156755005205 |
| /workspace/coverage/default/7.sram_ctrl_alert_test.103117777682120731127160767191492593568299340030099959761419697659610657987301 |
| /workspace/coverage/default/7.sram_ctrl_bijection.80653019179698410878847121789814288910781857385770212367376496972816188216839 |
| /workspace/coverage/default/7.sram_ctrl_executable.34703884317013749011097324182525146990707591105695545003967351423053957475247 |
| /workspace/coverage/default/7.sram_ctrl_lc_escalation.91254950241665991464675668583585965950767583698744623927800901769963777778683 |
| /workspace/coverage/default/7.sram_ctrl_max_throughput.61217523742951322401416630921632399718726622538522529410188349868183935006112 |
| /workspace/coverage/default/7.sram_ctrl_mem_partial_access.45536119367762557210849307372321160607238676808056940760740762619865276749404 |
| /workspace/coverage/default/7.sram_ctrl_mem_walk.67843821570140716484230787818925369540354935821849187812431876746542162853995 |
| /workspace/coverage/default/7.sram_ctrl_multiple_keys.37753964046954261283273524911555402460253328344492159262321250681329923198753 |
| /workspace/coverage/default/7.sram_ctrl_partial_access.107726063779450903645603128660894891532453477091858776619378002812487360624737 |
| /workspace/coverage/default/7.sram_ctrl_partial_access_b2b.110273451304064873710996005335786531066357471261188320984051256845104031901127 |
| /workspace/coverage/default/7.sram_ctrl_ram_cfg.22750460037948897447172697665182002184666201687601630579879644737299558766466 |
| /workspace/coverage/default/7.sram_ctrl_regwen.16856735281406054645348807017000601961323573657577744066211393274982138764524 |
| /workspace/coverage/default/7.sram_ctrl_smoke.49274818990814182145567366411305697340028874606429047186414772665315503489400 |
| /workspace/coverage/default/7.sram_ctrl_stress_all_with_rand_reset.23942114466852152539118429011544036496898449487297745103727195104343435442920 |
| /workspace/coverage/default/7.sram_ctrl_stress_pipeline.111923358358096233328857323004579321898655044287622959861171728884148908406997 |
| /workspace/coverage/default/7.sram_ctrl_throughput_w_partial_write.85370606620458465883172396608660312553064483507858223226030590639402740600363 |
| /workspace/coverage/default/8.sram_ctrl_access_during_key_req.64557439827211654479280264208085562666855043217713299780882554004478271845065 |
| /workspace/coverage/default/8.sram_ctrl_alert_test.58868226841140420814303030061128741325886505847789086712827595799550602723971 |
| /workspace/coverage/default/8.sram_ctrl_bijection.110588816197534379543431587038314225551266690238346125881947750972371774572226 |
| /workspace/coverage/default/8.sram_ctrl_lc_escalation.49718127222531008794938160482443964698618156651165122610686419527224577096688 |
| /workspace/coverage/default/8.sram_ctrl_max_throughput.60491345243873118829721253598950216596410034923990286611024069135258093169060 |
| /workspace/coverage/default/8.sram_ctrl_mem_partial_access.68943269224889721396809569387695478344831068603136987543808251126803016447762 |
| /workspace/coverage/default/8.sram_ctrl_mem_walk.73905393019677193319027534263085933463403242322548875865214509110332891680581 |
| /workspace/coverage/default/8.sram_ctrl_multiple_keys.49437811064726166490889540056226098020410136422037098325286746641435106737580 |
| /workspace/coverage/default/8.sram_ctrl_partial_access.26907112141761533076842496653985896466865168388208385831067226835046170405673 |
| /workspace/coverage/default/8.sram_ctrl_partial_access_b2b.15872728761108321294140322603314761871442902031063939080993452645648657163751 |
| /workspace/coverage/default/8.sram_ctrl_ram_cfg.107455684456372683761354706811648322859688661890272983608068990292835805242104 |
| /workspace/coverage/default/8.sram_ctrl_regwen.35083582902593981736161477598249890810051085796491287924269636194772554881258 |
| /workspace/coverage/default/8.sram_ctrl_smoke.24057397384362640996312320591079873172944216252875204398778786823304368887383 |
| /workspace/coverage/default/8.sram_ctrl_stress_all_with_rand_reset.11186575957337992417559818269987989479723419728397937844005088649060051286094 |
| /workspace/coverage/default/8.sram_ctrl_stress_pipeline.78390510014279599467128156663048627367535654878486394548239254163431849791171 |
| /workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.82679850675700304010031660038021365963759141586672492314969135232950789164965 |
| /workspace/coverage/default/9.sram_ctrl_access_during_key_req.99939464111403080113419014884989131292834851244718533631100589569792513913984 |
| /workspace/coverage/default/9.sram_ctrl_alert_test.107021559134521326914093253985917695878937632483501998550102514952374875516480 |
| /workspace/coverage/default/9.sram_ctrl_bijection.106162974465322553943267040471880687709510015802976279838745609335064059623706 |
| /workspace/coverage/default/9.sram_ctrl_executable.84656631706031949332650161683363264379777477520476938178189582940856530936391 |
| /workspace/coverage/default/9.sram_ctrl_lc_escalation.48828288761404446478051592908007224188191042739184545928698125269898885023426 |
| /workspace/coverage/default/9.sram_ctrl_max_throughput.63201650053887317123639725312807564955655432599834499600336355940846780273742 |
| /workspace/coverage/default/9.sram_ctrl_mem_partial_access.43709487604813468034780113281576947316344043413179523001524247471378435113247 |
| /workspace/coverage/default/9.sram_ctrl_mem_walk.74387499023917631561761947029301335891050939120758801768215378658433542102011 |
| /workspace/coverage/default/9.sram_ctrl_multiple_keys.69206360245227235123579508156949936616673429802657122883581764522811840558499 |
| /workspace/coverage/default/9.sram_ctrl_partial_access.92883366273055736551786963827548085496065485475613441385851584863629509636727 |
| /workspace/coverage/default/9.sram_ctrl_partial_access_b2b.76998529219532656419025408170431130945961905598149045809808715766775050171766 |
| /workspace/coverage/default/9.sram_ctrl_ram_cfg.35178251220130458365693986129317196602541927516718996865908960882249439334565 |
| /workspace/coverage/default/9.sram_ctrl_regwen.63613966651725075347927428427625827333870372824522713616653838992611344626684 |
| /workspace/coverage/default/9.sram_ctrl_smoke.69447544078274979803609783971991648896250584342837855026990414537026897415584 |
| /workspace/coverage/default/9.sram_ctrl_stress_all_with_rand_reset.40024797387935235223021140138397670723697742919450088490983982907599114694681 |
| /workspace/coverage/default/9.sram_ctrl_stress_pipeline.41715627464580945268088517399409070983093463365156512661940723560636067979259 |
| /workspace/coverage/default/9.sram_ctrl_throughput_w_partial_write.79727569459398508121987715344607116486629117696046918641472234718164675511243 |
| TEST NO | TEST LOCATION | TEST NAME | STATUS | STARTED | FINISHED | SIMULATION TIME |
| T1 |
/workspace/coverage/default/48.sram_ctrl_regwen.50271664782769172079447091745961925820341678214431959719570310391788288174915 |
|
|
Nov 22 02:17:32 PM PST 23 |
Nov 22 02:27:40 PM PST 23 |
19913691647 ps |
| T2 |
/workspace/coverage/default/5.sram_ctrl_stress_all_with_rand_reset.45344416460221750361013200076000972846866650674626384013083906695774141301124 |
|
|
Nov 22 02:07:34 PM PST 23 |
Nov 22 02:40:52 PM PST 23 |
624328106 ps |
| T3 |
/workspace/coverage/default/11.sram_ctrl_regwen.34953618832356279411506402639801648347315217292131758681669161668026600639640 |
|
|
Nov 22 02:11:16 PM PST 23 |
Nov 22 02:22:30 PM PST 23 |
19913691647 ps |
| T7 |
/workspace/coverage/default/38.sram_ctrl_stress_all_with_rand_reset.43886095997820648722421815691572195678478931410035572105101579451565158238044 |
|
|
Nov 22 02:16:28 PM PST 23 |
Nov 22 02:51:25 PM PST 23 |
624328106 ps |
| T8 |
/workspace/coverage/default/23.sram_ctrl_max_throughput.6455075806798252180675612855339997341219162403905519454016978026673448571441 |
|
|
Nov 22 02:13:19 PM PST 23 |
Nov 22 02:15:17 PM PST 23 |
1342947357 ps |
| T9 |
/workspace/coverage/default/34.sram_ctrl_access_during_key_req.82190037803333032058365642676694403992969374988455437264198371864495878635289 |
|
|
Nov 22 02:15:26 PM PST 23 |
Nov 22 02:31:36 PM PST 23 |
13467153934 ps |
| T10 |
/workspace/coverage/default/2.sram_ctrl_mem_partial_access.24358108455417966612533444978210927948878431257059008392214128061939991770931 |
|
|
Nov 22 02:07:21 PM PST 23 |
Nov 22 02:08:41 PM PST 23 |
4750777237 ps |
| T11 |
/workspace/coverage/default/8.sram_ctrl_executable.91500219965896360570686756661426088787789142678287606847853833443340902905381 |
|
|
Nov 22 02:07:42 PM PST 23 |
Nov 22 02:21:55 PM PST 23 |
31712811539 ps |
| T12 |
/workspace/coverage/default/45.sram_ctrl_multiple_keys.48046143105038044094534615695898361307841067942130326794125951879835366630524 |
|
|
Nov 22 02:16:36 PM PST 23 |
Nov 22 02:29:23 PM PST 23 |
28731174678 ps |
| T13 |
/workspace/coverage/default/32.sram_ctrl_mem_walk.22731662865262698177914549503461827896862718397123777972940562015032025278011 |
|
|
Nov 22 02:15:27 PM PST 23 |
Nov 22 02:17:57 PM PST 23 |
18445453393 ps |
| T14 |
/workspace/coverage/default/32.sram_ctrl_smoke.3578768317674469288403406451171549708094897884175535383083414141035667352660 |
|
|
Nov 22 02:14:53 PM PST 23 |
Nov 22 02:15:17 PM PST 23 |
988289480 ps |
| T21 |
/workspace/coverage/default/48.sram_ctrl_alert_test.104088809827073130036936858285966753704450228344335938996328119715219913777349 |
|
|
Nov 22 02:17:29 PM PST 23 |
Nov 22 02:17:30 PM PST 23 |
16600825 ps |
| T15 |
/workspace/coverage/default/47.sram_ctrl_mem_walk.5286087994287677523214287374611530177545488732647372885375999274936884723593 |
|
|
Nov 22 02:17:07 PM PST 23 |
Nov 22 02:19:50 PM PST 23 |
18445453393 ps |
| T33 |
/workspace/coverage/default/35.sram_ctrl_ram_cfg.72996725147362958598219311827384973930115721347792952956916415387241519351684 |
|
|
Nov 22 02:15:44 PM PST 23 |
Nov 22 02:15:50 PM PST 23 |
607542526 ps |
| T61 |
/workspace/coverage/default/45.sram_ctrl_max_throughput.86393279049904485760086648458139612815170816527078749987899057479346080347627 |
|
|
Nov 22 02:16:36 PM PST 23 |
Nov 22 02:18:39 PM PST 23 |
1342947357 ps |
| T16 |
/workspace/coverage/default/38.sram_ctrl_partial_access.89148292826568407425882032098855544508955327521114279739457566404026792122171 |
|
|
Nov 22 02:16:37 PM PST 23 |
Nov 22 02:16:56 PM PST 23 |
1006378621 ps |
| T17 |
/workspace/coverage/default/16.sram_ctrl_executable.106940786598521730967802865927891989751217277662889262958195040901306084574772 |
|
|
Nov 22 02:12:18 PM PST 23 |
Nov 22 02:27:04 PM PST 23 |
31712811539 ps |
| T18 |
/workspace/coverage/default/31.sram_ctrl_stress_pipeline.15449524847236373348770622966887365580495147619578440166418382002607175020716 |
|
|
Nov 22 02:14:52 PM PST 23 |
Nov 22 02:22:01 PM PST 23 |
9325508496 ps |
| T88 |
/workspace/coverage/default/5.sram_ctrl_partial_access_b2b.13120504934857314420837775327770236715412398188633612849905670881483356558498 |
|
|
Nov 22 02:07:22 PM PST 23 |
Nov 22 02:17:04 PM PST 23 |
45083829570 ps |
| T89 |
/workspace/coverage/default/24.sram_ctrl_smoke.58654544257864788318216591203616402170986608831095972987178799702674952796718 |
|
|
Nov 22 02:13:35 PM PST 23 |
Nov 22 02:13:53 PM PST 23 |
988289480 ps |
| T106 |
/workspace/coverage/default/20.sram_ctrl_throughput_w_partial_write.111361904846248141806797983085832339261721084748630704594850873801500897833952 |
|
|
Nov 22 02:12:51 PM PST 23 |
Nov 22 02:14:58 PM PST 23 |
1371125703 ps |
| T103 |
/workspace/coverage/default/26.sram_ctrl_regwen.27390867141873846985196151950074682826199651653645963784366783079832572832297 |
|
|
Nov 22 02:13:57 PM PST 23 |
Nov 22 02:24:41 PM PST 23 |
19913691647 ps |
| T107 |
/workspace/coverage/default/3.sram_ctrl_partial_access.73950529998517768387635231923234677268642221123251778388257488913101573684742 |
|
|
Nov 22 02:07:05 PM PST 23 |
Nov 22 02:07:25 PM PST 23 |
1006378621 ps |
| T27 |
/workspace/coverage/default/1.sram_ctrl_bijection.23819635589509637366062558660310180490308599132930925093865020353634112922575 |
|
|
Nov 22 02:07:20 PM PST 23 |
Nov 22 02:54:01 PM PST 23 |
295482808505 ps |
| T108 |
/workspace/coverage/default/13.sram_ctrl_mem_walk.30844947952459994631288897081406390401224017586433604765099190825509177764532 |
|
|
Nov 22 02:11:19 PM PST 23 |
Nov 22 02:13:55 PM PST 23 |
18445453393 ps |
| T28 |
/workspace/coverage/default/20.sram_ctrl_bijection.13107051609915471190359102953453716355993457973583740788751231226912045363400 |
|
|
Nov 22 02:12:33 PM PST 23 |
Nov 22 02:58:10 PM PST 23 |
295482808505 ps |
| T109 |
/workspace/coverage/default/20.sram_ctrl_max_throughput.75285702035325743248002636375230304621570401374031542536826317271618965560595 |
|
|
Nov 22 02:12:34 PM PST 23 |
Nov 22 02:14:41 PM PST 23 |
1342947357 ps |
| T104 |
/workspace/coverage/default/5.sram_ctrl_executable.91776827247244288881392354337845331073978723515427290965230787407627823736548 |
|
|
Nov 22 02:07:35 PM PST 23 |
Nov 22 02:23:51 PM PST 23 |
31712811539 ps |
| T110 |
/workspace/coverage/default/27.sram_ctrl_executable.77321349434825344506951295511706132948161952149860269189180163368108642427573 |
|
|
Nov 22 02:14:03 PM PST 23 |
Nov 22 02:28:56 PM PST 23 |
31712811539 ps |
| T111 |
/workspace/coverage/default/34.sram_ctrl_max_throughput.28667884218492239507468629321095040122907566491715398987271174911285430056135 |
|
|
Nov 22 02:15:39 PM PST 23 |
Nov 22 02:17:50 PM PST 23 |
1342947357 ps |
| T112 |
/workspace/coverage/default/44.sram_ctrl_throughput_w_partial_write.57401241000720770747446001600806665883940054648410914673226326176224114005190 |
|
|
Nov 22 02:16:40 PM PST 23 |
Nov 22 02:18:57 PM PST 23 |
1371125703 ps |
| T113 |
/workspace/coverage/default/13.sram_ctrl_partial_access.28461579224738705352674596998513206741238143194549823397491555328506906757846 |
|
|
Nov 22 02:11:20 PM PST 23 |
Nov 22 02:11:38 PM PST 23 |
1006378621 ps |
| T105 |
/workspace/coverage/default/43.sram_ctrl_multiple_keys.55066225346670846363135770793631066721052803903965224245944138751494240317030 |
|
|
Nov 22 02:16:35 PM PST 23 |
Nov 22 02:29:40 PM PST 23 |
28731174678 ps |
| T90 |
/workspace/coverage/default/35.sram_ctrl_stress_pipeline.52330622628994026425435822093576027872328704636852400648281107642934809908100 |
|
|
Nov 22 02:15:38 PM PST 23 |
Nov 22 02:22:41 PM PST 23 |
9325508496 ps |
| T91 |
/workspace/coverage/default/36.sram_ctrl_stress_pipeline.21603020713033623735238156394542090654470632580767302735065205239098807577520 |
|
|
Nov 22 02:15:45 PM PST 23 |
Nov 22 02:22:41 PM PST 23 |
9325508496 ps |
| T92 |
/workspace/coverage/default/39.sram_ctrl_multiple_keys.42551197099507480740930915472839066110086032701629148166307304764192704929520 |
|
|
Nov 22 02:16:39 PM PST 23 |
Nov 22 02:31:32 PM PST 23 |
28731174678 ps |
| T93 |
/workspace/coverage/default/22.sram_ctrl_partial_access_b2b.2194083945625318622486001997661311636624764113469753261085004815199613404945 |
|
|
Nov 22 02:13:16 PM PST 23 |
Nov 22 02:22:54 PM PST 23 |
45083829570 ps |
| T72 |
/workspace/coverage/default/36.sram_ctrl_mem_partial_access.22043520663430161257414770571493924445718783967910235710911975591919085420353 |
|
|
Nov 22 02:15:40 PM PST 23 |
Nov 22 02:17:05 PM PST 23 |
4750777237 ps |
| T94 |
/workspace/coverage/default/3.sram_ctrl_partial_access_b2b.89363462085898431090316707198898096284788245456751924818407620466430588107865 |
|
|
Nov 22 02:07:23 PM PST 23 |
Nov 22 02:17:12 PM PST 23 |
45083829570 ps |
| T73 |
/workspace/coverage/default/27.sram_ctrl_mem_partial_access.23521227892992050481506459782818898248365787857963315782061513243004755332531 |
|
|
Nov 22 02:14:06 PM PST 23 |
Nov 22 02:15:25 PM PST 23 |
4750777237 ps |
| T95 |
/workspace/coverage/default/22.sram_ctrl_stress_pipeline.58710148265580561083822536944393564019026291173096509275899463882919306624363 |
|
|
Nov 22 02:12:58 PM PST 23 |
Nov 22 02:20:00 PM PST 23 |
9325508496 ps |
| T34 |
/workspace/coverage/default/34.sram_ctrl_ram_cfg.57227398368148081982930734182262467922063582655702384640579139084968332647560 |
|
|
Nov 22 02:15:11 PM PST 23 |
Nov 22 02:15:18 PM PST 23 |
607542526 ps |
| T114 |
/workspace/coverage/default/18.sram_ctrl_partial_access.72560551457667753265074218313107160161548287672715700758228194149733597785763 |
|
|
Nov 22 02:12:18 PM PST 23 |
Nov 22 02:12:40 PM PST 23 |
1006378621 ps |
| T115 |
/workspace/coverage/default/2.sram_ctrl_smoke.18871252523357014941858006583808342990722432352533907974611981194066078942144 |
|
|
Nov 22 02:07:06 PM PST 23 |
Nov 22 02:07:29 PM PST 23 |
988289480 ps |
| T35 |
/workspace/coverage/default/24.sram_ctrl_ram_cfg.18654861670807026311102307689073720556760269949793297072790370784858065587922 |
|
|
Nov 22 02:13:53 PM PST 23 |
Nov 22 02:14:00 PM PST 23 |
607542526 ps |
| T74 |
/workspace/coverage/default/16.sram_ctrl_mem_partial_access.38171894869294863013760767260140880923100857452118142990833556995340857458981 |
|
|
Nov 22 02:12:18 PM PST 23 |
Nov 22 02:13:38 PM PST 23 |
4750777237 ps |
| T75 |
/workspace/coverage/default/45.sram_ctrl_mem_partial_access.69095453795686027252599683541337856182713758982764598212630790831412075216069 |
|
|
Nov 22 02:16:38 PM PST 23 |
Nov 22 02:17:58 PM PST 23 |
4750777237 ps |
| T116 |
/workspace/coverage/default/28.sram_ctrl_smoke.34379266823024498249891533738120674017793041968688210019472624054456822136806 |
|
|
Nov 22 02:14:15 PM PST 23 |
Nov 22 02:14:34 PM PST 23 |
988289480 ps |
| T117 |
/workspace/coverage/default/27.sram_ctrl_mem_walk.81697929558535171023819641888257190651015120544831737204769541553884406981156 |
|
|
Nov 22 02:14:05 PM PST 23 |
Nov 22 02:16:44 PM PST 23 |
18445453393 ps |
| T76 |
/workspace/coverage/default/0.sram_ctrl_mem_partial_access.79153322629509074238243547559406800928198004633996058580909034171827797765521 |
|
|
Nov 22 02:07:22 PM PST 23 |
Nov 22 02:08:45 PM PST 23 |
4750777237 ps |
| T118 |
/workspace/coverage/default/18.sram_ctrl_throughput_w_partial_write.18217850030673032648306319224791878908073586008499901995704630230685952967789 |
|
|
Nov 22 02:12:21 PM PST 23 |
Nov 22 02:14:15 PM PST 23 |
1371125703 ps |
| T119 |
/workspace/coverage/default/22.sram_ctrl_throughput_w_partial_write.50422925436755349559165612712339394426129096377039814733896493596340499791567 |
|
|
Nov 22 02:13:14 PM PST 23 |
Nov 22 02:15:23 PM PST 23 |
1371125703 ps |
| T29 |
/workspace/coverage/default/39.sram_ctrl_stress_all_with_rand_reset.47044178176370285875022113477906748836019063274715862115242036959400066512873 |
|
|
Nov 22 02:16:32 PM PST 23 |
Nov 22 02:50:50 PM PST 23 |
624328106 ps |
| T120 |
/workspace/coverage/default/46.sram_ctrl_multiple_keys.111072205059559223484432933873198032882943240129951526142190211135515753587693 |
|
|
Nov 22 02:16:43 PM PST 23 |
Nov 22 02:28:11 PM PST 23 |
28731174678 ps |
| T121 |
/workspace/coverage/default/41.sram_ctrl_smoke.13946639589127913900452834002414677958282991052313625588463639708247695469713 |
|
|
Nov 22 02:16:29 PM PST 23 |
Nov 22 02:16:46 PM PST 23 |
988289480 ps |
| T30 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_aliasing.62746283545692386397693538652031091269369409791532639912643354838406043443197 |
|
|
Nov 22 01:54:55 PM PST 23 |
Nov 22 01:54:58 PM PST 23 |
22582920 ps |
| T50 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_mem_rw_with_rand_reset.31151297542882181734008777778513858307734846636601993562460852147034137156789 |
|
|
Nov 22 01:55:01 PM PST 23 |
Nov 22 01:55:10 PM PST 23 |
609578224 ps |
| T31 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_passthru_mem_tl_intg_err.91447411859016362181924983567242500317354490065865365638679636353396416937708 |
|
|
Nov 22 01:54:59 PM PST 23 |
Nov 22 01:55:59 PM PST 23 |
6599780302 ps |
| T32 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_same_csr_outstanding.12007403740571077682143060438531484021851132880453236427796077681288908619192 |
|
|
Nov 22 01:55:17 PM PST 23 |
Nov 22 01:55:19 PM PST 23 |
23886481 ps |
| T51 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_mem_rw_with_rand_reset.39757538203191427449273522235785879739277651992642770010268199798723259966846 |
|
|
Nov 22 01:55:01 PM PST 23 |
Nov 22 01:55:10 PM PST 23 |
609578224 ps |
| T64 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_aliasing.77671534573352185148574000369631618969715444943027097838840173340484268644098 |
|
|
Nov 22 01:54:56 PM PST 23 |
Nov 22 01:54:58 PM PST 23 |
22582920 ps |
| T47 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_intg_err.103069340598747431990071044771124132974926048755095464332150456962950656345182 |
|
|
Nov 22 01:55:33 PM PST 23 |
Nov 22 01:55:35 PM PST 23 |
163313937 ps |
| T65 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_rw.72498509719034281865012652999048648258712613855664347778004318442270176984504 |
|
|
Nov 22 01:55:01 PM PST 23 |
Nov 22 01:55:05 PM PST 23 |
19547230 ps |
| T48 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_intg_err.67675029381190049517062106407797730676416685891344084791301784604830895758033 |
|
|
Nov 22 01:55:02 PM PST 23 |
Nov 22 01:55:07 PM PST 23 |
163313937 ps |
| T66 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_hw_reset.78708103697583881776286149189657531401819402409069497086150817836179386540092 |
|
|
Nov 22 01:54:54 PM PST 23 |
Nov 22 01:54:57 PM PST 23 |
23779339 ps |
| T49 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_intg_err.106953177646651158281561049400073966757182732385531125813202582949523697747936 |
|
|
Nov 22 01:54:57 PM PST 23 |
Nov 22 01:55:01 PM PST 23 |
163313937 ps |
| T67 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_bit_bash.36012596917899307105210684084039466729713262532777076937320645785368242115444 |
|
|
Nov 22 01:54:56 PM PST 23 |
Nov 22 01:55:00 PM PST 23 |
122117838 ps |
| T68 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_passthru_mem_tl_intg_err.52154708174082915490241353810147950748445221552037214695548416931211604076811 |
|
|
Nov 22 01:54:56 PM PST 23 |
Nov 22 01:55:55 PM PST 23 |
6599780302 ps |
| T52 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_csr_mem_rw_with_rand_reset.10776305821613019645643104123423593926092886353154496470179951236060021424861 |
|
|
Nov 22 01:55:00 PM PST 23 |
Nov 22 01:55:09 PM PST 23 |
609578224 ps |
| T69 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_rw.61165113511442705793176420017562603902104835420693767331688977341754970228273 |
|
|
Nov 22 01:54:50 PM PST 23 |
Nov 22 01:54:52 PM PST 23 |
19547230 ps |
| T70 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_rw.62865182040719649560217832902292039833816057136984017361081556473910268152324 |
|
|
Nov 22 01:54:59 PM PST 23 |
Nov 22 01:55:03 PM PST 23 |
19547230 ps |
| T53 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_intg_err.84952136589659008873558452297705090695454886572909421823031433341265979803810 |
|
|
Nov 22 01:55:16 PM PST 23 |
Nov 22 01:55:19 PM PST 23 |
163313937 ps |
| T71 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_same_csr_outstanding.25294721308175567514993254976722528917299882410905878572740491685430232856766 |
|
|
Nov 22 01:54:59 PM PST 23 |
Nov 22 01:55:02 PM PST 23 |
23886481 ps |
| T62 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_mem_rw_with_rand_reset.63924063712984168663822962045398062650331678972911578669295397800587258099799 |
|
|
Nov 22 01:54:58 PM PST 23 |
Nov 22 01:55:05 PM PST 23 |
609578224 ps |
| T54 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_tl_errors.76218344811629093157643678602429730359749804024530230882560518490799230779788 |
|
|
Nov 22 01:55:01 PM PST 23 |
Nov 22 01:55:08 PM PST 23 |
117100021 ps |
| T77 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_passthru_mem_tl_intg_err.10802973449096983307588226112716846497332216127285774938199724404191272368627 |
|
|
Nov 22 01:55:14 PM PST 23 |
Nov 22 01:56:13 PM PST 23 |
6599780302 ps |
| T122 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_bit_bash.99010753011305628975578792118893773372497492980128916830987536097104182810107 |
|
|
Nov 22 01:54:53 PM PST 23 |
Nov 22 01:54:56 PM PST 23 |
122117838 ps |
| T55 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_errors.51864385224181930031316165096451777802934021714034290839245171000842046081810 |
|
|
Nov 22 01:55:01 PM PST 23 |
Nov 22 01:55:07 PM PST 23 |
117100021 ps |
| T78 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_rw.57551692702204569504893566368013001463646312994454454612563704876046250376580 |
|
|
Nov 22 01:54:56 PM PST 23 |
Nov 22 01:54:59 PM PST 23 |
19547230 ps |
| T63 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_mem_rw_with_rand_reset.96726415734964811810006189543143620458148880611764893493721536817109366085210 |
|
|
Nov 22 01:54:54 PM PST 23 |
Nov 22 01:55:01 PM PST 23 |
609578224 ps |
| T96 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_same_csr_outstanding.77822413249595707897252258113948291680051378124373947410563850541335562034463 |
|
|
Nov 22 01:55:14 PM PST 23 |
Nov 22 01:55:15 PM PST 23 |
23886481 ps |
| T97 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_same_csr_outstanding.26209100846828647687021217690865422260712389168770831560647202968697977603411 |
|
|
Nov 22 01:55:00 PM PST 23 |
Nov 22 01:55:04 PM PST 23 |
23886481 ps |
| T79 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_passthru_mem_tl_intg_err.10526243101749363336146484349002130946591912372913208928135092944157395404304 |
|
|
Nov 22 01:54:58 PM PST 23 |
Nov 22 01:55:59 PM PST 23 |
6599780302 ps |
| T123 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_mem_rw_with_rand_reset.28396412284469339667035682003936544637390369771046962410348706978768367213249 |
|
|
Nov 22 01:55:16 PM PST 23 |
Nov 22 01:55:22 PM PST 23 |
609578224 ps |
| T56 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_errors.93558634982218313494583045095251791402617731873897691126627425580921147750503 |
|
|
Nov 22 01:54:58 PM PST 23 |
Nov 22 01:55:03 PM PST 23 |
117100021 ps |
| T80 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_rw.87952917610482111939900079438745538750371900184082431092991745369464661417712 |
|
|
Nov 22 01:54:56 PM PST 23 |
Nov 22 01:54:58 PM PST 23 |
19547230 ps |
| T98 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_same_csr_outstanding.26465664620752747247334714167694387205265917088641784305717029628519905471485 |
|
|
Nov 22 01:55:01 PM PST 23 |
Nov 22 01:55:05 PM PST 23 |
23886481 ps |
| T124 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_mem_rw_with_rand_reset.85496929916767435639680743766685541201224599722134428551832343324307592513926 |
|
|
Nov 22 01:55:03 PM PST 23 |
Nov 22 01:55:13 PM PST 23 |
609578224 ps |
| T125 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_hw_reset.69125063116818918079171883624956482020463431849939686088877450514117108743938 |
|
|
Nov 22 01:54:59 PM PST 23 |
Nov 22 01:55:02 PM PST 23 |
23779339 ps |
| T57 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_tl_errors.68109867432021687773944888846384548275465514344895265475989834070233950254274 |
|
|
Nov 22 01:55:16 PM PST 23 |
Nov 22 01:55:20 PM PST 23 |
117100021 ps |
| T99 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_same_csr_outstanding.51171154468460862196607619170892472631347097569251722943895126288100848924039 |
|
|
Nov 22 01:55:01 PM PST 23 |
Nov 22 01:55:05 PM PST 23 |
23886481 ps |
| T81 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_passthru_mem_tl_intg_err.92574553490816719080025078389496148714434730316639409294916197198109586833345 |
|
|
Nov 22 01:55:29 PM PST 23 |
Nov 22 01:56:29 PM PST 23 |
6599780302 ps |
| T126 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_aliasing.73983361105693687217764672700484913355352697285945388662574935674259925671288 |
|
|
Nov 22 01:54:56 PM PST 23 |
Nov 22 01:54:58 PM PST 23 |
22582920 ps |
| T127 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_rw.61331131106322234623729956527645991018858235272319968808253478362482250641217 |
|
|
Nov 22 01:55:20 PM PST 23 |
Nov 22 01:55:21 PM PST 23 |
19547230 ps |
| T128 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_intg_err.87761969234963493236196594210753723056734620983425640195630620833280474463000 |
|
|
Nov 22 01:55:20 PM PST 23 |
Nov 22 01:55:22 PM PST 23 |
163313937 ps |
| T58 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_errors.54091580787935463831960597657937433038328151556659657103207428682468429234458 |
|
|
Nov 22 01:54:58 PM PST 23 |
Nov 22 01:55:03 PM PST 23 |
117100021 ps |
| T129 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_rw.31964992380519496049604698737831435414377928201654282352330966619603322384514 |
|
|
Nov 22 01:54:58 PM PST 23 |
Nov 22 01:55:01 PM PST 23 |
19547230 ps |
| T130 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_mem_rw_with_rand_reset.6129430770868737286973581567024016833421007710427826296709374708963229912445 |
|
|
Nov 22 01:55:19 PM PST 23 |
Nov 22 01:55:25 PM PST 23 |
609578224 ps |
| T131 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_same_csr_outstanding.50260613777827375233379027488079298649020262073251618283318702229172874656880 |
|
|
Nov 22 01:55:03 PM PST 23 |
Nov 22 01:55:08 PM PST 23 |
23886481 ps |
| T59 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_tl_errors.38241638472650502841811160385397340316368123576822575179486301835705613421667 |
|
|
Nov 22 01:55:35 PM PST 23 |
Nov 22 01:55:39 PM PST 23 |
117100021 ps |
| T132 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_csr_rw.16429328088108863185898691246250559479438832487975219700557897932524774752405 |
|
|
Nov 22 01:55:14 PM PST 23 |
Nov 22 01:55:16 PM PST 23 |
19547230 ps |
| T133 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_tl_intg_err.6717016130418538571827433867789769714057226571462556995737811320253518184733 |
|
|
Nov 22 01:55:04 PM PST 23 |
Nov 22 01:55:09 PM PST 23 |
163313937 ps |
| T83 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_passthru_mem_tl_intg_err.1788505344261904705647516108466418990679600893545237429181790121243170224085 |
|
|
Nov 22 01:55:00 PM PST 23 |
Nov 22 01:56:01 PM PST 23 |
6599780302 ps |
| T134 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_tl_intg_err.40615128841264764863536184555350119168682709041229061669522262383641545366356 |
|
|
Nov 22 01:54:57 PM PST 23 |
Nov 22 01:55:01 PM PST 23 |
163313937 ps |
| T135 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_same_csr_outstanding.114092636433972087775584276278459075461230008302917764472870171503756737264008 |
|
|
Nov 22 01:55:16 PM PST 23 |
Nov 22 01:55:18 PM PST 23 |
23886481 ps |
| T84 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_passthru_mem_tl_intg_err.86085289985713739840595274710705586414745367072192828158575234386002106340481 |
|
|
Nov 22 01:54:56 PM PST 23 |
Nov 22 01:55:53 PM PST 23 |
6599780302 ps |
| T85 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_passthru_mem_tl_intg_err.64596020427356262482596168260181124629404187252242605454597679794562494336051 |
|
|
Nov 22 01:55:15 PM PST 23 |
Nov 22 01:56:13 PM PST 23 |
6599780302 ps |
| T136 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_same_csr_outstanding.59391605579866802736515735894551934200191260117311480031394669696021290131010 |
|
|
Nov 22 01:55:23 PM PST 23 |
Nov 22 01:55:25 PM PST 23 |
23886481 ps |
| T137 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_intg_err.90825624285135790952516004537182304776109446870412989668834352134893236194858 |
|
|
Nov 22 01:55:11 PM PST 23 |
Nov 22 01:55:13 PM PST 23 |
163313937 ps |
| T86 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_passthru_mem_tl_intg_err.8879784263405482895945722070460820040732480522934155339997508095189025040025 |
|
|
Nov 22 01:55:16 PM PST 23 |
Nov 22 01:56:16 PM PST 23 |
6599780302 ps |
| T138 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_same_csr_outstanding.5498193194699947925986336642794049335573016442929163104494856031632776245022 |
|
|
Nov 22 01:54:51 PM PST 23 |
Nov 22 01:54:53 PM PST 23 |
23886481 ps |
| T87 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_passthru_mem_tl_intg_err.93177519516785476753792694427293544757138130934456272902746426281181831409984 |
|
|
Nov 22 01:55:01 PM PST 23 |
Nov 22 01:56:02 PM PST 23 |
6599780302 ps |
| T139 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_passthru_mem_tl_intg_err.30289478462768985131349709593073352066062995234609903602155646809383155898260 |
|
|
Nov 22 01:55:14 PM PST 23 |
Nov 22 01:56:12 PM PST 23 |
6599780302 ps |
| T140 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_bit_bash.82899458900857819930128144140838487631744732028535471085671289552582166294886 |
|
|
Nov 22 01:54:58 PM PST 23 |
Nov 22 01:55:02 PM PST 23 |
122117838 ps |
| T141 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_rw.90266491336684871862364616748606484752062607572496498991776158605503272681099 |
|
|
Nov 22 01:55:35 PM PST 23 |
Nov 22 01:55:38 PM PST 23 |
19547230 ps |
| T142 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_intg_err.2346890792682761939360708380453632925945306326042678579217651325001808196692 |
|
|
Nov 22 01:55:15 PM PST 23 |
Nov 22 01:55:18 PM PST 23 |
163313937 ps |
| T143 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_csr_mem_rw_with_rand_reset.30046181533722445649216928368539379611345409597366649536827707570970045291802 |
|
|
Nov 22 01:55:34 PM PST 23 |
Nov 22 01:55:41 PM PST 23 |
609578224 ps |
| T60 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_tl_errors.670164647643522888858581715613672606021799275848467541082507969987344764391 |
|
|
Nov 22 01:55:15 PM PST 23 |
Nov 22 01:55:18 PM PST 23 |
117100021 ps |
| T144 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_same_csr_outstanding.75587944230571732010444725210334378489945169878858737366499074575992622797087 |
|
|
Nov 22 01:55:35 PM PST 23 |
Nov 22 01:55:38 PM PST 23 |
23886481 ps |
| T145 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_bit_bash.55463029822207436965198577677370798155867372064810384530660350053608247921646 |
|
|
Nov 22 01:54:50 PM PST 23 |
Nov 22 01:54:53 PM PST 23 |
122117838 ps |
| T146 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_mem_rw_with_rand_reset.32512268922028897778247421190217845357111061731622474120974990474610047567793 |
|
|
Nov 22 01:54:59 PM PST 23 |
Nov 22 01:55:07 PM PST 23 |
609578224 ps |
| T147 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_rw.109220307288222441580776216968852381357820340614090908571963114148021718277220 |
|
|
Nov 22 01:55:17 PM PST 23 |
Nov 22 01:55:19 PM PST 23 |
19547230 ps |
| T148 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_errors.89810490053213331165134152149133561089994378667025560410798718438104862799469 |
|
|
Nov 22 01:54:57 PM PST 23 |
Nov 22 01:55:01 PM PST 23 |
117100021 ps |
| T149 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_same_csr_outstanding.52402300398668724933108397378185348010901923032624895689961037248468315250539 |
|
|
Nov 22 01:54:55 PM PST 23 |
Nov 22 01:54:58 PM PST 23 |
23886481 ps |
| T150 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_errors.103680850422852171897616120267898621110313585011291848358813567312066038662763 |
|
|
Nov 22 01:55:30 PM PST 23 |
Nov 22 01:55:34 PM PST 23 |
117100021 ps |
| T151 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_same_csr_outstanding.54470711131283528066830022597444772227365863781056551929231569781259233604481 |
|
|
Nov 22 01:55:00 PM PST 23 |
Nov 22 01:55:04 PM PST 23 |
23886481 ps |
| T152 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_rw.77850814228922720028417556196782502103366539157994972371591181652984735536001 |
|
|
Nov 22 01:55:02 PM PST 23 |
Nov 22 01:55:07 PM PST 23 |
19547230 ps |
| T153 |
/workspace/coverage/cover_reg_top/19.sram_ctrl_passthru_mem_tl_intg_err.103211154912372674403456714302975642778037012914020900030594641927353276934887 |
|
|
Nov 22 01:55:34 PM PST 23 |
Nov 22 01:56:31 PM PST 23 |
6599780302 ps |
| T154 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_intg_err.111310604526398987070910091953818569414716403451129193805330663881140262935069 |
|
|
Nov 22 01:55:11 PM PST 23 |
Nov 22 01:55:13 PM PST 23 |
163313937 ps |
| T155 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_same_csr_outstanding.28073842112919194892892491907513496988301990300477062212391666735974195218595 |
|
|
Nov 22 01:55:12 PM PST 23 |
Nov 22 01:55:13 PM PST 23 |
23886481 ps |
| T156 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_mem_rw_with_rand_reset.13525278061176384095880825966787844948115315772018649129197307819184383394919 |
|
|
Nov 22 01:55:15 PM PST 23 |
Nov 22 01:55:21 PM PST 23 |
609578224 ps |
| T157 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_csr_rw.26524079794436608048423006079806256528702133554301221361608200135576180001883 |
|
|
Nov 22 01:55:14 PM PST 23 |
Nov 22 01:55:16 PM PST 23 |
19547230 ps |
| T158 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_intg_err.85674737186548614548316117704908961218873631332261808521826276765077681400303 |
|
|
Nov 22 01:55:00 PM PST 23 |
Nov 22 01:55:05 PM PST 23 |
163313937 ps |
| T159 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_csr_hw_reset.73506251104599959907197125012983945993190343559821940488057152114874441488107 |
|
|
Nov 22 01:54:50 PM PST 23 |
Nov 22 01:54:53 PM PST 23 |
23779339 ps |
| T160 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_csr_bit_bash.15474479891670548892218945944925612429787134237901825443147620343188064944576 |
|
|
Nov 22 01:54:59 PM PST 23 |
Nov 22 01:55:03 PM PST 23 |
122117838 ps |
| T161 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_csr_rw.106100637150894289721600707371789813228252766636754291294535629738724247824334 |
|
|
Nov 22 01:55:00 PM PST 23 |
Nov 22 01:55:04 PM PST 23 |
19547230 ps |
| T162 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_passthru_mem_tl_intg_err.104198086280643600581056486010368836519799598592726634244625540625924061023894 |
|
|
Nov 22 01:55:01 PM PST 23 |
Nov 22 01:56:03 PM PST 23 |
6599780302 ps |
| T163 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_csr_mem_rw_with_rand_reset.53810410784606333883194070254548636685283471011541262397516351879783948885699 |
|
|
Nov 22 01:55:15 PM PST 23 |
Nov 22 01:55:21 PM PST 23 |
609578224 ps |
| T164 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_passthru_mem_tl_intg_err.97516860504755559732182431463975439449917216778530988356167022781947515403288 |
|
|
Nov 22 01:54:51 PM PST 23 |
Nov 22 01:55:51 PM PST 23 |
6599780302 ps |
| T165 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_csr_rw.53816298029072511586735132513698933336994263970034695183116912633790502469652 |
|
|
Nov 22 01:55:17 PM PST 23 |
Nov 22 01:55:19 PM PST 23 |
19547230 ps |
| T166 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_mem_rw_with_rand_reset.61378348831018304818619751485286270084179009106281752041078773751199544397140 |
|
|
Nov 22 01:55:33 PM PST 23 |
Nov 22 01:55:40 PM PST 23 |
609578224 ps |
| T167 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_passthru_mem_tl_intg_err.71461085596839642352803879595430879560378065862907186126103312436007685792137 |
|
|
Nov 22 01:54:46 PM PST 23 |
Nov 22 01:55:46 PM PST 23 |
6599780302 ps |
| T168 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_tl_intg_err.72161406910027710784534158897122708640283592612319816121028284997280108894667 |
|
|
Nov 22 01:55:12 PM PST 23 |
Nov 22 01:55:15 PM PST 23 |
163313937 ps |
| T169 |
/workspace/coverage/cover_reg_top/15.sram_ctrl_tl_errors.16683384380872382608109423910533040996479431321485118877128881171439546085399 |
|
|
Nov 22 01:55:13 PM PST 23 |
Nov 22 01:55:16 PM PST 23 |
117100021 ps |
| T170 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_same_csr_outstanding.106808613613331305943048798644930206514255581797305763679951723873959143396349 |
|
|
Nov 22 01:55:13 PM PST 23 |
Nov 22 01:55:15 PM PST 23 |
23886481 ps |
| T171 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_rw.8504768809475117202033563294205174532521568729423800640749744222698954520162 |
|
|
Nov 22 01:55:13 PM PST 23 |
Nov 22 01:55:14 PM PST 23 |
19547230 ps |
| T172 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_tl_errors.10442951025476605586555108735105628130177658322680207608493995930848957996942 |
|
|
Nov 22 01:55:13 PM PST 23 |
Nov 22 01:55:16 PM PST 23 |
117100021 ps |
| T173 |
/workspace/coverage/cover_reg_top/13.sram_ctrl_passthru_mem_tl_intg_err.96396940503270038670510401781606454616779767948761192222955774361836651067004 |
|
|
Nov 22 01:55:17 PM PST 23 |
Nov 22 01:56:16 PM PST 23 |
6599780302 ps |
| T174 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_errors.42601008519622297573023060351469273407969513590554830449226457863712482144882 |
|
|
Nov 22 01:54:57 PM PST 23 |
Nov 22 01:55:02 PM PST 23 |
117100021 ps |
| T175 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_tl_intg_err.55281314534479351765588494765018590137523459564421829253345281065317904877562 |
|
|
Nov 22 01:55:00 PM PST 23 |
Nov 22 01:55:05 PM PST 23 |
163313937 ps |
| T176 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_rw.114133135089823081968350807840182562493155794938048668986148029318386510347082 |
|
|
Nov 22 01:54:56 PM PST 23 |
Nov 22 01:54:59 PM PST 23 |
19547230 ps |
| T177 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_hw_reset.38247381663261697107512461027348987333602112273802272993611563404847626532502 |
|
|
Nov 22 01:55:01 PM PST 23 |
Nov 22 01:55:05 PM PST 23 |
23779339 ps |
| T178 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_intg_err.40731725216397540708136331474712153000829677266943249815020029463131138626306 |
|
|
Nov 22 01:54:47 PM PST 23 |
Nov 22 01:54:49 PM PST 23 |
163313937 ps |
| T179 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_same_csr_outstanding.113661322765775341675056646452898103562040629050166301453843348576760878391144 |
|
|
Nov 22 01:55:34 PM PST 23 |
Nov 22 01:55:36 PM PST 23 |
23886481 ps |
| T180 |
/workspace/coverage/cover_reg_top/5.sram_ctrl_same_csr_outstanding.95537291622258273661265236646308842766500278177520440952985819582440148088893 |
|
|
Nov 22 01:54:58 PM PST 23 |
Nov 22 01:55:02 PM PST 23 |
23886481 ps |
| T181 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_passthru_mem_tl_intg_err.6147690435437613040930997881488506146754508728024833274372063123670348107368 |
|
|
Nov 22 01:54:58 PM PST 23 |
Nov 22 01:55:57 PM PST 23 |
6599780302 ps |
| T182 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_errors.38365065300502150476387525339988660965742068399935273786135530148099501637769 |
|
|
Nov 22 01:55:01 PM PST 23 |
Nov 22 01:55:07 PM PST 23 |
117100021 ps |
| T183 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_tl_intg_err.85371674674149293606425275792358827613741264280915777957752733551617481132194 |
|
|
Nov 22 01:54:59 PM PST 23 |
Nov 22 01:55:03 PM PST 23 |
163313937 ps |
| T184 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_tl_intg_err.107561028670912098466949084365539322444596124217628596728834945832299718783748 |
|
|
Nov 22 01:55:01 PM PST 23 |
Nov 22 01:55:07 PM PST 23 |
163313937 ps |
| T185 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_intg_err.92671118812612931593232787075399846656642063783120464243574390679823797845647 |
|
|
Nov 22 01:55:03 PM PST 23 |
Nov 22 01:55:08 PM PST 23 |
163313937 ps |
| T186 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_csr_mem_rw_with_rand_reset.114283093249972753519544059163280145238877828691890222249201778493596217284581 |
|
|
Nov 22 01:55:03 PM PST 23 |
Nov 22 01:55:12 PM PST 23 |
609578224 ps |
| T187 |
/workspace/coverage/cover_reg_top/0.sram_ctrl_tl_errors.21303005843898178506414549872606275834121661495410015147939063825696292395803 |
|
|
Nov 22 01:54:49 PM PST 23 |
Nov 22 01:54:53 PM PST 23 |
117100021 ps |
| T188 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_passthru_mem_tl_intg_err.100378487120127451095545822979861728130367066941935269374968904261612857818345 |
|
|
Nov 22 01:55:01 PM PST 23 |
Nov 22 01:56:01 PM PST 23 |
6599780302 ps |
| T189 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_same_csr_outstanding.102090798558225618714210810727550317983958953969827899520034138960125332011419 |
|
|
Nov 22 01:55:05 PM PST 23 |
Nov 22 01:55:09 PM PST 23 |
23886481 ps |
| T190 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_passthru_mem_tl_intg_err.24316379693410198168974636929809471582256986702887037812267831414456456057521 |
|
|
Nov 22 01:55:13 PM PST 23 |
Nov 22 01:56:13 PM PST 23 |
6599780302 ps |
| T191 |
/workspace/coverage/cover_reg_top/16.sram_ctrl_tl_errors.49419978625018015794611224626327874289390174943024976804298062610448369315291 |
|
|
Nov 22 01:55:33 PM PST 23 |
Nov 22 01:55:36 PM PST 23 |
117100021 ps |
| T192 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_hw_reset.81368886264710465322790727508751245229257594866695137754487804066591484420838 |
|
|
Nov 22 01:54:57 PM PST 23 |
Nov 22 01:55:00 PM PST 23 |
23779339 ps |
| T193 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_same_csr_outstanding.54686919289222119138480301159059662212359808631906554940257505090982479677821 |
|
|
Nov 22 01:55:16 PM PST 23 |
Nov 22 01:55:18 PM PST 23 |
23886481 ps |
| T194 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_aliasing.114760855771495887991376764846292605452052750410043571839176427366505061161949 |
|
|
Nov 22 01:54:59 PM PST 23 |
Nov 22 01:55:02 PM PST 23 |
22582920 ps |
| T195 |
/workspace/coverage/cover_reg_top/18.sram_ctrl_csr_rw.5727840388464264007023930061384418554495343448625228506613591880054243251736 |
|
|
Nov 22 01:55:34 PM PST 23 |
Nov 22 01:55:37 PM PST 23 |
19547230 ps |
| T196 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_csr_rw.44220108766693112709492361897463513828073568436381713752027570358251885829304 |
|
|
Nov 22 01:55:20 PM PST 23 |
Nov 22 01:55:21 PM PST 23 |
19547230 ps |
| T197 |
/workspace/coverage/cover_reg_top/6.sram_ctrl_tl_intg_err.93054744943016274227569424506859463866541600163312695192472309128606683173865 |
|
|
Nov 22 01:55:01 PM PST 23 |
Nov 22 01:55:06 PM PST 23 |
163313937 ps |
| T198 |
/workspace/coverage/cover_reg_top/3.sram_ctrl_csr_mem_rw_with_rand_reset.10265965801160319342922288048165964291537045583674172312225960399636336660992 |
|
|
Nov 22 01:55:00 PM PST 23 |
Nov 22 01:55:09 PM PST 23 |
609578224 ps |
| T199 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_tl_errors.104253788264897596578876015016003926725164304813835885977560003265426639186042 |
|
|
Nov 22 01:55:01 PM PST 23 |
Nov 22 01:55:07 PM PST 23 |
117100021 ps |
| T200 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_mem_rw_with_rand_reset.49472841528790214190133861162965304815358432458210030085774297281173150063161 |
|
|
Nov 22 01:55:02 PM PST 23 |
Nov 22 01:55:11 PM PST 23 |
609578224 ps |
| T201 |
/workspace/coverage/cover_reg_top/17.sram_ctrl_csr_mem_rw_with_rand_reset.103893343158297421828240478497285892365340947681963054671970279335716151949800 |
|
|
Nov 22 01:55:14 PM PST 23 |
Nov 22 01:55:20 PM PST 23 |
609578224 ps |
| T202 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_csr_mem_rw_with_rand_reset.2753388801222790784762166359440804078639770071694006766118366200426597588409 |
|
|
Nov 22 01:55:13 PM PST 23 |
Nov 22 01:55:20 PM PST 23 |
609578224 ps |
| T203 |
/workspace/coverage/cover_reg_top/12.sram_ctrl_tl_errors.65285733560913185608747064657468406533206180832871939261534633031473635919958 |
|
|
Nov 22 01:54:56 PM PST 23 |
Nov 22 01:55:01 PM PST 23 |
117100021 ps |
| T204 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_intg_err.55221053937313941714682830054523459849425731071978088749963934026457451836324 |
|
|
Nov 22 01:54:47 PM PST 23 |
Nov 22 01:54:49 PM PST 23 |
163313937 ps |
| T205 |
/workspace/coverage/cover_reg_top/4.sram_ctrl_csr_rw.72131591288988861383020352033415336699431853766037642850533996771049478034949 |
|
|
Nov 22 01:55:01 PM PST 23 |
Nov 22 01:55:05 PM PST 23 |
19547230 ps |
| T206 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_errors.74935775348446543620301075272505320928479133810301673103428548837526370744580 |
|
|
Nov 22 01:55:15 PM PST 23 |
Nov 22 01:55:18 PM PST 23 |
117100021 ps |
| T207 |
/workspace/coverage/cover_reg_top/9.sram_ctrl_csr_rw.98422744247689494619722581158429349373909871206550051599214947549081620751950 |
|
|
Nov 22 01:55:02 PM PST 23 |
Nov 22 01:55:06 PM PST 23 |
19547230 ps |
| T208 |
/workspace/coverage/cover_reg_top/8.sram_ctrl_csr_mem_rw_with_rand_reset.48441691054872613505342829509943036320569742589463830561039792090198530359861 |
|
|
Nov 22 01:55:00 PM PST 23 |
Nov 22 01:55:09 PM PST 23 |
609578224 ps |
| T209 |
/workspace/coverage/cover_reg_top/11.sram_ctrl_tl_errors.35070764332577133522023776168424856803168778388003523459817123391255297576574 |
|
|
Nov 22 01:55:14 PM PST 23 |
Nov 22 01:55:17 PM PST 23 |
117100021 ps |
| T210 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_csr_aliasing.6461806534861362036476013141340844237734983074995272098094728913622277812237 |
|
|
Nov 22 01:54:52 PM PST 23 |
Nov 22 01:54:54 PM PST 23 |
22582920 ps |
| T211 |
/workspace/coverage/cover_reg_top/14.sram_ctrl_tl_intg_err.42050395587334384894656781291956537119223233963363281496803716727506309072098 |
|
|
Nov 22 01:55:16 PM PST 23 |
Nov 22 01:55:19 PM PST 23 |
163313937 ps |
| T212 |
/workspace/coverage/cover_reg_top/2.sram_ctrl_same_csr_outstanding.21669999302620157421332876632725765636041480744236003361825489026203340085192 |
|
|
Nov 22 01:54:56 PM PST 23 |
Nov 22 01:54:59 PM PST 23 |
23886481 ps |
| T213 |
/workspace/coverage/cover_reg_top/10.sram_ctrl_passthru_mem_tl_intg_err.33693274085043288077818723938727364666718150358285048397796726177616089780344 |
|
|
Nov 22 01:55:02 PM PST 23 |
Nov 22 01:56:03 PM PST 23 |
6599780302 ps |
| T214 |
/workspace/coverage/cover_reg_top/7.sram_ctrl_csr_mem_rw_with_rand_reset.17055585524241717329211729386568134570967571914794990420049006738434426384269 |
|
|
Nov 22 01:55:01 PM PST 23 |
Nov 22 01:55:10 PM PST 23 |
609578224 ps |
| T215 |
/workspace/coverage/cover_reg_top/1.sram_ctrl_tl_errors.10885563205416197970303094457582796116174452380453849967305400827122979936436 |
|
|
Nov 22 01:54:57 PM PST 23 |
Nov 22 01:55:01 PM PST 23 |
117100021 ps |
| T100 |
/workspace/coverage/default/11.sram_ctrl_stress_pipeline.94566916753977620486751088543293061761623474882021004564755636678424417796482 |
|
|
Nov 22 02:07:38 PM PST 23 |
Nov 22 02:14:25 PM PST 23 |
9325508496 ps |
| T19 |
/workspace/coverage/default/0.sram_ctrl_access_during_key_req.28057463972678240848635104862312828242549956787914562036637392835413030617586 |
|
|
Nov 22 02:07:04 PM PST 23 |
Nov 22 02:24:24 PM PST 23 |
13467153934 ps |
| T216 |
/workspace/coverage/default/8.sram_ctrl_throughput_w_partial_write.82679850675700304010031660038021365963759141586672492314969135232950789164965 |
|
|
Nov 22 02:07:38 PM PST 23 |
Nov 22 02:09:33 PM PST 23 |
1371125703 ps |
| T20 |
/workspace/coverage/default/5.sram_ctrl_access_during_key_req.34120419841211027920056112560723199252494243983140705124147854622779166319401 |
|
|
Nov 22 02:07:35 PM PST 23 |
Nov 22 02:23:03 PM PST 23 |
13467153934 ps |
| T217 |
/workspace/coverage/default/15.sram_ctrl_throughput_w_partial_write.106811414164843765756792522226006415292669157043624455373820930992033432957173 |
|
|
Nov 22 02:11:34 PM PST 23 |
Nov 22 02:13:31 PM PST 23 |
1371125703 ps |
| T82 |
/workspace/coverage/default/12.sram_ctrl_mem_partial_access.12226508748301500209453661144212639577679328058200360924964044299823446630897 |
|
|
Nov 22 02:11:19 PM PST 23 |
Nov 22 02:12:42 PM PST 23 |
4750777237 ps |
| T101 |
/workspace/coverage/default/46.sram_ctrl_stress_pipeline.79434631846857001781614325995551939336171966829792152671381812560744338863500 |
|
|
Nov 22 02:16:59 PM PST 23 |
Nov 22 02:24:03 PM PST 23 |
9325508496 ps |
| T218 |
/workspace/coverage/default/1.sram_ctrl_executable.34742728431912817542883885338988671308477904232337415100174357295879045868621 |
|
|
Nov 22 02:07:20 PM PST 23 |
Nov 22 02:25:23 PM PST 23 |
31712811539 ps |
| T219 |
/workspace/coverage/default/37.sram_ctrl_smoke.65367019345679478419857375450005750387657099640465995761082446777600735533712 |
|
|
Nov 22 02:15:39 PM PST 23 |
Nov 22 02:15:59 PM PST 23 |
988289480 ps |
| T22 |
/workspace/coverage/default/29.sram_ctrl_alert_test.109112963080123280944291559790648167104430610632301215069223180750063281205477 |
|
|
Nov 22 02:14:50 PM PST 23 |
Nov 22 02:14:52 PM PST 23 |
16600825 ps |
| T220 |
/workspace/coverage/default/3.sram_ctrl_executable.70373955163153609951554746866942802028140229150027259656050380304140275761115 |
|
|
Nov 22 02:07:09 PM PST 23 |
Nov 22 02:23:12 PM PST 23 |
31712811539 ps |
| T23 |
/workspace/coverage/default/26.sram_ctrl_alert_test.56441651653424492419244037852764964143242147274954343708119820238220878987194 |
|
|
Nov 22 02:14:00 PM PST 23 |
Nov 22 02:14:01 PM PST 23 |
16600825 ps |
| T4 |
/workspace/coverage/default/33.sram_ctrl_lc_escalation.23739879044926001430174205600269163319013271083128539708440605175448253290194 |
|
|
Nov 22 02:15:54 PM PST 23 |
Nov 22 02:17:39 PM PST 23 |
19084394710 ps |
| T221 |
/workspace/coverage/default/49.sram_ctrl_executable.10843331122080262486161841996059669080454382406793046456754119853817717910139 |
|
|
Nov 22 02:17:32 PM PST 23 |
Nov 22 02:30:30 PM PST 23 |
31712811539 ps |
| T222 |
/workspace/coverage/default/38.sram_ctrl_regwen.108018975213382549280179418836203037511847801945515954825803910566195485126689 |
|
|
Nov 22 02:16:36 PM PST 23 |
Nov 22 02:26:20 PM PST 23 |
19913691647 ps |
| T223 |
/workspace/coverage/default/33.sram_ctrl_ram_cfg.106995347456735828003561835885403435556821774837025670550563926985077360031980 |
|
|
Nov 22 02:15:54 PM PST 23 |
Nov 22 02:16:01 PM PST 23 |
607542526 ps |
| T5 |
/workspace/coverage/default/34.sram_ctrl_lc_escalation.68578686470665214061876408546985708922726249661382868539244925849345640071059 |
|
|
Nov 22 02:15:34 PM PST 23 |
Nov 22 02:17:18 PM PST 23 |
19084394710 ps |
| T224 |
/workspace/coverage/default/7.sram_ctrl_executable.34703884317013749011097324182525146990707591105695545003967351423053957475247 |
|
|
Nov 22 02:07:35 PM PST 23 |
Nov 22 02:27:45 PM PST 23 |
31712811539 ps |
| T225 |
/workspace/coverage/default/45.sram_ctrl_regwen.86631821222482795546772661218730889584473999562640194345378268031657798870704 |
|
|
Nov 22 02:16:43 PM PST 23 |
Nov 22 02:26:31 PM PST 23 |
19913691647 ps |
| T226 |
/workspace/coverage/default/28.sram_ctrl_partial_access.31208411551668938474994102731603016385629722745421333908127112692566992356798 |
|
|
Nov 22 02:14:10 PM PST 23 |
Nov 22 02:14:29 PM PST 23 |
1006378621 ps |
| T227 |
/workspace/coverage/default/1.sram_ctrl_mem_partial_access.17651771502651172777502700922211279672003241460407553354565263008748135679360 |
|
|
Nov 22 02:07:22 PM PST 23 |
Nov 22 02:08:45 PM PST 23 |
4750777237 ps |
| T228 |
/workspace/coverage/default/24.sram_ctrl_multiple_keys.105383713462397021567072893922416741329690904156088892323633774376861263016050 |
|
|
Nov 22 02:13:45 PM PST 23 |
Nov 22 02:27:34 PM PST 23 |
28731174678 ps |
| T102 |
/workspace/coverage/default/5.sram_ctrl_stress_pipeline.85828727901509455345763046026384688337261776839413274636025061863637599900457 |
|
|
Nov 22 02:07:37 PM PST 23 |
Nov 22 02:14:45 PM PST 23 |
9325508496 ps |
| T6 |
/workspace/coverage/default/16.sram_ctrl_lc_escalation.56582608650029326352104044042833961323250158000098357863351900788378825124247 |
|
|
Nov 22 02:12:00 PM PST 23 |
Nov 22 02:13:45 PM PST 23 |
19084394710 ps |
| T229 |
/workspace/coverage/default/8.sram_ctrl_access_during_key_req.64557439827211654479280264208085562666855043217713299780882554004478271845065 |
|
|
Nov 22 02:07:38 PM PST 23 |
Nov 22 02:20:42 PM PST 23 |
13467153934 ps |
| T230 |
/workspace/coverage/default/40.sram_ctrl_ram_cfg.76689190498658819692025059610073734264295842670954446719792118342926033341610 |
|
|
Nov 22 02:16:30 PM PST 23 |
Nov 22 02:16:37 PM PST 23 |
607542526 ps |
| T231 |
/workspace/coverage/default/32.sram_ctrl_access_during_key_req.15398330020297284846043576464081542185780409893847828598050766517973473311906 |
|
|
Nov 22 02:14:52 PM PST 23 |
Nov 22 02:29:19 PM PST 23 |
13467153934 ps |
| T232 |
/workspace/coverage/default/45.sram_ctrl_partial_access.46306390380069756061212966388990231237489052511815211915348629679738345665747 |
|
|
Nov 22 02:16:43 PM PST 23 |
Nov 22 02:17:02 PM PST 23 |
1006378621 ps |
| T233 |
/workspace/coverage/default/27.sram_ctrl_ram_cfg.29892131953870217019591829075175051950974601523394236013484661345104477007967 |
|
|
Nov 22 02:14:06 PM PST 23 |
Nov 22 02:14:12 PM PST 23 |
607542526 ps |
| T234 |
/workspace/coverage/default/41.sram_ctrl_multiple_keys.32122242900849580456427354527195404919152151570957329457098675972801631791866 |
|
|
Nov 22 02:16:29 PM PST 23 |
Nov 22 02:28:32 PM PST 23 |
28731174678 ps |
| T235 |
/workspace/coverage/default/8.sram_ctrl_stress_pipeline.78390510014279599467128156663048627367535654878486394548239254163431849791171 |
|
|
Nov 22 02:07:38 PM PST 23 |
Nov 22 02:14:35 PM PST 23 |
9325508496 ps |
| T236 |
/workspace/coverage/default/42.sram_ctrl_stress_pipeline.13921134411191487329787517974406047123365909027816343310569751039706637663326 |
|
|
Nov 22 02:16:28 PM PST 23 |
Nov 22 02:23:35 PM PST 23 |
9325508496 ps |
| T237 |
/workspace/coverage/default/19.sram_ctrl_lc_escalation.3491796460357932741891796931911150614155746142390840978327808332218514913813 |
|
|
Nov 22 02:12:33 PM PST 23 |
Nov 22 02:14:14 PM PST 23 |
19084394710 ps |
| T238 |
/workspace/coverage/default/1.sram_ctrl_access_during_key_req.86848055439220614350805965016649565636996623524747237169182259414244574683084 |
|
|
Nov 22 02:07:05 PM PST 23 |
Nov 22 02:23:03 PM PST 23 |
13467153934 ps |
| T239 |
/workspace/coverage/default/11.sram_ctrl_partial_access_b2b.75699531533517815694557142712618720028796750296971168060537553846463846190945 |
|
|
Nov 22 02:07:41 PM PST 23 |
Nov 22 02:17:03 PM PST 23 |
45083829570 ps |
| T240 |
/workspace/coverage/default/18.sram_ctrl_alert_test.93242344686330138514057025902253108960106973975725723369482434888761183001868 |
|
|
Nov 22 02:12:35 PM PST 23 |
Nov 22 02:12:36 PM PST 23 |
16600825 ps |
| T241 |
/workspace/coverage/default/7.sram_ctrl_multiple_keys.37753964046954261283273524911555402460253328344492159262321250681329923198753 |
|
|
Nov 22 02:07:35 PM PST 23 |
Nov 22 02:25:45 PM PST 23 |
28731174678 ps |
| T242 |
/workspace/coverage/default/34.sram_ctrl_executable.9498873710822285234970570937535496705038631272043449628796574898660542182948 |
|
|
Nov 22 02:15:30 PM PST 23 |
Nov 22 02:29:20 PM PST 23 |
31712811539 ps |
| T243 |
/workspace/coverage/default/40.sram_ctrl_executable.20834879841020864713704555881652947334000795972107671918433113178548282858823 |
|
|
Nov 22 02:16:28 PM PST 23 |
Nov 22 02:28:05 PM PST 23 |
31712811539 ps |
| T244 |
/workspace/coverage/default/31.sram_ctrl_smoke.65577434491513818864292069161705200322458717695473585145056413597983597208849 |
|
|
Nov 22 02:14:56 PM PST 23 |
Nov 22 02:15:17 PM PST 23 |
988289480 ps |
| T245 |
/workspace/coverage/default/23.sram_ctrl_bijection.12413211755757316004029160477983487431493895491157424830080914763121753971105 |
|
|
Nov 22 02:13:20 PM PST 23 |
Nov 22 02:58:40 PM PST 23 |
295482808505 ps |
| T246 |
/workspace/coverage/default/29.sram_ctrl_partial_access.69693962084969749972568058539812502999145100469585158180218044708133708948858 |
|
|
Nov 22 02:14:34 PM PST 23 |
Nov 22 02:14:52 PM PST 23 |
1006378621 ps |
| T247 |
/workspace/coverage/default/14.sram_ctrl_bijection.27190003799475646944026550181515978595733625867127159765446004143860381435956 |
|
|
Nov 22 02:11:27 PM PST 23 |
Nov 22 02:56:17 PM PST 23 |
295482808505 ps |
| T248 |
/workspace/coverage/default/29.sram_ctrl_smoke.38135125610840429612384831353003471029110882434624191835151514180673908228874 |
|
|
Nov 22 02:14:14 PM PST 23 |
Nov 22 02:14:32 PM PST 23 |
988289480 ps |
| T249 |
/workspace/coverage/default/22.sram_ctrl_alert_test.48568844147245060302533813889880592125809687553411803930634236574000490022464 |
|
|
Nov 22 02:13:15 PM PST 23 |
Nov 22 02:13:16 PM PST 23 |
16600825 ps |
| T250 |
/workspace/coverage/default/2.sram_ctrl_executable.7745016435907713719135435141402815047450556275897511134573539486613281079916 |
|
|
Nov 22 02:07:19 PM PST 23 |
Nov 22 02:20:07 PM PST 23 |
31712811539 ps |
| T251 |
/workspace/coverage/default/3.sram_ctrl_bijection.98712045378617750676628268743574731251461721786196001417806087432204105089889 |
|
|
Nov 22 02:07:04 PM PST 23 |
Nov 22 02:52:59 PM PST 23 |
295482808505 ps |
| T252 |
/workspace/coverage/default/2.sram_ctrl_ram_cfg.57493233779843990970741700383966532235785139962202853654898243934796512288501 |
|
|
Nov 22 02:07:06 PM PST 23 |
Nov 22 02:07:17 PM PST 23 |
607542526 ps |
| T253 |
/workspace/coverage/default/12.sram_ctrl_throughput_w_partial_write.84312528736275254052644743390534747583914399559551967657171303983581492166889 |
|
|
Nov 22 02:11:16 PM PST 23 |
Nov 22 02:13:36 PM PST 23 |
1371125703 ps |
| T254 |
/workspace/coverage/default/31.sram_ctrl_lc_escalation.106536107355116942162790551467456510328417225619052037218972300398383135953190 |
|
|
Nov 22 02:14:59 PM PST 23 |
Nov 22 02:16:49 PM PST 23 |
19084394710 ps |
| T255 |
/workspace/coverage/default/12.sram_ctrl_alert_test.97721573573045472314525426454159139203474304338488778184535240872076070300809 |
|
|
Nov 22 02:11:20 PM PST 23 |
Nov 22 02:11:21 PM PST 23 |
16600825 ps |
| T256 |
/workspace/coverage/default/24.sram_ctrl_alert_test.47009931853501751822633900891696687225640163613539209896437379113610433244517 |
|
|
Nov 22 02:13:53 PM PST 23 |
Nov 22 02:13:55 PM PST 23 |
16600825 ps |
| T257 |
/workspace/coverage/default/34.sram_ctrl_mem_partial_access.52201174756099600630854594348662727755022995266869341676969500946576714770057 |
|
|
Nov 22 02:15:34 PM PST 23 |
Nov 22 02:16:53 PM PST 23 |
4750777237 ps |
| T258 |
/workspace/coverage/default/21.sram_ctrl_smoke.33300377311285779323759311637419609822511684732842485311079495780310124427366 |
|
|
Nov 22 02:12:53 PM PST 23 |
Nov 22 02:13:13 PM PST 23 |
988289480 ps |
| T259 |
/workspace/coverage/default/25.sram_ctrl_alert_test.41593127561462716651218751305360598510639211929372587150205020070000829677148 |
|
|
Nov 22 02:13:55 PM PST 23 |
Nov 22 02:13:56 PM PST 23 |
16600825 ps |
| T260 |
/workspace/coverage/default/4.sram_ctrl_stress_pipeline.45783218660530032571917965237479938475955886911087427097371182437614847547922 |
|
|
Nov 22 02:07:19 PM PST 23 |
Nov 22 02:14:34 PM PST 23 |
9325508496 ps |
| T261 |
/workspace/coverage/default/12.sram_ctrl_partial_access_b2b.69554273526720662201186459108129187826069792599572390099958323126213747235898 |
|
|
Nov 22 02:11:16 PM PST 23 |
Nov 22 02:20:39 PM PST 23 |
45083829570 ps |
| T262 |
/workspace/coverage/default/39.sram_ctrl_throughput_w_partial_write.55672454685500271081098256860801444396039491953514338040830518729305503476966 |
|
|
Nov 22 02:16:36 PM PST 23 |
Nov 22 02:18:26 PM PST 23 |
1371125703 ps |
| T263 |
/workspace/coverage/default/38.sram_ctrl_max_throughput.70121227276988698262618321374438300728651712041346335420145451585145600332286 |
|
|
Nov 22 02:16:29 PM PST 23 |
Nov 22 02:18:40 PM PST 23 |
1342947357 ps |
| T264 |
/workspace/coverage/default/10.sram_ctrl_executable.34832647289644940590347170646353240339852442365227873862916705844602441463462 |
|
|
Nov 22 02:07:41 PM PST 23 |
Nov 22 02:25:41 PM PST 23 |
31712811539 ps |