Assertions
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Assertions by Category
ASSERTPROPERTIESSEQUENCES
Total1028010
Category 01028010


Assertions by Severity
ASSERTPROPERTIESSEQUENCES
Total1028010
Severity 01028010


Summary for Assertions
NUMBERPERCENT
Total Number1028100.00
Uncovered121.17
Success101698.83
Failure00.00
Incomplete10.10
Without Attempts00.00


Summary for Cover Sequences
NUMBERPERCENT
Total Number10100.00
Uncovered00.00
All Matches10100.00
First Matches10100.00
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COVER SEQUENCESCATEGORYSEVERITYATTEMPTSALL MATCHESFIRST MATCHESINCOMPLETE
tb.dut.tlul_assert_device.gen_device_cov.a_sizeChangedNotAccepted_C 001278357903840884080
tb.dut.tlul_assert_device.gen_device_cov.a_sourceChangedNotAccepted_C 001278357903760076000
tb.dut.tlul_assert_device.gen_device_cov.b2bReqWithSameAddr_C 001278357903396139610
tb.dut.tlul_assert_device.gen_device_cov.b2bReq_C 001278357903716671660
tb.dut.tlul_assert_device.gen_device_cov.b2bSameSource_C 0012783579039086290862848

Cover Sequences First Matches:
COVER SEQUENCESCATEGORYSEVERITYATTEMPTSALL MATCHESFIRST MATCHESINCOMPLETESRC
tb.dut.tlul_assert_device.gen_device_cov.aValidNotAccepted_C 001278357903126190912619090
tb.dut.tlul_assert_device.gen_device_cov.a_addressChangedNotAccepted_C 001278357903575057500
tb.dut.tlul_assert_device.gen_device_cov.a_dataChangedNotAccepted_C 00127835790314524145240
tb.dut.tlul_assert_device.gen_device_cov.a_maskChangedNotAccepted_C 00127835790310751107510
tb.dut.tlul_assert_device.gen_device_cov.a_opcodeChangedNotAccepted_C 00127835790313919139190
tb.dut.tlul_assert_device.gen_device_cov.a_sizeChangedNotAccepted_C 001278357903840884080
tb.dut.tlul_assert_device.gen_device_cov.a_sourceChangedNotAccepted_C 001278357903760076000
tb.dut.tlul_assert_device.gen_device_cov.b2bReqWithSameAddr_C 001278357903396139610
tb.dut.tlul_assert_device.gen_device_cov.b2bReq_C 001278357903716671660
tb.dut.tlul_assert_device.gen_device_cov.b2bSameSource_C 0012783579039086290862848