| | | | | | | |
tb |
95.51 |
98.28 |
93.04 |
100.00 |
87.88 |
95.57 |
98.27 |
dut |
95.51 |
98.28 |
93.04 |
100.00 |
87.88 |
95.57 |
98.27 |
gen_alert_tx[0].u_prim_alert_sender |
100.00 |
|
|
100.00 |
|
|
|
sysrst_ctrl_csr_assert |
100.00 |
|
|
|
|
|
100.00 |
tlul_assert_device |
100.00 |
100.00 |
|
|
|
100.00 |
100.00 |
u_prim_flop_2sync_input |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_prim_intr_hw |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_prim_sync_reqack |
100.00 |
100.00 |
|
|
|
100.00 |
100.00 |
ack_sync |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
req_sync |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_reg |
97.56 |
99.46 |
94.58 |
|
|
96.20 |
100.00 |
subtree... |
|
|
|
|
|
|
|
u_sysrst_ctrl_autoblock |
96.64 |
96.15 |
90.91 |
|
100.00 |
96.15 |
100.00 |
u_sysrst_ctrl_detect |
95.67 |
95.83 |
87.50 |
|
100.00 |
95.00 |
100.00 |
u_sysrst_ctrl_combo |
96.79 |
97.39 |
90.00 |
|
100.00 |
96.55 |
100.00 |
gen_combo_trigger[0].u_combo_act |
97.62 |
100.00 |
92.86 |
|
|
100.00 |
|
gen_combo_trigger[0].u_sysrst_ctrl_detect |
95.71 |
95.83 |
87.50 |
|
100.00 |
95.24 |
100.00 |
gen_combo_trigger[1].u_combo_act |
97.62 |
100.00 |
92.86 |
|
|
100.00 |
|
gen_combo_trigger[1].u_sysrst_ctrl_detect |
95.71 |
95.83 |
87.50 |
|
100.00 |
95.24 |
100.00 |
gen_combo_trigger[2].u_combo_act |
97.62 |
100.00 |
92.86 |
|
|
100.00 |
|
gen_combo_trigger[2].u_sysrst_ctrl_detect |
95.71 |
95.83 |
87.50 |
|
100.00 |
95.24 |
100.00 |
gen_combo_trigger[3].u_combo_act |
97.62 |
100.00 |
92.86 |
|
|
100.00 |
|
gen_combo_trigger[3].u_sysrst_ctrl_detect |
95.71 |
95.83 |
87.50 |
|
100.00 |
95.24 |
100.00 |
u_sysrst_ctrl_keyintr |
87.68 |
91.59 |
81.50 |
|
82.14 |
89.64 |
93.55 |
gen_keyfsm[0].u_sysrst_ctrl_detect_h2l |
88.00 |
91.67 |
81.25 |
|
83.33 |
90.00 |
93.75 |
gen_keyfsm[0].u_sysrst_ctrl_detect_l2h |
87.92 |
91.67 |
81.25 |
|
83.33 |
90.00 |
93.33 |
gen_keyfsm[1].u_sysrst_ctrl_detect_h2l |
88.00 |
91.67 |
81.25 |
|
83.33 |
90.00 |
93.75 |
gen_keyfsm[1].u_sysrst_ctrl_detect_l2h |
87.92 |
91.67 |
81.25 |
|
83.33 |
90.00 |
93.33 |
gen_keyfsm[2].u_sysrst_ctrl_detect_h2l |
88.00 |
91.67 |
81.25 |
|
83.33 |
90.00 |
93.75 |
gen_keyfsm[2].u_sysrst_ctrl_detect_l2h |
87.92 |
91.67 |
81.25 |
|
83.33 |
90.00 |
93.33 |
gen_keyfsm[3].u_sysrst_ctrl_detect_h2l |
83.25 |
89.58 |
81.25 |
|
66.67 |
85.00 |
93.75 |
gen_keyfsm[3].u_sysrst_ctrl_detect_l2h |
87.92 |
91.67 |
81.25 |
|
83.33 |
90.00 |
93.33 |
gen_keyfsm[4].u_sysrst_ctrl_detect_h2l |
88.00 |
91.67 |
81.25 |
|
83.33 |
90.00 |
93.75 |
gen_keyfsm[4].u_sysrst_ctrl_detect_l2h |
87.92 |
91.67 |
81.25 |
|
83.33 |
90.00 |
93.33 |
gen_keyfsm[5].u_sysrst_ctrl_detect_h2l |
88.00 |
91.67 |
81.25 |
|
83.33 |
90.00 |
93.75 |
gen_keyfsm[5].u_sysrst_ctrl_detect_l2h |
87.92 |
91.67 |
81.25 |
|
83.33 |
90.00 |
93.33 |
gen_keyfsm[6].u_sysrst_ctrl_detect_h2l |
88.00 |
91.67 |
81.25 |
|
83.33 |
90.00 |
93.75 |
gen_keyfsm[6].u_sysrst_ctrl_detect_l2h |
87.92 |
91.67 |
81.25 |
|
83.33 |
90.00 |
93.33 |
u_sysrst_ctrl_pin |
100.00 |
100.00 |
100.00 |
|
|
100.00 |
|
u_cfg_ac_present_i_pin |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_1 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sync_2 |
100.00 |
100.00 |
|
|
|
100.00 |
|
gen_generic.u_impl_generic |
100.00 |
100.00 |
|
|
|
100.00 |
|
u_sysrst_ctrl_ulp |
93.92 |
94.44 |
89.74 |
|
94.44 |
93.10 |
97.87 |
u_sysrst_ctrl_detect_ac_present |
96.46 |
95.56 |
92.31 |
|
100.00 |
94.44 |
100.00 |
u_sysrst_ctrl_detect_lid_open |
96.63 |
95.83 |
92.31 |
|
100.00 |
95.00 |
100.00 |
u_sysrst_ctrl_detect_pwrb |
88.67 |
91.67 |
84.62 |
|
83.33 |
90.00 |
93.75 |