| T474 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/16.uart_rx_parity_err.4229825994 |
|
|
Sep 18 06:22:26 PM UTC 24 |
Sep 18 06:22:56 PM UTC 24 |
18554468055 ps |
| T475 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/17.uart_loopback.2904061603 |
|
|
Sep 18 06:22:55 PM UTC 24 |
Sep 18 06:23:00 PM UTC 24 |
1898705346 ps |
| T476 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/17.uart_tx_ovrd.2213076901 |
|
|
Sep 18 06:22:55 PM UTC 24 |
Sep 18 06:23:00 PM UTC 24 |
2529754130 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/13.uart_perf.1337423445 |
|
|
Sep 18 06:20:35 PM UTC 24 |
Sep 18 06:23:07 PM UTC 24 |
12802142901 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/11.uart_fifo_overflow.1997400505 |
|
|
Sep 18 06:19:28 PM UTC 24 |
Sep 18 06:23:09 PM UTC 24 |
95795822250 ps |
| T477 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/17.uart_alert_test.1859628081 |
|
|
Sep 18 06:23:08 PM UTC 24 |
Sep 18 06:23:10 PM UTC 24 |
40594894 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/18.uart_smoke.314968853 |
|
|
Sep 18 06:23:10 PM UTC 24 |
Sep 18 06:23:13 PM UTC 24 |
107654813 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/16.uart_stress_all_with_rand_reset.3511492441 |
|
|
Sep 18 06:22:32 PM UTC 24 |
Sep 18 06:23:16 PM UTC 24 |
2535260342 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/15.uart_perf.890214055 |
|
|
Sep 18 06:21:51 PM UTC 24 |
Sep 18 06:23:17 PM UTC 24 |
5919371590 ps |
| T111 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/15.uart_stress_all_with_rand_reset.481723020 |
|
|
Sep 18 06:21:59 PM UTC 24 |
Sep 18 06:23:18 PM UTC 24 |
4100571225 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/16.uart_rx_oversample.3283353574 |
|
|
Sep 18 06:22:10 PM UTC 24 |
Sep 18 06:23:18 PM UTC 24 |
4725962112 ps |
| T137 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/16.uart_fifo_overflow.772854446 |
|
|
Sep 18 06:22:09 PM UTC 24 |
Sep 18 06:23:28 PM UTC 24 |
55437095175 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/17.uart_fifo_full.1064482680 |
|
|
Sep 18 06:22:37 PM UTC 24 |
Sep 18 06:23:28 PM UTC 24 |
24583016096 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/18.uart_rx_oversample.1084605519 |
|
|
Sep 18 06:23:19 PM UTC 24 |
Sep 18 06:23:30 PM UTC 24 |
5725826110 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/18.uart_rx_start_bit_filter.609833774 |
|
|
Sep 18 06:23:28 PM UTC 24 |
Sep 18 06:23:31 PM UTC 24 |
518118337 ps |
| T343 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_noise_filter.3443882838 |
|
|
Sep 18 06:17:59 PM UTC 24 |
Sep 18 06:23:36 PM UTC 24 |
128931065963 ps |
| T346 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/14.uart_rx_start_bit_filter.2191779305 |
|
|
Sep 18 06:21:07 PM UTC 24 |
Sep 18 06:23:36 PM UTC 24 |
39016646309 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/17.uart_intr.619476143 |
|
|
Sep 18 06:22:44 PM UTC 24 |
Sep 18 06:23:37 PM UTC 24 |
32077588735 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/15.uart_long_xfer_wo_dly.3707096671 |
|
|
Sep 18 06:21:52 PM UTC 24 |
Sep 18 06:23:37 PM UTC 24 |
83091419665 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/18.uart_tx_ovrd.2751101961 |
|
|
Sep 18 06:23:33 PM UTC 24 |
Sep 18 06:23:38 PM UTC 24 |
1079927256 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/16.uart_noise_filter.2457930754 |
|
|
Sep 18 06:22:18 PM UTC 24 |
Sep 18 06:23:45 PM UTC 24 |
45021796102 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/5.uart_long_xfer_wo_dly.900928234 |
|
|
Sep 18 06:17:00 PM UTC 24 |
Sep 18 06:23:46 PM UTC 24 |
242523502356 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/18.uart_loopback.1622573234 |
|
|
Sep 18 06:23:37 PM UTC 24 |
Sep 18 06:23:47 PM UTC 24 |
5574796876 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/18.uart_alert_test.460273631 |
|
|
Sep 18 06:23:45 PM UTC 24 |
Sep 18 06:23:47 PM UTC 24 |
39178056 ps |
| T308 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_stress_all.2640504451 |
|
|
Sep 18 06:18:16 PM UTC 24 |
Sep 18 06:23:54 PM UTC 24 |
115990592711 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/18.uart_fifo_full.1569286591 |
|
|
Sep 18 06:23:13 PM UTC 24 |
Sep 18 06:23:59 PM UTC 24 |
162130601764 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/19.uart_rx_oversample.214446745 |
|
|
Sep 18 06:24:00 PM UTC 24 |
Sep 18 06:24:04 PM UTC 24 |
2494593164 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/19.uart_smoke.4108641924 |
|
|
Sep 18 06:23:46 PM UTC 24 |
Sep 18 06:24:04 PM UTC 24 |
5994617281 ps |
| T307 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/17.uart_stress_all_with_rand_reset.3376023362 |
|
|
Sep 18 06:23:01 PM UTC 24 |
Sep 18 06:24:06 PM UTC 24 |
10742634411 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/14.uart_rx_parity_err.2849168857 |
|
|
Sep 18 06:21:08 PM UTC 24 |
Sep 18 06:24:09 PM UTC 24 |
106653534128 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/19.uart_rx_start_bit_filter.3452400440 |
|
|
Sep 18 06:24:07 PM UTC 24 |
Sep 18 06:24:13 PM UTC 24 |
4831433828 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/19.uart_tx_ovrd.1161041328 |
|
|
Sep 18 06:24:14 PM UTC 24 |
Sep 18 06:24:17 PM UTC 24 |
382730052 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/18.uart_rx_parity_err.3282378403 |
|
|
Sep 18 06:23:32 PM UTC 24 |
Sep 18 06:24:18 PM UTC 24 |
106284020890 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/19.uart_intr.1062807471 |
|
|
Sep 18 06:24:05 PM UTC 24 |
Sep 18 06:24:20 PM UTC 24 |
35494347772 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/18.uart_tx_rx.238981428 |
|
|
Sep 18 06:23:11 PM UTC 24 |
Sep 18 06:24:22 PM UTC 24 |
47530923034 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/12.uart_fifo_full.3621098963 |
|
|
Sep 18 06:19:51 PM UTC 24 |
Sep 18 06:24:22 PM UTC 24 |
76624674614 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/18.uart_intr.895123821 |
|
|
Sep 18 06:23:19 PM UTC 24 |
Sep 18 06:24:22 PM UTC 24 |
70074220992 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/18.uart_stress_all_with_rand_reset.725847566 |
|
|
Sep 18 06:23:38 PM UTC 24 |
Sep 18 06:24:23 PM UTC 24 |
1882812603 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/19.uart_alert_test.879551559 |
|
|
Sep 18 06:24:23 PM UTC 24 |
Sep 18 06:24:24 PM UTC 24 |
19210726 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/20.uart_smoke.1785823548 |
|
|
Sep 18 06:24:24 PM UTC 24 |
Sep 18 06:24:27 PM UTC 24 |
945538348 ps |
| T291 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/10.uart_stress_all.383767872 |
|
|
Sep 18 06:19:20 PM UTC 24 |
Sep 18 06:24:28 PM UTC 24 |
178026712134 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/19.uart_loopback.2571392053 |
|
|
Sep 18 06:24:18 PM UTC 24 |
Sep 18 06:24:28 PM UTC 24 |
5665581625 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/19.uart_fifo_overflow.2635396325 |
|
|
Sep 18 06:23:49 PM UTC 24 |
Sep 18 06:24:29 PM UTC 24 |
9595531119 ps |
| T356 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_long_xfer_wo_dly.4099372069 |
|
|
Sep 18 06:15:32 PM UTC 24 |
Sep 18 06:24:32 PM UTC 24 |
61004091170 ps |
| T162 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/17.uart_rx_parity_err.1037519793 |
|
|
Sep 18 06:22:51 PM UTC 24 |
Sep 18 06:24:32 PM UTC 24 |
143071085368 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/23.uart_intr.2463789188 |
|
|
Sep 18 06:25:47 PM UTC 24 |
Sep 18 06:25:58 PM UTC 24 |
7964501277 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/10.uart_long_xfer_wo_dly.4016862869 |
|
|
Sep 18 06:19:20 PM UTC 24 |
Sep 18 06:24:32 PM UTC 24 |
257290474825 ps |
| T173 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/17.uart_fifo_reset.555404522 |
|
|
Sep 18 06:22:40 PM UTC 24 |
Sep 18 06:24:34 PM UTC 24 |
121530713501 ps |
| T338 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/19.uart_tx_rx.1764896905 |
|
|
Sep 18 06:23:47 PM UTC 24 |
Sep 18 06:24:35 PM UTC 24 |
102689802760 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/19.uart_fifo_full.2879068314 |
|
|
Sep 18 06:23:47 PM UTC 24 |
Sep 18 06:24:39 PM UTC 24 |
141594432406 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/20.uart_tx_ovrd.1280482598 |
|
|
Sep 18 06:24:36 PM UTC 24 |
Sep 18 06:24:40 PM UTC 24 |
1818754842 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/19.uart_stress_all_with_rand_reset.2315927934 |
|
|
Sep 18 06:24:23 PM UTC 24 |
Sep 18 06:24:46 PM UTC 24 |
1837383833 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/18.uart_fifo_reset.1327125412 |
|
|
Sep 18 06:23:17 PM UTC 24 |
Sep 18 06:24:48 PM UTC 24 |
281766108631 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/20.uart_fifo_full.93352449 |
|
|
Sep 18 06:24:28 PM UTC 24 |
Sep 18 06:24:50 PM UTC 24 |
43838405639 ps |
| T373 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/19.uart_rx_parity_err.2794487470 |
|
|
Sep 18 06:24:10 PM UTC 24 |
Sep 18 06:24:50 PM UTC 24 |
32685419661 ps |
| T325 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/17.uart_noise_filter.2180767867 |
|
|
Sep 18 06:22:44 PM UTC 24 |
Sep 18 06:24:50 PM UTC 24 |
180122511848 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/20.uart_loopback.2740991862 |
|
|
Sep 18 06:24:40 PM UTC 24 |
Sep 18 06:24:51 PM UTC 24 |
2381377520 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/20.uart_alert_test.1196314121 |
|
|
Sep 18 06:24:51 PM UTC 24 |
Sep 18 06:24:53 PM UTC 24 |
69638246 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/21.uart_smoke.2105783416 |
|
|
Sep 18 06:24:51 PM UTC 24 |
Sep 18 06:24:55 PM UTC 24 |
502954102 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/20.uart_rx_oversample.2930076064 |
|
|
Sep 18 06:24:30 PM UTC 24 |
Sep 18 06:24:55 PM UTC 24 |
6304729193 ps |
| T386 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/18.uart_fifo_overflow.2226333148 |
|
|
Sep 18 06:23:16 PM UTC 24 |
Sep 18 06:24:55 PM UTC 24 |
53847503199 ps |
| T316 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/17.uart_fifo_overflow.2513513302 |
|
|
Sep 18 06:22:39 PM UTC 24 |
Sep 18 06:24:55 PM UTC 24 |
138908856647 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/23.uart_alert_test.397381835 |
|
|
Sep 18 06:25:59 PM UTC 24 |
Sep 18 06:26:01 PM UTC 24 |
28739942 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/20.uart_fifo_overflow.1210969592 |
|
|
Sep 18 06:24:29 PM UTC 24 |
Sep 18 06:24:57 PM UTC 24 |
102031445432 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/20.uart_rx_parity_err.2971657833 |
|
|
Sep 18 06:24:34 PM UTC 24 |
Sep 18 06:24:59 PM UTC 24 |
39955453887 ps |
| T371 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/18.uart_noise_filter.4018293497 |
|
|
Sep 18 06:23:28 PM UTC 24 |
Sep 18 06:24:59 PM UTC 24 |
88991184202 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/18.uart_perf.2952142234 |
|
|
Sep 18 06:23:37 PM UTC 24 |
Sep 18 06:24:59 PM UTC 24 |
4153670643 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/21.uart_rx_oversample.998957289 |
|
|
Sep 18 06:24:55 PM UTC 24 |
Sep 18 06:25:01 PM UTC 24 |
3939391442 ps |
| T110 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/12.uart_stress_all.536166162 |
|
|
Sep 18 06:20:22 PM UTC 24 |
Sep 18 06:25:04 PM UTC 24 |
261596851878 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/21.uart_rx_start_bit_filter.1323435465 |
|
|
Sep 18 06:25:00 PM UTC 24 |
Sep 18 06:25:07 PM UTC 24 |
1606228423 ps |
| T362 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/19.uart_stress_all.2598034369 |
|
|
Sep 18 06:24:23 PM UTC 24 |
Sep 18 06:25:08 PM UTC 24 |
158589189140 ps |
| T384 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/17.uart_tx_rx.205422667 |
|
|
Sep 18 06:22:36 PM UTC 24 |
Sep 18 06:25:11 PM UTC 24 |
72535577955 ps |
| T326 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/15.uart_fifo_overflow.1352684321 |
|
|
Sep 18 06:21:26 PM UTC 24 |
Sep 18 06:25:11 PM UTC 24 |
234314778007 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/21.uart_alert_test.553702887 |
|
|
Sep 18 06:25:12 PM UTC 24 |
Sep 18 06:25:14 PM UTC 24 |
31835564 ps |
| T225 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/14.uart_fifo_reset.1102818897 |
|
|
Sep 18 06:20:53 PM UTC 24 |
Sep 18 06:25:15 PM UTC 24 |
147216355634 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/14.uart_long_xfer_wo_dly.1536387895 |
|
|
Sep 18 06:21:18 PM UTC 24 |
Sep 18 06:25:16 PM UTC 24 |
182182338974 ps |
| T274 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/20.uart_noise_filter.3241697082 |
|
|
Sep 18 06:24:32 PM UTC 24 |
Sep 18 06:25:17 PM UTC 24 |
23166385352 ps |
| T424 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/21.uart_fifo_reset.2331668079 |
|
|
Sep 18 06:24:55 PM UTC 24 |
Sep 18 06:25:18 PM UTC 24 |
50591152811 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/22.uart_smoke.4272456678 |
|
|
Sep 18 06:25:15 PM UTC 24 |
Sep 18 06:25:19 PM UTC 24 |
261726180 ps |
| T136 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/19.uart_fifo_reset.1037275865 |
|
|
Sep 18 06:23:55 PM UTC 24 |
Sep 18 06:25:21 PM UTC 24 |
51068786678 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/20.uart_rx_start_bit_filter.1154942593 |
|
|
Sep 18 06:24:33 PM UTC 24 |
Sep 18 06:25:22 PM UTC 24 |
33191827355 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/19.uart_perf.1257791935 |
|
|
Sep 18 06:24:19 PM UTC 24 |
Sep 18 06:25:23 PM UTC 24 |
8745332611 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/21.uart_noise_filter.4068935774 |
|
|
Sep 18 06:24:58 PM UTC 24 |
Sep 18 06:25:24 PM UTC 24 |
74916557921 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/21.uart_tx_ovrd.415134385 |
|
|
Sep 18 06:25:00 PM UTC 24 |
Sep 18 06:25:26 PM UTC 24 |
12519537366 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/22.uart_rx_start_bit_filter.3274720063 |
|
|
Sep 18 06:25:24 PM UTC 24 |
Sep 18 06:25:28 PM UTC 24 |
5171218953 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/21.uart_loopback.3469571648 |
|
|
Sep 18 06:25:02 PM UTC 24 |
Sep 18 06:25:29 PM UTC 24 |
11693984389 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/21.uart_intr.2690925018 |
|
|
Sep 18 06:24:56 PM UTC 24 |
Sep 18 06:25:30 PM UTC 24 |
56737617219 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/22.uart_tx_ovrd.2072037358 |
|
|
Sep 18 06:25:27 PM UTC 24 |
Sep 18 06:25:30 PM UTC 24 |
464215153 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/18.uart_stress_all.82755303 |
|
|
Sep 18 06:23:39 PM UTC 24 |
Sep 18 06:25:30 PM UTC 24 |
173096599775 ps |
| T112 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/21.uart_stress_all_with_rand_reset.3809535577 |
|
|
Sep 18 06:25:09 PM UTC 24 |
Sep 18 06:25:34 PM UTC 24 |
4341009435 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/16.uart_long_xfer_wo_dly.3838227190 |
|
|
Sep 18 06:22:32 PM UTC 24 |
Sep 18 06:25:35 PM UTC 24 |
86283029876 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/12.uart_perf.3279756524 |
|
|
Sep 18 06:20:07 PM UTC 24 |
Sep 18 06:25:36 PM UTC 24 |
8363279621 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/22.uart_alert_test.1116465230 |
|
|
Sep 18 06:25:34 PM UTC 24 |
Sep 18 06:25:37 PM UTC 24 |
27171644 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/23.uart_smoke.2747298344 |
|
|
Sep 18 06:25:36 PM UTC 24 |
Sep 18 06:25:40 PM UTC 24 |
251607739 ps |
| T389 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/20.uart_tx_rx.1930928595 |
|
|
Sep 18 06:24:25 PM UTC 24 |
Sep 18 06:25:41 PM UTC 24 |
96319981275 ps |
| T113 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/22.uart_stress_all.282546921 |
|
|
Sep 18 06:25:31 PM UTC 24 |
Sep 18 06:25:45 PM UTC 24 |
19491945761 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/12.uart_long_xfer_wo_dly.1786540741 |
|
|
Sep 18 06:20:12 PM UTC 24 |
Sep 18 06:25:46 PM UTC 24 |
36847028869 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/22.uart_rx_oversample.433345922 |
|
|
Sep 18 06:25:20 PM UTC 24 |
Sep 18 06:25:47 PM UTC 24 |
3081158126 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/22.uart_loopback.457703507 |
|
|
Sep 18 06:25:29 PM UTC 24 |
Sep 18 06:25:48 PM UTC 24 |
8130421002 ps |
| T210 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/20.uart_fifo_reset.4082101320 |
|
|
Sep 18 06:24:29 PM UTC 24 |
Sep 18 06:25:50 PM UTC 24 |
188915790794 ps |
| T322 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/22.uart_noise_filter.2251171812 |
|
|
Sep 18 06:25:23 PM UTC 24 |
Sep 18 06:25:52 PM UTC 24 |
55026444679 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/23.uart_rx_start_bit_filter.138793423 |
|
|
Sep 18 06:25:49 PM UTC 24 |
Sep 18 06:25:54 PM UTC 24 |
3001363095 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/20.uart_stress_all_with_rand_reset.4169920326 |
|
|
Sep 18 06:24:49 PM UTC 24 |
Sep 18 06:25:54 PM UTC 24 |
21250284922 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/23.uart_fifo_overflow.3524523764 |
|
|
Sep 18 06:25:41 PM UTC 24 |
Sep 18 06:25:56 PM UTC 24 |
75574383210 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/23.uart_rx_oversample.3560060304 |
|
|
Sep 18 06:25:46 PM UTC 24 |
Sep 18 06:25:57 PM UTC 24 |
4959976668 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/23.uart_tx_ovrd.3230862887 |
|
|
Sep 18 06:25:52 PM UTC 24 |
Sep 18 06:25:57 PM UTC 24 |
1955443186 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/23.uart_fifo_full.40456919 |
|
|
Sep 18 06:25:38 PM UTC 24 |
Sep 18 06:25:57 PM UTC 24 |
8359410776 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/24.uart_smoke.3437595573 |
|
|
Sep 18 06:25:59 PM UTC 24 |
Sep 18 06:26:01 PM UTC 24 |
96499720 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/20.uart_intr.416230222 |
|
|
Sep 18 06:24:32 PM UTC 24 |
Sep 18 06:26:04 PM UTC 24 |
173583097737 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/23.uart_tx_rx.1623025204 |
|
|
Sep 18 06:25:38 PM UTC 24 |
Sep 18 06:26:05 PM UTC 24 |
58164291561 ps |
| T239 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/23.uart_fifo_reset.1726002162 |
|
|
Sep 18 06:25:42 PM UTC 24 |
Sep 18 06:26:06 PM UTC 24 |
15412595142 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/23.uart_loopback.2693302759 |
|
|
Sep 18 06:25:54 PM UTC 24 |
Sep 18 06:26:07 PM UTC 24 |
10896115706 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/22.uart_stress_all_with_rand_reset.1966277357 |
|
|
Sep 18 06:25:30 PM UTC 24 |
Sep 18 06:26:11 PM UTC 24 |
8573905254 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/10.uart_perf.3171937472 |
|
|
Sep 18 06:19:19 PM UTC 24 |
Sep 18 06:26:14 PM UTC 24 |
16341630171 ps |
| T132 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/21.uart_fifo_overflow.2652563341 |
|
|
Sep 18 06:24:55 PM UTC 24 |
Sep 18 06:26:14 PM UTC 24 |
70491514521 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_long_xfer_wo_dly.280880507 |
|
|
Sep 18 06:18:47 PM UTC 24 |
Sep 18 06:26:14 PM UTC 24 |
77113454510 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/22.uart_tx_rx.1984011596 |
|
|
Sep 18 06:25:15 PM UTC 24 |
Sep 18 06:26:16 PM UTC 24 |
28008166325 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/14.uart_perf.3165053293 |
|
|
Sep 18 06:21:16 PM UTC 24 |
Sep 18 06:26:19 PM UTC 24 |
9886222982 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/22.uart_intr.2149718722 |
|
|
Sep 18 06:25:23 PM UTC 24 |
Sep 18 06:26:19 PM UTC 24 |
25565962366 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/24.uart_rx_start_bit_filter.32856592 |
|
|
Sep 18 06:26:15 PM UTC 24 |
Sep 18 06:26:19 PM UTC 24 |
3104673339 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/24.uart_tx_ovrd.1083403229 |
|
|
Sep 18 06:26:16 PM UTC 24 |
Sep 18 06:26:20 PM UTC 24 |
1622137440 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/24.uart_fifo_reset.3036459756 |
|
|
Sep 18 06:26:06 PM UTC 24 |
Sep 18 06:26:21 PM UTC 24 |
8244177798 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/24.uart_alert_test.688160650 |
|
|
Sep 18 06:26:22 PM UTC 24 |
Sep 18 06:26:24 PM UTC 24 |
16644066 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/23.uart_rx_parity_err.1222772357 |
|
|
Sep 18 06:25:50 PM UTC 24 |
Sep 18 06:26:25 PM UTC 24 |
17015249712 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/23.uart_noise_filter.3665977484 |
|
|
Sep 18 06:25:48 PM UTC 24 |
Sep 18 06:26:26 PM UTC 24 |
21202708384 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/25.uart_smoke.2617902451 |
|
|
Sep 18 06:26:25 PM UTC 24 |
Sep 18 06:26:28 PM UTC 24 |
453829201 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/24.uart_perf.1934590097 |
|
|
Sep 18 06:26:20 PM UTC 24 |
Sep 18 06:30:15 PM UTC 24 |
8930449046 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/24.uart_rx_oversample.3133934418 |
|
|
Sep 18 06:26:06 PM UTC 24 |
Sep 18 06:26:28 PM UTC 24 |
2622021137 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/24.uart_loopback.3144955564 |
|
|
Sep 18 06:26:17 PM UTC 24 |
Sep 18 06:26:36 PM UTC 24 |
4497396129 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/22.uart_fifo_full.2399543414 |
|
|
Sep 18 06:25:17 PM UTC 24 |
Sep 18 06:26:38 PM UTC 24 |
91914887938 ps |
| T345 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/19.uart_noise_filter.2408201371 |
|
|
Sep 18 06:24:05 PM UTC 24 |
Sep 18 06:26:42 PM UTC 24 |
64434283993 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/17.uart_perf.533101297 |
|
|
Sep 18 06:22:56 PM UTC 24 |
Sep 18 06:26:47 PM UTC 24 |
15917244598 ps |
| T153 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/24.uart_fifo_full.3844303887 |
|
|
Sep 18 06:26:02 PM UTC 24 |
Sep 18 06:26:47 PM UTC 24 |
51272312770 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/25.uart_rx_oversample.4182452538 |
|
|
Sep 18 06:26:37 PM UTC 24 |
Sep 18 06:26:54 PM UTC 24 |
6013376146 ps |
| T89 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/23.uart_stress_all_with_rand_reset.3497933719 |
|
|
Sep 18 06:25:58 PM UTC 24 |
Sep 18 06:26:55 PM UTC 24 |
9347412573 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/25.uart_tx_ovrd.1040207883 |
|
|
Sep 18 06:26:55 PM UTC 24 |
Sep 18 06:26:59 PM UTC 24 |
2441706378 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/25.uart_loopback.3332179283 |
|
|
Sep 18 06:26:56 PM UTC 24 |
Sep 18 06:27:04 PM UTC 24 |
6708319290 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/25.uart_fifo_overflow.346991689 |
|
|
Sep 18 06:26:28 PM UTC 24 |
Sep 18 06:27:12 PM UTC 24 |
48979116809 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/22.uart_fifo_overflow.2320928403 |
|
|
Sep 18 06:25:17 PM UTC 24 |
Sep 18 06:27:17 PM UTC 24 |
73114910245 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/25.uart_fifo_full.276329040 |
|
|
Sep 18 06:26:27 PM UTC 24 |
Sep 18 06:27:17 PM UTC 24 |
177067322620 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/25.uart_alert_test.2531839984 |
|
|
Sep 18 06:27:17 PM UTC 24 |
Sep 18 06:27:19 PM UTC 24 |
17037780 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/11.uart_perf.3638067172 |
|
|
Sep 18 06:19:41 PM UTC 24 |
Sep 18 06:27:22 PM UTC 24 |
24504190825 ps |
| T138 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/24.uart_rx_parity_err.1906445629 |
|
|
Sep 18 06:26:15 PM UTC 24 |
Sep 18 06:27:23 PM UTC 24 |
90381923556 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/26.uart_smoke.912725052 |
|
|
Sep 18 06:27:20 PM UTC 24 |
Sep 18 06:27:31 PM UTC 24 |
5738393929 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/20.uart_stress_all.2852380439 |
|
|
Sep 18 06:24:51 PM UTC 24 |
Sep 18 06:27:35 PM UTC 24 |
85741425211 ps |
| T90 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/24.uart_stress_all_with_rand_reset.2550236547 |
|
|
Sep 18 06:26:21 PM UTC 24 |
Sep 18 06:27:36 PM UTC 24 |
13957253492 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/24.uart_tx_rx.336983128 |
|
|
Sep 18 06:26:01 PM UTC 24 |
Sep 18 06:27:37 PM UTC 24 |
37547483945 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/25.uart_rx_start_bit_filter.494778703 |
|
|
Sep 18 06:26:48 PM UTC 24 |
Sep 18 06:27:37 PM UTC 24 |
49006149931 ps |
| T411 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/26.uart_tx_rx.1006016896 |
|
|
Sep 18 06:27:22 PM UTC 24 |
Sep 18 06:27:42 PM UTC 24 |
26863240196 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/26.uart_rx_oversample.1327529807 |
|
|
Sep 18 06:27:37 PM UTC 24 |
Sep 18 06:27:48 PM UTC 24 |
5067391089 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/26.uart_rx_start_bit_filter.1541752487 |
|
|
Sep 18 06:27:43 PM UTC 24 |
Sep 18 06:27:50 PM UTC 24 |
1770329197 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/25.uart_fifo_reset.3433158449 |
|
|
Sep 18 06:26:28 PM UTC 24 |
Sep 18 06:27:52 PM UTC 24 |
37066130194 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/21.uart_tx_rx.3239692097 |
|
|
Sep 18 06:24:52 PM UTC 24 |
Sep 18 06:27:52 PM UTC 24 |
91056982886 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/26.uart_loopback.3805242147 |
|
|
Sep 18 06:27:52 PM UTC 24 |
Sep 18 06:27:57 PM UTC 24 |
2039197303 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/25.uart_stress_all_with_rand_reset.590861975 |
|
|
Sep 18 06:27:13 PM UTC 24 |
Sep 18 06:28:10 PM UTC 24 |
1494573174 ps |
| T377 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/26.uart_tx_ovrd.2639831508 |
|
|
Sep 18 06:27:51 PM UTC 24 |
Sep 18 06:28:13 PM UTC 24 |
6781894142 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/11.uart_stress_all.425216729 |
|
|
Sep 18 06:19:44 PM UTC 24 |
Sep 18 06:28:18 PM UTC 24 |
611877188314 ps |
| T235 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/26.uart_fifo_reset.4109547546 |
|
|
Sep 18 06:27:36 PM UTC 24 |
Sep 18 06:28:18 PM UTC 24 |
41231065864 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/26.uart_alert_test.2382517635 |
|
|
Sep 18 06:28:19 PM UTC 24 |
Sep 18 06:28:21 PM UTC 24 |
91342350 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/27.uart_smoke.1217890267 |
|
|
Sep 18 06:28:19 PM UTC 24 |
Sep 18 06:28:23 PM UTC 24 |
864397684 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/25.uart_tx_rx.2912925487 |
|
|
Sep 18 06:26:26 PM UTC 24 |
Sep 18 06:28:31 PM UTC 24 |
68403089617 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/26.uart_intr.1755079832 |
|
|
Sep 18 06:27:38 PM UTC 24 |
Sep 18 06:28:34 PM UTC 24 |
73974531907 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/21.uart_fifo_full.935529734 |
|
|
Sep 18 06:24:54 PM UTC 24 |
Sep 18 06:28:35 PM UTC 24 |
104891385933 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/25.uart_rx_parity_err.1028076304 |
|
|
Sep 18 06:26:49 PM UTC 24 |
Sep 18 06:28:35 PM UTC 24 |
70743519720 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/26.uart_fifo_overflow.3707403400 |
|
|
Sep 18 06:27:32 PM UTC 24 |
Sep 18 06:28:35 PM UTC 24 |
87519644718 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/22.uart_long_xfer_wo_dly.699285676 |
|
|
Sep 18 06:25:30 PM UTC 24 |
Sep 18 06:28:40 PM UTC 24 |
138776293217 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/21.uart_perf.3136767422 |
|
|
Sep 18 06:25:04 PM UTC 24 |
Sep 18 06:28:42 PM UTC 24 |
10656724886 ps |
| T323 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/25.uart_noise_filter.1667799813 |
|
|
Sep 18 06:26:44 PM UTC 24 |
Sep 18 06:28:43 PM UTC 24 |
51105784345 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/27.uart_rx_start_bit_filter.1286946449 |
|
|
Sep 18 06:28:40 PM UTC 24 |
Sep 18 06:28:44 PM UTC 24 |
5633227057 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/27.uart_tx_ovrd.3901802299 |
|
|
Sep 18 06:28:44 PM UTC 24 |
Sep 18 06:28:48 PM UTC 24 |
1697661395 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/27.uart_tx_rx.3388089140 |
|
|
Sep 18 06:28:22 PM UTC 24 |
Sep 18 06:28:49 PM UTC 24 |
17092326345 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/27.uart_loopback.622240576 |
|
|
Sep 18 06:28:45 PM UTC 24 |
Sep 18 06:28:52 PM UTC 24 |
1702483704 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/27.uart_rx_oversample.4260612943 |
|
|
Sep 18 06:28:35 PM UTC 24 |
Sep 18 06:29:01 PM UTC 24 |
2970092540 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/22.uart_perf.1963768361 |
|
|
Sep 18 06:25:30 PM UTC 24 |
Sep 18 06:29:04 PM UTC 24 |
26351362439 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/15.uart_stress_all.1041866629 |
|
|
Sep 18 06:21:59 PM UTC 24 |
Sep 18 06:29:05 PM UTC 24 |
357779618755 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/27.uart_alert_test.1383768457 |
|
|
Sep 18 06:29:05 PM UTC 24 |
Sep 18 06:29:07 PM UTC 24 |
12212457 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/28.uart_smoke.3554067830 |
|
|
Sep 18 06:29:05 PM UTC 24 |
Sep 18 06:29:08 PM UTC 24 |
137099537 ps |
| T287 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/27.uart_rx_parity_err.3646109796 |
|
|
Sep 18 06:28:43 PM UTC 24 |
Sep 18 06:29:18 PM UTC 24 |
78123994618 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/20.uart_perf.1277217399 |
|
|
Sep 18 06:24:41 PM UTC 24 |
Sep 18 06:29:18 PM UTC 24 |
18333396317 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/26.uart_stress_all_with_rand_reset.2735079301 |
|
|
Sep 18 06:28:11 PM UTC 24 |
Sep 18 06:29:20 PM UTC 24 |
9895934738 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/14.uart_fifo_full.3597725495 |
|
|
Sep 18 06:20:46 PM UTC 24 |
Sep 18 06:29:21 PM UTC 24 |
238709501714 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/18.uart_long_xfer_wo_dly.3976595766 |
|
|
Sep 18 06:23:38 PM UTC 24 |
Sep 18 06:29:23 PM UTC 24 |
101357768652 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/26.uart_noise_filter.4249656609 |
|
|
Sep 18 06:27:38 PM UTC 24 |
Sep 18 06:29:24 PM UTC 24 |
208919399157 ps |
| T155 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/28.uart_fifo_full.1130968598 |
|
|
Sep 18 06:29:08 PM UTC 24 |
Sep 18 06:29:28 PM UTC 24 |
12099888354 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/23.uart_perf.2040560083 |
|
|
Sep 18 06:25:54 PM UTC 24 |
Sep 18 06:29:29 PM UTC 24 |
7737520993 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/22.uart_fifo_reset.489959864 |
|
|
Sep 18 06:25:19 PM UTC 24 |
Sep 18 06:29:29 PM UTC 24 |
51346106507 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/28.uart_rx_start_bit_filter.1111222292 |
|
|
Sep 18 06:29:25 PM UTC 24 |
Sep 18 06:29:30 PM UTC 24 |
5358809167 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/28.uart_tx_ovrd.797363454 |
|
|
Sep 18 06:29:30 PM UTC 24 |
Sep 18 06:29:33 PM UTC 24 |
307933010 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/28.uart_intr.1726956911 |
|
|
Sep 18 06:29:22 PM UTC 24 |
Sep 18 06:29:46 PM UTC 24 |
43329126836 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/28.uart_loopback.61220626 |
|
|
Sep 18 06:29:30 PM UTC 24 |
Sep 18 06:29:47 PM UTC 24 |
11994624353 ps |
| T378 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/24.uart_intr.1241904737 |
|
|
Sep 18 06:26:07 PM UTC 24 |
Sep 18 06:29:48 PM UTC 24 |
123437811695 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/22.uart_rx_parity_err.2129600115 |
|
|
Sep 18 06:25:25 PM UTC 24 |
Sep 18 06:29:50 PM UTC 24 |
129880903321 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/28.uart_alert_test.3909533596 |
|
|
Sep 18 06:29:49 PM UTC 24 |
Sep 18 06:29:51 PM UTC 24 |
16066403 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/28.uart_tx_rx.1793132514 |
|
|
Sep 18 06:29:08 PM UTC 24 |
Sep 18 06:29:52 PM UTC 24 |
101262467376 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/29.uart_smoke.258253917 |
|
|
Sep 18 06:29:51 PM UTC 24 |
Sep 18 06:29:56 PM UTC 24 |
534607471 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/21.uart_rx_parity_err.2270899933 |
|
|
Sep 18 06:25:00 PM UTC 24 |
Sep 18 06:29:57 PM UTC 24 |
130522126791 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/27.uart_intr.929790499 |
|
|
Sep 18 06:28:35 PM UTC 24 |
Sep 18 06:30:09 PM UTC 24 |
32471603157 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/19.uart_long_xfer_wo_dly.3050868395 |
|
|
Sep 18 06:24:21 PM UTC 24 |
Sep 18 06:30:02 PM UTC 24 |
84278568435 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/27.uart_fifo_overflow.2858091206 |
|
|
Sep 18 06:28:32 PM UTC 24 |
Sep 18 06:30:04 PM UTC 24 |
286674159487 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/25.uart_long_xfer_wo_dly.2732515271 |
|
|
Sep 18 06:27:05 PM UTC 24 |
Sep 18 06:30:07 PM UTC 24 |
106986239815 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/28.uart_rx_oversample.352320881 |
|
|
Sep 18 06:29:21 PM UTC 24 |
Sep 18 06:30:10 PM UTC 24 |
6829812209 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/27.uart_stress_all_with_rand_reset.463219855 |
|
|
Sep 18 06:28:53 PM UTC 24 |
Sep 18 06:30:14 PM UTC 24 |
18558428490 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/28.uart_noise_filter.325157061 |
|
|
Sep 18 06:29:24 PM UTC 24 |
Sep 18 06:30:16 PM UTC 24 |
217195675859 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/29.uart_rx_oversample.3127112845 |
|
|
Sep 18 06:30:03 PM UTC 24 |
Sep 18 06:30:17 PM UTC 24 |
4017478922 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/26.uart_fifo_full.3816793804 |
|
|
Sep 18 06:27:25 PM UTC 24 |
Sep 18 06:30:20 PM UTC 24 |
304945485790 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/28.uart_rx_parity_err.3831584834 |
|
|
Sep 18 06:29:29 PM UTC 24 |
Sep 18 06:30:20 PM UTC 24 |
251582572045 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/29.uart_fifo_full.1694932201 |
|
|
Sep 18 06:29:53 PM UTC 24 |
Sep 18 06:30:26 PM UTC 24 |
59859542086 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/29.uart_alert_test.1153189377 |
|
|
Sep 18 06:30:27 PM UTC 24 |
Sep 18 06:30:29 PM UTC 24 |
13520186 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/30.uart_smoke.1377752881 |
|
|
Sep 18 06:30:30 PM UTC 24 |
Sep 18 06:30:33 PM UTC 24 |
288668803 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/27.uart_noise_filter.3094350317 |
|
|
Sep 18 06:28:36 PM UTC 24 |
Sep 18 06:30:34 PM UTC 24 |
133556677776 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_perf.1969729484 |
|
|
Sep 18 06:18:12 PM UTC 24 |
Sep 18 06:30:37 PM UTC 24 |
12041216998 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/26.uart_rx_parity_err.1139116186 |
|
|
Sep 18 06:27:49 PM UTC 24 |
Sep 18 06:30:38 PM UTC 24 |
82737272776 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/29.uart_tx_rx.4098379986 |
|
|
Sep 18 06:29:52 PM UTC 24 |
Sep 18 06:30:41 PM UTC 24 |
16322693393 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/29.uart_tx_ovrd.3938149712 |
|
|
Sep 18 06:30:15 PM UTC 24 |
Sep 18 06:30:43 PM UTC 24 |
6136489332 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/28.uart_fifo_overflow.3948704413 |
|
|
Sep 18 06:29:19 PM UTC 24 |
Sep 18 06:30:44 PM UTC 24 |
66111142409 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/29.uart_loopback.2193189450 |
|
|
Sep 18 06:30:16 PM UTC 24 |
Sep 18 06:30:53 PM UTC 24 |
9535631650 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/30.uart_fifo_reset.233371077 |
|
|
Sep 18 06:30:38 PM UTC 24 |
Sep 18 06:30:56 PM UTC 24 |
45792998189 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/29.uart_rx_parity_err.2372249098 |
|
|
Sep 18 06:30:10 PM UTC 24 |
Sep 18 06:30:57 PM UTC 24 |
28935834814 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/30.uart_rx_oversample.200344465 |
|
|
Sep 18 06:30:42 PM UTC 24 |
Sep 18 06:31:04 PM UTC 24 |
2445292024 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/3.uart_perf.2428802095 |
|
|
Sep 18 06:16:23 PM UTC 24 |
Sep 18 06:31:06 PM UTC 24 |
17594534768 ps |
| T341 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/24.uart_noise_filter.1116974895 |
|
|
Sep 18 06:26:12 PM UTC 24 |
Sep 18 06:31:08 PM UTC 24 |
108772561640 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/30.uart_tx_rx.180108203 |
|
|
Sep 18 06:30:34 PM UTC 24 |
Sep 18 06:31:08 PM UTC 24 |
12793142165 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/30.uart_loopback.2552426418 |
|
|
Sep 18 06:31:05 PM UTC 24 |
Sep 18 06:31:11 PM UTC 24 |
3500528925 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/30.uart_tx_ovrd.827923654 |
|
|
Sep 18 06:30:58 PM UTC 24 |
Sep 18 06:31:17 PM UTC 24 |
7189883905 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/26.uart_perf.168970994 |
|
|
Sep 18 06:27:53 PM UTC 24 |
Sep 18 06:31:18 PM UTC 24 |
17116276507 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/30.uart_alert_test.1758563375 |
|
|
Sep 18 06:31:18 PM UTC 24 |
Sep 18 06:31:20 PM UTC 24 |
34986071 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/31.uart_smoke.3184683857 |
|
|
Sep 18 06:31:18 PM UTC 24 |
Sep 18 06:31:21 PM UTC 24 |
606599745 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/29.uart_noise_filter.2068404111 |
|
|
Sep 18 06:30:07 PM UTC 24 |
Sep 18 06:31:22 PM UTC 24 |
129707385230 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/29.uart_stress_all_with_rand_reset.4236724080 |
|
|
Sep 18 06:30:21 PM UTC 24 |
Sep 18 06:31:22 PM UTC 24 |
7248186834 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/7.uart_long_xfer_wo_dly.2920809489 |
|
|
Sep 18 06:17:40 PM UTC 24 |
Sep 18 06:31:23 PM UTC 24 |
90024686429 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/30.uart_noise_filter.1354457330 |
|
|
Sep 18 06:30:45 PM UTC 24 |
Sep 18 06:31:24 PM UTC 24 |
11238152193 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/29.uart_rx_start_bit_filter.2852395405 |
|
|
Sep 18 06:30:10 PM UTC 24 |
Sep 18 06:31:24 PM UTC 24 |
40884489139 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/30.uart_intr.3610401830 |
|
|
Sep 18 06:30:43 PM UTC 24 |
Sep 18 06:31:33 PM UTC 24 |
48292674805 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/30.uart_rx_start_bit_filter.3319299182 |
|
|
Sep 18 06:30:53 PM UTC 24 |
Sep 18 06:31:36 PM UTC 24 |
39440050873 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/31.uart_rx_start_bit_filter.3678162508 |
|
|
Sep 18 06:31:34 PM UTC 24 |
Sep 18 06:31:38 PM UTC 24 |
4472761326 ps |
| T407 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/30.uart_fifo_overflow.1092617912 |
|
|
Sep 18 06:30:38 PM UTC 24 |
Sep 18 06:31:41 PM UTC 24 |
28630063208 ps |
| T209 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/27.uart_fifo_reset.151036674 |
|
|
Sep 18 06:28:35 PM UTC 24 |
Sep 18 06:31:43 PM UTC 24 |
192296156272 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/30.uart_rx_parity_err.3306593609 |
|
|
Sep 18 06:30:58 PM UTC 24 |
Sep 18 06:31:44 PM UTC 24 |
80920350080 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/31.uart_tx_ovrd.2747339861 |
|
|
Sep 18 06:31:39 PM UTC 24 |
Sep 18 06:31:45 PM UTC 24 |
723297651 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/14.uart_stress_all.3960439877 |
|
|
Sep 18 06:21:19 PM UTC 24 |
Sep 18 06:31:45 PM UTC 24 |
69157545149 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/39.uart_loopback.1784539520 |
|
|
Sep 18 06:36:48 PM UTC 24 |
Sep 18 06:37:05 PM UTC 24 |
3721009168 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/31.uart_loopback.3042310389 |
|
|
Sep 18 06:31:42 PM UTC 24 |
Sep 18 06:31:46 PM UTC 24 |
1250014948 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/31.uart_intr.4034831605 |
|
|
Sep 18 06:31:25 PM UTC 24 |
Sep 18 06:31:47 PM UTC 24 |
8952296446 ps |
| T288 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/21.uart_stress_all.1086952082 |
|
|
Sep 18 06:25:12 PM UTC 24 |
Sep 18 06:31:47 PM UTC 24 |
256729949079 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/13.uart_long_xfer_wo_dly.3181369213 |
|
|
Sep 18 06:20:35 PM UTC 24 |
Sep 18 06:31:48 PM UTC 24 |
107273460370 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/31.uart_alert_test.2140018605 |
|
|
Sep 18 06:31:46 PM UTC 24 |
Sep 18 06:31:48 PM UTC 24 |
14382257 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/23.uart_long_xfer_wo_dly.1828753032 |
|
|
Sep 18 06:25:58 PM UTC 24 |
Sep 18 06:31:48 PM UTC 24 |
50490075728 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/32.uart_smoke.1303318777 |
|
|
Sep 18 06:31:47 PM UTC 24 |
Sep 18 06:31:50 PM UTC 24 |
747302393 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/31.uart_noise_filter.4161304476 |
|
|
Sep 18 06:31:25 PM UTC 24 |
Sep 18 06:31:51 PM UTC 24 |
40364274941 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/31.uart_fifo_reset.1413632065 |
|
|
Sep 18 06:31:24 PM UTC 24 |
Sep 18 06:31:53 PM UTC 24 |
33740065683 ps |