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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.09 99.08 97.65 100.00 98.35 100.00 99.46


Total test records in report: 1316
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T646 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/32.uart_rx_oversample.3903682036 Sep 18 06:31:51 PM UTC 24 Sep 18 06:31:57 PM UTC 24 2428498466 ps
T647 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/31.uart_rx_oversample.4270445828 Sep 18 06:31:24 PM UTC 24 Sep 18 06:32:00 PM UTC 24 7019392245 ps
T648 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/29.uart_intr.2003187341 Sep 18 06:30:04 PM UTC 24 Sep 18 06:32:02 PM UTC 24 136871899183 ps
T649 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/32.uart_tx_ovrd.269669990 Sep 18 06:32:02 PM UTC 24 Sep 18 06:32:05 PM UTC 24 520224060 ps
T342 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/16.uart_stress_all.636957729 Sep 18 06:22:34 PM UTC 24 Sep 18 06:32:07 PM UTC 24 616007473903 ps
T650 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/31.uart_fifo_full.184854486 Sep 18 06:31:21 PM UTC 24 Sep 18 06:32:07 PM UTC 24 23087771749 ps
T651 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/32.uart_loopback.2108592357 Sep 18 06:32:05 PM UTC 24 Sep 18 06:32:07 PM UTC 24 262364808 ps
T652 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/28.uart_stress_all_with_rand_reset.2154613262 Sep 18 06:29:46 PM UTC 24 Sep 18 06:32:14 PM UTC 24 21081620649 ps
T653 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/31.uart_tx_rx.3062786315 Sep 18 06:31:20 PM UTC 24 Sep 18 06:32:14 PM UTC 24 58563172711 ps
T654 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/2.uart_stress_all.3844270342 Sep 18 06:16:05 PM UTC 24 Sep 18 06:32:15 PM UTC 24 179230619435 ps
T655 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/32.uart_fifo_reset.2417583590 Sep 18 06:31:50 PM UTC 24 Sep 18 06:32:16 PM UTC 24 15963130806 ps
T656 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/32.uart_alert_test.2689173289 Sep 18 06:32:15 PM UTC 24 Sep 18 06:32:16 PM UTC 24 11620216 ps
T176 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/13.uart_stress_all.275105262 Sep 18 06:20:41 PM UTC 24 Sep 18 06:32:18 PM UTC 24 291592422706 ps
T91 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/32.uart_stress_all_with_rand_reset.2495118125 Sep 18 06:32:09 PM UTC 24 Sep 18 06:32:23 PM UTC 24 27879013712 ps
T92 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/30.uart_stress_all_with_rand_reset.202501143 Sep 18 06:31:09 PM UTC 24 Sep 18 06:32:27 PM UTC 24 17991336785 ps
T657 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/33.uart_smoke.3539967331 Sep 18 06:32:16 PM UTC 24 Sep 18 06:32:29 PM UTC 24 5441084403 ps
T658 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/32.uart_rx_start_bit_filter.2161507960 Sep 18 06:31:58 PM UTC 24 Sep 18 06:32:30 PM UTC 24 42855465144 ps
T145 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/32.uart_rx_parity_err.675070202 Sep 18 06:32:01 PM UTC 24 Sep 18 06:32:36 PM UTC 24 42227892390 ps
T659 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/33.uart_fifo_full.3567290821 Sep 18 06:32:17 PM UTC 24 Sep 18 06:32:39 PM UTC 24 59824035310 ps
T660 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/33.uart_rx_start_bit_filter.2885674571 Sep 18 06:32:36 PM UTC 24 Sep 18 06:32:42 PM UTC 24 2049209555 ps
T661 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/33.uart_rx_oversample.850889535 Sep 18 06:32:27 PM UTC 24 Sep 18 06:32:42 PM UTC 24 2957205443 ps
T662 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/33.uart_fifo_overflow.1126065797 Sep 18 06:32:19 PM UTC 24 Sep 18 06:32:42 PM UTC 24 42106534158 ps
T663 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/24.uart_fifo_overflow.3227136671 Sep 18 06:26:05 PM UTC 24 Sep 18 06:32:43 PM UTC 24 213932016190 ps
T664 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/31.uart_perf.1277356116 Sep 18 06:31:44 PM UTC 24 Sep 18 06:32:44 PM UTC 24 21039842252 ps
T665 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/33.uart_tx_ovrd.1998292925 Sep 18 06:32:43 PM UTC 24 Sep 18 06:32:47 PM UTC 24 3158443720 ps
T201 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/33.uart_fifo_reset.2420208580 Sep 18 06:32:23 PM UTC 24 Sep 18 06:32:58 PM UTC 24 72599075036 ps
T666 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_perf.3275445555 Sep 18 06:14:46 PM UTC 24 Sep 18 06:33:01 PM UTC 24 19208428925 ps
T667 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/33.uart_alert_test.3326027976 Sep 18 06:32:59 PM UTC 24 Sep 18 06:33:01 PM UTC 24 14285407 ps
T668 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/33.uart_loopback.2636326771 Sep 18 06:32:43 PM UTC 24 Sep 18 06:33:02 PM UTC 24 6294425938 ps
T669 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/30.uart_fifo_full.2910522431 Sep 18 06:30:35 PM UTC 24 Sep 18 06:33:03 PM UTC 24 71836897665 ps
T409 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/32.uart_noise_filter.2305078195 Sep 18 06:31:53 PM UTC 24 Sep 18 06:33:05 PM UTC 24 96817926618 ps
T670 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/34.uart_smoke.1005497798 Sep 18 06:33:01 PM UTC 24 Sep 18 06:33:06 PM UTC 24 468710181 ps
T671 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_long_xfer_wo_dly.2837449426 Sep 18 06:18:13 PM UTC 24 Sep 18 06:33:07 PM UTC 24 119558797541 ps
T672 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/32.uart_fifo_overflow.4043727647 Sep 18 06:31:49 PM UTC 24 Sep 18 06:33:08 PM UTC 24 52746758379 ps
T673 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/31.uart_fifo_overflow.2404637967 Sep 18 06:31:23 PM UTC 24 Sep 18 06:33:09 PM UTC 24 20006666690 ps
T674 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/34.uart_rx_oversample.2001927164 Sep 18 06:33:07 PM UTC 24 Sep 18 06:33:12 PM UTC 24 1514037906 ps
T675 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/34.uart_rx_start_bit_filter.4130312642 Sep 18 06:33:09 PM UTC 24 Sep 18 06:33:13 PM UTC 24 6271239920 ps
T676 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/32.uart_tx_rx.2998079472 Sep 18 06:31:48 PM UTC 24 Sep 18 06:33:15 PM UTC 24 92569260938 ps
T146 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/31.uart_rx_parity_err.1395902277 Sep 18 06:31:37 PM UTC 24 Sep 18 06:33:17 PM UTC 24 360864039201 ps
T677 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/34.uart_loopback.1244694074 Sep 18 06:33:14 PM UTC 24 Sep 18 06:33:23 PM UTC 24 3312814934 ps
T678 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/25.uart_intr.3495705287 Sep 18 06:26:40 PM UTC 24 Sep 18 06:33:24 PM UTC 24 194272621659 ps
T679 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/33.uart_noise_filter.549042899 Sep 18 06:32:30 PM UTC 24 Sep 18 06:33:29 PM UTC 24 66674485942 ps
T680 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/34.uart_alert_test.942965079 Sep 18 06:33:31 PM UTC 24 Sep 18 06:33:32 PM UTC 24 42315906 ps
T179 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/33.uart_stress_all.2116309344 Sep 18 06:32:47 PM UTC 24 Sep 18 06:33:34 PM UTC 24 53759144725 ps
T681 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/35.uart_smoke.3487296568 Sep 18 06:33:31 PM UTC 24 Sep 18 06:33:37 PM UTC 24 685101565 ps
T682 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/33.uart_stress_all_with_rand_reset.1998059770 Sep 18 06:32:45 PM UTC 24 Sep 18 06:33:39 PM UTC 24 5092815917 ps
T683 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/34.uart_tx_ovrd.3060045255 Sep 18 06:33:13 PM UTC 24 Sep 18 06:33:42 PM UTC 24 6583822724 ps
T174 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/29.uart_fifo_reset.3763527434 Sep 18 06:29:58 PM UTC 24 Sep 18 06:33:46 PM UTC 24 187690651551 ps
T684 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/32.uart_intr.1938144014 Sep 18 06:31:52 PM UTC 24 Sep 18 06:33:48 PM UTC 24 87499889823 ps
T172 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/28.uart_stress_all.4045117638 Sep 18 06:29:47 PM UTC 24 Sep 18 06:33:49 PM UTC 24 1146795304711 ps
T685 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/35.uart_tx_rx.220459426 Sep 18 06:33:34 PM UTC 24 Sep 18 06:33:54 PM UTC 24 77947678978 ps
T686 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/34.uart_rx_parity_err.1821129024 Sep 18 06:33:10 PM UTC 24 Sep 18 06:33:54 PM UTC 24 70085808143 ps
T175 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/28.uart_fifo_reset.1197355786 Sep 18 06:29:19 PM UTC 24 Sep 18 06:33:58 PM UTC 24 134346742099 ps
T687 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/34.uart_intr.4204673541 Sep 18 06:33:08 PM UTC 24 Sep 18 06:34:00 PM UTC 24 28161555824 ps
T688 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/35.uart_tx_ovrd.3163040372 Sep 18 06:33:55 PM UTC 24 Sep 18 06:34:00 PM UTC 24 2135141863 ps
T689 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/32.uart_fifo_full.3157384203 Sep 18 06:31:49 PM UTC 24 Sep 18 06:34:01 PM UTC 24 154282755919 ps
T690 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/35.uart_rx_start_bit_filter.2529525858 Sep 18 06:33:50 PM UTC 24 Sep 18 06:34:01 PM UTC 24 3547279226 ps
T691 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/34.uart_noise_filter.395517208 Sep 18 06:33:08 PM UTC 24 Sep 18 06:34:06 PM UTC 24 457889378562 ps
T692 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/35.uart_alert_test.900223351 Sep 18 06:34:07 PM UTC 24 Sep 18 06:34:09 PM UTC 24 12935072 ps
T693 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/35.uart_loopback.2140220655 Sep 18 06:33:59 PM UTC 24 Sep 18 06:34:09 PM UTC 24 2398803192 ps
T410 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/33.uart_tx_rx.556084960 Sep 18 06:32:17 PM UTC 24 Sep 18 06:34:11 PM UTC 24 36570637741 ps
T694 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/29.uart_fifo_overflow.3420030422 Sep 18 06:29:57 PM UTC 24 Sep 18 06:34:12 PM UTC 24 265628293504 ps
T695 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/36.uart_smoke.177431295 Sep 18 06:34:10 PM UTC 24 Sep 18 06:34:12 PM UTC 24 144792518 ps
T696 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/35.uart_rx_oversample.945875937 Sep 18 06:33:43 PM UTC 24 Sep 18 06:34:16 PM UTC 24 5693028084 ps
T697 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/35.uart_noise_filter.665368872 Sep 18 06:33:49 PM UTC 24 Sep 18 06:34:26 PM UTC 24 56880514772 ps
T698 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/36.uart_rx_oversample.442970351 Sep 18 06:34:17 PM UTC 24 Sep 18 06:34:27 PM UTC 24 1483163428 ps
T699 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/35.uart_intr.262393569 Sep 18 06:33:47 PM UTC 24 Sep 18 06:34:39 PM UTC 24 35473977814 ps
T700 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/33.uart_intr.2849714575 Sep 18 06:32:29 PM UTC 24 Sep 18 06:34:41 PM UTC 24 50150320851 ps
T701 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/32.uart_stress_all.3402822241 Sep 18 06:32:15 PM UTC 24 Sep 18 06:34:43 PM UTC 24 335746647780 ps
T702 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/36.uart_rx_start_bit_filter.1882374789 Sep 18 06:34:40 PM UTC 24 Sep 18 06:34:44 PM UTC 24 3451948383 ps
T703 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/35.uart_fifo_reset.2717817863 Sep 18 06:33:39 PM UTC 24 Sep 18 06:34:44 PM UTC 24 109690496669 ps
T704 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/36.uart_tx_ovrd.643533818 Sep 18 06:34:43 PM UTC 24 Sep 18 06:34:47 PM UTC 24 452035833 ps
T705 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/35.uart_stress_all_with_rand_reset.762685528 Sep 18 06:34:02 PM UTC 24 Sep 18 06:34:54 PM UTC 24 9131217425 ps
T426 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/26.uart_stress_all.968821201 Sep 18 06:28:15 PM UTC 24 Sep 18 06:34:59 PM UTC 24 343295672844 ps
T185 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/36.uart_fifo_reset.153800676 Sep 18 06:34:12 PM UTC 24 Sep 18 06:35:05 PM UTC 24 13734020075 ps
T706 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/36.uart_alert_test.284594790 Sep 18 06:35:05 PM UTC 24 Sep 18 06:35:07 PM UTC 24 11325307 ps
T707 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/34.uart_tx_rx.2242646804 Sep 18 06:33:02 PM UTC 24 Sep 18 06:35:09 PM UTC 24 43348459414 ps
T416 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/36.uart_fifo_overflow.2787792086 Sep 18 06:34:12 PM UTC 24 Sep 18 06:35:10 PM UTC 24 58641028612 ps
T708 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/36.uart_loopback.3041298489 Sep 18 06:34:44 PM UTC 24 Sep 18 06:35:11 PM UTC 24 5900924451 ps
T709 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/35.uart_fifo_overflow.2731148929 Sep 18 06:33:38 PM UTC 24 Sep 18 06:35:11 PM UTC 24 105711638249 ps
T710 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/34.uart_stress_all_with_rand_reset.369491954 Sep 18 06:33:24 PM UTC 24 Sep 18 06:35:17 PM UTC 24 3245411885 ps
T711 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/36.uart_tx_rx.3422546215 Sep 18 06:34:10 PM UTC 24 Sep 18 06:35:20 PM UTC 24 116784993159 ps
T712 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/34.uart_fifo_reset.119097483 Sep 18 06:33:05 PM UTC 24 Sep 18 06:35:24 PM UTC 24 73389931717 ps
T713 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/34.uart_fifo_full.60646233 Sep 18 06:33:03 PM UTC 24 Sep 18 06:35:27 PM UTC 24 212914936933 ps
T714 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/35.uart_fifo_full.2382159087 Sep 18 06:33:35 PM UTC 24 Sep 18 06:35:28 PM UTC 24 94805115838 ps
T715 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/33.uart_perf.2846198198 Sep 18 06:32:43 PM UTC 24 Sep 18 06:35:28 PM UTC 24 17823096732 ps
T716 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/37.uart_rx_start_bit_filter.4030560753 Sep 18 06:35:28 PM UTC 24 Sep 18 06:35:32 PM UTC 24 2313497232 ps
T717 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/32.uart_long_xfer_wo_dly.934369317 Sep 18 06:32:07 PM UTC 24 Sep 18 06:35:32 PM UTC 24 55545382752 ps
T718 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/27.uart_perf.1656144468 Sep 18 06:28:49 PM UTC 24 Sep 18 06:35:35 PM UTC 24 17276201573 ps
T719 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/37.uart_tx_ovrd.1347379419 Sep 18 06:35:29 PM UTC 24 Sep 18 06:35:36 PM UTC 24 995264532 ps
T720 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/24.uart_stress_all.4293059917 Sep 18 06:26:21 PM UTC 24 Sep 18 06:35:37 PM UTC 24 399549834556 ps
T721 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/36.uart_intr.3977819967 Sep 18 06:34:27 PM UTC 24 Sep 18 06:35:39 PM UTC 24 43736935970 ps
T722 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/36.uart_fifo_full.327785829 Sep 18 06:34:11 PM UTC 24 Sep 18 06:35:40 PM UTC 24 85261689917 ps
T723 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/37.uart_alert_test.3680821542 Sep 18 06:35:40 PM UTC 24 Sep 18 06:35:42 PM UTC 24 30788980 ps
T724 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/38.uart_smoke.1141007319 Sep 18 06:35:41 PM UTC 24 Sep 18 06:35:45 PM UTC 24 688522653 ps
T159 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/35.uart_rx_parity_err.440576787 Sep 18 06:33:54 PM UTC 24 Sep 18 06:35:47 PM UTC 24 188605030754 ps
T725 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/37.uart_loopback.1293619809 Sep 18 06:35:32 PM UTC 24 Sep 18 06:35:49 PM UTC 24 6603478110 ps
T726 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/16.uart_perf.3907379793 Sep 18 06:22:32 PM UTC 24 Sep 18 06:35:50 PM UTC 24 17327358841 ps
T727 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/28.uart_long_xfer_wo_dly.1764445350 Sep 18 06:29:34 PM UTC 24 Sep 18 06:35:50 PM UTC 24 119596300960 ps
T156 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/33.uart_rx_parity_err.2764326574 Sep 18 06:32:40 PM UTC 24 Sep 18 06:35:50 PM UTC 24 91121174442 ps
T728 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/37.uart_tx_rx.2287351470 Sep 18 06:35:10 PM UTC 24 Sep 18 06:35:54 PM UTC 24 24645447033 ps
T729 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/37.uart_rx_parity_err.3364996827 Sep 18 06:35:29 PM UTC 24 Sep 18 06:35:58 PM UTC 24 53898859695 ps
T730 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/37.uart_smoke.2856012317 Sep 18 06:35:08 PM UTC 24 Sep 18 06:36:02 PM UTC 24 5545585615 ps
T731 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/38.uart_rx_oversample.235209994 Sep 18 06:35:50 PM UTC 24 Sep 18 06:36:05 PM UTC 24 2007908134 ps
T732 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/38.uart_tx_ovrd.4282067996 Sep 18 06:36:03 PM UTC 24 Sep 18 06:36:09 PM UTC 24 839380522 ps
T733 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/37.uart_rx_oversample.3683508546 Sep 18 06:35:17 PM UTC 24 Sep 18 06:36:09 PM UTC 24 5394960230 ps
T734 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/37.uart_fifo_full.4138261445 Sep 18 06:35:11 PM UTC 24 Sep 18 06:36:11 PM UTC 24 54741016492 ps
T735 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/38.uart_fifo_full.2070336097 Sep 18 06:35:45 PM UTC 24 Sep 18 06:36:11 PM UTC 24 55012006264 ps
T736 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/37.uart_stress_all_with_rand_reset.1241397294 Sep 18 06:35:37 PM UTC 24 Sep 18 06:36:17 PM UTC 24 3492140668 ps
T737 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/38.uart_alert_test.1802341413 Sep 18 06:36:18 PM UTC 24 Sep 18 06:36:20 PM UTC 24 13691483 ps
T738 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/38.uart_loopback.3380830345 Sep 18 06:36:06 PM UTC 24 Sep 18 06:36:22 PM UTC 24 7601776025 ps
T739 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/39.uart_smoke.4168930482 Sep 18 06:36:21 PM UTC 24 Sep 18 06:36:25 PM UTC 24 461332962 ps
T740 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/38.uart_fifo_overflow.2533642568 Sep 18 06:35:48 PM UTC 24 Sep 18 06:36:25 PM UTC 24 79180292012 ps
T741 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/37.uart_fifo_overflow.1018917372 Sep 18 06:35:12 PM UTC 24 Sep 18 06:36:29 PM UTC 24 168950407333 ps
T742 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/17.uart_stress_all.3279616626 Sep 18 06:23:01 PM UTC 24 Sep 18 06:36:35 PM UTC 24 439246821641 ps
T743 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/35.uart_long_xfer_wo_dly.1374006052 Sep 18 06:34:01 PM UTC 24 Sep 18 06:36:37 PM UTC 24 88385898134 ps
T182 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/37.uart_fifo_reset.3018043662 Sep 18 06:35:12 PM UTC 24 Sep 18 06:36:38 PM UTC 24 171913123595 ps
T744 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/38.uart_rx_start_bit_filter.1056371343 Sep 18 06:35:55 PM UTC 24 Sep 18 06:36:38 PM UTC 24 35386485112 ps
T745 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/36.uart_stress_all_with_rand_reset.3874881583 Sep 18 06:34:55 PM UTC 24 Sep 18 06:36:40 PM UTC 24 21647043636 ps
T746 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/39.uart_rx_start_bit_filter.2225292046 Sep 18 06:36:39 PM UTC 24 Sep 18 06:36:42 PM UTC 24 1732339741 ps
T747 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/37.uart_intr.2871419969 Sep 18 06:35:21 PM UTC 24 Sep 18 06:36:48 PM UTC 24 81703615757 ps
T748 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/39.uart_rx_oversample.337876701 Sep 18 06:36:36 PM UTC 24 Sep 18 06:36:52 PM UTC 24 3090098581 ps
T749 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/32.uart_perf.2454223170 Sep 18 06:32:07 PM UTC 24 Sep 18 06:36:52 PM UTC 24 18489030252 ps
T750 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/39.uart_tx_ovrd.3294885103 Sep 18 06:36:43 PM UTC 24 Sep 18 06:37:02 PM UTC 24 8391376489 ps
T751 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/17.uart_long_xfer_wo_dly.3335014922 Sep 18 06:22:57 PM UTC 24 Sep 18 06:37:07 PM UTC 24 123365831018 ps
T752 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/39.uart_alert_test.2780066555 Sep 18 06:37:08 PM UTC 24 Sep 18 06:37:09 PM UTC 24 11245293 ps
T753 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/25.uart_perf.3384567512 Sep 18 06:27:00 PM UTC 24 Sep 18 06:37:12 PM UTC 24 20257872451 ps
T754 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/39.uart_fifo_overflow.291910387 Sep 18 06:36:25 PM UTC 24 Sep 18 06:37:13 PM UTC 24 43166674924 ps
T143 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/39.uart_rx_parity_err.2174640160 Sep 18 06:36:41 PM UTC 24 Sep 18 06:37:15 PM UTC 24 39772821304 ps
T755 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/40.uart_smoke.2521701484 Sep 18 06:37:11 PM UTC 24 Sep 18 06:37:26 PM UTC 24 5384402254 ps
T756 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/40.uart_tx_rx.3601432251 Sep 18 06:37:13 PM UTC 24 Sep 18 06:37:33 PM UTC 24 64840507579 ps
T757 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/36.uart_rx_parity_err.1290456424 Sep 18 06:34:42 PM UTC 24 Sep 18 06:37:33 PM UTC 24 92196319828 ps
T423 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/38.uart_fifo_reset.416258293 Sep 18 06:35:50 PM UTC 24 Sep 18 06:37:40 PM UTC 24 50286595224 ps
T758 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/38.uart_stress_all_with_rand_reset.77644095 Sep 18 06:36:12 PM UTC 24 Sep 18 06:37:41 PM UTC 24 12220800370 ps
T759 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/39.uart_tx_rx.2190535068 Sep 18 06:36:22 PM UTC 24 Sep 18 06:37:41 PM UTC 24 28725872740 ps
T760 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/38.uart_intr.2416440431 Sep 18 06:35:51 PM UTC 24 Sep 18 06:37:42 PM UTC 24 47298708519 ps
T761 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/38.uart_tx_rx.3776327417 Sep 18 06:35:42 PM UTC 24 Sep 18 06:37:42 PM UTC 24 144272068475 ps
T762 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/39.uart_stress_all_with_rand_reset.885997934 Sep 18 06:37:02 PM UTC 24 Sep 18 06:37:44 PM UTC 24 2216623285 ps
T763 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/29.uart_perf.1648276371 Sep 18 06:30:16 PM UTC 24 Sep 18 06:37:45 PM UTC 24 14764563544 ps
T764 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/40.uart_loopback.1539048942 Sep 18 06:37:43 PM UTC 24 Sep 18 06:37:47 PM UTC 24 2860890405 ps
T765 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/40.uart_fifo_overflow.1158334632 Sep 18 06:37:16 PM UTC 24 Sep 18 06:37:49 PM UTC 24 9166606093 ps
T766 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/36.uart_noise_filter.2364245728 Sep 18 06:34:29 PM UTC 24 Sep 18 06:37:54 PM UTC 24 193841728373 ps
T767 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/40.uart_rx_start_bit_filter.716707673 Sep 18 06:37:41 PM UTC 24 Sep 18 06:37:57 PM UTC 24 3770299190 ps
T768 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/40.uart_alert_test.2760065316 Sep 18 06:37:55 PM UTC 24 Sep 18 06:37:57 PM UTC 24 53566380 ps
T769 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/41.uart_tx_rx.172989692 Sep 18 06:37:57 PM UTC 24 Sep 18 06:38:00 PM UTC 24 4304296634 ps
T770 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/34.uart_stress_all.2387454775 Sep 18 06:33:25 PM UTC 24 Sep 18 06:38:04 PM UTC 24 162876079083 ps
T417 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/39.uart_noise_filter.277495796 Sep 18 06:36:39 PM UTC 24 Sep 18 06:38:07 PM UTC 24 185375651610 ps
T771 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/39.uart_intr.1583308337 Sep 18 06:36:38 PM UTC 24 Sep 18 06:38:09 PM UTC 24 52501746742 ps
T772 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/40.uart_rx_parity_err.1262653460 Sep 18 06:37:42 PM UTC 24 Sep 18 06:38:13 PM UTC 24 65428592540 ps
T773 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/41.uart_smoke.3652051613 Sep 18 06:37:57 PM UTC 24 Sep 18 06:38:13 PM UTC 24 5530774356 ps
T774 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/40.uart_tx_ovrd.2873342830 Sep 18 06:37:42 PM UTC 24 Sep 18 06:38:20 PM UTC 24 6765520014 ps
T775 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/38.uart_perf.1930546137 Sep 18 06:36:09 PM UTC 24 Sep 18 06:38:20 PM UTC 24 11712756892 ps
T776 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/38.uart_noise_filter.1276841043 Sep 18 06:35:51 PM UTC 24 Sep 18 06:38:28 PM UTC 24 67200152980 ps
T777 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/41.uart_rx_oversample.3980623358 Sep 18 06:38:09 PM UTC 24 Sep 18 06:38:37 PM UTC 24 4920671069 ps
T778 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/34.uart_perf.2672589342 Sep 18 06:33:16 PM UTC 24 Sep 18 06:38:37 PM UTC 24 19500240616 ps
T779 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/40.uart_rx_oversample.976727299 Sep 18 06:37:34 PM UTC 24 Sep 18 06:38:38 PM UTC 24 7262610514 ps
T780 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/40.uart_stress_all_with_rand_reset.1905336014 Sep 18 06:37:48 PM UTC 24 Sep 18 06:38:41 PM UTC 24 3876393759 ps
T781 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/37.uart_perf.3645884867 Sep 18 06:35:32 PM UTC 24 Sep 18 06:38:41 PM UTC 24 22265815972 ps
T782 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/41.uart_fifo_full.324784869 Sep 18 06:38:01 PM UTC 24 Sep 18 06:38:48 PM UTC 24 32188772952 ps
T783 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/41.uart_loopback.3620137144 Sep 18 06:38:38 PM UTC 24 Sep 18 06:38:51 PM UTC 24 8716957529 ps
T784 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/41.uart_alert_test.4250217061 Sep 18 06:38:49 PM UTC 24 Sep 18 06:38:52 PM UTC 24 15974092 ps
T785 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/30.uart_long_xfer_wo_dly.4146017286 Sep 18 06:31:09 PM UTC 24 Sep 18 06:38:56 PM UTC 24 79598297690 ps
T786 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/42.uart_smoke.4090777243 Sep 18 06:38:52 PM UTC 24 Sep 18 06:38:58 PM UTC 24 671054905 ps
T787 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/41.uart_fifo_overflow.2374543587 Sep 18 06:38:04 PM UTC 24 Sep 18 06:38:59 PM UTC 24 85609688375 ps
T788 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/41.uart_tx_ovrd.2127787930 Sep 18 06:38:29 PM UTC 24 Sep 18 06:39:02 PM UTC 24 6320483610 ps
T789 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/41.uart_rx_start_bit_filter.2923737563 Sep 18 06:38:21 PM UTC 24 Sep 18 06:39:08 PM UTC 24 27372368240 ps
T164 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/39.uart_fifo_reset.825789009 Sep 18 06:36:31 PM UTC 24 Sep 18 06:39:13 PM UTC 24 117363462142 ps
T790 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/39.uart_fifo_full.1920483106 Sep 18 06:36:25 PM UTC 24 Sep 18 06:39:13 PM UTC 24 158006732523 ps
T791 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/40.uart_noise_filter.2071788088 Sep 18 06:37:41 PM UTC 24 Sep 18 06:39:17 PM UTC 24 148798476511 ps
T792 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/42.uart_rx_oversample.120585626 Sep 18 06:39:03 PM UTC 24 Sep 18 06:39:17 PM UTC 24 2008396372 ps
T793 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/42.uart_tx_ovrd.2603881536 Sep 18 06:39:17 PM UTC 24 Sep 18 06:39:20 PM UTC 24 778215975 ps
T794 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/40.uart_stress_all.1521431248 Sep 18 06:37:50 PM UTC 24 Sep 18 06:39:21 PM UTC 24 161749305181 ps
T795 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/42.uart_fifo_full.643488102 Sep 18 06:38:58 PM UTC 24 Sep 18 06:39:27 PM UTC 24 13522560620 ps
T796 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/42.uart_loopback.509585881 Sep 18 06:39:21 PM UTC 24 Sep 18 06:39:28 PM UTC 24 6253964392 ps
T797 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/41.uart_fifo_reset.3989150614 Sep 18 06:38:07 PM UTC 24 Sep 18 06:39:32 PM UTC 24 30989446885 ps
T798 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/42.uart_rx_start_bit_filter.3861774723 Sep 18 06:39:14 PM UTC 24 Sep 18 06:39:38 PM UTC 24 5824444797 ps
T799 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/42.uart_alert_test.561471818 Sep 18 06:39:39 PM UTC 24 Sep 18 06:39:41 PM UTC 24 85339457 ps
T800 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/42.uart_fifo_overflow.3627273939 Sep 18 06:38:59 PM UTC 24 Sep 18 06:39:42 PM UTC 24 15308496903 ps
T801 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/42.uart_tx_rx.3553009406 Sep 18 06:38:52 PM UTC 24 Sep 18 06:39:44 PM UTC 24 79860279896 ps
T802 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/43.uart_smoke.1316286149 Sep 18 06:39:42 PM UTC 24 Sep 18 06:39:45 PM UTC 24 518185634 ps
T803 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/28.uart_perf.1702339578 Sep 18 06:29:31 PM UTC 24 Sep 18 06:39:49 PM UTC 24 9065118941 ps
T420 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/41.uart_noise_filter.35233627 Sep 18 06:38:14 PM UTC 24 Sep 18 06:39:49 PM UTC 24 45973755671 ps
T427 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/42.uart_rx_parity_err.4280497592 Sep 18 06:39:17 PM UTC 24 Sep 18 06:39:54 PM UTC 24 184181707284 ps
T804 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/40.uart_long_xfer_wo_dly.516988964 Sep 18 06:37:46 PM UTC 24 Sep 18 06:39:57 PM UTC 24 222917788640 ps
T805 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/42.uart_noise_filter.729090373 Sep 18 06:39:14 PM UTC 24 Sep 18 06:39:58 PM UTC 24 15276371592 ps
T806 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/41.uart_rx_parity_err.2822081976 Sep 18 06:38:21 PM UTC 24 Sep 18 06:40:00 PM UTC 24 25863276705 ps
T807 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/36.uart_long_xfer_wo_dly.3477962206 Sep 18 06:34:47 PM UTC 24 Sep 18 06:40:02 PM UTC 24 208042745818 ps
T808 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/43.uart_rx_oversample.2556277325 Sep 18 06:39:50 PM UTC 24 Sep 18 06:40:02 PM UTC 24 2118217980 ps
T809 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/25.uart_stress_all.1342593984 Sep 18 06:27:17 PM UTC 24 Sep 18 06:40:03 PM UTC 24 180022221217 ps
T810 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/43.uart_tx_ovrd.1439248348 Sep 18 06:40:03 PM UTC 24 Sep 18 06:40:07 PM UTC 24 2512925045 ps
T811 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/43.uart_loopback.3296403424 Sep 18 06:40:03 PM UTC 24 Sep 18 06:40:09 PM UTC 24 6782149745 ps
T812 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/43.uart_rx_start_bit_filter.4019428479 Sep 18 06:39:59 PM UTC 24 Sep 18 06:40:14 PM UTC 24 6095154380 ps
T813 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/42.uart_stress_all_with_rand_reset.4143386947 Sep 18 06:39:28 PM UTC 24 Sep 18 06:40:17 PM UTC 24 4960344090 ps
T814 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/43.uart_alert_test.2291852509 Sep 18 06:40:17 PM UTC 24 Sep 18 06:40:19 PM UTC 24 14192111 ps
T815 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/27.uart_stress_all.1467720703 Sep 18 06:29:02 PM UTC 24 Sep 18 06:40:24 PM UTC 24 215459957207 ps
T816 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/44.uart_smoke.841393215 Sep 18 06:40:20 PM UTC 24 Sep 18 06:40:24 PM UTC 24 633489210 ps
T817 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/40.uart_fifo_full.2348133596 Sep 18 06:37:14 PM UTC 24 Sep 18 06:40:25 PM UTC 24 246917234302 ps
T818 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/42.uart_long_xfer_wo_dly.2513005685 Sep 18 06:39:28 PM UTC 24 Sep 18 06:40:26 PM UTC 24 38550265538 ps
T819 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/36.uart_stress_all.2226684395 Sep 18 06:35:00 PM UTC 24 Sep 18 06:40:27 PM UTC 24 183473809926 ps
T820 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/37.uart_noise_filter.1415871026 Sep 18 06:35:24 PM UTC 24 Sep 18 06:40:32 PM UTC 24 91458092729 ps
T821 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/33.uart_long_xfer_wo_dly.1445068339 Sep 18 06:32:44 PM UTC 24 Sep 18 06:40:35 PM UTC 24 94455439190 ps
T822 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/44.uart_rx_oversample.1572139894 Sep 18 06:40:28 PM UTC 24 Sep 18 06:40:36 PM UTC 24 4337458733 ps
T823 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/43.uart_intr.1113935241 Sep 18 06:39:54 PM UTC 24 Sep 18 06:40:37 PM UTC 24 66089758504 ps
T824 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/44.uart_tx_rx.2336950999 Sep 18 06:40:24 PM UTC 24 Sep 18 06:40:39 PM UTC 24 3706140670 ps
T825 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/38.uart_rx_parity_err.3546824789 Sep 18 06:36:00 PM UTC 24 Sep 18 06:40:41 PM UTC 24 124855062372 ps
T826 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/44.uart_loopback.513933853 Sep 18 06:40:41 PM UTC 24 Sep 18 06:40:43 PM UTC 24 789010770 ps
T827 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/43.uart_stress_all_with_rand_reset.1365510625 Sep 18 06:40:10 PM UTC 24 Sep 18 06:40:47 PM UTC 24 10889890065 ps
T828 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/43.uart_fifo_overflow.4234073908 Sep 18 06:39:46 PM UTC 24 Sep 18 06:40:48 PM UTC 24 63002103319 ps
T829 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/43.uart_noise_filter.1699216145 Sep 18 06:39:57 PM UTC 24 Sep 18 06:40:51 PM UTC 24 40004134704 ps
T830 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/44.uart_fifo_overflow.1373096521 Sep 18 06:40:25 PM UTC 24 Sep 18 06:40:53 PM UTC 24 16671307564 ps
T831 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/44.uart_rx_start_bit_filter.456860965 Sep 18 06:40:37 PM UTC 24 Sep 18 06:40:53 PM UTC 24 41574864893 ps
T832 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/49.uart_tx_rx.192347654 Sep 18 06:43:17 PM UTC 24 Sep 18 06:43:51 PM UTC 24 69890101067 ps
T833 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/44.uart_alert_test.1384472118 Sep 18 06:40:54 PM UTC 24 Sep 18 06:40:56 PM UTC 24 80871687 ps
T834 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/44.uart_tx_ovrd.2415792767 Sep 18 06:40:40 PM UTC 24 Sep 18 06:40:59 PM UTC 24 6408012077 ps
T835 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/41.uart_stress_all_with_rand_reset.2401372353 Sep 18 06:38:41 PM UTC 24 Sep 18 06:41:00 PM UTC 24 4351931254 ps
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T842 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/45.uart_rx_oversample.4025676932 Sep 18 06:41:05 PM UTC 24 Sep 18 06:41:21 PM UTC 24 4018488559 ps
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T844 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/30.uart_perf.254362522 Sep 18 06:31:07 PM UTC 24 Sep 18 06:41:23 PM UTC 24 8206042565 ps
T845 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/44.uart_perf.3444645647 Sep 18 06:40:44 PM UTC 24 Sep 18 06:41:24 PM UTC 24 4877515511 ps
T846 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/45.uart_fifo_reset.2919369393 Sep 18 06:41:02 PM UTC 24 Sep 18 06:41:26 PM UTC 24 134845031266 ps
T847 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/45.uart_rx_start_bit_filter.3284649428 Sep 18 06:41:14 PM UTC 24 Sep 18 06:41:27 PM UTC 24 34603659804 ps
T848 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/45.uart_alert_test.1711564237 Sep 18 06:41:28 PM UTC 24 Sep 18 06:41:30 PM UTC 24 19649997 ps
T849 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/46.uart_smoke.3092047588 Sep 18 06:41:30 PM UTC 24 Sep 18 06:41:33 PM UTC 24 275141189 ps
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T851 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/45.uart_fifo_full.2016467266 Sep 18 06:41:00 PM UTC 24 Sep 18 06:41:37 PM UTC 24 25223538001 ps
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T196 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/42.uart_fifo_reset.3066279657 Sep 18 06:39:01 PM UTC 24 Sep 18 06:42:04 PM UTC 24 175989069082 ps
T858 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/46.uart_loopback.4284899724 Sep 18 06:42:05 PM UTC 24 Sep 18 06:42:07 PM UTC 24 183371691 ps
T859 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/46.uart_rx_oversample.3046515232 Sep 18 06:41:38 PM UTC 24 Sep 18 06:42:10 PM UTC 24 2832370348 ps
T860 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/4.uart_perf.1489719772 Sep 18 06:16:41 PM UTC 24 Sep 18 06:42:14 PM UTC 24 25595731715 ps
T861 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/43.uart_rx_parity_err.4275948115 Sep 18 06:40:00 PM UTC 24 Sep 18 06:42:18 PM UTC 24 86078741859 ps
T430 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/23.uart_stress_all.3951040045 Sep 18 06:25:58 PM UTC 24 Sep 18 06:42:19 PM UTC 24 125443831636 ps
T862 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/46.uart_alert_test.3234136306 Sep 18 06:42:19 PM UTC 24 Sep 18 06:42:21 PM UTC 24 22948769 ps
T863 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/43.uart_fifo_full.2366540394 Sep 18 06:39:45 PM UTC 24 Sep 18 06:42:21 PM UTC 24 62107875594 ps
T161 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/46.uart_fifo_overflow.2410591159 Sep 18 06:41:38 PM UTC 24 Sep 18 06:42:22 PM UTC 24 43282955801 ps
T864 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/47.uart_smoke.1514895414 Sep 18 06:42:20 PM UTC 24 Sep 18 06:42:23 PM UTC 24 719850545 ps
T865 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/46.uart_fifo_full.1428727829 Sep 18 06:41:37 PM UTC 24 Sep 18 06:42:25 PM UTC 24 52680958875 ps
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