Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.09 99.08 97.65 100.00 98.35 100.00 99.46


Total tests in report: 1316
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
73.14 73.14 91.53 91.53 70.94 70.94 93.18 93.18 85.18 85.18 93.51 93.51 4.52 4.52 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_rx_oversample.339495694
79.17 6.03 95.82 4.29 85.06 14.12 96.59 3.41 91.06 5.88 94.99 1.47 11.54 7.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_stress_all_with_rand_reset.219052225
83.00 3.82 98.57 2.76 93.29 8.24 97.10 0.51 96.00 4.94 96.17 1.18 16.84 5.31 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_tx_rx.1762367888
85.96 2.96 98.57 0.00 93.29 0.00 97.10 0.00 96.00 0.00 96.17 0.00 34.61 17.77 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_stress_all.1910485464
88.12 2.16 98.57 0.00 93.29 0.00 97.10 0.00 96.00 0.00 96.17 0.00 47.60 12.98 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/4.uart_stress_all.4087343083
89.54 1.42 98.57 0.00 93.29 0.00 97.10 0.00 96.00 0.00 96.17 0.00 56.11 8.51 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_stress_all.4008828830
90.75 1.21 98.57 0.00 93.53 0.24 97.10 0.00 96.00 0.00 96.46 0.29 62.84 6.73 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/6.uart_stress_all.3328967035
91.79 1.05 98.57 0.00 93.53 0.00 97.10 0.00 96.00 0.00 96.46 0.00 69.11 6.28 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/3.uart_long_xfer_wo_dly.3398998043
92.58 0.79 98.88 0.31 95.06 1.53 97.35 0.25 96.94 0.94 96.46 0.00 70.81 1.69 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_intr.144838197
93.23 0.64 98.88 0.00 95.06 0.00 97.35 0.00 96.94 0.00 96.46 0.00 74.67 3.86 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_long_xfer_wo_dly.2875076143
93.84 0.61 98.98 0.10 96.12 1.06 97.35 0.00 98.12 1.18 96.46 0.00 76.00 1.33 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/3.uart_stress_all.422891510
94.42 0.58 99.08 0.10 96.47 0.35 99.75 2.40 98.35 0.24 96.76 0.29 76.11 0.11 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_sec_cm.3630491988
94.95 0.53 99.08 0.00 96.47 0.00 99.75 0.00 98.35 0.00 97.05 0.29 79.00 2.89 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/2.uart_fifo_full.1657851870
95.35 0.40 99.08 0.00 96.47 0.00 99.75 0.00 98.35 0.00 97.05 0.00 81.37 2.37 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_fifo_full.3008246922
95.70 0.35 99.08 0.00 96.47 0.00 99.75 0.00 98.35 0.00 97.94 0.88 82.61 1.24 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_stress_all_with_rand_reset.3742711648
96.00 0.29 99.08 0.00 96.47 0.00 99.75 0.00 98.35 0.00 99.71 1.77 82.61 0.00 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_hw_reset.2517338649
96.26 0.26 99.08 0.00 96.47 0.00 99.75 0.00 98.35 0.00 99.71 0.00 84.20 1.58 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/15.uart_stress_all.1041866629
96.50 0.24 99.08 0.00 96.47 0.00 99.75 0.00 98.35 0.00 99.71 0.00 85.64 1.45 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/15.uart_fifo_overflow.1352684321
96.73 0.23 99.08 0.00 96.47 0.00 99.75 0.00 98.35 0.00 99.71 0.00 87.04 1.40 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/6.uart_rx_parity_err.4091967506
96.92 0.18 99.08 0.00 96.47 0.00 99.75 0.00 98.35 0.00 99.71 0.00 88.15 1.11 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_fifo_overflow.4278553535
97.08 0.16 99.08 0.00 96.47 0.00 99.75 0.00 98.35 0.00 99.71 0.00 89.12 0.97 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/11.uart_fifo_reset.831072784
97.23 0.15 99.08 0.00 97.18 0.71 99.75 0.00 98.35 0.00 99.71 0.00 89.30 0.18 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/1.uart_tl_intg_err.3466606944
97.37 0.14 99.08 0.00 97.18 0.00 99.75 0.00 98.35 0.00 99.71 0.00 90.16 0.86 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_rx_parity_err.926607408
97.51 0.14 99.08 0.00 97.18 0.00 99.75 0.00 98.35 0.00 99.71 0.00 91.01 0.86 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_stress_all.1529261129
97.63 0.12 99.08 0.00 97.18 0.00 99.75 0.00 98.35 0.00 99.71 0.00 91.71 0.70 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/12.uart_stress_all.536166162
97.73 0.10 99.08 0.00 97.53 0.35 100.00 0.25 98.35 0.00 99.71 0.00 91.71 0.00 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_alert_test.2907270591
97.82 0.09 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 99.71 0.00 92.26 0.54 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/13.uart_fifo_reset.1810905461
97.91 0.09 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 99.71 0.00 92.77 0.52 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_fifo_overflow.3535623767
97.99 0.09 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 99.71 0.00 93.29 0.52 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/11.uart_stress_all.425216729
98.07 0.08 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 99.71 0.00 93.77 0.47 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/7.uart_stress_all.312083275
98.14 0.06 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 99.71 0.00 94.15 0.38 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/22.uart_fifo_full.2399543414
98.20 0.06 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 99.71 0.00 94.54 0.38 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/5.uart_stress_all_with_rand_reset.4213548695
98.25 0.05 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 99.71 0.00 94.85 0.32 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_fifo_reset.711340190
98.31 0.05 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 99.71 0.00 95.17 0.32 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/11.uart_rx_parity_err.4224213963
98.36 0.05 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 100.00 0.29 95.17 0.00 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/0.uart_same_csr_outstanding.4195361692
98.40 0.05 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 100.00 0.00 95.44 0.27 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/13.uart_stress_all.275105262
98.44 0.04 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 100.00 0.00 95.69 0.25 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/17.uart_rx_parity_err.1037519793
98.48 0.04 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 100.00 0.00 95.94 0.25 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/3.uart_fifo_overflow.2726822169
98.52 0.04 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 100.00 0.00 96.16 0.23 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/12.uart_stress_all_with_rand_reset.3256827812
98.55 0.03 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 100.00 0.00 96.36 0.20 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/16.uart_fifo_full.3621388392
98.59 0.03 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 100.00 0.00 96.57 0.20 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/19.uart_fifo_reset.1037275865
98.62 0.03 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 100.00 0.00 96.75 0.18 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/4.uart_stress_all_with_rand_reset.2091334748
98.65 0.03 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 100.00 0.00 96.91 0.16 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/10.uart_rx_parity_err.453395409
98.67 0.03 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.06 0.16 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/11.uart_fifo_overflow.1997400505
98.70 0.03 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.22 0.16 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/5.uart_noise_filter.2887908352
98.72 0.02 99.08 0.00 97.65 0.12 100.00 0.00 98.35 0.00 100.00 0.00 97.25 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/15.uart_tl_intg_err.1442200251
98.74 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.38 0.14 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/18.uart_fifo_overflow.2226333148
98.77 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.52 0.14 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/278.uart_fifo_reset.3693446514
98.79 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.63 0.11 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/7.uart_stress_all_with_rand_reset.2485585939
98.80 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.72 0.09 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/10.uart_fifo_overflow.1869255297
98.82 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.81 0.09 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/151.uart_fifo_reset.3426124228
98.83 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.90 0.09 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/238.uart_fifo_reset.2661555284
98.85 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.99 0.09 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/24.uart_stress_all.4293059917
98.86 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.08 0.09 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/252.uart_fifo_reset.1636413246
98.88 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.17 0.09 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/27.uart_fifo_reset.151036674
98.89 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.26 0.09 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/275.uart_fifo_reset.3846428539
98.90 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.33 0.07 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/113.uart_fifo_reset.1035797252
98.91 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.40 0.07 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/15.uart_fifo_full.3172321467
98.92 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.46 0.07 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/161.uart_fifo_reset.2535305860
98.94 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.53 0.07 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/18.uart_rx_parity_err.3282378403
98.95 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.60 0.07 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/33.uart_rx_parity_err.2764326574
98.96 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.67 0.07 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/7.uart_tx_rx.1821398399
98.97 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.71 0.05 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/154.uart_fifo_reset.2652572178
98.97 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.76 0.05 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/155.uart_fifo_reset.91910982
98.98 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.80 0.05 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/179.uart_fifo_reset.526076917
98.99 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.85 0.05 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/180.uart_fifo_reset.2352553172
99.00 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.89 0.05 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/181.uart_fifo_reset.219887681
99.00 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.94 0.05 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/260.uart_fifo_reset.4093114923
99.01 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.98 0.05 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/60.uart_fifo_reset.4065607823
99.01 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.01 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/103.uart_fifo_reset.3688690739
99.02 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.03 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/124.uart_fifo_reset.1453058982
99.02 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.05 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/14.uart_fifo_full.3597725495
99.03 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.07 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/14.uart_fifo_reset.1102818897
99.03 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.10 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/14.uart_intr.1952829797
99.03 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.12 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/17.uart_fifo_overflow.2513513302
99.04 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.14 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/172.uart_fifo_reset.2734283368
99.04 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.16 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/175.uart_fifo_reset.2272786463
99.04 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.19 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/18.uart_fifo_reset.1327125412
99.05 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.21 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/19.uart_noise_filter.2408201371
99.05 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.23 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/193.uart_fifo_reset.1102988329
99.06 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.25 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/195.uart_fifo_reset.3920098602
99.06 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.28 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/197.uart_fifo_reset.3000153699
99.06 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.30 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/2.uart_fifo_reset.2903338697
99.07 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.32 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/201.uart_fifo_reset.3604726319
99.07 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.35 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/210.uart_fifo_reset.1065095521
99.07 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.37 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/223.uart_fifo_reset.2895372047
99.08 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.39 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/242.uart_fifo_reset.1805629210
99.08 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.41 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/28.uart_fifo_reset.1197355786
99.09 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.44 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/66.uart_fifo_reset.171586694
99.09 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.46 0.02 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/98.uart_fifo_reset.2375457831

Tests that do not contribute to grading

Name
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_aliasing.2155189681
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_bit_bash.706228864
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_mem_rw_with_rand_reset.1334002764
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_rw.1131812967
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/0.uart_intr_test.2420017495
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/0.uart_tl_errors.944891375
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/0.uart_tl_intg_err.129741515
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_aliasing.1239203589
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_bit_bash.3840646482
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_hw_reset.3938116979
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_mem_rw_with_rand_reset.4053352242
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_rw.1447122208
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/1.uart_intr_test.3352387910
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/1.uart_same_csr_outstanding.1584722525
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/1.uart_tl_errors.925658699
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/10.uart_csr_mem_rw_with_rand_reset.270426857
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/10.uart_csr_rw.4238575788
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/10.uart_intr_test.3329512845
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/10.uart_same_csr_outstanding.2506549999
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/10.uart_tl_errors.1028771804
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/10.uart_tl_intg_err.3420922616
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/11.uart_csr_mem_rw_with_rand_reset.3914923066
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/11.uart_csr_rw.874250524
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/11.uart_intr_test.2960425732
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/11.uart_same_csr_outstanding.3875406728
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/11.uart_tl_errors.2730556086
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/11.uart_tl_intg_err.3446110571
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/12.uart_csr_mem_rw_with_rand_reset.337017116
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/12.uart_csr_rw.2660537555
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/12.uart_intr_test.2872817490
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/12.uart_same_csr_outstanding.865777039
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/12.uart_tl_errors.540498374
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/12.uart_tl_intg_err.2355073675
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/13.uart_csr_mem_rw_with_rand_reset.3055417899
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/13.uart_csr_rw.3554364377
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/13.uart_intr_test.2270699000
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/13.uart_same_csr_outstanding.1731534073
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/13.uart_tl_errors.1307203992
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/13.uart_tl_intg_err.2159578420
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/14.uart_csr_mem_rw_with_rand_reset.2042898893
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/14.uart_csr_rw.4097227049
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/14.uart_intr_test.1514490689
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/14.uart_same_csr_outstanding.1983919616
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/14.uart_tl_errors.1140632336
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/14.uart_tl_intg_err.2685188836
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/15.uart_csr_mem_rw_with_rand_reset.3139904455
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/15.uart_csr_rw.3022323457
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/15.uart_intr_test.1140469159
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/15.uart_same_csr_outstanding.1555516217
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/15.uart_tl_errors.3825843549
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/16.uart_csr_mem_rw_with_rand_reset.2386420991
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/16.uart_csr_rw.4078545141
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/16.uart_intr_test.2025137877
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/16.uart_same_csr_outstanding.2465002419
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/16.uart_tl_errors.2906349353
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/16.uart_tl_intg_err.443626196
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/17.uart_csr_mem_rw_with_rand_reset.4175505853
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/17.uart_csr_rw.2846741054
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/17.uart_intr_test.796193340
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/17.uart_same_csr_outstanding.126441075
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/17.uart_tl_errors.2712797734
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/17.uart_tl_intg_err.3647956212
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/18.uart_csr_mem_rw_with_rand_reset.3076008544
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/18.uart_csr_rw.3766089
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/18.uart_intr_test.112415363
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/18.uart_same_csr_outstanding.3249756741
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/18.uart_tl_errors.1053487078
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/18.uart_tl_intg_err.1974143638
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/19.uart_csr_mem_rw_with_rand_reset.2822975620
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/19.uart_csr_rw.741107630
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/19.uart_intr_test.2769576
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/19.uart_same_csr_outstanding.2659357423
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/19.uart_tl_errors.1103380823
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/19.uart_tl_intg_err.454243175
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_aliasing.1629022302
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_bit_bash.73997356
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_hw_reset.297495937
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_mem_rw_with_rand_reset.833078066
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_rw.3659815008
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/2.uart_intr_test.1037596472
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/2.uart_same_csr_outstanding.4079340818
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/2.uart_tl_errors.4053370858
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/2.uart_tl_intg_err.3369840301
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/20.uart_intr_test.1921638175
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/21.uart_intr_test.3394127146
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/22.uart_intr_test.805701754
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/23.uart_intr_test.1420102681
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/24.uart_intr_test.3829564019
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/25.uart_intr_test.3053099474
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/26.uart_intr_test.2938107583
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/27.uart_intr_test.899795203
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/28.uart_intr_test.2227639489
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/29.uart_intr_test.1639296344
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_aliasing.227831410
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_bit_bash.1130558104
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_hw_reset.2140042695
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_mem_rw_with_rand_reset.554613617
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_rw.1986964591
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/3.uart_intr_test.3286789226
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/3.uart_same_csr_outstanding.1545268563
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/3.uart_tl_errors.4234494672
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/3.uart_tl_intg_err.3300109976
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/30.uart_intr_test.547803219
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/31.uart_intr_test.2470577797
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/32.uart_intr_test.4072981405
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/33.uart_intr_test.1240552857
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/34.uart_intr_test.3228378849
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/35.uart_intr_test.2743354390
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/36.uart_intr_test.827842523
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/37.uart_intr_test.3793070790
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/38.uart_intr_test.2215823488
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/39.uart_intr_test.2193680873
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_aliasing.2107238679
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_bit_bash.2068258584
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_hw_reset.3458296773
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_mem_rw_with_rand_reset.3934117887
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_rw.1882747329
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/4.uart_intr_test.4023212868
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/4.uart_same_csr_outstanding.2871754979
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/4.uart_tl_errors.3812871101
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/4.uart_tl_intg_err.1729707487
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/40.uart_intr_test.3869713856
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/41.uart_intr_test.3096325158
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/42.uart_intr_test.937114735
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/43.uart_intr_test.1610363697
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/44.uart_intr_test.1611427288
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/45.uart_intr_test.1769168618
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/46.uart_intr_test.2749038841
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/47.uart_intr_test.798830457
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/48.uart_intr_test.2636990372
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/49.uart_intr_test.617101702
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/5.uart_csr_mem_rw_with_rand_reset.414037045
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/5.uart_csr_rw.513756224
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/5.uart_intr_test.3126935674
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/5.uart_same_csr_outstanding.720329704
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/5.uart_tl_errors.1800433228
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/5.uart_tl_intg_err.3851340678
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/6.uart_csr_mem_rw_with_rand_reset.353469851
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/6.uart_csr_rw.603586977
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/6.uart_intr_test.2624684163
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/6.uart_same_csr_outstanding.890192742
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/6.uart_tl_errors.3820713800
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/6.uart_tl_intg_err.4085025695
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/cover_reg_top/7.uart_csr_mem_rw_with_rand_reset.4280011037
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/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/76.uart_fifo_reset.2931685951
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/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/77.uart_fifo_reset.766497306
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/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/78.uart_fifo_reset.3697966114
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/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/79.uart_fifo_reset.907259379
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/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_alert_test.1286147210
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/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_fifo_overflow.789864680
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_fifo_reset.314354491
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_intr.561601711
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_long_xfer_wo_dly.2837449426
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_loopback.313682256
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_noise_filter.3443882838
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_perf.1969729484
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_rx_oversample.1215734301
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_rx_parity_err.2651035080
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_rx_start_bit_filter.4009135639
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_smoke.4078516036
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_stress_all.2640504451
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_tx_ovrd.63615975
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_tx_rx.2139983093
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/80.uart_fifo_reset.2166126814
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/80.uart_stress_all_with_rand_reset.2500640789
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/81.uart_fifo_reset.1112615021
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/81.uart_stress_all_with_rand_reset.1702288702
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/82.uart_fifo_reset.3718288326
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/82.uart_stress_all_with_rand_reset.3741324889
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/83.uart_fifo_reset.3286389266
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/83.uart_stress_all_with_rand_reset.1739595079
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/84.uart_fifo_reset.3738628360
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/84.uart_stress_all_with_rand_reset.883236900
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/85.uart_fifo_reset.2756851676
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/85.uart_stress_all_with_rand_reset.4140299058
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/86.uart_fifo_reset.977590079
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/86.uart_stress_all_with_rand_reset.1493717767
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/87.uart_fifo_reset.384113703
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/87.uart_stress_all_with_rand_reset.2433050262
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/88.uart_fifo_reset.660224136
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/88.uart_stress_all_with_rand_reset.1292362870
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/89.uart_fifo_reset.2752336913
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/89.uart_stress_all_with_rand_reset.518887485
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_alert_test.2956939008
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_fifo_overflow.447145361
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_fifo_reset.2126068629
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_intr.525440372
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_long_xfer_wo_dly.280880507
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_loopback.4196507628
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_noise_filter.2995090641
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_perf.2715390250
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_rx_oversample.1825182345
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_rx_parity_err.1186391174
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_rx_start_bit_filter.1857846212
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_smoke.527247030
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_stress_all_with_rand_reset.3809156288
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_tx_ovrd.1153271061
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_tx_rx.2294235661
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/90.uart_fifo_reset.1997871200
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/90.uart_stress_all_with_rand_reset.2819503548
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/91.uart_fifo_reset.39810267
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/91.uart_stress_all_with_rand_reset.3109603037
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/92.uart_fifo_reset.2135637898
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/92.uart_stress_all_with_rand_reset.581332285
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/93.uart_fifo_reset.388524206
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/93.uart_stress_all_with_rand_reset.1431763595
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/94.uart_fifo_reset.3798347503
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/94.uart_stress_all_with_rand_reset.3147189003
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/95.uart_fifo_reset.1504929812
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/95.uart_stress_all_with_rand_reset.83298631
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/96.uart_fifo_reset.3001263876
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/96.uart_stress_all_with_rand_reset.1820597854
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/97.uart_fifo_reset.1809382829
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/97.uart_stress_all_with_rand_reset.2723051184
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/98.uart_stress_all_with_rand_reset.3151267241
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/99.uart_fifo_reset.3658734810
/workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/99.uart_stress_all_with_rand_reset.2577058289



Total test records in report: 1316
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_smoke.4078803229 Sep 18 06:14:22 PM UTC 24 Sep 18 06:14:26 PM UTC 24 321921702 ps
T2 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_rx_oversample.339495694 Sep 18 06:14:27 PM UTC 24 Sep 18 06:14:42 PM UTC 24 2221836741 ps
T3 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_rx_start_bit_filter.1996389823 Sep 18 06:14:35 PM UTC 24 Sep 18 06:14:46 PM UTC 24 5264465672 ps
T4 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_tx_ovrd.3466479123 Sep 18 06:14:43 PM UTC 24 Sep 18 06:14:49 PM UTC 24 742858748 ps
T5 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_sec_cm.3630491988 Sep 18 06:14:49 PM UTC 24 Sep 18 06:14:51 PM UTC 24 178250249 ps
T6 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_alert_test.2907270591 Sep 18 06:14:52 PM UTC 24 Sep 18 06:14:54 PM UTC 24 12603187 ps
T7 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_loopback.1443557216 Sep 18 06:14:43 PM UTC 24 Sep 18 06:15:02 PM UTC 24 4438267206 ps
T8 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_tx_rx.1762367888 Sep 18 06:14:53 PM UTC 24 Sep 18 06:15:23 PM UTC 24 24763154771 ps
T9 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_smoke.1548691691 Sep 18 06:14:52 PM UTC 24 Sep 18 06:15:23 PM UTC 24 5437883834 ps
T10 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_rx_oversample.1054078936 Sep 18 06:15:14 PM UTC 24 Sep 18 06:15:27 PM UTC 24 5268367290 ps
T14 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_rx_start_bit_filter.708045855 Sep 18 06:15:24 PM UTC 24 Sep 18 06:15:30 PM UTC 24 5377187509 ps
T15 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_loopback.1754685175 Sep 18 06:15:30 PM UTC 24 Sep 18 06:15:33 PM UTC 24 316800396 ps
T16 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_tx_ovrd.3616663210 Sep 18 06:15:27 PM UTC 24 Sep 18 06:15:34 PM UTC 24 871123497 ps
T11 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_tx_rx.3811866797 Sep 18 06:14:24 PM UTC 24 Sep 18 06:15:34 PM UTC 24 176543418296 ps
T12 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_fifo_full.1901935640 Sep 18 06:14:54 PM UTC 24 Sep 18 06:15:34 PM UTC 24 50106840411 ps
T29 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_sec_cm.2989262381 Sep 18 06:15:35 PM UTC 24 Sep 18 06:15:37 PM UTC 24 61577032 ps
T30 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_alert_test.464585873 Sep 18 06:15:36 PM UTC 24 Sep 18 06:15:38 PM UTC 24 45303572 ps
T44 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/2.uart_smoke.3858773912 Sep 18 06:15:36 PM UTC 24 Sep 18 06:15:40 PM UTC 24 486169762 ps
T45 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_noise_filter.3334247743 Sep 18 06:15:17 PM UTC 24 Sep 18 06:15:42 PM UTC 24 8360563978 ps
T28 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_fifo_full.3193761258 Sep 18 06:14:26 PM UTC 24 Sep 18 06:15:45 PM UTC 24 30312167894 ps
T21 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_intr.144838197 Sep 18 06:15:15 PM UTC 24 Sep 18 06:15:49 PM UTC 24 53153533031 ps
T350 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/2.uart_rx_start_bit_filter.1515934907 Sep 18 06:15:50 PM UTC 24 Sep 18 06:15:58 PM UTC 24 1908969459 ps
T13 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_fifo_reset.711340190 Sep 18 06:15:04 PM UTC 24 Sep 18 06:15:59 PM UTC 24 21711270156 ps
T23 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_stress_all_with_rand_reset.1592636072 Sep 18 06:14:47 PM UTC 24 Sep 18 06:16:04 PM UTC 24 6801371016 ps
T40 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/2.uart_rx_oversample.361900817 Sep 18 06:15:42 PM UTC 24 Sep 18 06:16:04 PM UTC 24 2118359000 ps
T20 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_stress_all_with_rand_reset.219052225 Sep 18 06:15:34 PM UTC 24 Sep 18 06:16:06 PM UTC 24 10752345553 ps
T32 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/2.uart_sec_cm.4117669413 Sep 18 06:16:07 PM UTC 24 Sep 18 06:16:09 PM UTC 24 103133644 ps
T22 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_intr.1193314352 Sep 18 06:14:28 PM UTC 24 Sep 18 06:16:10 PM UTC 24 44388968322 ps
T31 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/2.uart_alert_test.596874580 Sep 18 06:16:08 PM UTC 24 Sep 18 06:16:10 PM UTC 24 30411290 ps
T41 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/2.uart_intr.4110723632 Sep 18 06:15:45 PM UTC 24 Sep 18 06:16:14 PM UTC 24 34473543350 ps
T42 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/3.uart_smoke.1060613033 Sep 18 06:16:10 PM UTC 24 Sep 18 06:16:18 PM UTC 24 931011566 ps
T25 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/2.uart_loopback.318364621 Sep 18 06:15:58 PM UTC 24 Sep 18 06:16:20 PM UTC 24 6662271987 ps
T43 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_noise_filter.4006091383 Sep 18 06:14:28 PM UTC 24 Sep 18 06:16:22 PM UTC 24 27582355532 ps
T26 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_rx_parity_err.926607408 Sep 18 06:14:37 PM UTC 24 Sep 18 06:16:22 PM UTC 24 293173836438 ps
T400 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/3.uart_rx_oversample.1956623822 Sep 18 06:16:19 PM UTC 24 Sep 18 06:16:23 PM UTC 24 1383260841 ps
T321 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/2.uart_tx_ovrd.3885895846 Sep 18 06:15:55 PM UTC 24 Sep 18 06:16:23 PM UTC 24 6353260264 ps
T17 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/2.uart_rx_parity_err.1058383679 Sep 18 06:15:54 PM UTC 24 Sep 18 06:16:25 PM UTC 24 41679253756 ps
T296 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/3.uart_rx_start_bit_filter.169738135 Sep 18 06:16:21 PM UTC 24 Sep 18 06:16:27 PM UTC 24 5161633546 ps
T298 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/3.uart_tx_ovrd.3899647392 Sep 18 06:16:22 PM UTC 24 Sep 18 06:16:27 PM UTC 24 463927844 ps
T84 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/3.uart_sec_cm.3398774604 Sep 18 06:16:27 PM UTC 24 Sep 18 06:16:29 PM UTC 24 185901950 ps
T431 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/3.uart_alert_test.473621878 Sep 18 06:16:28 PM UTC 24 Sep 18 06:16:30 PM UTC 24 13802836 ps
T18 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/2.uart_fifo_reset.2903338697 Sep 18 06:15:41 PM UTC 24 Sep 18 06:16:32 PM UTC 24 16970479173 ps
T432 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/3.uart_loopback.3400296445 Sep 18 06:16:23 PM UTC 24 Sep 18 06:16:34 PM UTC 24 3748487394 ps
T102 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_rx_parity_err.3299118603 Sep 18 06:15:24 PM UTC 24 Sep 18 06:16:36 PM UTC 24 31552973522 ps
T19 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/3.uart_rx_parity_err.1274398085 Sep 18 06:16:21 PM UTC 24 Sep 18 06:16:40 PM UTC 24 57131236678 ps
T349 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/4.uart_tx_ovrd.660959038 Sep 18 06:16:37 PM UTC 24 Sep 18 06:16:41 PM UTC 24 806460233 ps
T75 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/4.uart_rx_oversample.2080549949 Sep 18 06:16:30 PM UTC 24 Sep 18 06:16:42 PM UTC 24 4911256963 ps
T46 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_fifo_overflow.3535623767 Sep 18 06:14:26 PM UTC 24 Sep 18 06:16:42 PM UTC 24 245182593736 ps
T267 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/4.uart_rx_start_bit_filter.717451574 Sep 18 06:16:35 PM UTC 24 Sep 18 06:16:43 PM UTC 24 5323586235 ps
T433 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/4.uart_loopback.3619571139 Sep 18 06:16:41 PM UTC 24 Sep 18 06:16:46 PM UTC 24 11254473347 ps
T101 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_fifo_reset.1971767054 Sep 18 06:14:27 PM UTC 24 Sep 18 06:16:48 PM UTC 24 65012689393 ps
T47 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/4.uart_smoke.3427626075 Sep 18 06:16:28 PM UTC 24 Sep 18 06:16:48 PM UTC 24 5361050128 ps
T434 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/4.uart_alert_test.1127750304 Sep 18 06:16:47 PM UTC 24 Sep 18 06:16:49 PM UTC 24 98401230 ps
T85 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/4.uart_sec_cm.3688808593 Sep 18 06:16:47 PM UTC 24 Sep 18 06:16:49 PM UTC 24 119830080 ps
T304 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/3.uart_noise_filter.716474254 Sep 18 06:16:19 PM UTC 24 Sep 18 06:16:51 PM UTC 24 161747176198 ps
T103 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/4.uart_fifo_reset.2607564006 Sep 18 06:16:30 PM UTC 24 Sep 18 06:16:55 PM UTC 24 14566964798 ps
T48 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/2.uart_tx_rx.3462288321 Sep 18 06:15:38 PM UTC 24 Sep 18 06:16:56 PM UTC 24 46785666852 ps
T312 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/5.uart_rx_start_bit_filter.3069834037 Sep 18 06:16:53 PM UTC 24 Sep 18 06:17:00 PM UTC 24 1336349121 ps
T435 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/5.uart_rx_oversample.1542769838 Sep 18 06:16:49 PM UTC 24 Sep 18 06:17:03 PM UTC 24 5709258819 ps
T123 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/3.uart_stress_all.422891510 Sep 18 06:16:26 PM UTC 24 Sep 18 06:17:05 PM UTC 24 73326090314 ps
T49 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/2.uart_fifo_full.1657851870 Sep 18 06:15:38 PM UTC 24 Sep 18 06:17:05 PM UTC 24 152119892828 ps
T118 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/3.uart_fifo_overflow.2726822169 Sep 18 06:16:15 PM UTC 24 Sep 18 06:17:08 PM UTC 24 40662260360 ps
T436 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/5.uart_alert_test.2814872995 Sep 18 06:17:06 PM UTC 24 Sep 18 06:17:08 PM UTC 24 64891198 ps
T352 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/6.uart_smoke.1147250067 Sep 18 06:17:06 PM UTC 24 Sep 18 06:17:09 PM UTC 24 269463478 ps
T310 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/4.uart_noise_filter.4016611437 Sep 18 06:16:32 PM UTC 24 Sep 18 06:17:10 PM UTC 24 67446885783 ps
T50 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/5.uart_tx_ovrd.2178673062 Sep 18 06:16:55 PM UTC 24 Sep 18 06:17:10 PM UTC 24 8606482408 ps
T437 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/6.uart_rx_oversample.1453920849 Sep 18 06:17:11 PM UTC 24 Sep 18 06:17:15 PM UTC 24 1181305779 ps
T27 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/3.uart_stress_all_with_rand_reset.317140054 Sep 18 06:16:24 PM UTC 24 Sep 18 06:17:15 PM UTC 24 4923214496 ps
T93 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/5.uart_loopback.2330631865 Sep 18 06:16:56 PM UTC 24 Sep 18 06:17:18 PM UTC 24 11271090561 ps
T94 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/5.uart_rx_parity_err.830538058 Sep 18 06:16:54 PM UTC 24 Sep 18 06:17:19 PM UTC 24 28628874183 ps
T95 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/4.uart_fifo_overflow.2064897125 Sep 18 06:16:30 PM UTC 24 Sep 18 06:17:21 PM UTC 24 302293456192 ps
T96 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/5.uart_smoke.1129008957 Sep 18 06:16:47 PM UTC 24 Sep 18 06:17:22 PM UTC 24 5904949964 ps
T97 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/6.uart_rx_start_bit_filter.107300910 Sep 18 06:17:16 PM UTC 24 Sep 18 06:17:23 PM UTC 24 6150335611 ps
T98 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/2.uart_noise_filter.1884333171 Sep 18 06:15:46 PM UTC 24 Sep 18 06:17:24 PM UTC 24 47245056438 ps
T99 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/5.uart_fifo_reset.1410110923 Sep 18 06:16:49 PM UTC 24 Sep 18 06:17:24 PM UTC 24 17670239325 ps
T51 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/6.uart_tx_ovrd.2778611713 Sep 18 06:17:20 PM UTC 24 Sep 18 06:17:25 PM UTC 24 1386964599 ps
T100 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/4.uart_intr.1189807040 Sep 18 06:16:32 PM UTC 24 Sep 18 06:17:26 PM UTC 24 44848880379 ps
T120 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/4.uart_fifo_full.3563783497 Sep 18 06:16:29 PM UTC 24 Sep 18 06:17:27 PM UTC 24 29500809275 ps
T438 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/6.uart_alert_test.199935479 Sep 18 06:17:26 PM UTC 24 Sep 18 06:17:27 PM UTC 24 30948342 ps
T33 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/4.uart_stress_all_with_rand_reset.2091334748 Sep 18 06:16:47 PM UTC 24 Sep 18 06:17:28 PM UTC 24 10809286338 ps
T401 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/6.uart_loopback.2652163759 Sep 18 06:17:21 PM UTC 24 Sep 18 06:17:29 PM UTC 24 9209986873 ps
T268 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/7.uart_smoke.3247516157 Sep 18 06:17:28 PM UTC 24 Sep 18 06:17:32 PM UTC 24 845443505 ps
T439 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/7.uart_rx_oversample.1325270574 Sep 18 06:17:30 PM UTC 24 Sep 18 06:17:33 PM UTC 24 1905726500 ps
T295 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/6.uart_tx_rx.1144911216 Sep 18 06:17:08 PM UTC 24 Sep 18 06:17:34 PM UTC 24 20307863225 ps
T318 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/6.uart_fifo_reset.1460990605 Sep 18 06:17:10 PM UTC 24 Sep 18 06:17:34 PM UTC 24 128320572392 ps
T34 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/5.uart_stress_all_with_rand_reset.4213548695 Sep 18 06:17:04 PM UTC 24 Sep 18 06:17:37 PM UTC 24 31316690114 ps
T282 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/4.uart_rx_parity_err.537791000 Sep 18 06:16:35 PM UTC 24 Sep 18 06:17:37 PM UTC 24 28533816335 ps
T320 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/7.uart_tx_ovrd.1525506433 Sep 18 06:17:35 PM UTC 24 Sep 18 06:17:39 PM UTC 24 805790725 ps
T271 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/2.uart_long_xfer_wo_dly.2073885118 Sep 18 06:16:00 PM UTC 24 Sep 18 06:17:40 PM UTC 24 96250137266 ps
T305 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/2.uart_fifo_overflow.3508094004 Sep 18 06:15:39 PM UTC 24 Sep 18 06:17:41 PM UTC 24 197847956521 ps
T280 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/3.uart_fifo_full.2236076977 Sep 18 06:16:12 PM UTC 24 Sep 18 06:17:44 PM UTC 24 51272108386 ps
T440 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/7.uart_alert_test.3929223925 Sep 18 06:17:45 PM UTC 24 Sep 18 06:17:47 PM UTC 24 13630870 ps
T35 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/2.uart_stress_all_with_rand_reset.3078696867 Sep 18 06:16:04 PM UTC 24 Sep 18 06:17:50 PM UTC 24 22126361015 ps
T124 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_fifo_overflow.4278553535 Sep 18 06:15:04 PM UTC 24 Sep 18 06:17:53 PM UTC 24 75883491825 ps
T353 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_smoke.4078516036 Sep 18 06:17:48 PM UTC 24 Sep 18 06:17:55 PM UTC 24 670870142 ps
T332 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/7.uart_rx_start_bit_filter.104106676 Sep 18 06:17:35 PM UTC 24 Sep 18 06:17:56 PM UTC 24 5102249784 ps
T104 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/6.uart_fifo_overflow.4022265437 Sep 18 06:17:10 PM UTC 24 Sep 18 06:17:58 PM UTC 24 73538174661 ps
T36 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/6.uart_stress_all_with_rand_reset.1649392559 Sep 18 06:17:24 PM UTC 24 Sep 18 06:17:59 PM UTC 24 3418146404 ps
T269 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/5.uart_stress_all.3572553941 Sep 18 06:17:05 PM UTC 24 Sep 18 06:18:02 PM UTC 24 29296961787 ps
T121 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/7.uart_fifo_reset.2497164783 Sep 18 06:17:29 PM UTC 24 Sep 18 06:18:07 PM UTC 24 14695747083 ps
T140 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/7.uart_rx_parity_err.1939472800 Sep 18 06:17:35 PM UTC 24 Sep 18 06:18:07 PM UTC 24 279585922008 ps
T125 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/7.uart_fifo_overflow.268755490 Sep 18 06:17:28 PM UTC 24 Sep 18 06:18:11 PM UTC 24 55451701712 ps
T270 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/5.uart_noise_filter.2887908352 Sep 18 06:16:51 PM UTC 24 Sep 18 06:18:12 PM UTC 24 313835041583 ps
T361 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_tx_ovrd.63615975 Sep 18 06:18:09 PM UTC 24 Sep 18 06:18:12 PM UTC 24 325786910 ps
T403 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/7.uart_loopback.407543797 Sep 18 06:17:37 PM UTC 24 Sep 18 06:18:16 PM UTC 24 15936014988 ps
T24 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_intr.561601711 Sep 18 06:17:56 PM UTC 24 Sep 18 06:18:17 PM UTC 24 44981703164 ps
T399 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_rx_oversample.1215734301 Sep 18 06:17:56 PM UTC 24 Sep 18 06:18:18 PM UTC 24 4601538398 ps
T441 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_alert_test.1286147210 Sep 18 06:18:18 PM UTC 24 Sep 18 06:18:20 PM UTC 24 37999093 ps
T347 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_smoke.527247030 Sep 18 06:18:19 PM UTC 24 Sep 18 06:18:22 PM UTC 24 676377319 ps
T359 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_rx_start_bit_filter.4009135639 Sep 18 06:18:00 PM UTC 24 Sep 18 06:18:24 PM UTC 24 39923244084 ps
T122 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/6.uart_fifo_full.3887178484 Sep 18 06:17:09 PM UTC 24 Sep 18 06:18:24 PM UTC 24 117020743503 ps
T442 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_loopback.313682256 Sep 18 06:18:09 PM UTC 24 Sep 18 06:18:26 PM UTC 24 6332194493 ps
T261 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/5.uart_tx_rx.3197375869 Sep 18 06:16:47 PM UTC 24 Sep 18 06:18:36 PM UTC 24 55104993074 ps
T283 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/3.uart_tx_rx.574352719 Sep 18 06:16:11 PM UTC 24 Sep 18 06:18:38 PM UTC 24 48295180848 ps
T264 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_rx_start_bit_filter.1857846212 Sep 18 06:18:37 PM UTC 24 Sep 18 06:18:40 PM UTC 24 1227407824 ps
T119 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_stress_all.1529261129 Sep 18 06:14:48 PM UTC 24 Sep 18 06:18:41 PM UTC 24 63424161294 ps
T300 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_perf.3182962865 Sep 18 06:15:31 PM UTC 24 Sep 18 06:18:44 PM UTC 24 13132993095 ps
T311 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_tx_ovrd.1153271061 Sep 18 06:18:41 PM UTC 24 Sep 18 06:18:47 PM UTC 24 742139175 ps
T256 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_tx_rx.2139983093 Sep 18 06:17:50 PM UTC 24 Sep 18 06:18:50 PM UTC 24 76459819772 ps
T76 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_intr.525440372 Sep 18 06:18:28 PM UTC 24 Sep 18 06:18:50 PM UTC 24 29295608109 ps
T276 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/6.uart_long_xfer_wo_dly.346111915 Sep 18 06:17:24 PM UTC 24 Sep 18 06:18:51 PM UTC 24 31929970966 ps
T443 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_alert_test.2956939008 Sep 18 06:18:52 PM UTC 24 Sep 18 06:18:53 PM UTC 24 42277333 ps
T334 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/10.uart_smoke.2390187329 Sep 18 06:18:55 PM UTC 24 Sep 18 06:18:57 PM UTC 24 273459677 ps
T37 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_stress_all_with_rand_reset.3742711648 Sep 18 06:18:13 PM UTC 24 Sep 18 06:18:59 PM UTC 24 48533234385 ps
T277 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_noise_filter.2995090641 Sep 18 06:18:31 PM UTC 24 Sep 18 06:19:01 PM UTC 24 27138831500 ps
T444 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_loopback.4196507628 Sep 18 06:18:42 PM UTC 24 Sep 18 06:19:02 PM UTC 24 7432674628 ps
T445 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_rx_oversample.1825182345 Sep 18 06:18:27 PM UTC 24 Sep 18 06:19:03 PM UTC 24 4437216424 ps
T77 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/7.uart_intr.334059391 Sep 18 06:17:33 PM UTC 24 Sep 18 06:19:07 PM UTC 24 56002525437 ps
T272 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/3.uart_long_xfer_wo_dly.3398998043 Sep 18 06:16:23 PM UTC 24 Sep 18 06:19:07 PM UTC 24 66285698685 ps
T289 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/7.uart_fifo_full.1584747991 Sep 18 06:17:28 PM UTC 24 Sep 18 06:19:07 PM UTC 24 96632953835 ps
T446 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/10.uart_rx_oversample.182184201 Sep 18 06:19:04 PM UTC 24 Sep 18 06:19:13 PM UTC 24 5693706845 ps
T127 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/1.uart_stress_all.1910485464 Sep 18 06:15:35 PM UTC 24 Sep 18 06:19:14 PM UTC 24 618835458338 ps
T293 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/7.uart_tx_rx.1821398399 Sep 18 06:17:28 PM UTC 24 Sep 18 06:19:15 PM UTC 24 66465911001 ps
T344 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/10.uart_tx_ovrd.2391086896 Sep 18 06:19:15 PM UTC 24 Sep 18 06:19:18 PM UTC 24 1500532938 ps
T273 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/10.uart_rx_start_bit_filter.2815635247 Sep 18 06:19:08 PM UTC 24 Sep 18 06:19:19 PM UTC 24 37010479913 ps
T105 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_fifo_overflow.447145361 Sep 18 06:18:24 PM UTC 24 Sep 18 06:19:19 PM UTC 24 57030893264 ps
T126 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_rx_parity_err.1186391174 Sep 18 06:18:39 PM UTC 24 Sep 18 06:19:20 PM UTC 24 37586196245 ps
T447 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/10.uart_alert_test.2087885035 Sep 18 06:19:21 PM UTC 24 Sep 18 06:19:23 PM UTC 24 15406782 ps
T255 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/6.uart_intr.1417111379 Sep 18 06:17:11 PM UTC 24 Sep 18 06:19:24 PM UTC 24 46210321239 ps
T297 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/10.uart_fifo_full.4180907611 Sep 18 06:18:59 PM UTC 24 Sep 18 06:19:25 PM UTC 24 19940167001 ps
T281 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/11.uart_smoke.2686676502 Sep 18 06:19:24 PM UTC 24 Sep 18 06:19:27 PM UTC 24 730012704 ps
T448 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/10.uart_loopback.3666809240 Sep 18 06:19:17 PM UTC 24 Sep 18 06:19:28 PM UTC 24 7222276638 ps
T128 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_fifo_reset.2126068629 Sep 18 06:18:26 PM UTC 24 Sep 18 06:19:30 PM UTC 24 26961388328 ps
T278 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_fifo_full.613939008 Sep 18 06:17:51 PM UTC 24 Sep 18 06:19:30 PM UTC 24 33139297462 ps
T262 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/6.uart_perf.472208475 Sep 18 06:17:23 PM UTC 24 Sep 18 06:19:32 PM UTC 24 13775049370 ps
T398 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/10.uart_noise_filter.2688333868 Sep 18 06:19:07 PM UTC 24 Sep 18 06:19:33 PM UTC 24 27857707643 ps
T38 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/7.uart_stress_all_with_rand_reset.2485585939 Sep 18 06:17:41 PM UTC 24 Sep 18 06:19:35 PM UTC 24 24177582247 ps
T449 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/11.uart_rx_oversample.1129046682 Sep 18 06:19:30 PM UTC 24 Sep 18 06:19:35 PM UTC 24 3118581198 ps
T263 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/4.uart_tx_rx.599031875 Sep 18 06:16:28 PM UTC 24 Sep 18 06:19:38 PM UTC 24 94862518045 ps
T257 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/7.uart_noise_filter.2034983271 Sep 18 06:17:34 PM UTC 24 Sep 18 06:19:41 PM UTC 24 49279271789 ps
T329 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/10.uart_tx_rx.2009581643 Sep 18 06:18:58 PM UTC 24 Sep 18 06:19:42 PM UTC 24 66482637166 ps
T387 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/11.uart_rx_start_bit_filter.341502675 Sep 18 06:19:35 PM UTC 24 Sep 18 06:19:43 PM UTC 24 3606950605 ps
T450 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/11.uart_loopback.2671432643 Sep 18 06:19:39 PM UTC 24 Sep 18 06:19:43 PM UTC 24 1478362126 ps
T275 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/11.uart_tx_ovrd.3434556181 Sep 18 06:19:36 PM UTC 24 Sep 18 06:19:43 PM UTC 24 935121273 ps
T451 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/11.uart_alert_test.3792726137 Sep 18 06:19:44 PM UTC 24 Sep 18 06:19:47 PM UTC 24 28612771 ps
T265 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/6.uart_rx_parity_err.4091967506 Sep 18 06:17:19 PM UTC 24 Sep 18 06:19:49 PM UTC 24 46382157009 ps
T279 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/0.uart_long_xfer_wo_dly.2875076143 Sep 18 06:14:47 PM UTC 24 Sep 18 06:19:50 PM UTC 24 160718061208 ps
T284 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/10.uart_fifo_reset.1885752139 Sep 18 06:19:02 PM UTC 24 Sep 18 06:19:50 PM UTC 24 40553779620 ps
T319 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/12.uart_smoke.1530054898 Sep 18 06:19:47 PM UTC 24 Sep 18 06:19:51 PM UTC 24 451894143 ps
T258 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_fifo_full.3008246922 Sep 18 06:18:22 PM UTC 24 Sep 18 06:20:34 PM UTC 24 201555752569 ps
T301 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/11.uart_fifo_reset.831072784 Sep 18 06:19:28 PM UTC 24 Sep 18 06:19:53 PM UTC 24 40952564336 ps
T129 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_rx_parity_err.2651035080 Sep 18 06:18:03 PM UTC 24 Sep 18 06:19:55 PM UTC 24 51703701108 ps
T73 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/6.uart_stress_all.3328967035 Sep 18 06:17:26 PM UTC 24 Sep 18 06:20:00 PM UTC 24 129153632096 ps
T266 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_fifo_overflow.789864680 Sep 18 06:17:54 PM UTC 24 Sep 18 06:20:00 PM UTC 24 195492161496 ps
T306 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/11.uart_tx_rx.444548689 Sep 18 06:19:25 PM UTC 24 Sep 18 06:20:01 PM UTC 24 14339442563 ps
T39 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/11.uart_stress_all_with_rand_reset.358319478 Sep 18 06:19:44 PM UTC 24 Sep 18 06:20:02 PM UTC 24 13756867020 ps
T452 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/12.uart_rx_oversample.3845052525 Sep 18 06:19:54 PM UTC 24 Sep 18 06:20:04 PM UTC 24 3268937021 ps
T290 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/11.uart_fifo_full.721232230 Sep 18 06:19:26 PM UTC 24 Sep 18 06:20:06 PM UTC 24 42983260692 ps
T390 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/3.uart_intr.508175843 Sep 18 06:16:19 PM UTC 24 Sep 18 06:20:11 PM UTC 24 174935099586 ps
T74 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/10.uart_stress_all_with_rand_reset.1169037730 Sep 18 06:19:20 PM UTC 24 Sep 18 06:20:13 PM UTC 24 12725269419 ps
T330 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/8.uart_fifo_reset.314354491 Sep 18 06:17:55 PM UTC 24 Sep 18 06:20:15 PM UTC 24 88595950939 ps
T135 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/10.uart_fifo_overflow.1869255297 Sep 18 06:19:02 PM UTC 24 Sep 18 06:20:21 PM UTC 24 65491963636 ps
T385 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/12.uart_tx_ovrd.2192670599 Sep 18 06:20:02 PM UTC 24 Sep 18 06:20:24 PM UTC 24 6406889175 ps
T453 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/12.uart_alert_test.4165996438 Sep 18 06:20:22 PM UTC 24 Sep 18 06:20:24 PM UTC 24 41527955 ps
T381 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/13.uart_smoke.3236778503 Sep 18 06:20:23 PM UTC 24 Sep 18 06:20:26 PM UTC 24 804312472 ps
T327 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/5.uart_fifo_overflow.877977346 Sep 18 06:16:48 PM UTC 24 Sep 18 06:20:28 PM UTC 24 98625191582 ps
T317 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/12.uart_tx_rx.1225026949 Sep 18 06:19:49 PM UTC 24 Sep 18 06:20:29 PM UTC 24 92453348871 ps
T133 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/3.uart_fifo_reset.2713669102 Sep 18 06:16:18 PM UTC 24 Sep 18 06:20:29 PM UTC 24 106226825930 ps
T454 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/12.uart_intr.1921559131 Sep 18 06:19:56 PM UTC 24 Sep 18 06:20:30 PM UTC 24 18003483178 ps
T455 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/12.uart_loopback.1533097567 Sep 18 06:20:05 PM UTC 24 Sep 18 06:20:31 PM UTC 24 9927036937 ps
T157 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/5.uart_fifo_full.3901724065 Sep 18 06:16:48 PM UTC 24 Sep 18 06:20:33 PM UTC 24 109309756629 ps
T456 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/13.uart_rx_start_bit_filter.1801828286 Sep 18 06:20:30 PM UTC 24 Sep 18 06:20:33 PM UTC 24 1928041362 ps
T328 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_tx_rx.2294235661 Sep 18 06:18:20 PM UTC 24 Sep 18 06:20:35 PM UTC 24 59459712377 ps
T457 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/13.uart_tx_ovrd.2099231048 Sep 18 06:20:34 PM UTC 24 Sep 18 06:20:40 PM UTC 24 778517698 ps
T379 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/12.uart_rx_start_bit_filter.835168639 Sep 18 06:20:01 PM UTC 24 Sep 18 06:20:40 PM UTC 24 40580919048 ps
T402 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/13.uart_loopback.1139644714 Sep 18 06:20:34 PM UTC 24 Sep 18 06:20:41 PM UTC 24 2738531133 ps
T106 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/11.uart_intr.697039976 Sep 18 06:19:32 PM UTC 24 Sep 18 06:20:42 PM UTC 24 344237385756 ps
T458 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/13.uart_alert_test.711830153 Sep 18 06:20:42 PM UTC 24 Sep 18 06:20:43 PM UTC 24 14319165 ps
T459 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/13.uart_rx_oversample.2226650942 Sep 18 06:20:29 PM UTC 24 Sep 18 06:20:45 PM UTC 24 6449074283 ps
T460 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/14.uart_smoke.3472617607 Sep 18 06:20:44 PM UTC 24 Sep 18 06:20:46 PM UTC 24 275116019 ps
T170 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/4.uart_stress_all.4087343083 Sep 18 06:16:47 PM UTC 24 Sep 18 06:20:52 PM UTC 24 310994045532 ps
T130 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/13.uart_rx_parity_err.3590295141 Sep 18 06:20:31 PM UTC 24 Sep 18 06:21:00 PM UTC 24 18115191848 ps
T141 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_stress_all.4008828830 Sep 18 06:18:51 PM UTC 24 Sep 18 06:21:01 PM UTC 24 180697239881 ps
T259 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/11.uart_noise_filter.1865813420 Sep 18 06:19:34 PM UTC 24 Sep 18 06:21:04 PM UTC 24 165398757305 ps
T260 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/6.uart_noise_filter.2248031073 Sep 18 06:17:16 PM UTC 24 Sep 18 06:21:06 PM UTC 24 83033471720 ps
T109 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/12.uart_stress_all_with_rand_reset.3256827812 Sep 18 06:20:22 PM UTC 24 Sep 18 06:21:08 PM UTC 24 19541615917 ps
T86 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/13.uart_stress_all_with_rand_reset.192886133 Sep 18 06:20:41 PM UTC 24 Sep 18 06:21:09 PM UTC 24 1731680958 ps
T461 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/14.uart_tx_ovrd.1119218387 Sep 18 06:21:10 PM UTC 24 Sep 18 06:21:14 PM UTC 24 2129208292 ps
T462 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/14.uart_rx_oversample.1552954186 Sep 18 06:21:01 PM UTC 24 Sep 18 06:21:15 PM UTC 24 6194791157 ps
T463 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/14.uart_loopback.762140551 Sep 18 06:21:15 PM UTC 24 Sep 18 06:21:17 PM UTC 24 399117605 ps
T324 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/9.uart_stress_all_with_rand_reset.3809156288 Sep 18 06:18:51 PM UTC 24 Sep 18 06:21:18 PM UTC 24 29089723174 ps
T134 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/10.uart_rx_parity_err.453395409 Sep 18 06:19:13 PM UTC 24 Sep 18 06:21:18 PM UTC 24 132345766843 ps
T337 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/13.uart_tx_rx.291214750 Sep 18 06:20:23 PM UTC 24 Sep 18 06:21:20 PM UTC 24 28567501186 ps
T464 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/14.uart_alert_test.2537549493 Sep 18 06:21:21 PM UTC 24 Sep 18 06:21:23 PM UTC 24 40320921 ps
T299 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/12.uart_fifo_overflow.3088430087 Sep 18 06:19:51 PM UTC 24 Sep 18 06:21:24 PM UTC 24 54343517620 ps
T302 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/13.uart_noise_filter.3812114198 Sep 18 06:20:30 PM UTC 24 Sep 18 06:21:25 PM UTC 24 64942480450 ps
T355 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/13.uart_intr.4141697803 Sep 18 06:20:30 PM UTC 24 Sep 18 06:21:26 PM UTC 24 36678604026 ps
T366 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/15.uart_smoke.1196007052 Sep 18 06:21:24 PM UTC 24 Sep 18 06:21:26 PM UTC 24 109186636 ps
T331 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/12.uart_noise_filter.3512223214 Sep 18 06:20:01 PM UTC 24 Sep 18 06:21:27 PM UTC 24 125498086056 ps
T465 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/15.uart_rx_oversample.2598949333 Sep 18 06:21:28 PM UTC 24 Sep 18 06:21:32 PM UTC 24 1391858136 ps
T357 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/12.uart_rx_parity_err.465483990 Sep 18 06:20:02 PM UTC 24 Sep 18 06:21:32 PM UTC 24 38950818507 ps
T397 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/13.uart_fifo_overflow.2204377730 Sep 18 06:20:25 PM UTC 24 Sep 18 06:21:41 PM UTC 24 139430071636 ps
T107 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/14.uart_intr.1952829797 Sep 18 06:21:02 PM UTC 24 Sep 18 06:21:44 PM UTC 24 61673185927 ps
T303 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/15.uart_rx_start_bit_filter.758948855 Sep 18 06:21:42 PM UTC 24 Sep 18 06:21:45 PM UTC 24 517202459 ps
T285 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/7.uart_perf.3026096157 Sep 18 06:17:37 PM UTC 24 Sep 18 06:21:48 PM UTC 24 16838916621 ps
T152 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/7.uart_stress_all.312083275 Sep 18 06:17:42 PM UTC 24 Sep 18 06:21:50 PM UTC 24 100345231750 ps
T466 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/15.uart_tx_ovrd.2364704991 Sep 18 06:21:47 PM UTC 24 Sep 18 06:21:51 PM UTC 24 3551826829 ps
T292 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/14.uart_fifo_overflow.805570866 Sep 18 06:20:47 PM UTC 24 Sep 18 06:21:58 PM UTC 24 203368074698 ps
T348 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/4.uart_long_xfer_wo_dly.649853185 Sep 18 06:16:47 PM UTC 24 Sep 18 06:21:58 PM UTC 24 99473345455 ps
T139 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/15.uart_fifo_reset.3040462945 Sep 18 06:21:27 PM UTC 24 Sep 18 06:22:01 PM UTC 24 31086159940 ps
T351 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/14.uart_noise_filter.2287958967 Sep 18 06:21:04 PM UTC 24 Sep 18 06:22:02 PM UTC 24 125044732201 ps
T467 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/15.uart_alert_test.3972877420 Sep 18 06:22:01 PM UTC 24 Sep 18 06:22:03 PM UTC 24 39810745 ps
T391 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/16.uart_smoke.2260222077 Sep 18 06:22:03 PM UTC 24 Sep 18 06:22:06 PM UTC 24 739594706 ps
T142 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/13.uart_fifo_reset.1810905461 Sep 18 06:20:27 PM UTC 24 Sep 18 06:22:08 PM UTC 24 123576517387 ps
T87 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/14.uart_stress_all_with_rand_reset.1852502725 Sep 18 06:21:19 PM UTC 24 Sep 18 06:22:08 PM UTC 24 2587750519 ps
T382 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/16.uart_tx_rx.3684499168 Sep 18 06:22:04 PM UTC 24 Sep 18 06:22:09 PM UTC 24 2449750916 ps
T468 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/15.uart_loopback.3126154700 Sep 18 06:21:49 PM UTC 24 Sep 18 06:22:10 PM UTC 24 8775610964 ps
T340 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/15.uart_tx_rx.3096377478 Sep 18 06:21:25 PM UTC 24 Sep 18 06:22:17 PM UTC 24 23738132346 ps
T369 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/14.uart_tx_rx.1105040211 Sep 18 06:20:44 PM UTC 24 Sep 18 06:22:24 PM UTC 24 66030397743 ps
T313 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/13.uart_fifo_full.76362230 Sep 18 06:20:25 PM UTC 24 Sep 18 06:22:25 PM UTC 24 93414301030 ps
T395 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/15.uart_noise_filter.1875338765 Sep 18 06:21:34 PM UTC 24 Sep 18 06:22:28 PM UTC 24 71432097278 ps
T294 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/2.uart_perf.3947091115 Sep 18 06:15:59 PM UTC 24 Sep 18 06:22:28 PM UTC 24 6757908793 ps
T372 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/16.uart_tx_ovrd.2061531721 Sep 18 06:22:28 PM UTC 24 Sep 18 06:22:31 PM UTC 24 628877231 ps
T315 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/5.uart_perf.378027832 Sep 18 06:16:57 PM UTC 24 Sep 18 06:22:32 PM UTC 24 6023016326 ps
T469 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/16.uart_rx_start_bit_filter.857867869 Sep 18 06:22:25 PM UTC 24 Sep 18 06:22:32 PM UTC 24 1833067049 ps
T470 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/16.uart_loopback.470626441 Sep 18 06:22:28 PM UTC 24 Sep 18 06:22:33 PM UTC 24 1329585201 ps
T286 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/15.uart_fifo_full.3172321467 Sep 18 06:21:25 PM UTC 24 Sep 18 06:22:34 PM UTC 24 28579672552 ps
T158 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/12.uart_fifo_reset.3705623570 Sep 18 06:19:52 PM UTC 24 Sep 18 06:22:35 PM UTC 24 95886736861 ps
T131 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/16.uart_fifo_full.3621388392 Sep 18 06:22:07 PM UTC 24 Sep 18 06:22:35 PM UTC 24 92168861937 ps
T471 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/16.uart_alert_test.4190935021 Sep 18 06:22:35 PM UTC 24 Sep 18 06:22:36 PM UTC 24 38904692 ps
T394 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/17.uart_smoke.1919974489 Sep 18 06:22:36 PM UTC 24 Sep 18 06:22:38 PM UTC 24 306348465 ps
T370 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/16.uart_fifo_reset.2115492609 Sep 18 06:22:10 PM UTC 24 Sep 18 06:22:39 PM UTC 24 20453162778 ps
T335 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/15.uart_rx_parity_err.408931713 Sep 18 06:21:45 PM UTC 24 Sep 18 06:22:41 PM UTC 24 23026647638 ps
T154 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/11.uart_rx_parity_err.4224213963 Sep 18 06:19:36 PM UTC 24 Sep 18 06:22:43 PM UTC 24 82779592902 ps
T354 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/11.uart_long_xfer_wo_dly.2276205482 Sep 18 06:19:42 PM UTC 24 Sep 18 06:22:43 PM UTC 24 188762153725 ps
T472 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/16.uart_intr.1268358211 Sep 18 06:22:11 PM UTC 24 Sep 18 06:22:46 PM UTC 24 46397792832 ps
T363 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/17.uart_rx_start_bit_filter.3108457973 Sep 18 06:22:46 PM UTC 24 Sep 18 06:22:50 PM UTC 24 3114048942 ps
T108 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/15.uart_intr.1545624034 Sep 18 06:21:32 PM UTC 24 Sep 18 06:22:54 PM UTC 24 184316490947 ps
T473 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/17.uart_rx_oversample.3814336584 Sep 18 06:22:42 PM UTC 24 Sep 18 06:22:55 PM UTC 24 2434661292 ps
T383 /workspaces/repo/scratch/os_regression_2024_09_17/uart-sim-vcs/coverage/default/10.uart_intr.791935118 Sep 18 06:19:07 PM UTC 24 Sep 18 06:22:55 PM UTC 24 67066623684 ps
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