T864 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/44.uart_tx_rx.2469202769 |
|
|
Oct 02 07:29:45 PM UTC 24 |
Oct 02 07:32:38 PM UTC 24 |
93172756761 ps |
T865 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/47.uart_alert_test.1547088852 |
|
|
Oct 02 07:32:39 PM UTC 24 |
Oct 02 07:32:41 PM UTC 24 |
13554285 ps |
T866 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/47.uart_loopback.810842068 |
|
|
Oct 02 07:32:35 PM UTC 24 |
Oct 02 07:32:42 PM UTC 24 |
2246323958 ps |
T867 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/48.uart_smoke.3696547800 |
|
|
Oct 02 07:32:42 PM UTC 24 |
Oct 02 07:32:45 PM UTC 24 |
267431635 ps |
T868 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/46.uart_rx_parity_err.2285772600 |
|
|
Oct 02 07:31:50 PM UTC 24 |
Oct 02 07:32:46 PM UTC 24 |
16287510344 ps |
T141 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/43.uart_rx_parity_err.3080340618 |
|
|
Oct 02 07:29:09 PM UTC 24 |
Oct 02 07:32:50 PM UTC 24 |
108745848839 ps |
T869 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/35.uart_stress_all.1433382206 |
|
|
Oct 02 07:24:39 PM UTC 24 |
Oct 02 07:32:55 PM UTC 24 |
619393034688 ps |
T870 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/42.uart_fifo_overflow.559862439 |
|
|
Oct 02 07:28:33 PM UTC 24 |
Oct 02 07:32:55 PM UTC 24 |
111966350856 ps |
T871 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/43.uart_long_xfer_wo_dly.4154846421 |
|
|
Oct 02 07:29:34 PM UTC 24 |
Oct 02 07:32:56 PM UTC 24 |
37386895626 ps |
T872 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/39.uart_stress_all.275373671 |
|
|
Oct 02 07:27:17 PM UTC 24 |
Oct 02 07:32:59 PM UTC 24 |
178413982364 ps |
T873 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/48.uart_intr.1387182827 |
|
|
Oct 02 07:32:56 PM UTC 24 |
Oct 02 07:33:05 PM UTC 24 |
21824170301 ps |
T874 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/41.uart_fifo_full.3032844514 |
|
|
Oct 02 07:28:05 PM UTC 24 |
Oct 02 07:33:05 PM UTC 24 |
122367976153 ps |
T875 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/46.uart_stress_all_with_rand_reset.3476229634 |
|
|
Oct 02 07:31:57 PM UTC 24 |
Oct 02 07:33:07 PM UTC 24 |
19251302907 ps |
T417 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/44.uart_stress_all.2174928427 |
|
|
Oct 02 07:30:26 PM UTC 24 |
Oct 02 07:33:08 PM UTC 24 |
203418967659 ps |
T876 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/47.uart_stress_all_with_rand_reset.2248304442 |
|
|
Oct 02 07:32:37 PM UTC 24 |
Oct 02 07:33:09 PM UTC 24 |
5136303376 ps |
T877 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/48.uart_rx_start_bit_filter.2702705142 |
|
|
Oct 02 07:33:00 PM UTC 24 |
Oct 02 07:33:14 PM UTC 24 |
3699572847 ps |
T878 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/46.uart_intr.3967037768 |
|
|
Oct 02 07:31:44 PM UTC 24 |
Oct 02 07:33:19 PM UTC 24 |
50589301221 ps |
T879 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/41.uart_perf.1857009081 |
|
|
Oct 02 07:28:26 PM UTC 24 |
Oct 02 07:33:26 PM UTC 24 |
21827149030 ps |
T880 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/48.uart_alert_test.1694469745 |
|
|
Oct 02 07:33:27 PM UTC 24 |
Oct 02 07:33:29 PM UTC 24 |
38248338 ps |
T881 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/42.uart_perf.1422193876 |
|
|
Oct 02 07:28:43 PM UTC 24 |
Oct 02 07:33:30 PM UTC 24 |
7561603685 ps |
T882 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/40.uart_long_xfer_wo_dly.227390057 |
|
|
Oct 02 07:27:51 PM UTC 24 |
Oct 02 07:33:46 PM UTC 24 |
179332808832 ps |
T883 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/47.uart_noise_filter.460933734 |
|
|
Oct 02 07:32:26 PM UTC 24 |
Oct 02 07:33:50 PM UTC 24 |
19590405732 ps |
T884 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/48.uart_tx_ovrd.3339621383 |
|
|
Oct 02 07:33:06 PM UTC 24 |
Oct 02 07:33:53 PM UTC 24 |
6927794522 ps |
T885 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/48.uart_rx_oversample.623973710 |
|
|
Oct 02 07:32:56 PM UTC 24 |
Oct 02 07:33:53 PM UTC 24 |
6795100751 ps |
T886 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/41.uart_stress_all.2129212993 |
|
|
Oct 02 07:28:31 PM UTC 24 |
Oct 02 07:33:54 PM UTC 24 |
232223093124 ps |
T887 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/48.uart_loopback.3294204239 |
|
|
Oct 02 07:33:07 PM UTC 24 |
Oct 02 07:33:56 PM UTC 24 |
12589575462 ps |
T888 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/49.uart_smoke.3594389645 |
|
|
Oct 02 07:33:30 PM UTC 24 |
Oct 02 07:33:57 PM UTC 24 |
5394204820 ps |
T889 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/49.uart_rx_oversample.3349426827 |
|
|
Oct 02 07:33:54 PM UTC 24 |
Oct 02 07:34:02 PM UTC 24 |
1375224402 ps |
T890 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/37.uart_perf.2615185909 |
|
|
Oct 02 07:25:46 PM UTC 24 |
Oct 02 07:34:02 PM UTC 24 |
7728771312 ps |
T891 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/48.uart_fifo_reset.3272366589 |
|
|
Oct 02 07:32:51 PM UTC 24 |
Oct 02 07:34:04 PM UTC 24 |
17365132611 ps |
T892 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/49.uart_tx_ovrd.425293192 |
|
|
Oct 02 07:34:03 PM UTC 24 |
Oct 02 07:34:06 PM UTC 24 |
1482737713 ps |
T893 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/48.uart_fifo_full.3321903657 |
|
|
Oct 02 07:32:45 PM UTC 24 |
Oct 02 07:34:06 PM UTC 24 |
245790945105 ps |
T894 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/20.uart_stress_all.1621601094 |
|
|
Oct 02 07:14:23 PM UTC 24 |
Oct 02 07:34:07 PM UTC 24 |
194396898597 ps |
T895 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/48.uart_stress_all_with_rand_reset.936091312 |
|
|
Oct 02 07:33:16 PM UTC 24 |
Oct 02 07:34:08 PM UTC 24 |
5356720740 ps |
T175 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/47.uart_fifo_reset.3525095922 |
|
|
Oct 02 07:32:17 PM UTC 24 |
Oct 02 07:34:12 PM UTC 24 |
142880478052 ps |
T896 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/49.uart_rx_start_bit_filter.466285519 |
|
|
Oct 02 07:33:58 PM UTC 24 |
Oct 02 07:34:13 PM UTC 24 |
38376957878 ps |
T897 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/26.uart_perf.1533528692 |
|
|
Oct 02 07:18:01 PM UTC 24 |
Oct 02 07:34:14 PM UTC 24 |
19855773953 ps |
T898 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/33.uart_perf.3406798231 |
|
|
Oct 02 07:23:18 PM UTC 24 |
Oct 02 07:34:15 PM UTC 24 |
32104010019 ps |
T899 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/51.uart_fifo_reset.664760812 |
|
|
Oct 02 07:34:16 PM UTC 24 |
Oct 02 07:34:38 PM UTC 24 |
31831865127 ps |
T900 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/49.uart_loopback.3662161874 |
|
|
Oct 02 07:34:05 PM UTC 24 |
Oct 02 07:34:15 PM UTC 24 |
6080508587 ps |
T901 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/49.uart_alert_test.79056108 |
|
|
Oct 02 07:34:13 PM UTC 24 |
Oct 02 07:34:15 PM UTC 24 |
25993999 ps |
T902 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/49.uart_tx_rx.2410206301 |
|
|
Oct 02 07:33:31 PM UTC 24 |
Oct 02 07:34:15 PM UTC 24 |
15292789980 ps |
T903 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/49.uart_intr.1904076923 |
|
|
Oct 02 07:33:54 PM UTC 24 |
Oct 02 07:34:22 PM UTC 24 |
48866187431 ps |
T904 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/45.uart_intr.1905337110 |
|
|
Oct 02 07:30:52 PM UTC 24 |
Oct 02 07:34:23 PM UTC 24 |
65339366209 ps |
T162 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/49.uart_fifo_full.405088772 |
|
|
Oct 02 07:33:47 PM UTC 24 |
Oct 02 07:34:25 PM UTC 24 |
49790744428 ps |
T905 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/49.uart_stress_all_with_rand_reset.3381799709 |
|
|
Oct 02 07:34:08 PM UTC 24 |
Oct 02 07:34:26 PM UTC 24 |
3249437972 ps |
T906 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/48.uart_fifo_overflow.2488986976 |
|
|
Oct 02 07:32:47 PM UTC 24 |
Oct 02 07:34:29 PM UTC 24 |
92704166749 ps |
T907 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/46.uart_noise_filter.3755272229 |
|
|
Oct 02 07:31:45 PM UTC 24 |
Oct 02 07:34:40 PM UTC 24 |
105026561275 ps |
T178 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/49.uart_fifo_reset.3129221435 |
|
|
Oct 02 07:33:54 PM UTC 24 |
Oct 02 07:34:42 PM UTC 24 |
22473496449 ps |
T908 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/54.uart_fifo_reset.2689990500 |
|
|
Oct 02 07:34:26 PM UTC 24 |
Oct 02 07:34:49 PM UTC 24 |
5028486703 ps |
T909 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/56.uart_stress_all_with_rand_reset.1553199 |
|
|
Oct 02 07:34:43 PM UTC 24 |
Oct 02 07:34:55 PM UTC 24 |
4328072607 ps |
T910 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/24.uart_perf.4154763204 |
|
|
Oct 02 07:16:24 PM UTC 24 |
Oct 02 07:34:57 PM UTC 24 |
17950913645 ps |
T152 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/50.uart_fifo_reset.689451929 |
|
|
Oct 02 07:34:13 PM UTC 24 |
Oct 02 07:35:01 PM UTC 24 |
126417723319 ps |
T422 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/56.uart_fifo_reset.3881671919 |
|
|
Oct 02 07:34:41 PM UTC 24 |
Oct 02 07:35:09 PM UTC 24 |
90690294759 ps |
T911 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/50.uart_stress_all_with_rand_reset.1550963986 |
|
|
Oct 02 07:34:15 PM UTC 24 |
Oct 02 07:35:10 PM UTC 24 |
10740518363 ps |
T912 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/47.uart_fifo_full.1019432252 |
|
|
Oct 02 07:32:08 PM UTC 24 |
Oct 02 07:35:15 PM UTC 24 |
160736718815 ps |
T913 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/51.uart_stress_all_with_rand_reset.2734931479 |
|
|
Oct 02 07:34:16 PM UTC 24 |
Oct 02 07:35:16 PM UTC 24 |
2931231050 ps |
T914 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/49.uart_rx_parity_err.2092195333 |
|
|
Oct 02 07:34:03 PM UTC 24 |
Oct 02 07:35:18 PM UTC 24 |
34312512772 ps |
T915 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/54.uart_stress_all_with_rand_reset.3000971699 |
|
|
Oct 02 07:34:27 PM UTC 24 |
Oct 02 07:35:20 PM UTC 24 |
4274830600 ps |
T916 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/55.uart_stress_all_with_rand_reset.1791359661 |
|
|
Oct 02 07:34:39 PM UTC 24 |
Oct 02 07:35:22 PM UTC 24 |
2997365772 ps |
T917 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/52.uart_stress_all_with_rand_reset.1303185056 |
|
|
Oct 02 07:34:17 PM UTC 24 |
Oct 02 07:35:23 PM UTC 24 |
4039880291 ps |
T208 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/45.uart_stress_all.2933447547 |
|
|
Oct 02 07:31:23 PM UTC 24 |
Oct 02 07:35:28 PM UTC 24 |
57445948256 ps |
T918 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/57.uart_stress_all_with_rand_reset.4037061528 |
|
|
Oct 02 07:34:56 PM UTC 24 |
Oct 02 07:35:28 PM UTC 24 |
10682754057 ps |
T919 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/61.uart_fifo_reset.2861476795 |
|
|
Oct 02 07:35:19 PM UTC 24 |
Oct 02 07:35:31 PM UTC 24 |
7326758114 ps |
T920 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/60.uart_stress_all_with_rand_reset.3888381425 |
|
|
Oct 02 07:35:18 PM UTC 24 |
Oct 02 07:35:33 PM UTC 24 |
3509120668 ps |
T921 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/49.uart_fifo_overflow.3626517464 |
|
|
Oct 02 07:33:50 PM UTC 24 |
Oct 02 07:35:35 PM UTC 24 |
255623347260 ps |
T922 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/42.uart_long_xfer_wo_dly.887039237 |
|
|
Oct 02 07:28:44 PM UTC 24 |
Oct 02 07:35:39 PM UTC 24 |
139151024493 ps |
T923 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/43.uart_fifo_full.1847257373 |
|
|
Oct 02 07:28:51 PM UTC 24 |
Oct 02 07:35:42 PM UTC 24 |
186610967409 ps |
T924 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/48.uart_rx_parity_err.2957598094 |
|
|
Oct 02 07:33:05 PM UTC 24 |
Oct 02 07:35:44 PM UTC 24 |
56041750731 ps |
T925 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/58.uart_stress_all_with_rand_reset.2314704329 |
|
|
Oct 02 07:35:02 PM UTC 24 |
Oct 02 07:35:46 PM UTC 24 |
3937860647 ps |
T926 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/61.uart_stress_all_with_rand_reset.717061490 |
|
|
Oct 02 07:35:21 PM UTC 24 |
Oct 02 07:35:51 PM UTC 24 |
7237510914 ps |
T927 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/62.uart_stress_all_with_rand_reset.99332691 |
|
|
Oct 02 07:35:24 PM UTC 24 |
Oct 02 07:35:52 PM UTC 24 |
4258256380 ps |
T928 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/48.uart_tx_rx.1886080402 |
|
|
Oct 02 07:32:42 PM UTC 24 |
Oct 02 07:35:52 PM UTC 24 |
70451194214 ps |
T929 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/64.uart_stress_all_with_rand_reset.455094354 |
|
|
Oct 02 07:35:34 PM UTC 24 |
Oct 02 07:35:53 PM UTC 24 |
1047726945 ps |
T930 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/46.uart_fifo_reset.4125120466 |
|
|
Oct 02 07:31:36 PM UTC 24 |
Oct 02 07:35:57 PM UTC 24 |
85548025241 ps |
T931 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/49.uart_noise_filter.1112198156 |
|
|
Oct 02 07:33:57 PM UTC 24 |
Oct 02 07:35:58 PM UTC 24 |
64163464488 ps |
T932 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/59.uart_stress_all_with_rand_reset.3186405091 |
|
|
Oct 02 07:35:10 PM UTC 24 |
Oct 02 07:36:01 PM UTC 24 |
14436894559 ps |
T150 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/62.uart_fifo_reset.3999269713 |
|
|
Oct 02 07:35:23 PM UTC 24 |
Oct 02 07:36:06 PM UTC 24 |
121458037044 ps |
T933 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/46.uart_perf.3497726064 |
|
|
Oct 02 07:31:54 PM UTC 24 |
Oct 02 07:36:14 PM UTC 24 |
20534006277 ps |
T934 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/63.uart_stress_all_with_rand_reset.708920852 |
|
|
Oct 02 07:35:29 PM UTC 24 |
Oct 02 07:36:14 PM UTC 24 |
9034960044 ps |
T935 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/64.uart_fifo_reset.3199687405 |
|
|
Oct 02 07:35:32 PM UTC 24 |
Oct 02 07:36:18 PM UTC 24 |
39329471089 ps |
T936 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/16.uart_long_xfer_wo_dly.2874014692 |
|
|
Oct 02 07:12:31 PM UTC 24 |
Oct 02 07:36:21 PM UTC 24 |
129487445596 ps |
T242 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/63.uart_fifo_reset.1613184470 |
|
|
Oct 02 07:35:29 PM UTC 24 |
Oct 02 07:36:21 PM UTC 24 |
14937572792 ps |
T937 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/30.uart_perf.3315451592 |
|
|
Oct 02 07:20:48 PM UTC 24 |
Oct 02 07:36:27 PM UTC 24 |
15405982618 ps |
T938 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/16.uart_intr.256308357 |
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|
Oct 02 07:12:15 PM UTC 24 |
Oct 02 07:36:29 PM UTC 24 |
777551818093 ps |
T939 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/72.uart_fifo_reset.1968985757 |
|
|
Oct 02 07:36:15 PM UTC 24 |
Oct 02 07:36:31 PM UTC 24 |
30078691674 ps |
T940 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/69.uart_stress_all_with_rand_reset.83020375 |
|
|
Oct 02 07:35:57 PM UTC 24 |
Oct 02 07:36:31 PM UTC 24 |
1680463061 ps |
T941 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/45.uart_long_xfer_wo_dly.64755920 |
|
|
Oct 02 07:31:21 PM UTC 24 |
Oct 02 07:36:34 PM UTC 24 |
128858269208 ps |
T942 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/53.uart_stress_all_with_rand_reset.3086495777 |
|
|
Oct 02 07:34:23 PM UTC 24 |
Oct 02 07:36:37 PM UTC 24 |
3640534400 ps |
T943 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/66.uart_stress_all_with_rand_reset.425741744 |
|
|
Oct 02 07:35:45 PM UTC 24 |
Oct 02 07:36:38 PM UTC 24 |
3275658779 ps |
T944 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/70.uart_fifo_reset.1343624739 |
|
|
Oct 02 07:35:58 PM UTC 24 |
Oct 02 07:36:40 PM UTC 24 |
47233148689 ps |
T945 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/73.uart_stress_all_with_rand_reset.337279683 |
|
|
Oct 02 07:36:22 PM UTC 24 |
Oct 02 07:36:43 PM UTC 24 |
3834523763 ps |
T946 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/65.uart_stress_all_with_rand_reset.1358957412 |
|
|
Oct 02 07:35:40 PM UTC 24 |
Oct 02 07:36:43 PM UTC 24 |
3123942919 ps |
T947 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/70.uart_stress_all_with_rand_reset.3650316512 |
|
|
Oct 02 07:36:01 PM UTC 24 |
Oct 02 07:36:47 PM UTC 24 |
4132354698 ps |
T201 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/71.uart_fifo_reset.2018542295 |
|
|
Oct 02 07:36:07 PM UTC 24 |
Oct 02 07:36:51 PM UTC 24 |
24407927816 ps |
T188 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/67.uart_fifo_reset.1982110294 |
|
|
Oct 02 07:35:47 PM UTC 24 |
Oct 02 07:36:54 PM UTC 24 |
74222229863 ps |
T948 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/72.uart_stress_all_with_rand_reset.3108148186 |
|
|
Oct 02 07:36:19 PM UTC 24 |
Oct 02 07:36:57 PM UTC 24 |
17720518783 ps |
T949 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/31.uart_long_xfer_wo_dly.752297425 |
|
|
Oct 02 07:21:38 PM UTC 24 |
Oct 02 07:37:01 PM UTC 24 |
89890996949 ps |
T181 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/52.uart_fifo_reset.1363652056 |
|
|
Oct 02 07:34:16 PM UTC 24 |
Oct 02 07:37:05 PM UTC 24 |
51007832802 ps |
T950 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/53.uart_fifo_reset.3317557689 |
|
|
Oct 02 07:34:22 PM UTC 24 |
Oct 02 07:37:07 PM UTC 24 |
122952228878 ps |
T951 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/59.uart_fifo_reset.4094849466 |
|
|
Oct 02 07:35:10 PM UTC 24 |
Oct 02 07:37:10 PM UTC 24 |
78112401547 ps |
T952 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/81.uart_stress_all_with_rand_reset.839512104 |
|
|
Oct 02 07:37:06 PM UTC 24 |
Oct 02 07:37:11 PM UTC 24 |
256447916 ps |
T953 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/77.uart_stress_all_with_rand_reset.3245118587 |
|
|
Oct 02 07:36:41 PM UTC 24 |
Oct 02 07:37:12 PM UTC 24 |
7991133865 ps |
T954 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/84.uart_fifo_reset.2293773624 |
|
|
Oct 02 07:37:15 PM UTC 24 |
Oct 02 07:37:51 PM UTC 24 |
25259398204 ps |
T955 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/67.uart_stress_all_with_rand_reset.1252437500 |
|
|
Oct 02 07:35:52 PM UTC 24 |
Oct 02 07:37:15 PM UTC 24 |
9368394470 ps |
T956 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/69.uart_fifo_reset.3845941313 |
|
|
Oct 02 07:35:54 PM UTC 24 |
Oct 02 07:37:15 PM UTC 24 |
233849989877 ps |
T406 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/58.uart_fifo_reset.2007629678 |
|
|
Oct 02 07:34:58 PM UTC 24 |
Oct 02 07:37:18 PM UTC 24 |
38405902284 ps |
T957 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/78.uart_fifo_reset.1474450919 |
|
|
Oct 02 07:36:43 PM UTC 24 |
Oct 02 07:37:18 PM UTC 24 |
32644201207 ps |
T958 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/75.uart_stress_all_with_rand_reset.1059247977 |
|
|
Oct 02 07:36:32 PM UTC 24 |
Oct 02 07:37:18 PM UTC 24 |
2664232264 ps |
T959 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/78.uart_stress_all_with_rand_reset.2001633524 |
|
|
Oct 02 07:36:44 PM UTC 24 |
Oct 02 07:37:28 PM UTC 24 |
2936889320 ps |
T190 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/76.uart_fifo_reset.61659427 |
|
|
Oct 02 07:36:36 PM UTC 24 |
Oct 02 07:37:29 PM UTC 24 |
38454971012 ps |
T960 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/76.uart_stress_all_with_rand_reset.3594102303 |
|
|
Oct 02 07:36:38 PM UTC 24 |
Oct 02 07:37:34 PM UTC 24 |
1735531825 ps |
T961 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/74.uart_stress_all_with_rand_reset.128203254 |
|
|
Oct 02 07:36:29 PM UTC 24 |
Oct 02 07:37:37 PM UTC 24 |
4323608935 ps |
T962 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/43.uart_stress_all.3775414282 |
|
|
Oct 02 07:29:42 PM UTC 24 |
Oct 02 07:37:39 PM UTC 24 |
324021800343 ps |
T963 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/79.uart_stress_all_with_rand_reset.3778076537 |
|
|
Oct 02 07:36:52 PM UTC 24 |
Oct 02 07:37:40 PM UTC 24 |
2113757880 ps |
T191 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/66.uart_fifo_reset.2552153114 |
|
|
Oct 02 07:35:44 PM UTC 24 |
Oct 02 07:37:40 PM UTC 24 |
111004368232 ps |
T964 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/82.uart_stress_all_with_rand_reset.2476217226 |
|
|
Oct 02 07:37:11 PM UTC 24 |
Oct 02 07:37:40 PM UTC 24 |
7357686510 ps |
T965 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/46.uart_stress_all.2330478337 |
|
|
Oct 02 07:32:01 PM UTC 24 |
Oct 02 07:37:41 PM UTC 24 |
136969501032 ps |
T966 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/32.uart_stress_all.1273039635 |
|
|
Oct 02 07:22:34 PM UTC 24 |
Oct 02 07:37:44 PM UTC 24 |
222293365223 ps |
T967 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/74.uart_fifo_reset.1324877380 |
|
|
Oct 02 07:36:28 PM UTC 24 |
Oct 02 07:37:47 PM UTC 24 |
59147626383 ps |
T968 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/46.uart_long_xfer_wo_dly.3420333605 |
|
|
Oct 02 07:31:56 PM UTC 24 |
Oct 02 07:37:47 PM UTC 24 |
69895370989 ps |
T969 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/83.uart_fifo_reset.2438050338 |
|
|
Oct 02 07:37:12 PM UTC 24 |
Oct 02 07:37:47 PM UTC 24 |
95514532063 ps |
T970 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/84.uart_stress_all_with_rand_reset.1943715742 |
|
|
Oct 02 07:37:16 PM UTC 24 |
Oct 02 07:37:49 PM UTC 24 |
8488452382 ps |
T198 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/57.uart_fifo_reset.2201039071 |
|
|
Oct 02 07:34:50 PM UTC 24 |
Oct 02 07:37:54 PM UTC 24 |
78666934779 ps |
T971 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/71.uart_stress_all_with_rand_reset.3751725560 |
|
|
Oct 02 07:36:15 PM UTC 24 |
Oct 02 07:37:55 PM UTC 24 |
12180828882 ps |
T972 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/89.uart_stress_all_with_rand_reset.2748639691 |
|
|
Oct 02 07:37:41 PM UTC 24 |
Oct 02 07:38:02 PM UTC 24 |
1321985360 ps |
T973 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/48.uart_perf.2003093295 |
|
|
Oct 02 07:33:08 PM UTC 24 |
Oct 02 07:38:02 PM UTC 24 |
6286751697 ps |
T176 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/90.uart_fifo_reset.1713178037 |
|
|
Oct 02 07:37:41 PM UTC 24 |
Oct 02 07:38:06 PM UTC 24 |
136206279638 ps |
T974 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/68.uart_stress_all_with_rand_reset.3343803784 |
|
|
Oct 02 07:35:53 PM UTC 24 |
Oct 02 07:38:08 PM UTC 24 |
22504927728 ps |
T975 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/48.uart_noise_filter.1812611657 |
|
|
Oct 02 07:32:57 PM UTC 24 |
Oct 02 07:38:09 PM UTC 24 |
91475685287 ps |
T976 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/90.uart_stress_all_with_rand_reset.2681018806 |
|
|
Oct 02 07:37:42 PM UTC 24 |
Oct 02 07:38:11 PM UTC 24 |
4634487525 ps |
T216 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/86.uart_fifo_reset.2502489190 |
|
|
Oct 02 07:37:19 PM UTC 24 |
Oct 02 07:38:13 PM UTC 24 |
17526008550 ps |
T977 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/86.uart_stress_all_with_rand_reset.2653409287 |
|
|
Oct 02 07:37:30 PM UTC 24 |
Oct 02 07:38:13 PM UTC 24 |
2177650680 ps |
T978 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/47.uart_intr.4267782012 |
|
|
Oct 02 07:32:20 PM UTC 24 |
Oct 02 07:38:14 PM UTC 24 |
130959795232 ps |
T214 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/81.uart_fifo_reset.2506203259 |
|
|
Oct 02 07:37:02 PM UTC 24 |
Oct 02 07:38:15 PM UTC 24 |
112801738191 ps |
T979 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/80.uart_stress_all_with_rand_reset.2114626699 |
|
|
Oct 02 07:36:58 PM UTC 24 |
Oct 02 07:38:16 PM UTC 24 |
11427060227 ps |
T209 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/55.uart_fifo_reset.135354678 |
|
|
Oct 02 07:34:29 PM UTC 24 |
Oct 02 07:38:16 PM UTC 24 |
123804614407 ps |
T980 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/49.uart_perf.2785604619 |
|
|
Oct 02 07:34:07 PM UTC 24 |
Oct 02 07:38:16 PM UTC 24 |
12780943001 ps |
T981 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/96.uart_fifo_reset.2394828872 |
|
|
Oct 02 07:38:03 PM UTC 24 |
Oct 02 07:38:19 PM UTC 24 |
37751232890 ps |
T982 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/94.uart_stress_all_with_rand_reset.3795444436 |
|
|
Oct 02 07:37:56 PM UTC 24 |
Oct 02 07:38:20 PM UTC 24 |
1645707790 ps |
T983 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/91.uart_stress_all_with_rand_reset.539181595 |
|
|
Oct 02 07:37:47 PM UTC 24 |
Oct 02 07:38:22 PM UTC 24 |
1775353627 ps |
T984 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/92.uart_stress_all_with_rand_reset.1698101721 |
|
|
Oct 02 07:37:48 PM UTC 24 |
Oct 02 07:38:22 PM UTC 24 |
7108396803 ps |
T179 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/68.uart_fifo_reset.1623785197 |
|
|
Oct 02 07:35:53 PM UTC 24 |
Oct 02 07:38:24 PM UTC 24 |
67747485023 ps |
T985 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/95.uart_fifo_reset.2461952134 |
|
|
Oct 02 07:38:00 PM UTC 24 |
Oct 02 07:38:25 PM UTC 24 |
142744292404 ps |
T986 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/93.uart_stress_all_with_rand_reset.3506619472 |
|
|
Oct 02 07:37:52 PM UTC 24 |
Oct 02 07:38:25 PM UTC 24 |
3618124219 ps |
T987 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/88.uart_stress_all_with_rand_reset.3818857337 |
|
|
Oct 02 07:37:40 PM UTC 24 |
Oct 02 07:38:28 PM UTC 24 |
1956569465 ps |
T988 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/83.uart_stress_all_with_rand_reset.2752959548 |
|
|
Oct 02 07:37:13 PM UTC 24 |
Oct 02 07:38:31 PM UTC 24 |
11852666773 ps |
T989 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/49.uart_stress_all.14200646 |
|
|
Oct 02 07:34:08 PM UTC 24 |
Oct 02 07:38:33 PM UTC 24 |
182986740843 ps |
T147 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/102.uart_fifo_reset.4076386131 |
|
|
Oct 02 07:38:17 PM UTC 24 |
Oct 02 07:38:37 PM UTC 24 |
27081394359 ps |
T148 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/99.uart_fifo_reset.579987733 |
|
|
Oct 02 07:38:15 PM UTC 24 |
Oct 02 07:38:43 PM UTC 24 |
65892109272 ps |
T990 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/95.uart_stress_all_with_rand_reset.555857583 |
|
|
Oct 02 07:38:02 PM UTC 24 |
Oct 02 07:38:45 PM UTC 24 |
16000122971 ps |
T991 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/44.uart_long_xfer_wo_dly.2694016359 |
|
|
Oct 02 07:30:22 PM UTC 24 |
Oct 02 07:38:46 PM UTC 24 |
104028953040 ps |
T992 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/94.uart_fifo_reset.2401802794 |
|
|
Oct 02 07:37:55 PM UTC 24 |
Oct 02 07:38:46 PM UTC 24 |
37231978974 ps |
T993 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/104.uart_fifo_reset.1642165654 |
|
|
Oct 02 07:38:19 PM UTC 24 |
Oct 02 07:38:47 PM UTC 24 |
27981256405 ps |
T994 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/96.uart_stress_all_with_rand_reset.3923776397 |
|
|
Oct 02 07:38:07 PM UTC 24 |
Oct 02 07:38:47 PM UTC 24 |
3370765163 ps |
T407 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/75.uart_fifo_reset.4020803974 |
|
|
Oct 02 07:36:31 PM UTC 24 |
Oct 02 07:38:48 PM UTC 24 |
62175334909 ps |
T215 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/103.uart_fifo_reset.540782423 |
|
|
Oct 02 07:38:17 PM UTC 24 |
Oct 02 07:38:48 PM UTC 24 |
289548450272 ps |
T995 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/101.uart_fifo_reset.462106167 |
|
|
Oct 02 07:38:17 PM UTC 24 |
Oct 02 07:38:50 PM UTC 24 |
18012810112 ps |
T144 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/77.uart_fifo_reset.2940661994 |
|
|
Oct 02 07:36:39 PM UTC 24 |
Oct 02 07:38:54 PM UTC 24 |
64449515412 ps |
T996 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/109.uart_fifo_reset.1272479105 |
|
|
Oct 02 07:38:26 PM UTC 24 |
Oct 02 07:38:54 PM UTC 24 |
7770079481 ps |
T247 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/97.uart_fifo_reset.3495690131 |
|
|
Oct 02 07:38:08 PM UTC 24 |
Oct 02 07:38:55 PM UTC 24 |
48465967402 ps |
T138 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/108.uart_fifo_reset.895493505 |
|
|
Oct 02 07:38:26 PM UTC 24 |
Oct 02 07:38:55 PM UTC 24 |
17675207583 ps |
T224 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/100.uart_fifo_reset.1088672987 |
|
|
Oct 02 07:38:16 PM UTC 24 |
Oct 02 07:38:59 PM UTC 24 |
83065826276 ps |
T194 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/113.uart_fifo_reset.2109390626 |
|
|
Oct 02 07:38:33 PM UTC 24 |
Oct 02 07:39:01 PM UTC 24 |
44460884932 ps |
T997 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/65.uart_fifo_reset.863179736 |
|
|
Oct 02 07:35:36 PM UTC 24 |
Oct 02 07:39:02 PM UTC 24 |
166860824754 ps |
T998 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/98.uart_stress_all_with_rand_reset.3739646219 |
|
|
Oct 02 07:38:14 PM UTC 24 |
Oct 02 07:39:03 PM UTC 24 |
2874193378 ps |
T999 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/99.uart_stress_all_with_rand_reset.1812564004 |
|
|
Oct 02 07:38:15 PM UTC 24 |
Oct 02 07:39:06 PM UTC 24 |
6421467146 ps |
T1000 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/80.uart_fifo_reset.3503988441 |
|
|
Oct 02 07:36:55 PM UTC 24 |
Oct 02 07:39:06 PM UTC 24 |
112042734952 ps |
T195 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/114.uart_fifo_reset.3567897338 |
|
|
Oct 02 07:38:38 PM UTC 24 |
Oct 02 07:39:07 PM UTC 24 |
8754525950 ps |
T235 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/110.uart_fifo_reset.533707561 |
|
|
Oct 02 07:38:26 PM UTC 24 |
Oct 02 07:39:07 PM UTC 24 |
32897513528 ps |
T1001 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/26.uart_long_xfer_wo_dly.813412213 |
|
|
Oct 02 07:18:02 PM UTC 24 |
Oct 02 07:39:09 PM UTC 24 |
123960071481 ps |
T1002 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/107.uart_fifo_reset.1678095352 |
|
|
Oct 02 07:38:24 PM UTC 24 |
Oct 02 07:39:09 PM UTC 24 |
32443683543 ps |
T1003 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/122.uart_fifo_reset.1631940675 |
|
|
Oct 02 07:38:49 PM UTC 24 |
Oct 02 07:39:12 PM UTC 24 |
53378839658 ps |
T227 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/89.uart_fifo_reset.182601952 |
|
|
Oct 02 07:37:40 PM UTC 24 |
Oct 02 07:39:13 PM UTC 24 |
44716962442 ps |
T1004 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/125.uart_fifo_reset.3951761312 |
|
|
Oct 02 07:38:55 PM UTC 24 |
Oct 02 07:39:14 PM UTC 24 |
22647063875 ps |
T1005 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/47.uart_long_xfer_wo_dly.495333523 |
|
|
Oct 02 07:32:36 PM UTC 24 |
Oct 02 07:39:16 PM UTC 24 |
216254337214 ps |
T192 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/82.uart_fifo_reset.1350800244 |
|
|
Oct 02 07:37:08 PM UTC 24 |
Oct 02 07:39:18 PM UTC 24 |
239287953066 ps |
T1006 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/111.uart_fifo_reset.3378068152 |
|
|
Oct 02 07:38:29 PM UTC 24 |
Oct 02 07:39:19 PM UTC 24 |
23685335846 ps |
T1007 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/132.uart_fifo_reset.2639368572 |
|
|
Oct 02 07:39:07 PM UTC 24 |
Oct 02 07:39:25 PM UTC 24 |
71808450475 ps |
T1008 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/87.uart_stress_all_with_rand_reset.4167686995 |
|
|
Oct 02 07:37:35 PM UTC 24 |
Oct 02 07:39:25 PM UTC 24 |
24712711399 ps |
T1009 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/123.uart_fifo_reset.3947045025 |
|
|
Oct 02 07:38:51 PM UTC 24 |
Oct 02 07:39:27 PM UTC 24 |
26590516292 ps |
T1010 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/41.uart_long_xfer_wo_dly.1367552120 |
|
|
Oct 02 07:28:26 PM UTC 24 |
Oct 02 07:39:27 PM UTC 24 |
70445712570 ps |
T1011 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/97.uart_stress_all_with_rand_reset.2569572670 |
|
|
Oct 02 07:38:09 PM UTC 24 |
Oct 02 07:39:27 PM UTC 24 |
6161548124 ps |
T1012 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/91.uart_fifo_reset.2701775819 |
|
|
Oct 02 07:37:44 PM UTC 24 |
Oct 02 07:39:30 PM UTC 24 |
116489033257 ps |
T1013 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/46.uart_fifo_overflow.2204966427 |
|
|
Oct 02 07:31:35 PM UTC 24 |
Oct 02 07:39:31 PM UTC 24 |
200905409306 ps |
T186 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/120.uart_fifo_reset.3497391002 |
|
|
Oct 02 07:38:48 PM UTC 24 |
Oct 02 07:39:37 PM UTC 24 |
17006927954 ps |
T408 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/143.uart_fifo_reset.1413428114 |
|
|
Oct 02 07:39:20 PM UTC 24 |
Oct 02 07:39:39 PM UTC 24 |
19300471941 ps |
T203 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/126.uart_fifo_reset.2612881826 |
|
|
Oct 02 07:38:56 PM UTC 24 |
Oct 02 07:39:41 PM UTC 24 |
40839706845 ps |
T1014 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/121.uart_fifo_reset.612924709 |
|
|
Oct 02 07:38:49 PM UTC 24 |
Oct 02 07:39:41 PM UTC 24 |
19019937372 ps |
T1015 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/142.uart_fifo_reset.2432925237 |
|
|
Oct 02 07:39:19 PM UTC 24 |
Oct 02 07:39:41 PM UTC 24 |
16150204583 ps |
T1016 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/139.uart_fifo_reset.182647760 |
|
|
Oct 02 07:39:14 PM UTC 24 |
Oct 02 07:39:42 PM UTC 24 |
22107545013 ps |
T210 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/112.uart_fifo_reset.4111361447 |
|
|
Oct 02 07:38:32 PM UTC 24 |
Oct 02 07:39:43 PM UTC 24 |
29582104730 ps |
T1017 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/106.uart_fifo_reset.957490690 |
|
|
Oct 02 07:38:23 PM UTC 24 |
Oct 02 07:39:44 PM UTC 24 |
126063339726 ps |
T1018 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/124.uart_fifo_reset.779902700 |
|
|
Oct 02 07:38:55 PM UTC 24 |
Oct 02 07:39:45 PM UTC 24 |
87290552208 ps |
T1019 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/128.uart_fifo_reset.3948105802 |
|
|
Oct 02 07:39:00 PM UTC 24 |
Oct 02 07:39:47 PM UTC 24 |
13071178299 ps |
T1020 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/138.uart_fifo_reset.14929806 |
|
|
Oct 02 07:39:12 PM UTC 24 |
Oct 02 07:39:50 PM UTC 24 |
73457814911 ps |
T204 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/115.uart_fifo_reset.367462641 |
|
|
Oct 02 07:38:44 PM UTC 24 |
Oct 02 07:39:51 PM UTC 24 |
28537572874 ps |
T1021 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/117.uart_fifo_reset.3285347552 |
|
|
Oct 02 07:38:47 PM UTC 24 |
Oct 02 07:39:52 PM UTC 24 |
25384329121 ps |
T165 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/149.uart_fifo_reset.573363647 |
|
|
Oct 02 07:39:31 PM UTC 24 |
Oct 02 07:39:59 PM UTC 24 |
32131373922 ps |
T1022 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/135.uart_fifo_reset.2236432540 |
|
|
Oct 02 07:39:08 PM UTC 24 |
Oct 02 07:39:53 PM UTC 24 |
34088785778 ps |
T1023 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/116.uart_fifo_reset.2009202143 |
|
|
Oct 02 07:38:46 PM UTC 24 |
Oct 02 07:39:54 PM UTC 24 |
89022178669 ps |
T173 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/73.uart_fifo_reset.2575780244 |
|
|
Oct 02 07:36:21 PM UTC 24 |
Oct 02 07:39:55 PM UTC 24 |
124383774697 ps |
T1024 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/32.uart_long_xfer_wo_dly.3416933522 |
|
|
Oct 02 07:22:32 PM UTC 24 |
Oct 02 07:39:59 PM UTC 24 |
106713619781 ps |
T1025 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/118.uart_fifo_reset.878618639 |
|
|
Oct 02 07:38:48 PM UTC 24 |
Oct 02 07:40:01 PM UTC 24 |
144809344480 ps |
T217 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/144.uart_fifo_reset.1118761688 |
|
|
Oct 02 07:39:26 PM UTC 24 |
Oct 02 07:40:01 PM UTC 24 |
26514553462 ps |
T1026 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/45.uart_perf.1670983892 |
|
|
Oct 02 07:31:12 PM UTC 24 |
Oct 02 07:40:06 PM UTC 24 |
17176333055 ps |
T1027 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/87.uart_fifo_reset.945922211 |
|
|
Oct 02 07:37:31 PM UTC 24 |
Oct 02 07:40:08 PM UTC 24 |
80169034411 ps |
T232 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/145.uart_fifo_reset.959724175 |
|
|
Oct 02 07:39:26 PM UTC 24 |
Oct 02 07:40:11 PM UTC 24 |
66581837249 ps |
T1028 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/41.uart_rx_parity_err.3318792848 |
|
|
Oct 02 07:28:20 PM UTC 24 |
Oct 02 07:40:11 PM UTC 24 |
184511962465 ps |
T241 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/165.uart_fifo_reset.2364284347 |
|
|
Oct 02 07:39:54 PM UTC 24 |
Oct 02 07:40:19 PM UTC 24 |
55643079225 ps |
T1029 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/161.uart_fifo_reset.2576452307 |
|
|
Oct 02 07:39:51 PM UTC 24 |
Oct 02 07:40:21 PM UTC 24 |
111103736850 ps |
T1030 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/168.uart_fifo_reset.1634166142 |
|
|
Oct 02 07:40:00 PM UTC 24 |
Oct 02 07:40:21 PM UTC 24 |
28389504532 ps |
T1031 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/133.uart_fifo_reset.812313669 |
|
|
Oct 02 07:39:07 PM UTC 24 |
Oct 02 07:40:22 PM UTC 24 |
139502613733 ps |
T1032 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/154.uart_fifo_reset.3034280017 |
|
|
Oct 02 07:39:43 PM UTC 24 |
Oct 02 07:40:23 PM UTC 24 |
116683350806 ps |
T1033 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/127.uart_fifo_reset.2708861770 |
|
|
Oct 02 07:38:56 PM UTC 24 |
Oct 02 07:40:24 PM UTC 24 |
102994256847 ps |
T1034 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/88.uart_fifo_reset.3934207262 |
|
|
Oct 02 07:37:38 PM UTC 24 |
Oct 02 07:40:26 PM UTC 24 |
85663830363 ps |
T237 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/167.uart_fifo_reset.326291836 |
|
|
Oct 02 07:39:56 PM UTC 24 |
Oct 02 07:40:27 PM UTC 24 |
116160461198 ps |
T1035 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/129.uart_fifo_reset.627367854 |
|
|
Oct 02 07:39:02 PM UTC 24 |
Oct 02 07:40:30 PM UTC 24 |
149856139101 ps |
T183 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/105.uart_fifo_reset.3445927986 |
|
|
Oct 02 07:38:21 PM UTC 24 |
Oct 02 07:40:31 PM UTC 24 |
67586965888 ps |
T174 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/173.uart_fifo_reset.58618960 |
|
|
Oct 02 07:40:09 PM UTC 24 |
Oct 02 07:40:31 PM UTC 24 |
64510164511 ps |
T238 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/163.uart_fifo_reset.3176257279 |
|
|
Oct 02 07:39:52 PM UTC 24 |
Oct 02 07:40:31 PM UTC 24 |
83589164966 ps |
T1036 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/174.uart_fifo_reset.583810895 |
|
|
Oct 02 07:40:12 PM UTC 24 |
Oct 02 07:40:34 PM UTC 24 |
101286331489 ps |
T223 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/137.uart_fifo_reset.2269443520 |
|
|
Oct 02 07:39:09 PM UTC 24 |
Oct 02 07:40:36 PM UTC 24 |
107564503419 ps |
T228 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/146.uart_fifo_reset.3339690497 |
|
|
Oct 02 07:39:28 PM UTC 24 |
Oct 02 07:40:36 PM UTC 24 |
42313267627 ps |
T1037 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/172.uart_fifo_reset.447547126 |
|
|
Oct 02 07:40:07 PM UTC 24 |
Oct 02 07:40:36 PM UTC 24 |
32749070369 ps |
T1038 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/85.uart_fifo_reset.2550637880 |
|
|
Oct 02 07:37:18 PM UTC 24 |
Oct 02 07:40:38 PM UTC 24 |
160626259404 ps |
T229 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/159.uart_fifo_reset.1742298163 |
|
|
Oct 02 07:39:46 PM UTC 24 |
Oct 02 07:40:38 PM UTC 24 |
80576785259 ps |
T1039 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/187.uart_fifo_reset.2118804976 |
|
|
Oct 02 07:40:31 PM UTC 24 |
Oct 02 07:40:38 PM UTC 24 |
9232114401 ps |
T1040 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/152.uart_fifo_reset.1292343380 |
|
|
Oct 02 07:39:40 PM UTC 24 |
Oct 02 07:40:42 PM UTC 24 |
120542680173 ps |
T1041 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/151.uart_fifo_reset.800261320 |
|
|
Oct 02 07:39:37 PM UTC 24 |
Oct 02 07:40:42 PM UTC 24 |
58273071332 ps |
T1042 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/182.uart_fifo_reset.1737978532 |
|
|
Oct 02 07:40:27 PM UTC 24 |
Oct 02 07:40:43 PM UTC 24 |
7419257910 ps |
T231 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/181.uart_fifo_reset.2267223454 |
|
|
Oct 02 07:40:25 PM UTC 24 |
Oct 02 07:40:45 PM UTC 24 |
38664724363 ps |
T1043 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/178.uart_fifo_reset.3540321958 |
|
|
Oct 02 07:40:23 PM UTC 24 |
Oct 02 07:40:49 PM UTC 24 |
27936997805 ps |
T1044 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/147.uart_fifo_reset.3298376649 |
|
|
Oct 02 07:39:28 PM UTC 24 |
Oct 02 07:40:49 PM UTC 24 |
30466558350 ps |
T230 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/166.uart_fifo_reset.222329998 |
|
|
Oct 02 07:39:55 PM UTC 24 |
Oct 02 07:40:54 PM UTC 24 |
138996921672 ps |
T1045 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/175.uart_fifo_reset.4084358970 |
|
|
Oct 02 07:40:12 PM UTC 24 |
Oct 02 07:40:54 PM UTC 24 |
14743555682 ps |
T1046 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/136.uart_fifo_reset.2438700860 |
|
|
Oct 02 07:39:09 PM UTC 24 |
Oct 02 07:40:54 PM UTC 24 |
34905109551 ps |
T1047 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/40.uart_perf.1059033868 |
|
|
Oct 02 07:27:50 PM UTC 24 |
Oct 02 07:40:55 PM UTC 24 |
11576304737 ps |
T189 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/130.uart_fifo_reset.4085374604 |
|
|
Oct 02 07:39:03 PM UTC 24 |
Oct 02 07:40:57 PM UTC 24 |
64120700190 ps |
T205 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/170.uart_fifo_reset.3886966437 |
|
|
Oct 02 07:40:01 PM UTC 24 |
Oct 02 07:41:02 PM UTC 24 |
63281506355 ps |
T1048 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/189.uart_fifo_reset.1900146922 |
|
|
Oct 02 07:40:37 PM UTC 24 |
Oct 02 07:41:04 PM UTC 24 |
52215187556 ps |
T1049 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/162.uart_fifo_reset.3351381172 |
|
|
Oct 02 07:39:51 PM UTC 24 |
Oct 02 07:41:04 PM UTC 24 |
40581143744 ps |
T1050 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/119.uart_fifo_reset.3109295757 |
|
|
Oct 02 07:38:48 PM UTC 24 |
Oct 02 07:41:04 PM UTC 24 |
54604438516 ps |
T196 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/169.uart_fifo_reset.524665115 |
|
|
Oct 02 07:40:00 PM UTC 24 |
Oct 02 07:41:09 PM UTC 24 |
84159366308 ps |
T1051 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/185.uart_fifo_reset.111382474 |
|
|
Oct 02 07:40:31 PM UTC 24 |
Oct 02 07:41:10 PM UTC 24 |
189744437709 ps |
T1052 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/177.uart_fifo_reset.705982806 |
|
|
Oct 02 07:40:23 PM UTC 24 |
Oct 02 07:41:12 PM UTC 24 |
57993880283 ps |
T1053 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/23.uart_perf.1994257954 |
|
|
Oct 02 07:15:49 PM UTC 24 |
Oct 02 07:41:14 PM UTC 24 |
31869614623 ps |
T1054 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/209.uart_fifo_reset.11052747 |
|
|
Oct 02 07:41:05 PM UTC 24 |
Oct 02 07:41:14 PM UTC 24 |
17763910556 ps |
T1055 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/156.uart_fifo_reset.2455779154 |
|
|
Oct 02 07:39:43 PM UTC 24 |
Oct 02 07:41:18 PM UTC 24 |
125220751232 ps |
T245 |
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/188.uart_fifo_reset.1003226171 |
|
|
Oct 02 07:40:35 PM UTC 24 |
Oct 02 07:41:20 PM UTC 24 |
48118541037 ps |