Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
99.12 99.08 97.65 100.00 98.35 100.00 99.62


Total tests in report: 1311
Tests are in graded order

Scores are accumulated (Total) and incremental (Incr) for each test.

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP  
TOTAL INCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRTOTALINCRNAME
78.71 78.71 95.00 95.00 84.12 84.12 94.57 94.57 91.76 91.76 94.40 94.40 12.42 12.42 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_intr.1332171122
82.57 3.86 98.37 3.37 92.24 8.12 97.22 2.65 93.65 1.88 97.05 2.65 16.91 4.49 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_stress_all_with_rand_reset.2854367425
85.24 2.67 98.37 0.00 92.24 0.00 97.22 0.00 93.65 0.00 97.05 0.00 32.94 16.03 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_stress_all.657829758
87.14 1.90 98.37 0.00 92.24 0.00 97.22 0.00 93.65 0.00 97.05 0.00 44.32 11.38 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_stress_all.3458701293
88.82 1.68 98.37 0.00 92.24 0.00 97.22 0.00 93.65 0.00 97.05 0.00 54.39 10.07 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/9.uart_long_xfer_wo_dly.2847225789
90.03 1.22 98.57 0.20 93.18 0.94 97.22 0.00 94.35 0.71 97.35 0.29 59.54 5.15 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/3.uart_fifo_overflow.4087970073
90.94 0.91 98.57 0.00 94.59 1.41 97.22 0.00 95.53 1.18 97.64 0.29 62.11 2.57 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_tx_rx.78093110
91.60 0.66 98.57 0.00 94.59 0.00 97.22 0.00 95.53 0.00 97.64 0.00 66.06 3.95 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_long_xfer_wo_dly.103558744
92.24 0.64 98.57 0.00 94.59 0.00 97.22 0.00 95.53 0.00 97.64 0.00 69.90 3.84 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_fifo_overflow.2798176356
92.87 0.63 98.88 0.31 95.65 1.06 97.22 0.00 97.18 1.65 97.64 0.00 70.65 0.75 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/4.uart_stress_all_with_rand_reset.1434569667
93.47 0.60 98.98 0.10 96.00 0.35 99.75 2.53 97.41 0.24 97.94 0.29 70.76 0.11 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_sec_cm.4222192531
93.99 0.51 99.08 0.10 96.35 0.35 99.75 0.00 98.35 0.94 97.94 0.00 72.45 1.69 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/2.uart_stress_all.1899325503
94.47 0.48 99.08 0.00 96.35 0.00 99.75 0.00 98.35 0.00 97.94 0.00 75.34 2.89 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/2.uart_fifo_full.3060139095
94.88 0.41 99.08 0.00 96.35 0.00 99.75 0.00 98.35 0.00 97.94 0.00 77.83 2.48 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/5.uart_long_xfer_wo_dly.1803993116
95.27 0.38 99.08 0.00 96.35 0.00 99.75 0.00 98.35 0.00 97.94 0.00 80.13 2.30 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/18.uart_fifo_full.2842037159
95.61 0.34 99.08 0.00 96.35 0.00 99.75 0.00 98.35 0.00 100.00 2.06 80.13 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/5.uart_csr_rw.2722259958
95.95 0.33 99.08 0.00 96.35 0.00 99.75 0.00 98.35 0.00 100.00 0.00 82.14 2.01 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/6.uart_intr.1254635428
96.27 0.32 99.08 0.00 96.35 0.00 99.75 0.00 98.35 0.00 100.00 0.00 84.08 1.94 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/4.uart_fifo_overflow.2116998677
96.55 0.28 99.08 0.00 96.35 0.00 99.75 0.00 98.35 0.00 100.00 0.00 85.78 1.69 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/13.uart_fifo_overflow.1392787480
96.80 0.24 99.08 0.00 96.35 0.00 99.75 0.00 98.35 0.00 100.00 0.00 87.24 1.47 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/9.uart_rx_parity_err.2811220154
97.01 0.22 99.08 0.00 96.35 0.00 99.75 0.00 98.35 0.00 100.00 0.00 88.55 1.31 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/15.uart_stress_all.2833504233
97.17 0.16 99.08 0.00 96.35 0.00 99.75 0.00 98.35 0.00 100.00 0.00 89.50 0.95 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/12.uart_fifo_full.4159888123
97.33 0.15 99.08 0.00 96.35 0.00 99.75 0.00 98.35 0.00 100.00 0.00 90.43 0.93 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/3.uart_tx_rx.2865476687
97.46 0.13 99.08 0.00 96.35 0.00 99.75 0.00 98.35 0.00 100.00 0.00 91.22 0.79 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/8.uart_noise_filter.2960849215
97.59 0.13 99.08 0.00 96.94 0.59 99.75 0.00 98.35 0.00 100.00 0.00 91.40 0.18 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/2.uart_tl_intg_err.297909912
97.70 0.12 99.08 0.00 96.94 0.00 99.75 0.00 98.35 0.00 100.00 0.00 92.10 0.70 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_noise_filter.3639452775
97.80 0.10 99.08 0.00 97.29 0.35 100.00 0.25 98.35 0.00 100.00 0.00 92.10 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_alert_test.2734052187
97.90 0.09 99.08 0.00 97.29 0.00 100.00 0.00 98.35 0.00 100.00 0.00 92.66 0.56 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_noise_filter.3444535727
97.98 0.08 99.08 0.00 97.29 0.00 100.00 0.00 98.35 0.00 100.00 0.00 93.16 0.50 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/4.uart_perf.835268162
98.06 0.08 99.08 0.00 97.29 0.00 100.00 0.00 98.35 0.00 100.00 0.00 93.61 0.45 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_fifo_reset.4007880627
98.13 0.08 99.08 0.00 97.29 0.00 100.00 0.00 98.35 0.00 100.00 0.00 94.06 0.45 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/9.uart_fifo_overflow.3637646992
98.20 0.07 99.08 0.00 97.29 0.00 100.00 0.00 98.35 0.00 100.00 0.00 94.47 0.41 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_fifo_overflow.2007192296
98.26 0.06 99.08 0.00 97.29 0.00 100.00 0.00 98.35 0.00 100.00 0.00 94.83 0.36 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/13.uart_fifo_full.467987885
98.30 0.05 99.08 0.00 97.29 0.00 100.00 0.00 98.35 0.00 100.00 0.00 95.10 0.27 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/13.uart_fifo_reset.3121835311
98.35 0.04 99.08 0.00 97.29 0.00 100.00 0.00 98.35 0.00 100.00 0.00 95.35 0.25 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/12.uart_stress_all.1062234761
98.39 0.04 99.08 0.00 97.29 0.00 100.00 0.00 98.35 0.00 100.00 0.00 95.60 0.25 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/22.uart_stress_all_with_rand_reset.2682255731
98.43 0.04 99.08 0.00 97.53 0.24 100.00 0.00 98.35 0.00 100.00 0.00 95.60 0.00 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/11.uart_tl_intg_err.1100360416
98.46 0.04 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 100.00 0.00 95.82 0.23 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/15.uart_fifo_overflow.1466237050
98.50 0.04 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 100.00 0.00 96.05 0.23 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/188.uart_fifo_reset.1003226171
98.54 0.03 99.08 0.00 97.53 0.00 100.00 0.00 98.35 0.00 100.00 0.00 96.25 0.20 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/21.uart_fifo_reset.2370306036
98.57 0.03 99.08 0.00 97.65 0.12 100.00 0.00 98.35 0.00 100.00 0.00 96.32 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_fifo_full.1094912107
98.60 0.03 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 96.50 0.18 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/17.uart_noise_filter.1799264720
98.62 0.03 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 96.66 0.16 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_stress_all_with_rand_reset.2649053380
98.65 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 96.79 0.14 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/11.uart_fifo_full.4002408390
98.67 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 96.93 0.14 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/21.uart_fifo_overflow.2205123407
98.69 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.04 0.11 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/102.uart_fifo_reset.4076386131
98.71 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.16 0.11 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/14.uart_stress_all_with_rand_reset.1007306390
98.72 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.27 0.11 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/19.uart_stress_all.3517912047
98.74 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.38 0.11 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/22.uart_fifo_reset.1536384735
98.76 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.49 0.11 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/3.uart_noise_filter.4165003395
98.78 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.61 0.11 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/38.uart_fifo_reset.1035741244
98.80 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.70 0.09 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/10.uart_fifo_reset.373683971
98.81 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.79 0.09 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/149.uart_fifo_reset.573363647
98.83 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.88 0.09 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/29.uart_stress_all.542056553
98.84 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 97.97 0.09 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/37.uart_stress_all.2523307790
98.86 0.02 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.06 0.09 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/5.uart_stress_all.386508079
98.87 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.13 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_perf.535293034
98.88 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.19 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/115.uart_fifo_reset.367462641
98.89 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.26 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/145.uart_fifo_reset.959724175
98.90 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.33 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/165.uart_fifo_reset.2364284347
98.91 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.40 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/198.uart_fifo_reset.455034521
98.92 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.46 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/297.uart_fifo_reset.2578903504
98.94 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.53 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/298.uart_fifo_reset.1886520598
98.95 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.60 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/6.uart_perf.550520859
98.96 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.67 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/76.uart_fifo_reset.61659427
98.97 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.74 0.07 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/97.uart_fifo_reset.3495690131
98.98 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.78 0.05 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_smoke.316496377
98.98 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.83 0.05 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/108.uart_fifo_reset.895493505
98.99 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.87 0.05 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/144.uart_fifo_reset.1118761688
99.00 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.92 0.05 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/15.uart_stress_all_with_rand_reset.2455173687
99.01 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 98.96 0.05 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/203.uart_fifo_reset.3925554206
99.01 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.01 0.05 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/218.uart_fifo_reset.3785139145
99.02 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.05 0.05 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/23.uart_fifo_full.1601561216
99.03 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.10 0.05 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/45.uart_stress_all.2933447547
99.03 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.12 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/0.uart_tl_intg_err.4008487693
99.04 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.14 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/100.uart_fifo_reset.1088672987
99.04 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.16 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/11.uart_fifo_overflow.3988033846
99.04 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.19 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/11.uart_stress_all_with_rand_reset.3559952421
99.05 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.21 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/110.uart_fifo_reset.533707561
99.05 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.23 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/112.uart_fifo_reset.4111361447
99.06 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.25 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/12.uart_intr.2593051165
99.06 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.28 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/13.uart_tx_ovrd.3489183788
99.06 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.30 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/130.uart_fifo_reset.4085374604
99.07 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.32 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/146.uart_fifo_reset.3339690497
99.07 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.35 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/159.uart_fifo_reset.1742298163
99.07 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.37 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/16.uart_intr.256308357
99.08 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.39 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/166.uart_fifo_reset.222329998
99.08 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.41 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/167.uart_fifo_reset.326291836
99.09 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.44 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/180.uart_fifo_reset.1233701359
99.09 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.46 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/181.uart_fifo_reset.2267223454
99.09 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.48 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/205.uart_fifo_reset.2808264805
99.10 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.50 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/207.uart_fifo_reset.3390816050
99.10 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.53 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/243.uart_fifo_reset.1427711873
99.11 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.55 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/251.uart_fifo_reset.2475084973
99.11 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.57 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/255.uart_fifo_reset.3072634782
99.11 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.59 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/268.uart_fifo_reset.1414907490
99.12 0.01 99.08 0.00 97.65 0.00 100.00 0.00 98.35 0.00 100.00 0.00 99.62 0.02 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/277.uart_fifo_reset.277005012

Tests that do not contribute to grading

Name
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_aliasing.484475078
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_bit_bash.602305350
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_hw_reset.1479233825
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_mem_rw_with_rand_reset.4152384623
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/0.uart_csr_rw.631816948
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/0.uart_intr_test.1579357533
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/0.uart_same_csr_outstanding.2544853548
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/0.uart_tl_errors.2400589088
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_aliasing.3592142404
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_bit_bash.3790720197
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_hw_reset.4254828196
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_mem_rw_with_rand_reset.297623017
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/1.uart_csr_rw.2430322344
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/1.uart_intr_test.505249717
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/1.uart_same_csr_outstanding.3158373846
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/1.uart_tl_errors.3277513183
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/1.uart_tl_intg_err.2399288062
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/10.uart_csr_mem_rw_with_rand_reset.3046505578
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/10.uart_csr_rw.880276856
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/10.uart_intr_test.1566594184
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/10.uart_same_csr_outstanding.2537705997
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/10.uart_tl_errors.1568474041
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/10.uart_tl_intg_err.3763791950
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/11.uart_csr_mem_rw_with_rand_reset.1673512256
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/11.uart_csr_rw.1459461742
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/11.uart_intr_test.2980513850
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/11.uart_same_csr_outstanding.4206256903
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/11.uart_tl_errors.2033524642
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/12.uart_csr_mem_rw_with_rand_reset.2819706504
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/12.uart_csr_rw.1220135425
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/12.uart_intr_test.474496335
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/12.uart_same_csr_outstanding.133420467
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/12.uart_tl_errors.3457693435
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/12.uart_tl_intg_err.4011680408
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/13.uart_csr_mem_rw_with_rand_reset.240514150
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/13.uart_csr_rw.288802578
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/13.uart_intr_test.4063702450
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/13.uart_same_csr_outstanding.2093320271
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/13.uart_tl_errors.3902036944
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/13.uart_tl_intg_err.3976618443
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/14.uart_csr_mem_rw_with_rand_reset.574718928
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/14.uart_csr_rw.547482261
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/14.uart_intr_test.1005383489
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/14.uart_same_csr_outstanding.1607262479
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/14.uart_tl_errors.3616897194
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/14.uart_tl_intg_err.1648721462
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/15.uart_csr_mem_rw_with_rand_reset.2222916724
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/15.uart_csr_rw.532563477
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/15.uart_intr_test.629634449
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/15.uart_same_csr_outstanding.1833239857
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/15.uart_tl_errors.2102494345
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/15.uart_tl_intg_err.3329690847
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/16.uart_csr_mem_rw_with_rand_reset.2244570509
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/16.uart_csr_rw.2248420314
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/16.uart_intr_test.587064177
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/16.uart_same_csr_outstanding.2182629465
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/16.uart_tl_errors.3576051868
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/16.uart_tl_intg_err.2026802172
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/17.uart_csr_mem_rw_with_rand_reset.358375430
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/17.uart_csr_rw.2836487796
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/17.uart_intr_test.2838630648
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/17.uart_same_csr_outstanding.3002961678
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/17.uart_tl_errors.2713371727
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/17.uart_tl_intg_err.2771867435
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/18.uart_csr_mem_rw_with_rand_reset.464841137
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/18.uart_csr_rw.2066347209
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/18.uart_intr_test.2332158302
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/18.uart_same_csr_outstanding.4251275865
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/18.uart_tl_errors.4271160593
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/18.uart_tl_intg_err.3200184330
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/19.uart_csr_mem_rw_with_rand_reset.3109083571
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/19.uart_csr_rw.42115318
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/19.uart_intr_test.1297646549
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/19.uart_same_csr_outstanding.2749132932
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/19.uart_tl_errors.338010137
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/19.uart_tl_intg_err.3881477688
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_aliasing.3009091423
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_bit_bash.3887391354
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_hw_reset.1068492018
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_mem_rw_with_rand_reset.15112551
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/2.uart_csr_rw.3417856845
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/2.uart_intr_test.3714080281
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/2.uart_same_csr_outstanding.378703131
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/2.uart_tl_errors.2523631889
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/20.uart_intr_test.4150114471
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/21.uart_intr_test.597136285
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/22.uart_intr_test.1209864315
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/23.uart_intr_test.1188482498
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/24.uart_intr_test.1475865011
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/25.uart_intr_test.2537421755
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/26.uart_intr_test.3036900696
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/27.uart_intr_test.1714327365
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/28.uart_intr_test.2620117835
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/29.uart_intr_test.3060798270
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_aliasing.560113934
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_bit_bash.2400439286
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_hw_reset.3320283846
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_mem_rw_with_rand_reset.235144026
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/3.uart_csr_rw.2660085545
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/3.uart_intr_test.645467053
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/3.uart_same_csr_outstanding.268342260
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/3.uart_tl_errors.874129998
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/3.uart_tl_intg_err.1482533811
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/30.uart_intr_test.675046879
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/31.uart_intr_test.349160902
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/32.uart_intr_test.4004743692
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/33.uart_intr_test.4145084984
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/34.uart_intr_test.260114977
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/35.uart_intr_test.364413208
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/36.uart_intr_test.1312530610
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/37.uart_intr_test.2728330569
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/38.uart_intr_test.658951777
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/39.uart_intr_test.3238559432
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_aliasing.3102315915
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_bit_bash.3674053266
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_hw_reset.1734450834
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_mem_rw_with_rand_reset.3828119570
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/4.uart_csr_rw.1557406425
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/4.uart_intr_test.2998437329
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/4.uart_same_csr_outstanding.2635191623
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/4.uart_tl_errors.2356431316
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/4.uart_tl_intg_err.4021990195
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/40.uart_intr_test.508485931
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/41.uart_intr_test.1004950127
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/42.uart_intr_test.48666704
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/43.uart_intr_test.3737229037
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/44.uart_intr_test.37761322
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/45.uart_intr_test.3205370348
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/46.uart_intr_test.2566544471
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/47.uart_intr_test.2429152794
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/48.uart_intr_test.1929116828
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/cover_reg_top/49.uart_intr_test.383875207
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/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/8.uart_stress_all.2740712234
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/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/8.uart_tx_ovrd.3036452049
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/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/81.uart_fifo_reset.2506203259
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/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/86.uart_fifo_reset.2502489190
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/86.uart_stress_all_with_rand_reset.2653409287
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/87.uart_fifo_reset.945922211
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/87.uart_stress_all_with_rand_reset.4167686995
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/88.uart_fifo_reset.3934207262
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/88.uart_stress_all_with_rand_reset.3818857337
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/89.uart_fifo_reset.182601952
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/89.uart_stress_all_with_rand_reset.2748639691
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/9.uart_alert_test.839377094
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/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/91.uart_fifo_reset.2701775819
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/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/92.uart_fifo_reset.3747238006
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/92.uart_stress_all_with_rand_reset.1698101721
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/93.uart_fifo_reset.1313874070
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/93.uart_stress_all_with_rand_reset.3506619472
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/94.uart_fifo_reset.2401802794
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/94.uart_stress_all_with_rand_reset.3795444436
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/95.uart_fifo_reset.2461952134
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/95.uart_stress_all_with_rand_reset.555857583
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/96.uart_fifo_reset.2394828872
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/96.uart_stress_all_with_rand_reset.3923776397
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/97.uart_stress_all_with_rand_reset.2569572670
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/98.uart_fifo_reset.1207568652
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/98.uart_stress_all_with_rand_reset.3739646219
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/99.uart_fifo_reset.579987733
/workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/99.uart_stress_all_with_rand_reset.1812564004



Total test records in report: 1311
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html
TEST NOTEST LOCATIONTEST NAMESTATUSSTARTEDFINISHEDSIMULATION TIME
T1 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_rx_oversample.3123476253 Oct 02 07:06:37 PM UTC 24 Oct 02 07:06:50 PM UTC 24 2535011596 ps
T2 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_sec_cm.4222192531 Oct 02 07:06:43 PM UTC 24 Oct 02 07:06:56 PM UTC 24 63302435 ps
T3 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_rx_oversample.3140256285 Oct 02 07:06:52 PM UTC 24 Oct 02 07:07:02 PM UTC 24 1627863276 ps
T4 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_alert_test.317525257 Oct 02 07:07:03 PM UTC 24 Oct 02 07:07:05 PM UTC 24 16793764 ps
T5 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_tx_ovrd.1111555119 Oct 02 07:07:01 PM UTC 24 Oct 02 07:07:06 PM UTC 24 260216922 ps
T6 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_intr.1332171122 Oct 02 07:06:37 PM UTC 24 Oct 02 07:07:07 PM UTC 24 54968792463 ps
T7 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_rx_start_bit_filter.1378538608 Oct 02 07:06:56 PM UTC 24 Oct 02 07:07:08 PM UTC 24 4979127967 ps
T8 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_intr.1772147925 Oct 02 07:06:53 PM UTC 24 Oct 02 07:07:09 PM UTC 24 21071872619 ps
T9 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_alert_test.2734052187 Oct 02 07:06:45 PM UTC 24 Oct 02 07:07:09 PM UTC 24 45627357 ps
T10 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_sec_cm.100033971 Oct 02 07:07:02 PM UTC 24 Oct 02 07:07:10 PM UTC 24 216370339 ps
T11 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_tx_rx.78093110 Oct 02 07:06:36 PM UTC 24 Oct 02 07:07:10 PM UTC 24 132820616447 ps
T12 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_fifo_overflow.2798176356 Oct 02 07:06:37 PM UTC 24 Oct 02 07:07:11 PM UTC 24 41244590302 ps
T13 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_tx_ovrd.910431301 Oct 02 07:06:39 PM UTC 24 Oct 02 07:07:12 PM UTC 24 1760513685 ps
T14 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/2.uart_noise_filter.333241579 Oct 02 07:07:09 PM UTC 24 Oct 02 07:07:12 PM UTC 24 1605321751 ps
T15 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_rx_parity_err.3878246906 Oct 02 07:07:01 PM UTC 24 Oct 02 07:07:14 PM UTC 24 31918008119 ps
T16 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_smoke.316496377 Oct 02 07:06:34 PM UTC 24 Oct 02 07:07:15 PM UTC 24 6206458368 ps
T72 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/2.uart_alert_test.631524620 Oct 02 07:07:11 PM UTC 24 Oct 02 07:07:16 PM UTC 24 32361408 ps
T28 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/2.uart_sec_cm.2280107475 Oct 02 07:07:11 PM UTC 24 Oct 02 07:07:16 PM UTC 24 36633147 ps
T69 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/3.uart_smoke.549997570 Oct 02 07:07:11 PM UTC 24 Oct 02 07:07:16 PM UTC 24 315695847 ps
T19 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_fifo_full.1094912107 Oct 02 07:06:36 PM UTC 24 Oct 02 07:07:19 PM UTC 24 85671689263 ps
T351 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/2.uart_rx_start_bit_filter.440307882 Oct 02 07:07:10 PM UTC 24 Oct 02 07:07:19 PM UTC 24 3070446223 ps
T22 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/3.uart_loopback.4281030349 Oct 02 07:07:14 PM UTC 24 Oct 02 07:07:19 PM UTC 24 8230368684 ps
T20 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/2.uart_tx_ovrd.2750619007 Oct 02 07:07:10 PM UTC 24 Oct 02 07:07:19 PM UTC 24 1097206198 ps
T84 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/3.uart_rx_oversample.1107152019 Oct 02 07:07:12 PM UTC 24 Oct 02 07:07:19 PM UTC 24 1487701109 ps
T29 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/3.uart_alert_test.371110030 Oct 02 07:07:17 PM UTC 24 Oct 02 07:07:20 PM UTC 24 12530863 ps
T23 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_loopback.3840785917 Oct 02 07:07:01 PM UTC 24 Oct 02 07:07:20 PM UTC 24 6871344676 ps
T85 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/3.uart_sec_cm.55142426 Oct 02 07:07:17 PM UTC 24 Oct 02 07:07:21 PM UTC 24 84247311 ps
T44 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/3.uart_tx_ovrd.2697019997 Oct 02 07:07:13 PM UTC 24 Oct 02 07:07:21 PM UTC 24 834662190 ps
T24 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/2.uart_loopback.3101315760 Oct 02 07:07:10 PM UTC 24 Oct 02 07:07:21 PM UTC 24 2220303469 ps
T325 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_smoke.3108871809 Oct 02 07:06:50 PM UTC 24 Oct 02 07:07:22 PM UTC 24 5539221898 ps
T71 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/2.uart_fifo_overflow.422357399 Oct 02 07:07:06 PM UTC 24 Oct 02 07:07:22 PM UTC 24 135174078626 ps
T301 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/4.uart_rx_start_bit_filter.378883924 Oct 02 07:07:21 PM UTC 24 Oct 02 07:07:25 PM UTC 24 2873167213 ps
T308 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/4.uart_tx_ovrd.2056253101 Oct 02 07:07:22 PM UTC 24 Oct 02 07:07:27 PM UTC 24 2394878638 ps
T350 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/2.uart_smoke.88015850 Oct 02 07:07:03 PM UTC 24 Oct 02 07:07:30 PM UTC 24 5477219904 ps
T86 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/4.uart_sec_cm.2272909080 Oct 02 07:07:30 PM UTC 24 Oct 02 07:07:33 PM UTC 24 236234169 ps
T17 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/3.uart_fifo_overflow.4087970073 Oct 02 07:07:12 PM UTC 24 Oct 02 07:07:33 PM UTC 24 46142395481 ps
T393 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_loopback.3990051366 Oct 02 07:06:39 PM UTC 24 Oct 02 07:07:33 PM UTC 24 8316054354 ps
T18 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_stress_all_with_rand_reset.2854367425 Oct 02 07:06:42 PM UTC 24 Oct 02 07:07:33 PM UTC 24 3160674105 ps
T37 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/4.uart_loopback.2884019622 Oct 02 07:07:22 PM UTC 24 Oct 02 07:07:34 PM UTC 24 2631127619 ps
T38 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/4.uart_alert_test.430291662 Oct 02 07:07:33 PM UTC 24 Oct 02 07:07:35 PM UTC 24 12810866 ps
T39 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_fifo_overflow.2007192296 Oct 02 07:06:52 PM UTC 24 Oct 02 07:07:36 PM UTC 24 101492314243 ps
T40 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/5.uart_smoke.4179236315 Oct 02 07:07:34 PM UTC 24 Oct 02 07:07:36 PM UTC 24 127823200 ps
T25 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/4.uart_rx_oversample.2954696916 Oct 02 07:07:20 PM UTC 24 Oct 02 07:07:37 PM UTC 24 5373584120 ps
T26 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_stress_all_with_rand_reset.2649053380 Oct 02 07:07:01 PM UTC 24 Oct 02 07:07:37 PM UTC 24 1647776971 ps
T41 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/2.uart_fifo_reset.2528489136 Oct 02 07:07:07 PM UTC 24 Oct 02 07:07:38 PM UTC 24 13930398763 ps
T42 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/2.uart_tx_rx.4114474386 Oct 02 07:07:04 PM UTC 24 Oct 02 07:07:39 PM UTC 24 24569070831 ps
T43 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_tx_rx.3726235330 Oct 02 07:06:51 PM UTC 24 Oct 02 07:07:40 PM UTC 24 93732722334 ps
T45 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_fifo_reset.1172858517 Oct 02 07:06:52 PM UTC 24 Oct 02 07:07:42 PM UTC 24 20319159595 ps
T70 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/2.uart_stress_all.1899325503 Oct 02 07:07:11 PM UTC 24 Oct 02 07:07:44 PM UTC 24 143831199772 ps
T96 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/2.uart_rx_parity_err.1142881736 Oct 02 07:07:10 PM UTC 24 Oct 02 07:07:44 PM UTC 24 21274546265 ps
T423 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/5.uart_loopback.3587716436 Oct 02 07:07:40 PM UTC 24 Oct 02 07:07:45 PM UTC 24 734093195 ps
T326 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/5.uart_tx_ovrd.2915960850 Oct 02 07:07:39 PM UTC 24 Oct 02 07:07:46 PM UTC 24 1089251263 ps
T323 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/4.uart_smoke.647531512 Oct 02 07:07:18 PM UTC 24 Oct 02 07:07:47 PM UTC 24 5396806278 ps
T117 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/4.uart_fifo_full.225882492 Oct 02 07:07:19 PM UTC 24 Oct 02 07:07:47 PM UTC 24 53566207517 ps
T424 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/5.uart_alert_test.4228182824 Oct 02 07:07:46 PM UTC 24 Oct 02 07:07:48 PM UTC 24 43330765 ps
T340 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/5.uart_rx_start_bit_filter.1844618151 Oct 02 07:07:37 PM UTC 24 Oct 02 07:07:51 PM UTC 24 3151759800 ps
T292 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/6.uart_smoke.3837693309 Oct 02 07:07:47 PM UTC 24 Oct 02 07:07:53 PM UTC 24 626702781 ps
T27 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/3.uart_stress_all_with_rand_reset.631375182 Oct 02 07:07:16 PM UTC 24 Oct 02 07:07:54 PM UTC 24 2213583032 ps
T112 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_fifo_full.1749234130 Oct 02 07:06:51 PM UTC 24 Oct 02 07:07:55 PM UTC 24 61825943578 ps
T113 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_noise_filter.3444535727 Oct 02 07:06:55 PM UTC 24 Oct 02 07:07:55 PM UTC 24 205065890447 ps
T278 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/3.uart_rx_parity_err.24402945 Oct 02 07:07:12 PM UTC 24 Oct 02 07:07:55 PM UTC 24 74020106846 ps
T119 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/5.uart_fifo_overflow.1972293968 Oct 02 07:07:34 PM UTC 24 Oct 02 07:07:56 PM UTC 24 46299959914 ps
T114 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_fifo_reset.4007880627 Oct 02 07:06:37 PM UTC 24 Oct 02 07:07:58 PM UTC 24 30541783824 ps
T46 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/4.uart_rx_parity_err.2328701937 Oct 02 07:07:22 PM UTC 24 Oct 02 07:07:59 PM UTC 24 35808266987 ps
T305 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/6.uart_tx_ovrd.1985177528 Oct 02 07:07:56 PM UTC 24 Oct 02 07:08:00 PM UTC 24 639521714 ps
T347 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/6.uart_rx_start_bit_filter.153355219 Oct 02 07:07:55 PM UTC 24 Oct 02 07:08:01 PM UTC 24 3652996288 ps
T47 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_perf.724546851 Oct 02 07:07:01 PM UTC 24 Oct 02 07:08:01 PM UTC 24 4064577913 ps
T425 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/6.uart_alert_test.4164946255 Oct 02 07:08:02 PM UTC 24 Oct 02 07:08:04 PM UTC 24 30841462 ps
T48 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/6.uart_fifo_reset.3793722797 Oct 02 07:07:50 PM UTC 24 Oct 02 07:08:05 PM UTC 24 6082081120 ps
T30 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/5.uart_stress_all_with_rand_reset.88330207 Oct 02 07:07:45 PM UTC 24 Oct 02 07:08:05 PM UTC 24 6042230265 ps
T394 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/6.uart_loopback.768338312 Oct 02 07:07:56 PM UTC 24 Oct 02 07:08:06 PM UTC 24 5409240480 ps
T115 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/5.uart_fifo_reset.1846366271 Oct 02 07:07:35 PM UTC 24 Oct 02 07:08:06 PM UTC 24 9363320137 ps
T395 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/5.uart_rx_oversample.2513944631 Oct 02 07:07:35 PM UTC 24 Oct 02 07:08:08 PM UTC 24 2700830867 ps
T426 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/2.uart_rx_oversample.2016436271 Oct 02 07:07:07 PM UTC 24 Oct 02 07:08:09 PM UTC 24 6654263046 ps
T31 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/4.uart_stress_all_with_rand_reset.1434569667 Oct 02 07:07:26 PM UTC 24 Oct 02 07:08:10 PM UTC 24 5916897287 ps
T304 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/7.uart_smoke.117447921 Oct 02 07:08:05 PM UTC 24 Oct 02 07:08:10 PM UTC 24 915145360 ps
T279 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/4.uart_tx_rx.1734289507 Oct 02 07:07:18 PM UTC 24 Oct 02 07:08:11 PM UTC 24 21522988168 ps
T277 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/7.uart_tx_ovrd.3808680250 Oct 02 07:08:12 PM UTC 24 Oct 02 07:08:17 PM UTC 24 1538704225 ps
T129 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/5.uart_fifo_full.844407706 Oct 02 07:07:34 PM UTC 24 Oct 02 07:08:17 PM UTC 24 100666551579 ps
T400 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/7.uart_loopback.2477204974 Oct 02 07:08:13 PM UTC 24 Oct 02 07:08:19 PM UTC 24 3401445260 ps
T21 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/4.uart_intr.3212320597 Oct 02 07:07:21 PM UTC 24 Oct 02 07:08:22 PM UTC 24 34610819783 ps
T259 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/6.uart_tx_rx.96926690 Oct 02 07:07:49 PM UTC 24 Oct 02 07:08:25 PM UTC 24 115163143731 ps
T427 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/7.uart_alert_test.185894995 Oct 02 07:08:26 PM UTC 24 Oct 02 07:08:28 PM UTC 24 12365038 ps
T104 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/7.uart_intr.573831120 Oct 02 07:08:10 PM UTC 24 Oct 02 07:08:28 PM UTC 24 49836581392 ps
T103 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/2.uart_intr.4025033518 Oct 02 07:07:08 PM UTC 24 Oct 02 07:08:31 PM UTC 24 52769380187 ps
T290 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/4.uart_noise_filter.1825320350 Oct 02 07:07:21 PM UTC 24 Oct 02 07:08:32 PM UTC 24 122345378627 ps
T271 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/6.uart_fifo_overflow.516772517 Oct 02 07:07:49 PM UTC 24 Oct 02 07:08:32 PM UTC 24 17193944725 ps
T289 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/6.uart_noise_filter.1892440270 Oct 02 07:07:55 PM UTC 24 Oct 02 07:08:33 PM UTC 24 56556215548 ps
T263 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_noise_filter.3639452775 Oct 02 07:06:37 PM UTC 24 Oct 02 07:08:35 PM UTC 24 407266890080 ps
T99 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/6.uart_intr.1254635428 Oct 02 07:07:54 PM UTC 24 Oct 02 07:08:40 PM UTC 24 35946466286 ps
T253 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/3.uart_fifo_reset.4264502739 Oct 02 07:07:12 PM UTC 24 Oct 02 07:08:41 PM UTC 24 45516221215 ps
T311 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/8.uart_rx_start_bit_filter.351538160 Oct 02 07:08:42 PM UTC 24 Oct 02 07:08:45 PM UTC 24 3380077655 ps
T32 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/7.uart_stress_all_with_rand_reset.2931061180 Oct 02 07:08:20 PM UTC 24 Oct 02 07:08:48 PM UTC 24 1822114865 ps
T288 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/7.uart_rx_parity_err.103358808 Oct 02 07:08:11 PM UTC 24 Oct 02 07:08:51 PM UTC 24 77429620165 ps
T337 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/8.uart_tx_ovrd.3036452049 Oct 02 07:08:49 PM UTC 24 Oct 02 07:08:53 PM UTC 24 441033811 ps
T33 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/2.uart_stress_all_with_rand_reset.1818254423 Oct 02 07:07:11 PM UTC 24 Oct 02 07:08:53 PM UTC 24 20900725953 ps
T336 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/3.uart_rx_start_bit_filter.4154658010 Oct 02 07:07:12 PM UTC 24 Oct 02 07:08:54 PM UTC 24 85296657231 ps
T264 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/7.uart_rx_start_bit_filter.2482214892 Oct 02 07:08:11 PM UTC 24 Oct 02 07:08:56 PM UTC 24 32718808379 ps
T273 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/8.uart_intr.119731293 Oct 02 07:08:37 PM UTC 24 Oct 02 07:08:58 PM UTC 24 9202576534 ps
T125 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/6.uart_stress_all.3720789584 Oct 02 07:08:02 PM UTC 24 Oct 02 07:09:00 PM UTC 24 105929817365 ps
T428 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/8.uart_alert_test.3100603359 Oct 02 07:08:59 PM UTC 24 Oct 02 07:09:00 PM UTC 24 32428282 ps
T429 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/8.uart_loopback.1022340400 Oct 02 07:08:52 PM UTC 24 Oct 02 07:09:00 PM UTC 24 6974220085 ps
T430 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/7.uart_rx_oversample.591575005 Oct 02 07:08:10 PM UTC 24 Oct 02 07:09:00 PM UTC 24 5281439482 ps
T34 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/6.uart_stress_all_with_rand_reset.2714375775 Oct 02 07:08:01 PM UTC 24 Oct 02 07:09:03 PM UTC 24 8179786606 ps
T431 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/6.uart_rx_oversample.1578179165 Oct 02 07:07:52 PM UTC 24 Oct 02 07:09:07 PM UTC 24 6837811397 ps
T432 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/8.uart_rx_oversample.821180219 Oct 02 07:08:33 PM UTC 24 Oct 02 07:09:09 PM UTC 24 4395257665 ps
T322 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/7.uart_noise_filter.1537180912 Oct 02 07:08:10 PM UTC 24 Oct 02 07:09:10 PM UTC 24 36320237514 ps
T120 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/8.uart_fifo_overflow.1361571106 Oct 02 07:08:32 PM UTC 24 Oct 02 07:09:14 PM UTC 24 25732630940 ps
T116 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_stress_all.657829758 Oct 02 07:06:42 PM UTC 24 Oct 02 07:09:15 PM UTC 24 236985442116 ps
T375 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/9.uart_rx_start_bit_filter.1111387175 Oct 02 07:09:12 PM UTC 24 Oct 02 07:09:19 PM UTC 24 2795635259 ps
T276 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/0.uart_perf.535293034 Oct 02 07:06:41 PM UTC 24 Oct 02 07:09:19 PM UTC 24 8010403513 ps
T169 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/8.uart_fifo_reset.44330927 Oct 02 07:08:33 PM UTC 24 Oct 02 07:09:21 PM UTC 24 101080534680 ps
T348 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/9.uart_smoke.3971996909 Oct 02 07:09:01 PM UTC 24 Oct 02 07:09:23 PM UTC 24 5362608490 ps
T401 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/9.uart_loopback.4268913974 Oct 02 07:09:20 PM UTC 24 Oct 02 07:09:26 PM UTC 24 2187850906 ps
T341 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/8.uart_smoke.2448556708 Oct 02 07:08:29 PM UTC 24 Oct 02 07:09:27 PM UTC 24 10584898137 ps
T319 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/9.uart_tx_ovrd.1545702160 Oct 02 07:09:16 PM UTC 24 Oct 02 07:09:27 PM UTC 24 8599382600 ps
T433 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/9.uart_alert_test.839377094 Oct 02 07:09:28 PM UTC 24 Oct 02 07:09:30 PM UTC 24 141435933 ps
T321 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/10.uart_smoke.174534253 Oct 02 07:09:28 PM UTC 24 Oct 02 07:09:33 PM UTC 24 451584090 ps
T127 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/8.uart_rx_parity_err.1770731219 Oct 02 07:08:46 PM UTC 24 Oct 02 07:09:34 PM UTC 24 70681614597 ps
T254 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_long_xfer_wo_dly.103558744 Oct 02 07:07:01 PM UTC 24 Oct 02 07:09:34 PM UTC 24 78328790830 ps
T310 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/5.uart_tx_rx.703197838 Oct 02 07:07:34 PM UTC 24 Oct 02 07:09:35 PM UTC 24 81739928296 ps
T97 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/9.uart_fifo_full.138938713 Oct 02 07:09:02 PM UTC 24 Oct 02 07:09:36 PM UTC 24 21682737502 ps
T255 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/1.uart_stress_all.3458701293 Oct 02 07:07:02 PM UTC 24 Oct 02 07:09:37 PM UTC 24 369676422356 ps
T128 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/9.uart_fifo_reset.164639922 Oct 02 07:09:04 PM UTC 24 Oct 02 07:09:38 PM UTC 24 77533126557 ps
T262 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/3.uart_intr.170987136 Oct 02 07:07:12 PM UTC 24 Oct 02 07:09:39 PM UTC 24 52535509518 ps
T269 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/3.uart_tx_rx.2865476687 Oct 02 07:07:11 PM UTC 24 Oct 02 07:09:40 PM UTC 24 131051249709 ps
T316 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/8.uart_fifo_full.19869805 Oct 02 07:08:31 PM UTC 24 Oct 02 07:09:40 PM UTC 24 88354055981 ps
T248 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/7.uart_fifo_full.1056060223 Oct 02 07:08:06 PM UTC 24 Oct 02 07:09:41 PM UTC 24 112302251922 ps
T314 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/3.uart_fifo_full.1864403273 Oct 02 07:07:12 PM UTC 24 Oct 02 07:09:42 PM UTC 24 69776438483 ps
T434 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/9.uart_rx_oversample.3667802618 Oct 02 07:09:08 PM UTC 24 Oct 02 07:09:48 PM UTC 24 7570778985 ps
T284 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/7.uart_tx_rx.4030031236 Oct 02 07:08:06 PM UTC 24 Oct 02 07:09:50 PM UTC 24 47596210481 ps
T35 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/9.uart_stress_all_with_rand_reset.407026620 Oct 02 07:09:23 PM UTC 24 Oct 02 07:09:54 PM UTC 24 7965195865 ps
T265 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/8.uart_tx_rx.390439138 Oct 02 07:08:29 PM UTC 24 Oct 02 07:09:55 PM UTC 24 123298826017 ps
T249 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/4.uart_stress_all.3371673534 Oct 02 07:07:28 PM UTC 24 Oct 02 07:09:55 PM UTC 24 90510410007 ps
T355 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/10.uart_rx_start_bit_filter.2476707422 Oct 02 07:09:39 PM UTC 24 Oct 02 07:09:56 PM UTC 24 37069701100 ps
T435 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/10.uart_alert_test.2644208843 Oct 02 07:09:55 PM UTC 24 Oct 02 07:09:57 PM UTC 24 45438951 ps
T126 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/7.uart_stress_all.2419750592 Oct 02 07:08:23 PM UTC 24 Oct 02 07:09:58 PM UTC 24 66740038527 ps
T291 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/11.uart_smoke.3644943150 Oct 02 07:09:56 PM UTC 24 Oct 02 07:10:00 PM UTC 24 304360762 ps
T100 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/10.uart_rx_parity_err.3309145235 Oct 02 07:09:40 PM UTC 24 Oct 02 07:10:00 PM UTC 24 41745823315 ps
T261 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/9.uart_rx_parity_err.2811220154 Oct 02 07:09:15 PM UTC 24 Oct 02 07:10:06 PM UTC 24 52192359257 ps
T266 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/5.uart_stress_all.386508079 Oct 02 07:07:45 PM UTC 24 Oct 02 07:10:07 PM UTC 24 80830227859 ps
T436 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/10.uart_rx_oversample.563336059 Oct 02 07:09:36 PM UTC 24 Oct 02 07:10:08 PM UTC 24 6501702470 ps
T251 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/3.uart_perf.3042161654 Oct 02 07:07:16 PM UTC 24 Oct 02 07:10:11 PM UTC 24 19550539258 ps
T298 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/11.uart_rx_start_bit_filter.3850846517 Oct 02 07:10:08 PM UTC 24 Oct 02 07:10:11 PM UTC 24 4701237347 ps
T437 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/11.uart_rx_oversample.851060841 Oct 02 07:10:00 PM UTC 24 Oct 02 07:10:11 PM UTC 24 2516433716 ps
T359 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/10.uart_stress_all.3727144329 Oct 02 07:09:51 PM UTC 24 Oct 02 07:10:13 PM UTC 24 12718365416 ps
T357 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/11.uart_tx_ovrd.2687341224 Oct 02 07:10:12 PM UTC 24 Oct 02 07:10:15 PM UTC 24 966251335 ps
T270 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/6.uart_long_xfer_wo_dly.765119480 Oct 02 07:08:01 PM UTC 24 Oct 02 07:10:16 PM UTC 24 65032599983 ps
T296 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/5.uart_noise_filter.709537520 Oct 02 07:07:37 PM UTC 24 Oct 02 07:10:16 PM UTC 24 85703917409 ps
T283 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/6.uart_rx_parity_err.2135085644 Oct 02 07:07:55 PM UTC 24 Oct 02 07:10:16 PM UTC 24 104712122000 ps
T335 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/10.uart_tx_ovrd.1337692935 Oct 02 07:09:41 PM UTC 24 Oct 02 07:10:18 PM UTC 24 12144022718 ps
T438 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/11.uart_alert_test.1580780157 Oct 02 07:10:16 PM UTC 24 Oct 02 07:10:18 PM UTC 24 38674606 ps
T256 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/5.uart_rx_parity_err.2746593765 Oct 02 07:07:37 PM UTC 24 Oct 02 07:10:20 PM UTC 24 80885814985 ps
T250 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/3.uart_noise_filter.4165003395 Oct 02 07:07:12 PM UTC 24 Oct 02 07:10:22 PM UTC 24 101141171018 ps
T317 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/10.uart_fifo_overflow.2210376434 Oct 02 07:09:35 PM UTC 24 Oct 02 07:10:22 PM UTC 24 61301326170 ps
T439 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/11.uart_loopback.699577437 Oct 02 07:10:12 PM UTC 24 Oct 02 07:10:26 PM UTC 24 3231170899 ps
T132 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/4.uart_fifo_reset.2017410741 Oct 02 07:07:20 PM UTC 24 Oct 02 07:10:28 PM UTC 24 98360156463 ps
T320 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/12.uart_smoke.2972339200 Oct 02 07:10:17 PM UTC 24 Oct 02 07:10:28 PM UTC 24 6221696742 ps
T353 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/11.uart_tx_rx.1700622119 Oct 02 07:09:56 PM UTC 24 Oct 02 07:10:30 PM UTC 24 53083841704 ps
T440 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/10.uart_loopback.997600501 Oct 02 07:09:41 PM UTC 24 Oct 02 07:10:32 PM UTC 24 10807661362 ps
T280 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/6.uart_perf.550520859 Oct 02 07:07:59 PM UTC 24 Oct 02 07:10:32 PM UTC 24 10335365262 ps
T36 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/8.uart_stress_all_with_rand_reset.1078195679 Oct 02 07:08:55 PM UTC 24 Oct 02 07:10:32 PM UTC 24 13178518021 ps
T260 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/10.uart_tx_rx.2820397628 Oct 02 07:09:32 PM UTC 24 Oct 02 07:10:34 PM UTC 24 70917654186 ps
T137 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/11.uart_fifo_full.4002408390 Oct 02 07:09:57 PM UTC 24 Oct 02 07:10:34 PM UTC 24 60532789165 ps
T272 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/10.uart_fifo_full.1897026368 Oct 02 07:09:35 PM UTC 24 Oct 02 07:10:35 PM UTC 24 126497080115 ps
T383 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/12.uart_tx_ovrd.1309465574 Oct 02 07:10:30 PM UTC 24 Oct 02 07:10:36 PM UTC 24 990020071 ps
T441 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/12.uart_alert_test.2157565766 Oct 02 07:10:36 PM UTC 24 Oct 02 07:10:38 PM UTC 24 21431153 ps
T297 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/12.uart_fifo_reset.328795709 Oct 02 07:10:22 PM UTC 24 Oct 02 07:10:40 PM UTC 24 35250717921 ps
T442 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/13.uart_smoke.1377190690 Oct 02 07:10:37 PM UTC 24 Oct 02 07:10:41 PM UTC 24 639829224 ps
T307 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/6.uart_fifo_full.220099832 Oct 02 07:07:49 PM UTC 24 Oct 02 07:10:41 PM UTC 24 80491834591 ps
T274 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/4.uart_long_xfer_wo_dly.1133429161 Oct 02 07:07:23 PM UTC 24 Oct 02 07:10:44 PM UTC 24 35980982649 ps
T391 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/12.uart_stress_all_with_rand_reset.2555912700 Oct 02 07:10:35 PM UTC 24 Oct 02 07:10:48 PM UTC 24 1124964492 ps
T345 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/12.uart_rx_start_bit_filter.2675032703 Oct 02 07:10:29 PM UTC 24 Oct 02 07:10:48 PM UTC 24 45332234902 ps
T121 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/10.uart_fifo_reset.373683971 Oct 02 07:09:36 PM UTC 24 Oct 02 07:10:51 PM UTC 24 26563114839 ps
T443 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/10.uart_intr.2287743213 Oct 02 07:09:37 PM UTC 24 Oct 02 07:10:52 PM UTC 24 28665333421 ps
T267 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/7.uart_fifo_overflow.2831473011 Oct 02 07:08:06 PM UTC 24 Oct 02 07:10:53 PM UTC 24 78817759289 ps
T118 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/11.uart_stress_all.3065197609 Oct 02 07:10:16 PM UTC 24 Oct 02 07:10:57 PM UTC 24 111583170944 ps
T332 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/12.uart_intr.2593051165 Oct 02 07:10:23 PM UTC 24 Oct 02 07:10:58 PM UTC 24 14784258952 ps
T134 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/11.uart_fifo_reset.4283963924 Oct 02 07:09:58 PM UTC 24 Oct 02 07:10:58 PM UTC 24 28183990359 ps
T444 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/12.uart_loopback.1880991983 Oct 02 07:10:32 PM UTC 24 Oct 02 07:10:59 PM UTC 24 6750609203 ps
T445 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/13.uart_loopback.4123073063 Oct 02 07:10:58 PM UTC 24 Oct 02 07:11:00 PM UTC 24 56173239 ps
T303 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/9.uart_noise_filter.3403618217 Oct 02 07:09:11 PM UTC 24 Oct 02 07:11:01 PM UTC 24 59071645395 ps
T257 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/7.uart_perf.1580705174 Oct 02 07:08:18 PM UTC 24 Oct 02 07:11:01 PM UTC 24 9185685032 ps
T446 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/13.uart_alert_test.3069311864 Oct 02 07:11:01 PM UTC 24 Oct 02 07:11:03 PM UTC 24 78654605 ps
T384 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/14.uart_smoke.3416564476 Oct 02 07:11:02 PM UTC 24 Oct 02 07:11:06 PM UTC 24 313690867 ps
T387 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/13.uart_rx_start_bit_filter.4892013 Oct 02 07:10:52 PM UTC 24 Oct 02 07:11:06 PM UTC 24 3442981700 ps
T155 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/12.uart_rx_parity_err.4245245119 Oct 02 07:10:29 PM UTC 24 Oct 02 07:11:09 PM UTC 24 293693712739 ps
T447 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/12.uart_rx_oversample.2087446242 Oct 02 07:10:23 PM UTC 24 Oct 02 07:11:10 PM UTC 24 7651595013 ps
T448 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/13.uart_noise_filter.2826864650 Oct 02 07:10:49 PM UTC 24 Oct 02 07:11:11 PM UTC 24 13569312440 ps
T287 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/11.uart_rx_parity_err.704463249 Oct 02 07:10:09 PM UTC 24 Oct 02 07:11:11 PM UTC 24 29796371901 ps
T98 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/10.uart_noise_filter.1704588378 Oct 02 07:09:38 PM UTC 24 Oct 02 07:11:12 PM UTC 24 195032764579 ps
T302 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/13.uart_tx_ovrd.3489183788 Oct 02 07:10:54 PM UTC 24 Oct 02 07:11:17 PM UTC 24 6827666122 ps
T107 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/11.uart_stress_all_with_rand_reset.3559952421 Oct 02 07:10:16 PM UTC 24 Oct 02 07:11:18 PM UTC 24 4173664847 ps
T101 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/13.uart_fifo_reset.3121835311 Oct 02 07:10:41 PM UTC 24 Oct 02 07:11:20 PM UTC 24 22617210908 ps
T449 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/14.uart_loopback.2803470732 Oct 02 07:11:19 PM UTC 24 Oct 02 07:11:21 PM UTC 24 107856847 ps
T381 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/14.uart_tx_ovrd.3523350349 Oct 02 07:11:18 PM UTC 24 Oct 02 07:11:22 PM UTC 24 5511903718 ps
T299 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/12.uart_noise_filter.1163130598 Oct 02 07:10:27 PM UTC 24 Oct 02 07:11:23 PM UTC 24 49641668711 ps
T450 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/14.uart_rx_oversample.3361796660 Oct 02 07:11:11 PM UTC 24 Oct 02 07:11:25 PM UTC 24 2612349091 ps
T258 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/9.uart_long_xfer_wo_dly.2847225789 Oct 02 07:09:22 PM UTC 24 Oct 02 07:11:27 PM UTC 24 66049347414 ps
T377 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/14.uart_rx_start_bit_filter.1350493415 Oct 02 07:11:13 PM UTC 24 Oct 02 07:11:29 PM UTC 24 6396517274 ps
T451 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/14.uart_alert_test.3432618924 Oct 02 07:11:27 PM UTC 24 Oct 02 07:11:29 PM UTC 24 26350970 ps
T318 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/5.uart_long_xfer_wo_dly.1803993116 Oct 02 07:07:43 PM UTC 24 Oct 02 07:11:29 PM UTC 24 64654526762 ps
T452 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/15.uart_smoke.46321653 Oct 02 07:11:29 PM UTC 24 Oct 02 07:11:31 PM UTC 24 132032758 ps
T139 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/14.uart_fifo_reset.427464820 Oct 02 07:11:10 PM UTC 24 Oct 02 07:11:35 PM UTC 24 20746917953 ps
T338 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/12.uart_fifo_overflow.3104030991 Oct 02 07:10:21 PM UTC 24 Oct 02 07:11:35 PM UTC 24 115786653675 ps
T453 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/13.uart_rx_oversample.488142915 Oct 02 07:10:45 PM UTC 24 Oct 02 07:11:36 PM UTC 24 6868901010 ps
T168 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/7.uart_fifo_reset.2990719490 Oct 02 07:08:07 PM UTC 24 Oct 02 07:11:41 PM UTC 24 108415368863 ps
T324 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/13.uart_stress_all_with_rand_reset.1845750247 Oct 02 07:11:00 PM UTC 24 Oct 02 07:11:44 PM UTC 24 3190794464 ps
T454 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/13.uart_intr.2119535427 Oct 02 07:10:48 PM UTC 24 Oct 02 07:11:44 PM UTC 24 20633655925 ps
T455 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/14.uart_intr.123165165 Oct 02 07:11:12 PM UTC 24 Oct 02 07:11:45 PM UTC 24 9390540073 ps
T328 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/15.uart_rx_start_bit_filter.916334433 Oct 02 07:11:42 PM UTC 24 Oct 02 07:11:46 PM UTC 24 2167067454 ps
T285 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/14.uart_tx_rx.1493498244 Oct 02 07:11:04 PM UTC 24 Oct 02 07:11:46 PM UTC 24 23333078906 ps
T268 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/2.uart_fifo_full.3060139095 Oct 02 07:07:06 PM UTC 24 Oct 02 07:13:29 PM UTC 24 169375783035 ps
T456 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/15.uart_tx_ovrd.1852760838 Oct 02 07:11:46 PM UTC 24 Oct 02 07:11:50 PM UTC 24 1317940876 ps
T457 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/15.uart_rx_oversample.127332257 Oct 02 07:11:36 PM UTC 24 Oct 02 07:11:50 PM UTC 24 5724487020 ps
T399 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/15.uart_loopback.4110664674 Oct 02 07:11:46 PM UTC 24 Oct 02 07:12:04 PM UTC 24 8823100633 ps
T315 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/8.uart_long_xfer_wo_dly.2878896951 Oct 02 07:08:54 PM UTC 24 Oct 02 07:12:05 PM UTC 24 65091118238 ps
T458 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/15.uart_alert_test.3870991513 Oct 02 07:12:05 PM UTC 24 Oct 02 07:12:06 PM UTC 24 16133054 ps
T360 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/16.uart_smoke.1493729392 Oct 02 07:12:07 PM UTC 24 Oct 02 07:12:10 PM UTC 24 294413622 ps
T102 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/15.uart_fifo_full.4268010751 Oct 02 07:11:31 PM UTC 24 Oct 02 07:12:11 PM UTC 24 140745953106 ps
T300 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/14.uart_noise_filter.1856938353 Oct 02 07:11:12 PM UTC 24 Oct 02 07:12:11 PM UTC 24 68111981312 ps
T388 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/5.uart_intr.2080187674 Oct 02 07:07:36 PM UTC 24 Oct 02 07:12:12 PM UTC 24 286275410980 ps
T153 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/14.uart_fifo_overflow.518594241 Oct 02 07:11:07 PM UTC 24 Oct 02 07:12:13 PM UTC 24 74707626556 ps
T309 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/15.uart_fifo_reset.1019843260 Oct 02 07:11:33 PM UTC 24 Oct 02 07:12:18 PM UTC 24 34975764555 ps
T376 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/14.uart_fifo_full.2770143609 Oct 02 07:11:07 PM UTC 24 Oct 02 07:12:19 PM UTC 24 101042053020 ps
T108 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/15.uart_stress_all.2833504233 Oct 02 07:11:52 PM UTC 24 Oct 02 07:12:21 PM UTC 24 92655125847 ps
T106 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/14.uart_stress_all_with_rand_reset.1007306390 Oct 02 07:11:25 PM UTC 24 Oct 02 07:12:23 PM UTC 24 20527694632 ps
T123 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/13.uart_fifo_overflow.1392787480 Oct 02 07:10:41 PM UTC 24 Oct 02 07:12:25 PM UTC 24 212800751240 ps
T459 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/16.uart_tx_ovrd.595177141 Oct 02 07:12:25 PM UTC 24 Oct 02 07:12:28 PM UTC 24 841646336 ps
T396 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/16.uart_loopback.4062291587 Oct 02 07:12:27 PM UTC 24 Oct 02 07:12:29 PM UTC 24 289938754 ps
T252 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/15.uart_tx_rx.4278804417 Oct 02 07:11:31 PM UTC 24 Oct 02 07:12:31 PM UTC 24 21381593185 ps
T373 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/16.uart_fifo_full.2945064504 Oct 02 07:12:11 PM UTC 24 Oct 02 07:12:43 PM UTC 24 63644322356 ps
T281 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/9.uart_tx_rx.3441502025 Oct 02 07:09:02 PM UTC 24 Oct 02 07:12:43 PM UTC 24 150236234332 ps
T460 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/16.uart_rx_start_bit_filter.3407608758 Oct 02 07:12:21 PM UTC 24 Oct 02 07:12:43 PM UTC 24 5922095735 ps
T136 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/12.uart_fifo_full.4159888123 Oct 02 07:10:20 PM UTC 24 Oct 02 07:12:44 PM UTC 24 79627634258 ps
T364 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/16.uart_tx_rx.4160859391 Oct 02 07:12:09 PM UTC 24 Oct 02 07:12:44 PM UTC 24 32379404808 ps
T293 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/14.uart_rx_parity_err.3127331327 Oct 02 07:11:15 PM UTC 24 Oct 02 07:12:44 PM UTC 24 99213545332 ps
T122 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/15.uart_rx_parity_err.2971503152 Oct 02 07:11:46 PM UTC 24 Oct 02 07:12:45 PM UTC 24 39938222565 ps
T312 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/16.uart_fifo_reset.2966061599 Oct 02 07:12:13 PM UTC 24 Oct 02 07:12:46 PM UTC 24 57392008270 ps
T313 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/9.uart_fifo_overflow.3637646992 Oct 02 07:09:02 PM UTC 24 Oct 02 07:12:46 PM UTC 24 90590641260 ps
T461 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/16.uart_alert_test.1625490027 Oct 02 07:12:44 PM UTC 24 Oct 02 07:12:46 PM UTC 24 13149447 ps
T462 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/17.uart_smoke.2612545180 Oct 02 07:12:44 PM UTC 24 Oct 02 07:12:48 PM UTC 24 285706109 ps
T362 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/4.uart_fifo_overflow.2116998677 Oct 02 07:07:19 PM UTC 24 Oct 02 07:12:49 PM UTC 24 132390264652 ps
T463 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/17.uart_rx_oversample.3140169802 Oct 02 07:12:46 PM UTC 24 Oct 02 07:12:50 PM UTC 24 2709724990 ps
T327 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/12.uart_tx_rx.3334426957 Oct 02 07:10:19 PM UTC 24 Oct 02 07:12:51 PM UTC 24 137112965682 ps
T358 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/17.uart_rx_start_bit_filter.2503282354 Oct 02 07:12:47 PM UTC 24 Oct 02 07:12:53 PM UTC 24 2466941908 ps
T464 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/17.uart_tx_ovrd.2753795234 Oct 02 07:12:50 PM UTC 24 Oct 02 07:12:56 PM UTC 24 901895698 ps
T145 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/17.uart_fifo_reset.1403607201 Oct 02 07:12:45 PM UTC 24 Oct 02 07:12:58 PM UTC 24 11796537456 ps
T294 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/13.uart_tx_rx.1585485535 Oct 02 07:10:38 PM UTC 24 Oct 02 07:12:58 PM UTC 24 50345390313 ps
T368 /workspaces/repo/scratch/os_regression_2024_10_02/uart-sim-vcs/coverage/default/9.uart_intr.3056834803 Oct 02 07:09:11 PM UTC 24 Oct 02 07:12:58 PM UTC 24 175095485677 ps
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