| T187 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/12.uart_fifo_reset.1230253998 |
|
|
Oct 12 01:33:29 PM UTC 24 |
Oct 12 01:36:28 PM UTC 24 |
50509532816 ps |
| T134 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/11.uart_rx_parity_err.81435788 |
|
|
Oct 12 01:33:06 PM UTC 24 |
Oct 12 01:36:28 PM UTC 24 |
163335906658 ps |
| T392 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/7.uart_perf.4155036321 |
|
|
Oct 12 01:30:39 PM UTC 24 |
Oct 12 01:36:29 PM UTC 24 |
10027413578 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/17.uart_tx_ovrd.290562692 |
|
|
Oct 12 01:36:25 PM UTC 24 |
Oct 12 01:36:30 PM UTC 24 |
1471985564 ps |
| T478 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/17.uart_loopback.2394847584 |
|
|
Oct 12 01:36:26 PM UTC 24 |
Oct 12 01:36:31 PM UTC 24 |
6002458182 ps |
| T479 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/17.uart_alert_test.3820828279 |
|
|
Oct 12 01:36:30 PM UTC 24 |
Oct 12 01:36:32 PM UTC 24 |
11008061 ps |
| T119 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/11.uart_stress_all.1656149931 |
|
|
Oct 12 01:33:16 PM UTC 24 |
Oct 12 01:36:35 PM UTC 24 |
313510861614 ps |
| T120 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/15.uart_stress_all_with_rand_reset.1839853265 |
|
|
Oct 12 01:35:23 PM UTC 24 |
Oct 12 01:36:38 PM UTC 24 |
1510312593 ps |
| T353 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/10.uart_long_xfer_wo_dly.382774602 |
|
|
Oct 12 01:32:43 PM UTC 24 |
Oct 12 01:36:41 PM UTC 24 |
78311869944 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/14.uart_fifo_overflow.3807058331 |
|
|
Oct 12 01:34:40 PM UTC 24 |
Oct 12 01:36:42 PM UTC 24 |
38850522909 ps |
| T480 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/18.uart_rx_oversample.3468990111 |
|
|
Oct 12 01:36:43 PM UTC 24 |
Oct 12 01:36:46 PM UTC 24 |
1172650139 ps |
| T193 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/17.uart_fifo_reset.843602200 |
|
|
Oct 12 01:36:09 PM UTC 24 |
Oct 12 01:36:47 PM UTC 24 |
22451265048 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/17.uart_tx_rx.191591984 |
|
|
Oct 12 01:36:05 PM UTC 24 |
Oct 12 01:36:47 PM UTC 24 |
87434287467 ps |
| T176 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/17.uart_rx_parity_err.970180899 |
|
|
Oct 12 01:36:23 PM UTC 24 |
Oct 12 01:36:52 PM UTC 24 |
14018875581 ps |
| T412 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/18.uart_intr.4201946680 |
|
|
Oct 12 01:36:47 PM UTC 24 |
Oct 12 01:36:54 PM UTC 24 |
14139487825 ps |
| T289 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/14.uart_stress_all.2165400035 |
|
|
Oct 12 01:35:10 PM UTC 24 |
Oct 12 01:36:54 PM UTC 24 |
253809299411 ps |
| T302 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/11.uart_intr.3845543158 |
|
|
Oct 12 01:32:55 PM UTC 24 |
Oct 12 01:36:56 PM UTC 24 |
378919715449 ps |
| T481 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/18.uart_tx_ovrd.1850479193 |
|
|
Oct 12 01:36:54 PM UTC 24 |
Oct 12 01:36:58 PM UTC 24 |
750552336 ps |
| T121 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/17.uart_stress_all_with_rand_reset.513005664 |
|
|
Oct 12 01:36:29 PM UTC 24 |
Oct 12 01:36:59 PM UTC 24 |
1249063349 ps |
| T482 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/18.uart_smoke.2393952229 |
|
|
Oct 12 01:36:32 PM UTC 24 |
Oct 12 01:37:08 PM UTC 24 |
6300384694 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/15.uart_tx_rx.3266395744 |
|
|
Oct 12 01:35:16 PM UTC 24 |
Oct 12 01:37:09 PM UTC 24 |
251220424984 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/18.uart_alert_test.3636891145 |
|
|
Oct 12 01:37:09 PM UTC 24 |
Oct 12 01:37:11 PM UTC 24 |
13522551 ps |
| T154 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/18.uart_fifo_overflow.669305781 |
|
|
Oct 12 01:36:39 PM UTC 24 |
Oct 12 01:37:12 PM UTC 24 |
22222184265 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/19.uart_smoke.376426995 |
|
|
Oct 12 01:37:10 PM UTC 24 |
Oct 12 01:37:13 PM UTC 24 |
750015547 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/18.uart_loopback.2695036362 |
|
|
Oct 12 01:36:55 PM UTC 24 |
Oct 12 01:37:18 PM UTC 24 |
6640626208 ps |
| T283 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/14.uart_tx_rx.2438020977 |
|
|
Oct 12 01:34:38 PM UTC 24 |
Oct 12 01:37:19 PM UTC 24 |
77341180698 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/18.uart_rx_start_bit_filter.4203966050 |
|
|
Oct 12 01:36:48 PM UTC 24 |
Oct 12 01:37:21 PM UTC 24 |
41120289025 ps |
| T404 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/16.uart_intr.4289511859 |
|
|
Oct 12 01:35:38 PM UTC 24 |
Oct 12 01:37:22 PM UTC 24 |
331096283935 ps |
| T355 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/16.uart_rx_parity_err.1858858584 |
|
|
Oct 12 01:35:38 PM UTC 24 |
Oct 12 01:37:24 PM UTC 24 |
146218990016 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/19.uart_rx_start_bit_filter.877891525 |
|
|
Oct 12 01:37:25 PM UTC 24 |
Oct 12 01:37:30 PM UTC 24 |
4055730381 ps |
| T352 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/17.uart_perf.258471496 |
|
|
Oct 12 01:36:28 PM UTC 24 |
Oct 12 01:37:32 PM UTC 24 |
14103015165 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/17.uart_rx_oversample.3536638746 |
|
|
Oct 12 01:36:10 PM UTC 24 |
Oct 12 01:37:32 PM UTC 24 |
6198279721 ps |
| T122 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/18.uart_stress_all_with_rand_reset.2186519294 |
|
|
Oct 12 01:37:00 PM UTC 24 |
Oct 12 01:37:33 PM UTC 24 |
7073452679 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/12.uart_long_xfer_wo_dly.2791965970 |
|
|
Oct 12 01:33:49 PM UTC 24 |
Oct 12 01:37:33 PM UTC 24 |
125432502982 ps |
| T221 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/14.uart_fifo_reset.3109779618 |
|
|
Oct 12 01:34:42 PM UTC 24 |
Oct 12 01:37:34 PM UTC 24 |
234699904156 ps |
| T284 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/19.uart_tx_ovrd.2145851474 |
|
|
Oct 12 01:37:32 PM UTC 24 |
Oct 12 01:37:36 PM UTC 24 |
1210666807 ps |
| T428 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/17.uart_noise_filter.1344435398 |
|
|
Oct 12 01:36:13 PM UTC 24 |
Oct 12 01:37:36 PM UTC 24 |
59494857707 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/18.uart_fifo_reset.3395319775 |
|
|
Oct 12 01:36:42 PM UTC 24 |
Oct 12 01:37:37 PM UTC 24 |
56901855230 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/19.uart_intr.1243715959 |
|
|
Oct 12 01:37:22 PM UTC 24 |
Oct 12 01:37:37 PM UTC 24 |
14514917460 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/19.uart_rx_oversample.3455008892 |
|
|
Oct 12 01:37:20 PM UTC 24 |
Oct 12 01:37:38 PM UTC 24 |
3081678378 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/19.uart_alert_test.125453423 |
|
|
Oct 12 01:37:36 PM UTC 24 |
Oct 12 01:37:38 PM UTC 24 |
11545795 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/20.uart_smoke.1342854146 |
|
|
Oct 12 01:37:38 PM UTC 24 |
Oct 12 01:37:42 PM UTC 24 |
903544355 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/23.uart_loopback.2471445740 |
|
|
Oct 12 01:40:19 PM UTC 24 |
Oct 12 01:40:34 PM UTC 24 |
7033132839 ps |
| T146 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/19.uart_fifo_reset.3630996687 |
|
|
Oct 12 01:37:18 PM UTC 24 |
Oct 12 01:37:45 PM UTC 24 |
25127880860 ps |
| T113 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/17.uart_intr.3426253329 |
|
|
Oct 12 01:36:13 PM UTC 24 |
Oct 12 01:37:46 PM UTC 24 |
58926231290 ps |
| T156 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/17.uart_fifo_overflow.1003453611 |
|
|
Oct 12 01:36:08 PM UTC 24 |
Oct 12 01:37:47 PM UTC 24 |
34228752221 ps |
| T397 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/18.uart_rx_parity_err.1889664355 |
|
|
Oct 12 01:36:53 PM UTC 24 |
Oct 12 01:37:48 PM UTC 24 |
112343250836 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/18.uart_fifo_full.982815778 |
|
|
Oct 12 01:36:36 PM UTC 24 |
Oct 12 01:37:56 PM UTC 24 |
101449333893 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/19.uart_loopback.3926274829 |
|
|
Oct 12 01:37:33 PM UTC 24 |
Oct 12 01:37:58 PM UTC 24 |
6182228676 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/18.uart_tx_rx.2416974641 |
|
|
Oct 12 01:36:34 PM UTC 24 |
Oct 12 01:38:04 PM UTC 24 |
53176496509 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/20.uart_tx_ovrd.1159243761 |
|
|
Oct 12 01:37:59 PM UTC 24 |
Oct 12 01:38:04 PM UTC 24 |
535386888 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/20.uart_loopback.730681206 |
|
|
Oct 12 01:38:05 PM UTC 24 |
Oct 12 01:38:11 PM UTC 24 |
3915409935 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/20.uart_rx_oversample.2359810179 |
|
|
Oct 12 01:37:45 PM UTC 24 |
Oct 12 01:38:13 PM UTC 24 |
4016374902 ps |
| T123 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/13.uart_stress_all.2268594931 |
|
|
Oct 12 01:34:24 PM UTC 24 |
Oct 12 01:38:18 PM UTC 24 |
701559029019 ps |
| T202 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/20.uart_fifo_reset.425325901 |
|
|
Oct 12 01:37:43 PM UTC 24 |
Oct 12 01:38:31 PM UTC 24 |
53058456760 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/20.uart_alert_test.783680285 |
|
|
Oct 12 01:38:32 PM UTC 24 |
Oct 12 01:38:34 PM UTC 24 |
62142969 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/13.uart_long_xfer_wo_dly.2638608103 |
|
|
Oct 12 01:34:19 PM UTC 24 |
Oct 12 01:38:42 PM UTC 24 |
238494415396 ps |
| T375 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/20.uart_tx_rx.2515699322 |
|
|
Oct 12 01:37:39 PM UTC 24 |
Oct 12 01:38:42 PM UTC 24 |
32361650185 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/15.uart_perf.491125648 |
|
|
Oct 12 01:35:23 PM UTC 24 |
Oct 12 01:38:43 PM UTC 24 |
16951508360 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/19.uart_noise_filter.1583395348 |
|
|
Oct 12 01:37:23 PM UTC 24 |
Oct 12 01:38:44 PM UTC 24 |
56535523378 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/14.uart_perf.2311910394 |
|
|
Oct 12 01:35:05 PM UTC 24 |
Oct 12 01:38:45 PM UTC 24 |
16412121785 ps |
| T366 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/14.uart_rx_parity_err.630462273 |
|
|
Oct 12 01:35:00 PM UTC 24 |
Oct 12 01:38:46 PM UTC 24 |
111023737232 ps |
| T135 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/13.uart_fifo_full.1536649458 |
|
|
Oct 12 01:33:59 PM UTC 24 |
Oct 12 01:38:46 PM UTC 24 |
143236624440 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/21.uart_smoke.3019273955 |
|
|
Oct 12 01:38:35 PM UTC 24 |
Oct 12 01:38:48 PM UTC 24 |
5901933552 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/20.uart_stress_all_with_rand_reset.3686222109 |
|
|
Oct 12 01:38:13 PM UTC 24 |
Oct 12 01:38:52 PM UTC 24 |
17832696119 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/19.uart_fifo_full.1756416058 |
|
|
Oct 12 01:37:13 PM UTC 24 |
Oct 12 01:38:53 PM UTC 24 |
34960095175 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/21.uart_rx_start_bit_filter.1900987317 |
|
|
Oct 12 01:38:49 PM UTC 24 |
Oct 12 01:38:57 PM UTC 24 |
3883384447 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/21.uart_tx_ovrd.922817393 |
|
|
Oct 12 01:38:54 PM UTC 24 |
Oct 12 01:38:58 PM UTC 24 |
957510405 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/19.uart_perf.900432775 |
|
|
Oct 12 01:37:33 PM UTC 24 |
Oct 12 01:38:58 PM UTC 24 |
4404935214 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/12.uart_perf.2985356147 |
|
|
Oct 12 01:33:47 PM UTC 24 |
Oct 12 01:38:59 PM UTC 24 |
10502041205 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/21.uart_rx_oversample.2870324336 |
|
|
Oct 12 01:38:46 PM UTC 24 |
Oct 12 01:39:02 PM UTC 24 |
5643501373 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/20.uart_rx_start_bit_filter.2047452407 |
|
|
Oct 12 01:37:49 PM UTC 24 |
Oct 12 01:39:05 PM UTC 24 |
41506791849 ps |
| T106 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/20.uart_stress_all.1912293005 |
|
|
Oct 12 01:38:19 PM UTC 24 |
Oct 12 01:39:05 PM UTC 24 |
65762916249 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/21.uart_alert_test.2386767882 |
|
|
Oct 12 01:39:06 PM UTC 24 |
Oct 12 01:39:07 PM UTC 24 |
28808748 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/21.uart_intr.2808550730 |
|
|
Oct 12 01:38:47 PM UTC 24 |
Oct 12 01:39:17 PM UTC 24 |
193215283576 ps |
| T116 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/16.uart_stress_all.4042594513 |
|
|
Oct 12 01:35:51 PM UTC 24 |
Oct 12 01:39:17 PM UTC 24 |
29120925662 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/22.uart_smoke.3663859712 |
|
|
Oct 12 01:39:06 PM UTC 24 |
Oct 12 01:39:20 PM UTC 24 |
6215830288 ps |
| T167 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/21.uart_fifo_overflow.3840292106 |
|
|
Oct 12 01:38:43 PM UTC 24 |
Oct 12 01:39:25 PM UTC 24 |
24160509665 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/21.uart_rx_parity_err.2797599932 |
|
|
Oct 12 01:38:53 PM UTC 24 |
Oct 12 01:39:26 PM UTC 24 |
52698719056 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/21.uart_loopback.723448397 |
|
|
Oct 12 01:38:58 PM UTC 24 |
Oct 12 01:39:29 PM UTC 24 |
7621800613 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/22.uart_intr.4260363554 |
|
|
Oct 12 01:39:26 PM UTC 24 |
Oct 12 01:39:30 PM UTC 24 |
4226402528 ps |
| T343 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/14.uart_long_xfer_wo_dly.1613037585 |
|
|
Oct 12 01:35:09 PM UTC 24 |
Oct 12 01:39:31 PM UTC 24 |
71970542802 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/21.uart_tx_rx.1633355301 |
|
|
Oct 12 01:38:42 PM UTC 24 |
Oct 12 01:39:32 PM UTC 24 |
330678873469 ps |
| T344 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/3.uart_perf.2910779063 |
|
|
Oct 12 01:29:27 PM UTC 24 |
Oct 12 01:39:33 PM UTC 24 |
10257817685 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/22.uart_rx_start_bit_filter.1798077112 |
|
|
Oct 12 01:39:31 PM UTC 24 |
Oct 12 01:39:35 PM UTC 24 |
4815439879 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/22.uart_rx_oversample.3220624441 |
|
|
Oct 12 01:39:26 PM UTC 24 |
Oct 12 01:39:35 PM UTC 24 |
3249269382 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/22.uart_tx_ovrd.984601257 |
|
|
Oct 12 01:39:33 PM UTC 24 |
Oct 12 01:39:39 PM UTC 24 |
2053973973 ps |
| T93 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/19.uart_stress_all_with_rand_reset.2299177663 |
|
|
Oct 12 01:37:35 PM UTC 24 |
Oct 12 01:39:41 PM UTC 24 |
4825927454 ps |
| T333 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/19.uart_tx_rx.1760349604 |
|
|
Oct 12 01:37:12 PM UTC 24 |
Oct 12 01:39:42 PM UTC 24 |
68228203341 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/20.uart_intr.3952492751 |
|
|
Oct 12 01:37:47 PM UTC 24 |
Oct 12 01:39:43 PM UTC 24 |
40616872746 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/22.uart_alert_test.1890010615 |
|
|
Oct 12 01:39:43 PM UTC 24 |
Oct 12 01:39:45 PM UTC 24 |
16987082 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/23.uart_smoke.2689945665 |
|
|
Oct 12 01:39:44 PM UTC 24 |
Oct 12 01:39:48 PM UTC 24 |
557260392 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/20.uart_fifo_overflow.3968557020 |
|
|
Oct 12 01:37:39 PM UTC 24 |
Oct 12 01:39:52 PM UTC 24 |
91657864511 ps |
| T360 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/15.uart_long_xfer_wo_dly.2905059616 |
|
|
Oct 12 01:35:23 PM UTC 24 |
Oct 12 01:39:57 PM UTC 24 |
46612558061 ps |
| T390 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/19.uart_fifo_overflow.2318697745 |
|
|
Oct 12 01:37:13 PM UTC 24 |
Oct 12 01:40:01 PM UTC 24 |
305843744815 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/22.uart_noise_filter.3135345695 |
|
|
Oct 12 01:39:29 PM UTC 24 |
Oct 12 01:40:02 PM UTC 24 |
111329324370 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/22.uart_rx_parity_err.1571987531 |
|
|
Oct 12 01:39:31 PM UTC 24 |
Oct 12 01:40:05 PM UTC 24 |
47518299772 ps |
| T290 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/19.uart_rx_parity_err.3351234418 |
|
|
Oct 12 01:37:31 PM UTC 24 |
Oct 12 01:40:10 PM UTC 24 |
113639945679 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/22.uart_loopback.80693586 |
|
|
Oct 12 01:39:35 PM UTC 24 |
Oct 12 01:40:13 PM UTC 24 |
6142202579 ps |
| T382 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/20.uart_rx_parity_err.467348843 |
|
|
Oct 12 01:37:56 PM UTC 24 |
Oct 12 01:40:16 PM UTC 24 |
50896040820 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/23.uart_rx_start_bit_filter.2797376188 |
|
|
Oct 12 01:40:11 PM UTC 24 |
Oct 12 01:40:18 PM UTC 24 |
1482358828 ps |
| T374 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/18.uart_noise_filter.3769454589 |
|
|
Oct 12 01:36:48 PM UTC 24 |
Oct 12 01:40:19 PM UTC 24 |
56121639551 ps |
| T379 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/23.uart_tx_rx.3242557333 |
|
|
Oct 12 01:39:46 PM UTC 24 |
Oct 12 01:40:20 PM UTC 24 |
64194952551 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/24.uart_smoke.1294303403 |
|
|
Oct 12 01:40:28 PM UTC 24 |
Oct 12 01:40:32 PM UTC 24 |
407550281 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/23.uart_intr.1284963314 |
|
|
Oct 12 01:40:03 PM UTC 24 |
Oct 12 01:40:21 PM UTC 24 |
33327433596 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/21.uart_stress_all_with_rand_reset.2478196306 |
|
|
Oct 12 01:39:00 PM UTC 24 |
Oct 12 01:40:22 PM UTC 24 |
4271234290 ps |
| T383 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/5.uart_stress_all.22474645 |
|
|
Oct 12 01:30:06 PM UTC 24 |
Oct 12 01:40:24 PM UTC 24 |
686642028855 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/23.uart_alert_test.625445322 |
|
|
Oct 12 01:40:25 PM UTC 24 |
Oct 12 01:40:27 PM UTC 24 |
48576986 ps |
| T94 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/22.uart_stress_all_with_rand_reset.2397601772 |
|
|
Oct 12 01:39:40 PM UTC 24 |
Oct 12 01:40:33 PM UTC 24 |
3217050574 ps |
| T191 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/21.uart_fifo_reset.3627836139 |
|
|
Oct 12 01:38:44 PM UTC 24 |
Oct 12 01:40:34 PM UTC 24 |
184223998540 ps |
| T155 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/21.uart_fifo_full.621753207 |
|
|
Oct 12 01:38:42 PM UTC 24 |
Oct 12 01:40:36 PM UTC 24 |
114201404857 ps |
| T150 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/22.uart_fifo_reset.577809901 |
|
|
Oct 12 01:39:20 PM UTC 24 |
Oct 12 01:40:38 PM UTC 24 |
100642437526 ps |
| T335 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/22.uart_fifo_overflow.4256236930 |
|
|
Oct 12 01:39:18 PM UTC 24 |
Oct 12 01:40:39 PM UTC 24 |
93855531703 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/23.uart_tx_ovrd.4269768420 |
|
|
Oct 12 01:40:17 PM UTC 24 |
Oct 12 01:40:43 PM UTC 24 |
12334740318 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/23.uart_rx_oversample.1323051782 |
|
|
Oct 12 01:40:02 PM UTC 24 |
Oct 12 01:40:46 PM UTC 24 |
3690353289 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/24.uart_rx_oversample.1226989822 |
|
|
Oct 12 01:40:37 PM UTC 24 |
Oct 12 01:40:47 PM UTC 24 |
1475080415 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/24.uart_rx_start_bit_filter.341468025 |
|
|
Oct 12 01:40:43 PM UTC 24 |
Oct 12 01:40:52 PM UTC 24 |
1541153673 ps |
| T171 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/20.uart_fifo_full.3865754162 |
|
|
Oct 12 01:37:39 PM UTC 24 |
Oct 12 01:40:55 PM UTC 24 |
220340335071 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/24.uart_intr.156704393 |
|
|
Oct 12 01:40:39 PM UTC 24 |
Oct 12 01:40:55 PM UTC 24 |
14934218889 ps |
| T365 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/9.uart_long_xfer_wo_dly.1944076153 |
|
|
Oct 12 01:32:02 PM UTC 24 |
Oct 12 01:40:55 PM UTC 24 |
131237174307 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/24.uart_loopback.3175687709 |
|
|
Oct 12 01:40:53 PM UTC 24 |
Oct 12 01:40:58 PM UTC 24 |
3040123620 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/24.uart_noise_filter.4135117106 |
|
|
Oct 12 01:40:40 PM UTC 24 |
Oct 12 01:41:07 PM UTC 24 |
7962319099 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/8.uart_perf.1930271314 |
|
|
Oct 12 01:31:18 PM UTC 24 |
Oct 12 01:41:09 PM UTC 24 |
19595637525 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/24.uart_alert_test.3818024561 |
|
|
Oct 12 01:41:08 PM UTC 24 |
Oct 12 01:41:10 PM UTC 24 |
43207630 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/24.uart_tx_rx.2699045153 |
|
|
Oct 12 01:40:33 PM UTC 24 |
Oct 12 01:41:12 PM UTC 24 |
19374211448 ps |
| T396 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/23.uart_noise_filter.3543777427 |
|
|
Oct 12 01:40:06 PM UTC 24 |
Oct 12 01:41:13 PM UTC 24 |
72184676143 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/18.uart_long_xfer_wo_dly.2501796 |
|
|
Oct 12 01:37:00 PM UTC 24 |
Oct 12 01:41:14 PM UTC 24 |
99887691326 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/25.uart_smoke.696577323 |
|
|
Oct 12 01:41:09 PM UTC 24 |
Oct 12 01:41:14 PM UTC 24 |
473507799 ps |
| T95 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/23.uart_stress_all_with_rand_reset.1962246133 |
|
|
Oct 12 01:40:21 PM UTC 24 |
Oct 12 01:41:14 PM UTC 24 |
23683007730 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/24.uart_fifo_overflow.3400075419 |
|
|
Oct 12 01:40:35 PM UTC 24 |
Oct 12 01:41:15 PM UTC 24 |
13529569038 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/20.uart_noise_filter.2011793843 |
|
|
Oct 12 01:37:48 PM UTC 24 |
Oct 12 01:41:21 PM UTC 24 |
272934865312 ps |
| T410 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/23.uart_rx_parity_err.2490931626 |
|
|
Oct 12 01:40:14 PM UTC 24 |
Oct 12 01:41:24 PM UTC 24 |
44066530331 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/25.uart_intr.4193528866 |
|
|
Oct 12 01:41:16 PM UTC 24 |
Oct 12 01:41:25 PM UTC 24 |
7484659651 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/24.uart_tx_ovrd.4202778487 |
|
|
Oct 12 01:40:49 PM UTC 24 |
Oct 12 01:41:26 PM UTC 24 |
6923559031 ps |
| T431 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/23.uart_fifo_reset.2781275905 |
|
|
Oct 12 01:39:57 PM UTC 24 |
Oct 12 01:41:32 PM UTC 24 |
258770831202 ps |
| T169 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/23.uart_fifo_full.323530784 |
|
|
Oct 12 01:39:48 PM UTC 24 |
Oct 12 01:41:33 PM UTC 24 |
89112408158 ps |
| T434 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/23.uart_fifo_overflow.2976008856 |
|
|
Oct 12 01:39:53 PM UTC 24 |
Oct 12 01:41:33 PM UTC 24 |
102102796457 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/25.uart_rx_oversample.1546729158 |
|
|
Oct 12 01:41:15 PM UTC 24 |
Oct 12 01:41:34 PM UTC 24 |
2178919220 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/25.uart_loopback.3694671680 |
|
|
Oct 12 01:41:27 PM UTC 24 |
Oct 12 01:41:34 PM UTC 24 |
6158701520 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/25.uart_alert_test.695009314 |
|
|
Oct 12 01:41:35 PM UTC 24 |
Oct 12 01:41:37 PM UTC 24 |
25650604 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/25.uart_rx_start_bit_filter.691141731 |
|
|
Oct 12 01:41:22 PM UTC 24 |
Oct 12 01:41:39 PM UTC 24 |
4094754372 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/26.uart_smoke.1532457691 |
|
|
Oct 12 01:41:39 PM UTC 24 |
Oct 12 01:41:42 PM UTC 24 |
454824355 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/25.uart_tx_ovrd.1610998469 |
|
|
Oct 12 01:41:25 PM UTC 24 |
Oct 12 01:41:46 PM UTC 24 |
9952735770 ps |
| T136 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/25.uart_fifo_reset.1170113733 |
|
|
Oct 12 01:41:14 PM UTC 24 |
Oct 12 01:41:50 PM UTC 24 |
29407958682 ps |
| T96 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/24.uart_stress_all_with_rand_reset.35302305 |
|
|
Oct 12 01:40:56 PM UTC 24 |
Oct 12 01:41:58 PM UTC 24 |
3366634619 ps |
| T430 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/17.uart_stress_all.2695254900 |
|
|
Oct 12 01:36:30 PM UTC 24 |
Oct 12 01:42:03 PM UTC 24 |
325053105060 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/24.uart_fifo_full.901461094 |
|
|
Oct 12 01:40:34 PM UTC 24 |
Oct 12 01:42:09 PM UTC 24 |
148057143932 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/25.uart_stress_all_with_rand_reset.2789943522 |
|
|
Oct 12 01:41:34 PM UTC 24 |
Oct 12 01:42:12 PM UTC 24 |
3527727723 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/22.uart_fifo_full.1132038103 |
|
|
Oct 12 01:39:18 PM UTC 24 |
Oct 12 01:42:13 PM UTC 24 |
52458457507 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/26.uart_fifo_full.2708924152 |
|
|
Oct 12 01:41:44 PM UTC 24 |
Oct 12 01:42:14 PM UTC 24 |
18468988806 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/26.uart_rx_oversample.2645114470 |
|
|
Oct 12 01:41:59 PM UTC 24 |
Oct 12 01:42:17 PM UTC 24 |
5881893388 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/26.uart_rx_start_bit_filter.2323563140 |
|
|
Oct 12 01:42:12 PM UTC 24 |
Oct 12 01:42:18 PM UTC 24 |
3693404924 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/26.uart_loopback.1161650655 |
|
|
Oct 12 01:42:18 PM UTC 24 |
Oct 12 01:42:21 PM UTC 24 |
846032357 ps |
| T117 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/26.uart_intr.2368025844 |
|
|
Oct 12 01:42:04 PM UTC 24 |
Oct 12 01:42:21 PM UTC 24 |
7990931850 ps |
| T205 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/26.uart_fifo_reset.2774863553 |
|
|
Oct 12 01:41:51 PM UTC 24 |
Oct 12 01:42:27 PM UTC 24 |
9531404681 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/25.uart_rx_parity_err.3339661240 |
|
|
Oct 12 01:41:25 PM UTC 24 |
Oct 12 01:42:28 PM UTC 24 |
15322375717 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/26.uart_alert_test.539948107 |
|
|
Oct 12 01:42:28 PM UTC 24 |
Oct 12 01:42:30 PM UTC 24 |
69758436 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/26.uart_stress_all_with_rand_reset.2082217209 |
|
|
Oct 12 01:42:22 PM UTC 24 |
Oct 12 01:42:33 PM UTC 24 |
394018938 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/27.uart_smoke.4264895312 |
|
|
Oct 12 01:42:31 PM UTC 24 |
Oct 12 01:42:37 PM UTC 24 |
804391101 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/25.uart_fifo_full.2093485983 |
|
|
Oct 12 01:41:13 PM UTC 24 |
Oct 12 01:42:39 PM UTC 24 |
68247500154 ps |
| T188 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/26.uart_rx_parity_err.1074617347 |
|
|
Oct 12 01:42:13 PM UTC 24 |
Oct 12 01:42:45 PM UTC 24 |
86603667428 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/21.uart_noise_filter.1371139728 |
|
|
Oct 12 01:38:47 PM UTC 24 |
Oct 12 01:42:49 PM UTC 24 |
336549605984 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/26.uart_tx_ovrd.2567112456 |
|
|
Oct 12 01:42:15 PM UTC 24 |
Oct 12 01:42:55 PM UTC 24 |
6770551813 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/24.uart_fifo_reset.3764409324 |
|
|
Oct 12 01:40:35 PM UTC 24 |
Oct 12 01:43:03 PM UTC 24 |
77125255243 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/19.uart_long_xfer_wo_dly.3464782025 |
|
|
Oct 12 01:37:34 PM UTC 24 |
Oct 12 01:43:03 PM UTC 24 |
165687051105 ps |
| T339 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/25.uart_tx_rx.4210672808 |
|
|
Oct 12 01:41:11 PM UTC 24 |
Oct 12 01:43:07 PM UTC 24 |
96140097512 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/19.uart_stress_all.281404594 |
|
|
Oct 12 01:37:36 PM UTC 24 |
Oct 12 01:43:08 PM UTC 24 |
215967301399 ps |
| T425 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/26.uart_tx_rx.885184328 |
|
|
Oct 12 01:41:40 PM UTC 24 |
Oct 12 01:43:11 PM UTC 24 |
61102844851 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/27.uart_rx_start_bit_filter.2838002157 |
|
|
Oct 12 01:43:04 PM UTC 24 |
Oct 12 01:43:12 PM UTC 24 |
3014000253 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/27.uart_tx_ovrd.3291648813 |
|
|
Oct 12 01:43:09 PM UTC 24 |
Oct 12 01:43:12 PM UTC 24 |
877068615 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/27.uart_fifo_full.4026256411 |
|
|
Oct 12 01:42:38 PM UTC 24 |
Oct 12 01:43:14 PM UTC 24 |
37846483538 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/27.uart_tx_rx.1953802724 |
|
|
Oct 12 01:42:33 PM UTC 24 |
Oct 12 01:43:20 PM UTC 24 |
68596868440 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/27.uart_rx_oversample.3887908402 |
|
|
Oct 12 01:42:50 PM UTC 24 |
Oct 12 01:43:24 PM UTC 24 |
3812404443 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/27.uart_loopback.3547312177 |
|
|
Oct 12 01:43:12 PM UTC 24 |
Oct 12 01:43:26 PM UTC 24 |
3349920625 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/27.uart_alert_test.3674634892 |
|
|
Oct 12 01:43:25 PM UTC 24 |
Oct 12 01:43:27 PM UTC 24 |
18938549 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/28.uart_smoke.4034954711 |
|
|
Oct 12 01:43:27 PM UTC 24 |
Oct 12 01:43:33 PM UTC 24 |
895687923 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/2.uart_perf.132770871 |
|
|
Oct 12 01:29:17 PM UTC 24 |
Oct 12 01:43:34 PM UTC 24 |
13196825999 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/17.uart_long_xfer_wo_dly.1341245185 |
|
|
Oct 12 01:36:29 PM UTC 24 |
Oct 12 01:43:37 PM UTC 24 |
63637784221 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/8.uart_long_xfer_wo_dly.2795612956 |
|
|
Oct 12 01:31:20 PM UTC 24 |
Oct 12 01:43:41 PM UTC 24 |
116846625153 ps |
| T380 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/26.uart_noise_filter.1475455081 |
|
|
Oct 12 01:42:10 PM UTC 24 |
Oct 12 01:43:45 PM UTC 24 |
53102615362 ps |
| T151 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/26.uart_fifo_overflow.2176831769 |
|
|
Oct 12 01:41:48 PM UTC 24 |
Oct 12 01:43:49 PM UTC 24 |
72337297359 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/15.uart_stress_all.2588665558 |
|
|
Oct 12 01:35:27 PM UTC 24 |
Oct 12 01:43:49 PM UTC 24 |
74534184552 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/28.uart_fifo_full.2011206952 |
|
|
Oct 12 01:43:34 PM UTC 24 |
Oct 12 01:43:53 PM UTC 24 |
26253137595 ps |
| T417 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/18.uart_perf.3293861800 |
|
|
Oct 12 01:36:57 PM UTC 24 |
Oct 12 01:43:55 PM UTC 24 |
6345579686 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/28.uart_tx_rx.1693363416 |
|
|
Oct 12 01:43:28 PM UTC 24 |
Oct 12 01:43:56 PM UTC 24 |
111153996734 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/28.uart_rx_oversample.1856222645 |
|
|
Oct 12 01:43:42 PM UTC 24 |
Oct 12 01:43:57 PM UTC 24 |
3911543311 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/28.uart_loopback.3116231844 |
|
|
Oct 12 01:43:57 PM UTC 24 |
Oct 12 01:44:02 PM UTC 24 |
6004159542 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/28.uart_tx_ovrd.2530962902 |
|
|
Oct 12 01:43:56 PM UTC 24 |
Oct 12 01:44:03 PM UTC 24 |
1021357075 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/28.uart_rx_start_bit_filter.1316180595 |
|
|
Oct 12 01:43:50 PM UTC 24 |
Oct 12 01:44:05 PM UTC 24 |
5540481143 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/15.uart_fifo_full.2938438088 |
|
|
Oct 12 01:35:16 PM UTC 24 |
Oct 12 01:44:17 PM UTC 24 |
259401312200 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/28.uart_alert_test.4076891070 |
|
|
Oct 12 01:44:17 PM UTC 24 |
Oct 12 01:44:19 PM UTC 24 |
29664421 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/28.uart_fifo_overflow.2456392822 |
|
|
Oct 12 01:43:34 PM UTC 24 |
Oct 12 01:44:22 PM UTC 24 |
40209642329 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/22.uart_tx_rx.2373992460 |
|
|
Oct 12 01:39:09 PM UTC 24 |
Oct 12 01:44:24 PM UTC 24 |
90177548361 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/29.uart_smoke.1063330807 |
|
|
Oct 12 01:44:20 PM UTC 24 |
Oct 12 01:44:24 PM UTC 24 |
480558001 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/24.uart_rx_parity_err.592575155 |
|
|
Oct 12 01:40:47 PM UTC 24 |
Oct 12 01:44:25 PM UTC 24 |
95141137432 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/22.uart_perf.1864180736 |
|
|
Oct 12 01:39:36 PM UTC 24 |
Oct 12 01:44:28 PM UTC 24 |
9668429174 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/11.uart_perf.595010335 |
|
|
Oct 12 01:33:09 PM UTC 24 |
Oct 12 01:44:38 PM UTC 24 |
13351657574 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/28.uart_fifo_reset.2367724166 |
|
|
Oct 12 01:43:37 PM UTC 24 |
Oct 12 01:44:29 PM UTC 24 |
252547379770 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/25.uart_long_xfer_wo_dly.3669931874 |
|
|
Oct 12 01:41:34 PM UTC 24 |
Oct 12 01:44:31 PM UTC 24 |
109820101518 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/27.uart_stress_all_with_rand_reset.2013858569 |
|
|
Oct 12 01:43:15 PM UTC 24 |
Oct 12 01:44:35 PM UTC 24 |
5371888072 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/27.uart_rx_parity_err.3145474891 |
|
|
Oct 12 01:43:07 PM UTC 24 |
Oct 12 01:44:35 PM UTC 24 |
101912083786 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/27.uart_noise_filter.2507517990 |
|
|
Oct 12 01:43:03 PM UTC 24 |
Oct 12 01:44:36 PM UTC 24 |
168937014052 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/11.uart_long_xfer_wo_dly.711254610 |
|
|
Oct 12 01:33:10 PM UTC 24 |
Oct 12 01:44:38 PM UTC 24 |
202908529331 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/23.uart_perf.413923085 |
|
|
Oct 12 01:40:19 PM UTC 24 |
Oct 12 01:44:40 PM UTC 24 |
18692632422 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/29.uart_intr.4148330948 |
|
|
Oct 12 01:44:30 PM UTC 24 |
Oct 12 01:44:40 PM UTC 24 |
19055673682 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/29.uart_rx_start_bit_filter.2012873339 |
|
|
Oct 12 01:44:35 PM UTC 24 |
Oct 12 01:44:42 PM UTC 24 |
4760431691 ps |
| T97 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/28.uart_stress_all_with_rand_reset.2683946724 |
|
|
Oct 12 01:44:04 PM UTC 24 |
Oct 12 01:44:42 PM UTC 24 |
9953254720 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/28.uart_intr.2816551586 |
|
|
Oct 12 01:43:45 PM UTC 24 |
Oct 12 01:44:43 PM UTC 24 |
18583993611 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/26.uart_long_xfer_wo_dly.3964553267 |
|
|
Oct 12 01:42:22 PM UTC 24 |
Oct 12 01:44:44 PM UTC 24 |
62842024457 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/29.uart_alert_test.1674217703 |
|
|
Oct 12 01:44:43 PM UTC 24 |
Oct 12 01:44:45 PM UTC 24 |
15143063 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/28.uart_rx_parity_err.2611277252 |
|
|
Oct 12 01:43:54 PM UTC 24 |
Oct 12 01:44:46 PM UTC 24 |
108162923721 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/30.uart_smoke.1089258008 |
|
|
Oct 12 01:44:44 PM UTC 24 |
Oct 12 01:44:47 PM UTC 24 |
284946401 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/25.uart_fifo_overflow.1276112829 |
|
|
Oct 12 01:41:14 PM UTC 24 |
Oct 12 01:44:51 PM UTC 24 |
273701088739 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/29.uart_tx_rx.1021498745 |
|
|
Oct 12 01:44:23 PM UTC 24 |
Oct 12 01:44:53 PM UTC 24 |
56401772195 ps |
| T393 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/28.uart_noise_filter.2488235555 |
|
|
Oct 12 01:43:50 PM UTC 24 |
Oct 12 01:45:00 PM UTC 24 |
101099529538 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/29.uart_loopback.476576233 |
|
|
Oct 12 01:44:39 PM UTC 24 |
Oct 12 01:45:00 PM UTC 24 |
4696350725 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/27.uart_intr.4187025362 |
|
|
Oct 12 01:42:56 PM UTC 24 |
Oct 12 01:45:00 PM UTC 24 |
72683800308 ps |
| T213 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/29.uart_fifo_reset.3432309526 |
|
|
Oct 12 01:44:26 PM UTC 24 |
Oct 12 01:45:02 PM UTC 24 |
15120221996 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/29.uart_rx_oversample.2498936297 |
|
|
Oct 12 01:44:29 PM UTC 24 |
Oct 12 01:45:03 PM UTC 24 |
3971307239 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/30.uart_intr.2423445533 |
|
|
Oct 12 01:44:54 PM UTC 24 |
Oct 12 01:45:04 PM UTC 24 |
29327648012 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/30.uart_rx_start_bit_filter.2774395761 |
|
|
Oct 12 01:45:02 PM UTC 24 |
Oct 12 01:45:04 PM UTC 24 |
591067614 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/30.uart_rx_oversample.2089904493 |
|
|
Oct 12 01:44:51 PM UTC 24 |
Oct 12 01:45:05 PM UTC 24 |
2442175444 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/30.uart_tx_rx.1901002562 |
|
|
Oct 12 01:44:44 PM UTC 24 |
Oct 12 01:45:08 PM UTC 24 |
35045339833 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/30.uart_tx_ovrd.3741019940 |
|
|
Oct 12 01:45:04 PM UTC 24 |
Oct 12 01:45:12 PM UTC 24 |
8735723458 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/30.uart_alert_test.3435697558 |
|
|
Oct 12 01:45:12 PM UTC 24 |
Oct 12 01:45:14 PM UTC 24 |
48001298 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/31.uart_smoke.2407382598 |
|
|
Oct 12 01:45:15 PM UTC 24 |
Oct 12 01:45:21 PM UTC 24 |
695911556 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/30.uart_loopback.4238973841 |
|
|
Oct 12 01:45:04 PM UTC 24 |
Oct 12 01:45:22 PM UTC 24 |
8515123023 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/29.uart_tx_ovrd.2339739485 |
|
|
Oct 12 01:44:37 PM UTC 24 |
Oct 12 01:45:24 PM UTC 24 |
11933476359 ps |
| T435 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/28.uart_perf.1665229887 |
|
|
Oct 12 01:43:58 PM UTC 24 |
Oct 12 01:45:29 PM UTC 24 |
6353775551 ps |
| T172 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/8.uart_stress_all.1549791307 |
|
|
Oct 12 01:31:24 PM UTC 24 |
Oct 12 01:45:30 PM UTC 24 |
169804686795 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/22.uart_long_xfer_wo_dly.1574840397 |
|
|
Oct 12 01:39:37 PM UTC 24 |
Oct 12 01:45:32 PM UTC 24 |
73524265122 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/23.uart_long_xfer_wo_dly.332791547 |
|
|
Oct 12 01:40:20 PM UTC 24 |
Oct 12 01:45:32 PM UTC 24 |
147430267173 ps |
| T274 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/27.uart_fifo_reset.2219834365 |
|
|
Oct 12 01:42:46 PM UTC 24 |
Oct 12 01:45:32 PM UTC 24 |
184529719849 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/30.uart_rx_parity_err.1986788532 |
|
|
Oct 12 01:45:02 PM UTC 24 |
Oct 12 01:45:33 PM UTC 24 |
65680487346 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/28.uart_stress_all.1673863405 |
|
|
Oct 12 01:44:05 PM UTC 24 |
Oct 12 01:45:35 PM UTC 24 |
42502264553 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/27.uart_fifo_overflow.1423161714 |
|
|
Oct 12 01:42:40 PM UTC 24 |
Oct 12 01:45:37 PM UTC 24 |
128739141298 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/29.uart_stress_all_with_rand_reset.893595007 |
|
|
Oct 12 01:44:42 PM UTC 24 |
Oct 12 01:45:37 PM UTC 24 |
3339623306 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/29.uart_rx_parity_err.2201617433 |
|
|
Oct 12 01:44:36 PM UTC 24 |
Oct 12 01:45:39 PM UTC 24 |
37227705692 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/31.uart_tx_ovrd.1761190046 |
|
|
Oct 12 01:45:35 PM UTC 24 |
Oct 12 01:45:41 PM UTC 24 |
1071269538 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/31.uart_rx_start_bit_filter.3157401368 |
|
|
Oct 12 01:45:33 PM UTC 24 |
Oct 12 01:45:42 PM UTC 24 |
3309849356 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/31.uart_tx_rx.3996615731 |
|
|
Oct 12 01:45:21 PM UTC 24 |
Oct 12 01:45:44 PM UTC 24 |
35693090824 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/30.uart_noise_filter.325216971 |
|
|
Oct 12 01:45:02 PM UTC 24 |
Oct 12 01:45:45 PM UTC 24 |
220041450837 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/31.uart_alert_test.2987697920 |
|
|
Oct 12 01:45:45 PM UTC 24 |
Oct 12 01:45:47 PM UTC 24 |
45405454 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/31.uart_rx_oversample.1589326535 |
|
|
Oct 12 01:45:31 PM UTC 24 |
Oct 12 01:45:48 PM UTC 24 |
4957061732 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/32.uart_smoke.640507003 |
|
|
Oct 12 01:45:46 PM UTC 24 |
Oct 12 01:45:48 PM UTC 24 |
118502752 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/29.uart_noise_filter.355395505 |
|
|
Oct 12 01:44:32 PM UTC 24 |
Oct 12 01:45:48 PM UTC 24 |
150448790121 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/30.uart_fifo_overflow.1198673850 |
|
|
Oct 12 01:44:47 PM UTC 24 |
Oct 12 01:45:56 PM UTC 24 |
156628740564 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/31.uart_stress_all_with_rand_reset.2955173177 |
|
|
Oct 12 01:45:43 PM UTC 24 |
Oct 12 01:45:58 PM UTC 24 |
9563916773 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/29.uart_fifo_overflow.2908421649 |
|
|
Oct 12 01:44:26 PM UTC 24 |
Oct 12 01:46:03 PM UTC 24 |
110595502920 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/31.uart_loopback.535192301 |
|
|
Oct 12 01:45:37 PM UTC 24 |
Oct 12 01:46:06 PM UTC 24 |
7246302209 ps |