T866 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/47.uart_rx_oversample.2987763602 |
|
|
Oct 12 01:56:54 PM UTC 24 |
Oct 12 01:57:06 PM UTC 24 |
2320620091 ps |
T867 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/46.uart_tx_rx.2266906721 |
|
|
Oct 12 01:55:37 PM UTC 24 |
Oct 12 01:57:15 PM UTC 24 |
99855145375 ps |
T868 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/34.uart_perf.4084401743 |
|
|
Oct 12 01:48:02 PM UTC 24 |
Oct 12 01:57:15 PM UTC 24 |
17505924282 ps |
T869 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/39.uart_long_xfer_wo_dly.1767158562 |
|
|
Oct 12 01:51:15 PM UTC 24 |
Oct 12 01:57:15 PM UTC 24 |
297126284374 ps |
T870 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/44.uart_noise_filter.104252866 |
|
|
Oct 12 01:54:30 PM UTC 24 |
Oct 12 01:57:16 PM UTC 24 |
77362395897 ps |
T871 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/47.uart_tx_ovrd.1457817394 |
|
|
Oct 12 01:57:16 PM UTC 24 |
Oct 12 01:57:19 PM UTC 24 |
3675150982 ps |
T872 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/47.uart_rx_start_bit_filter.4165926010 |
|
|
Oct 12 01:57:07 PM UTC 24 |
Oct 12 01:57:20 PM UTC 24 |
3475188764 ps |
T235 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/33.uart_stress_all.2101343669 |
|
|
Oct 12 01:47:15 PM UTC 24 |
Oct 12 01:57:22 PM UTC 24 |
169728769030 ps |
T873 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/47.uart_loopback.3113321188 |
|
|
Oct 12 01:57:17 PM UTC 24 |
Oct 12 01:57:26 PM UTC 24 |
4486690545 ps |
T874 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/47.uart_alert_test.1251378785 |
|
|
Oct 12 01:57:26 PM UTC 24 |
Oct 12 01:57:28 PM UTC 24 |
13230991 ps |
T875 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/44.uart_fifo_reset.1640746454 |
|
|
Oct 12 01:54:23 PM UTC 24 |
Oct 12 01:57:28 PM UTC 24 |
265068898528 ps |
T876 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/46.uart_noise_filter.2255390717 |
|
|
Oct 12 01:55:57 PM UTC 24 |
Oct 12 01:57:32 PM UTC 24 |
347077275086 ps |
T877 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/48.uart_smoke.3277005181 |
|
|
Oct 12 01:57:29 PM UTC 24 |
Oct 12 01:57:33 PM UTC 24 |
514979625 ps |
T878 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/47.uart_fifo_full.2160145037 |
|
|
Oct 12 01:56:39 PM UTC 24 |
Oct 12 01:57:36 PM UTC 24 |
49998787740 ps |
T879 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/44.uart_stress_all.357389223 |
|
|
Oct 12 01:54:57 PM UTC 24 |
Oct 12 01:57:37 PM UTC 24 |
59570242576 ps |
T880 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/47.uart_tx_rx.3907130388 |
|
|
Oct 12 01:56:33 PM UTC 24 |
Oct 12 01:57:39 PM UTC 24 |
126058647882 ps |
T881 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/45.uart_perf.2918492534 |
|
|
Oct 12 01:55:31 PM UTC 24 |
Oct 12 01:57:45 PM UTC 24 |
24238712120 ps |
T882 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/47.uart_fifo_reset.2780328875 |
|
|
Oct 12 01:56:53 PM UTC 24 |
Oct 12 01:57:47 PM UTC 24 |
161484335332 ps |
T883 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/48.uart_rx_start_bit_filter.3394457126 |
|
|
Oct 12 01:57:46 PM UTC 24 |
Oct 12 01:57:50 PM UTC 24 |
2869665403 ps |
T884 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/48.uart_tx_rx.3882349458 |
|
|
Oct 12 01:57:29 PM UTC 24 |
Oct 12 01:57:52 PM UTC 24 |
110957358558 ps |
T885 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/48.uart_tx_ovrd.3802781969 |
|
|
Oct 12 01:57:51 PM UTC 24 |
Oct 12 01:57:56 PM UTC 24 |
587833705 ps |
T886 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/45.uart_fifo_full.2152398691 |
|
|
Oct 12 01:55:02 PM UTC 24 |
Oct 12 01:58:06 PM UTC 24 |
215205333929 ps |
T887 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/46.uart_stress_all_with_rand_reset.1141420670 |
|
|
Oct 12 01:56:21 PM UTC 24 |
Oct 12 01:58:14 PM UTC 24 |
4524357976 ps |
T888 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/47.uart_fifo_overflow.146671023 |
|
|
Oct 12 01:56:39 PM UTC 24 |
Oct 12 01:58:17 PM UTC 24 |
127050866333 ps |
T889 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/47.uart_intr.1468749366 |
|
|
Oct 12 01:56:59 PM UTC 24 |
Oct 12 01:58:18 PM UTC 24 |
53601317022 ps |
T890 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/48.uart_intr.61372667 |
|
|
Oct 12 01:57:38 PM UTC 24 |
Oct 12 01:58:18 PM UTC 24 |
41712747400 ps |
T891 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/37.uart_long_xfer_wo_dly.298708057 |
|
|
Oct 12 01:49:59 PM UTC 24 |
Oct 12 01:58:19 PM UTC 24 |
146745456483 ps |
T892 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/45.uart_intr.1638148642 |
|
|
Oct 12 01:55:15 PM UTC 24 |
Oct 12 01:58:19 PM UTC 24 |
103757534356 ps |
T893 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/48.uart_noise_filter.594769487 |
|
|
Oct 12 01:57:40 PM UTC 24 |
Oct 12 01:58:21 PM UTC 24 |
10561274058 ps |
T206 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/36.uart_stress_all.2720666228 |
|
|
Oct 12 01:49:29 PM UTC 24 |
Oct 12 01:58:21 PM UTC 24 |
333252178340 ps |
T894 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/48.uart_alert_test.784682523 |
|
|
Oct 12 01:58:19 PM UTC 24 |
Oct 12 01:58:21 PM UTC 24 |
37829262 ps |
T895 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/40.uart_stress_all.2617330325 |
|
|
Oct 12 01:52:14 PM UTC 24 |
Oct 12 01:58:21 PM UTC 24 |
296669687752 ps |
T896 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/49.uart_smoke.1044436871 |
|
|
Oct 12 01:58:19 PM UTC 24 |
Oct 12 01:58:22 PM UTC 24 |
281214240 ps |
T897 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/42.uart_stress_all.2620580190 |
|
|
Oct 12 01:53:31 PM UTC 24 |
Oct 12 01:58:23 PM UTC 24 |
241354265325 ps |
T898 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/48.uart_rx_oversample.1312443845 |
|
|
Oct 12 01:57:37 PM UTC 24 |
Oct 12 01:58:25 PM UTC 24 |
5576792239 ps |
T899 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/48.uart_loopback.1512385450 |
|
|
Oct 12 01:57:52 PM UTC 24 |
Oct 12 01:58:25 PM UTC 24 |
17124788531 ps |
T900 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/43.uart_stress_all.2702739587 |
|
|
Oct 12 01:54:14 PM UTC 24 |
Oct 12 01:58:25 PM UTC 24 |
127828935306 ps |
T901 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/49.uart_tx_ovrd.2359557699 |
|
|
Oct 12 01:58:26 PM UTC 24 |
Oct 12 01:58:30 PM UTC 24 |
1205445255 ps |
T902 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/44.uart_fifo_overflow.3338982302 |
|
|
Oct 12 01:54:22 PM UTC 24 |
Oct 12 01:58:33 PM UTC 24 |
138094942735 ps |
T903 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/49.uart_rx_start_bit_filter.2017233953 |
|
|
Oct 12 01:58:24 PM UTC 24 |
Oct 12 01:58:34 PM UTC 24 |
2798198197 ps |
T904 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/49.uart_loopback.340934641 |
|
|
Oct 12 01:58:27 PM UTC 24 |
Oct 12 01:58:35 PM UTC 24 |
1720731482 ps |
T905 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/49.uart_rx_oversample.2396053713 |
|
|
Oct 12 01:58:22 PM UTC 24 |
Oct 12 01:58:39 PM UTC 24 |
4342386199 ps |
T906 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/44.uart_perf.282200134 |
|
|
Oct 12 01:54:48 PM UTC 24 |
Oct 12 01:58:41 PM UTC 24 |
16269099470 ps |
T907 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/47.uart_stress_all_with_rand_reset.3501999392 |
|
|
Oct 12 01:57:21 PM UTC 24 |
Oct 12 01:58:42 PM UTC 24 |
13269883164 ps |
T908 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/49.uart_alert_test.194416243 |
|
|
Oct 12 01:58:40 PM UTC 24 |
Oct 12 01:58:42 PM UTC 24 |
23635576 ps |
T909 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/48.uart_fifo_overflow.3232389739 |
|
|
Oct 12 01:57:33 PM UTC 24 |
Oct 12 01:58:48 PM UTC 24 |
54062591428 ps |
T910 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/49.uart_fifo_overflow.3533246011 |
|
|
Oct 12 01:58:21 PM UTC 24 |
Oct 12 01:58:55 PM UTC 24 |
20761683012 ps |
T911 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/29.uart_long_xfer_wo_dly.2062112780 |
|
|
Oct 12 01:44:41 PM UTC 24 |
Oct 12 01:58:58 PM UTC 24 |
126073952334 ps |
T181 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/48.uart_fifo_full.3738450538 |
|
|
Oct 12 01:57:33 PM UTC 24 |
Oct 12 01:59:02 PM UTC 24 |
55297327837 ps |
T912 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/46.uart_fifo_overflow.1198293818 |
|
|
Oct 12 01:55:40 PM UTC 24 |
Oct 12 01:59:03 PM UTC 24 |
216721675206 ps |
T265 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/50.uart_fifo_reset.309508839 |
|
|
Oct 12 01:58:42 PM UTC 24 |
Oct 12 01:59:05 PM UTC 24 |
37676943754 ps |
T223 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/49.uart_stress_all_with_rand_reset.1043200271 |
|
|
Oct 12 01:58:35 PM UTC 24 |
Oct 12 01:59:09 PM UTC 24 |
3815681462 ps |
T184 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/30.uart_stress_all.946449035 |
|
|
Oct 12 01:45:08 PM UTC 24 |
Oct 12 01:59:14 PM UTC 24 |
332088351015 ps |
T913 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/54.uart_stress_all_with_rand_reset.583253569 |
|
|
Oct 12 01:59:04 PM UTC 24 |
Oct 12 01:59:17 PM UTC 24 |
3124048923 ps |
T914 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/43.uart_fifo_reset.316368733 |
|
|
Oct 12 01:53:53 PM UTC 24 |
Oct 12 01:59:17 PM UTC 24 |
158998225384 ps |
T915 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/48.uart_stress_all_with_rand_reset.819519130 |
|
|
Oct 12 01:58:15 PM UTC 24 |
Oct 12 01:59:20 PM UTC 24 |
6706764742 ps |
T195 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/41.uart_stress_all.698705075 |
|
|
Oct 12 01:52:50 PM UTC 24 |
Oct 12 01:59:27 PM UTC 24 |
529731418783 ps |
T916 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/52.uart_stress_all_with_rand_reset.426611321 |
|
|
Oct 12 01:58:59 PM UTC 24 |
Oct 12 01:59:32 PM UTC 24 |
3855208030 ps |
T917 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/25.uart_perf.2885101725 |
|
|
Oct 12 01:41:33 PM UTC 24 |
Oct 12 01:59:37 PM UTC 24 |
27885217527 ps |
T918 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/51.uart_fifo_reset.1190345257 |
|
|
Oct 12 01:58:43 PM UTC 24 |
Oct 12 01:59:39 PM UTC 24 |
21605593614 ps |
T919 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/47.uart_noise_filter.3543242863 |
|
|
Oct 12 01:56:59 PM UTC 24 |
Oct 12 01:59:42 PM UTC 24 |
97051206902 ps |
T920 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/47.uart_rx_parity_err.585702504 |
|
|
Oct 12 01:57:16 PM UTC 24 |
Oct 12 01:59:43 PM UTC 24 |
121038495404 ps |
T420 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/58.uart_fifo_reset.1466303506 |
|
|
Oct 12 01:59:28 PM UTC 24 |
Oct 12 01:59:44 PM UTC 24 |
38233798062 ps |
T921 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/51.uart_stress_all_with_rand_reset.4150155244 |
|
|
Oct 12 01:58:49 PM UTC 24 |
Oct 12 01:59:47 PM UTC 24 |
4751444463 ps |
T922 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/49.uart_rx_parity_err.1959791733 |
|
|
Oct 12 01:58:26 PM UTC 24 |
Oct 12 01:59:47 PM UTC 24 |
263644416149 ps |
T416 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/54.uart_fifo_reset.2136044507 |
|
|
Oct 12 01:59:02 PM UTC 24 |
Oct 12 01:59:47 PM UTC 24 |
54549176749 ps |
T923 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/39.uart_fifo_reset.2865444179 |
|
|
Oct 12 01:50:50 PM UTC 24 |
Oct 12 01:59:50 PM UTC 24 |
282729600516 ps |
T924 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/55.uart_fifo_reset.1748264917 |
|
|
Oct 12 01:59:05 PM UTC 24 |
Oct 12 01:59:52 PM UTC 24 |
51831848233 ps |
T224 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/52.uart_fifo_reset.3852908350 |
|
|
Oct 12 01:58:57 PM UTC 24 |
Oct 12 01:59:53 PM UTC 24 |
120490644436 ps |
T925 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/50.uart_stress_all_with_rand_reset.2143305839 |
|
|
Oct 12 01:58:42 PM UTC 24 |
Oct 12 01:59:59 PM UTC 24 |
12179734512 ps |
T926 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/34.uart_stress_all.617675641 |
|
|
Oct 12 01:48:10 PM UTC 24 |
Oct 12 02:00:00 PM UTC 24 |
175322384835 ps |
T246 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/59.uart_fifo_reset.3433836091 |
|
|
Oct 12 01:59:38 PM UTC 24 |
Oct 12 02:00:01 PM UTC 24 |
157669133152 ps |
T927 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/53.uart_stress_all_with_rand_reset.4169226336 |
|
|
Oct 12 01:59:01 PM UTC 24 |
Oct 12 02:00:09 PM UTC 24 |
4982016426 ps |
T928 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/57.uart_stress_all_with_rand_reset.1756502460 |
|
|
Oct 12 01:59:22 PM UTC 24 |
Oct 12 02:00:09 PM UTC 24 |
2874718820 ps |
T929 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/58.uart_stress_all_with_rand_reset.1254639441 |
|
|
Oct 12 01:59:33 PM UTC 24 |
Oct 12 02:00:09 PM UTC 24 |
2941928753 ps |
T930 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/49.uart_intr.713560235 |
|
|
Oct 12 01:58:22 PM UTC 24 |
Oct 12 02:00:11 PM UTC 24 |
43166527619 ps |
T931 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/56.uart_stress_all_with_rand_reset.3453375522 |
|
|
Oct 12 01:59:17 PM UTC 24 |
Oct 12 02:00:12 PM UTC 24 |
2340209239 ps |
T932 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/62.uart_stress_all_with_rand_reset.1433917946 |
|
|
Oct 12 01:59:49 PM UTC 24 |
Oct 12 02:00:13 PM UTC 24 |
1815874589 ps |
T933 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/63.uart_stress_all_with_rand_reset.1875693372 |
|
|
Oct 12 01:59:53 PM UTC 24 |
Oct 12 02:00:20 PM UTC 24 |
1708951713 ps |
T934 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/49.uart_fifo_full.4116946986 |
|
|
Oct 12 01:58:20 PM UTC 24 |
Oct 12 02:00:21 PM UTC 24 |
47612414749 ps |
T203 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/57.uart_fifo_reset.1865909047 |
|
|
Oct 12 01:59:18 PM UTC 24 |
Oct 12 02:00:22 PM UTC 24 |
58106543923 ps |
T935 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/67.uart_stress_all_with_rand_reset.34803081 |
|
|
Oct 12 02:00:11 PM UTC 24 |
Oct 12 02:00:24 PM UTC 24 |
1053947544 ps |
T247 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/65.uart_fifo_reset.3216372122 |
|
|
Oct 12 02:00:01 PM UTC 24 |
Oct 12 02:00:25 PM UTC 24 |
129336516159 ps |
T254 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/60.uart_fifo_reset.1396694783 |
|
|
Oct 12 01:59:42 PM UTC 24 |
Oct 12 02:00:30 PM UTC 24 |
118077906181 ps |
T936 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/38.uart_long_xfer_wo_dly.4030934834 |
|
|
Oct 12 01:50:41 PM UTC 24 |
Oct 12 02:00:30 PM UTC 24 |
160939817619 ps |
T937 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/61.uart_stress_all_with_rand_reset.3117374967 |
|
|
Oct 12 01:59:47 PM UTC 24 |
Oct 12 02:00:36 PM UTC 24 |
3665197603 ps |
T938 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/47.uart_stress_all.2447848687 |
|
|
Oct 12 01:57:23 PM UTC 24 |
Oct 12 02:00:37 PM UTC 24 |
160200930216 ps |
T939 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/60.uart_stress_all_with_rand_reset.73515399 |
|
|
Oct 12 01:59:44 PM UTC 24 |
Oct 12 02:00:38 PM UTC 24 |
3277325491 ps |
T207 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/64.uart_fifo_reset.3667489499 |
|
|
Oct 12 01:59:54 PM UTC 24 |
Oct 12 02:00:39 PM UTC 24 |
43364883539 ps |
T940 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/48.uart_fifo_reset.2067767749 |
|
|
Oct 12 01:57:36 PM UTC 24 |
Oct 12 02:00:40 PM UTC 24 |
99247105435 ps |
T941 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/55.uart_stress_all_with_rand_reset.1816212203 |
|
|
Oct 12 01:59:10 PM UTC 24 |
Oct 12 02:00:40 PM UTC 24 |
4337771637 ps |
T942 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/67.uart_fifo_reset.42851643 |
|
|
Oct 12 02:00:10 PM UTC 24 |
Oct 12 02:00:47 PM UTC 24 |
20289081608 ps |
T943 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/68.uart_stress_all_with_rand_reset.3150924172 |
|
|
Oct 12 02:00:14 PM UTC 24 |
Oct 12 02:00:48 PM UTC 24 |
1781855895 ps |
T944 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/39.uart_stress_all.577905936 |
|
|
Oct 12 01:51:20 PM UTC 24 |
Oct 12 02:00:51 PM UTC 24 |
29902120944 ps |
T945 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/73.uart_fifo_reset.2935823424 |
|
|
Oct 12 02:00:38 PM UTC 24 |
Oct 12 02:00:51 PM UTC 24 |
4008801185 ps |
T946 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/82.uart_fifo_reset.1441628367 |
|
|
Oct 12 02:01:06 PM UTC 24 |
Oct 12 02:01:45 PM UTC 24 |
22066010307 ps |
T947 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/64.uart_stress_all_with_rand_reset.1511128196 |
|
|
Oct 12 02:00:00 PM UTC 24 |
Oct 12 02:00:54 PM UTC 24 |
2629744096 ps |
T948 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/66.uart_fifo_reset.3479412207 |
|
|
Oct 12 02:00:10 PM UTC 24 |
Oct 12 02:00:55 PM UTC 24 |
27975956235 ps |
T196 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/61.uart_fifo_reset.2624121775 |
|
|
Oct 12 01:59:44 PM UTC 24 |
Oct 12 02:00:57 PM UTC 24 |
39702426571 ps |
T949 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/71.uart_stress_all_with_rand_reset.1290127536 |
|
|
Oct 12 02:00:31 PM UTC 24 |
Oct 12 02:01:01 PM UTC 24 |
4154175991 ps |
T950 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/68.uart_fifo_reset.2362164674 |
|
|
Oct 12 02:00:14 PM UTC 24 |
Oct 12 02:01:02 PM UTC 24 |
187238300567 ps |
T951 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/32.uart_perf.2434919287 |
|
|
Oct 12 01:46:18 PM UTC 24 |
Oct 12 02:01:04 PM UTC 24 |
12881943414 ps |
T952 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/59.uart_stress_all_with_rand_reset.536991944 |
|
|
Oct 12 01:59:39 PM UTC 24 |
Oct 12 02:01:04 PM UTC 24 |
9376328897 ps |
T953 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/72.uart_stress_all_with_rand_reset.521719654 |
|
|
Oct 12 02:00:37 PM UTC 24 |
Oct 12 02:01:05 PM UTC 24 |
8609376007 ps |
T954 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/49.uart_noise_filter.1366336316 |
|
|
Oct 12 01:58:22 PM UTC 24 |
Oct 12 02:01:06 PM UTC 24 |
178300762553 ps |
T955 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/32.uart_long_xfer_wo_dly.2269009172 |
|
|
Oct 12 01:46:22 PM UTC 24 |
Oct 12 02:01:13 PM UTC 24 |
112439909890 ps |
T232 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/80.uart_fifo_reset.3565133482 |
|
|
Oct 12 02:01:03 PM UTC 24 |
Oct 12 02:01:16 PM UTC 24 |
41959305681 ps |
T956 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/78.uart_stress_all_with_rand_reset.1322635358 |
|
|
Oct 12 02:00:56 PM UTC 24 |
Oct 12 02:01:19 PM UTC 24 |
2181782852 ps |
T957 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/63.uart_fifo_reset.3161464433 |
|
|
Oct 12 01:59:51 PM UTC 24 |
Oct 12 02:01:20 PM UTC 24 |
115377095307 ps |
T958 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/75.uart_stress_all_with_rand_reset.2058456803 |
|
|
Oct 12 02:00:41 PM UTC 24 |
Oct 12 02:01:22 PM UTC 24 |
15599909044 ps |
T959 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/65.uart_stress_all_with_rand_reset.790978922 |
|
|
Oct 12 02:00:02 PM UTC 24 |
Oct 12 02:01:24 PM UTC 24 |
5509143472 ps |
T960 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/74.uart_stress_all_with_rand_reset.2695353776 |
|
|
Oct 12 02:00:41 PM UTC 24 |
Oct 12 02:01:25 PM UTC 24 |
11405337854 ps |
T238 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/76.uart_fifo_reset.1493464858 |
|
|
Oct 12 02:00:47 PM UTC 24 |
Oct 12 02:01:25 PM UTC 24 |
19030464288 ps |
T961 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/73.uart_stress_all_with_rand_reset.1401180147 |
|
|
Oct 12 02:00:40 PM UTC 24 |
Oct 12 02:01:25 PM UTC 24 |
5829026401 ps |
T962 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/69.uart_stress_all_with_rand_reset.3785023172 |
|
|
Oct 12 02:00:22 PM UTC 24 |
Oct 12 02:01:28 PM UTC 24 |
4283018325 ps |
T422 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/49.uart_fifo_reset.643166202 |
|
|
Oct 12 01:58:21 PM UTC 24 |
Oct 12 02:01:32 PM UTC 24 |
49241193711 ps |
T963 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/41.uart_long_xfer_wo_dly.380995862 |
|
|
Oct 12 01:52:47 PM UTC 24 |
Oct 12 02:01:33 PM UTC 24 |
69030606320 ps |
T212 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/77.uart_fifo_reset.3732067724 |
|
|
Oct 12 02:00:52 PM UTC 24 |
Oct 12 02:01:34 PM UTC 24 |
14475441844 ps |
T964 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/37.uart_stress_all.2610899084 |
|
|
Oct 12 01:50:03 PM UTC 24 |
Oct 12 02:01:36 PM UTC 24 |
187655483075 ps |
T965 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/77.uart_stress_all_with_rand_reset.220796743 |
|
|
Oct 12 02:00:53 PM UTC 24 |
Oct 12 02:01:40 PM UTC 24 |
11719962817 ps |
T427 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/72.uart_fifo_reset.1305483566 |
|
|
Oct 12 02:00:31 PM UTC 24 |
Oct 12 02:01:40 PM UTC 24 |
64365872879 ps |
T966 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/76.uart_stress_all_with_rand_reset.2403046124 |
|
|
Oct 12 02:00:50 PM UTC 24 |
Oct 12 02:01:44 PM UTC 24 |
2523112066 ps |
T967 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/86.uart_fifo_reset.1946393857 |
|
|
Oct 12 02:01:26 PM UTC 24 |
Oct 12 02:01:45 PM UTC 24 |
79287679563 ps |
T968 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/80.uart_stress_all_with_rand_reset.3558576488 |
|
|
Oct 12 02:01:04 PM UTC 24 |
Oct 12 02:01:45 PM UTC 24 |
2456441216 ps |
T969 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/70.uart_stress_all_with_rand_reset.30658623 |
|
|
Oct 12 02:00:25 PM UTC 24 |
Oct 12 02:01:45 PM UTC 24 |
11781328550 ps |
T970 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/81.uart_fifo_reset.2250401150 |
|
|
Oct 12 02:01:05 PM UTC 24 |
Oct 12 02:01:47 PM UTC 24 |
11820047808 ps |
T971 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/88.uart_stress_all_with_rand_reset.797301144 |
|
|
Oct 12 02:01:35 PM UTC 24 |
Oct 12 02:01:48 PM UTC 24 |
2922952508 ps |
T972 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/79.uart_stress_all_with_rand_reset.1351640487 |
|
|
Oct 12 02:01:02 PM UTC 24 |
Oct 12 02:01:49 PM UTC 24 |
2641678176 ps |
T249 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/78.uart_fifo_reset.791907345 |
|
|
Oct 12 02:00:55 PM UTC 24 |
Oct 12 02:01:51 PM UTC 24 |
135249998899 ps |
T973 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/87.uart_stress_all_with_rand_reset.2698878451 |
|
|
Oct 12 02:01:34 PM UTC 24 |
Oct 12 02:01:52 PM UTC 24 |
4325116631 ps |
T214 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/89.uart_fifo_reset.2652848935 |
|
|
Oct 12 02:01:37 PM UTC 24 |
Oct 12 02:01:52 PM UTC 24 |
19017766109 ps |
T275 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/88.uart_fifo_reset.4264247177 |
|
|
Oct 12 02:01:35 PM UTC 24 |
Oct 12 02:01:54 PM UTC 24 |
20765514409 ps |
T974 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/42.uart_long_xfer_wo_dly.1390780362 |
|
|
Oct 12 01:53:22 PM UTC 24 |
Oct 12 02:01:54 PM UTC 24 |
140878594096 ps |
T975 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/87.uart_fifo_reset.2125307936 |
|
|
Oct 12 02:01:29 PM UTC 24 |
Oct 12 02:01:55 PM UTC 24 |
11155765013 ps |
T976 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/84.uart_stress_all_with_rand_reset.4236824615 |
|
|
Oct 12 02:01:23 PM UTC 24 |
Oct 12 02:01:55 PM UTC 24 |
17510500527 ps |
T160 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/48.uart_stress_all.2809826211 |
|
|
Oct 12 01:58:18 PM UTC 24 |
Oct 12 02:01:56 PM UTC 24 |
163221672571 ps |
T977 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/82.uart_stress_all_with_rand_reset.640009103 |
|
|
Oct 12 02:01:14 PM UTC 24 |
Oct 12 02:02:00 PM UTC 24 |
3409617844 ps |
T978 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/62.uart_fifo_reset.1196651244 |
|
|
Oct 12 01:59:48 PM UTC 24 |
Oct 12 02:02:04 PM UTC 24 |
119630149623 ps |
T979 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/92.uart_stress_all_with_rand_reset.2897526368 |
|
|
Oct 12 02:01:46 PM UTC 24 |
Oct 12 02:02:06 PM UTC 24 |
1463096359 ps |
T980 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/89.uart_stress_all_with_rand_reset.3041050410 |
|
|
Oct 12 02:01:41 PM UTC 24 |
Oct 12 02:02:08 PM UTC 24 |
3116439107 ps |
T161 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/53.uart_fifo_reset.457165970 |
|
|
Oct 12 01:58:59 PM UTC 24 |
Oct 12 02:02:09 PM UTC 24 |
66770635733 ps |
T981 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/44.uart_long_xfer_wo_dly.4097332137 |
|
|
Oct 12 01:54:50 PM UTC 24 |
Oct 12 02:02:10 PM UTC 24 |
219108066649 ps |
T982 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/81.uart_stress_all_with_rand_reset.2651006540 |
|
|
Oct 12 02:01:05 PM UTC 24 |
Oct 12 02:02:11 PM UTC 24 |
13570976731 ps |
T983 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/66.uart_stress_all_with_rand_reset.924147044 |
|
|
Oct 12 02:00:10 PM UTC 24 |
Oct 12 02:02:14 PM UTC 24 |
9873777594 ps |
T984 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/48.uart_long_xfer_wo_dly.2972969109 |
|
|
Oct 12 01:58:07 PM UTC 24 |
Oct 12 02:02:14 PM UTC 24 |
178089267435 ps |
T985 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/93.uart_stress_all_with_rand_reset.1186680340 |
|
|
Oct 12 02:01:50 PM UTC 24 |
Oct 12 02:02:16 PM UTC 24 |
3549854538 ps |
T986 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/83.uart_stress_all_with_rand_reset.3788174834 |
|
|
Oct 12 02:01:20 PM UTC 24 |
Oct 12 02:02:17 PM UTC 24 |
14148319075 ps |
T987 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/98.uart_fifo_reset.1201794517 |
|
|
Oct 12 02:01:57 PM UTC 24 |
Oct 12 02:02:18 PM UTC 24 |
8320949330 ps |
T988 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/91.uart_stress_all_with_rand_reset.3645658136 |
|
|
Oct 12 02:01:46 PM UTC 24 |
Oct 12 02:02:19 PM UTC 24 |
3311010515 ps |
T989 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/43.uart_perf.156380370 |
|
|
Oct 12 01:54:10 PM UTC 24 |
Oct 12 02:02:21 PM UTC 24 |
16997738311 ps |
T990 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/85.uart_stress_all_with_rand_reset.1922596010 |
|
|
Oct 12 02:01:26 PM UTC 24 |
Oct 12 02:02:21 PM UTC 24 |
2884317554 ps |
T273 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/83.uart_fifo_reset.2825166723 |
|
|
Oct 12 02:01:17 PM UTC 24 |
Oct 12 02:02:27 PM UTC 24 |
41272128095 ps |
T991 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/99.uart_stress_all_with_rand_reset.1014227930 |
|
|
Oct 12 02:02:07 PM UTC 24 |
Oct 12 02:02:28 PM UTC 24 |
1232791235 ps |
T992 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/48.uart_perf.2626218126 |
|
|
Oct 12 01:57:58 PM UTC 24 |
Oct 12 02:02:30 PM UTC 24 |
14841596402 ps |
T239 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/93.uart_fifo_reset.2152097832 |
|
|
Oct 12 02:01:48 PM UTC 24 |
Oct 12 02:02:30 PM UTC 24 |
16184498604 ps |
T993 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/102.uart_fifo_reset.237044169 |
|
|
Oct 12 02:02:11 PM UTC 24 |
Oct 12 02:02:31 PM UTC 24 |
16040845427 ps |
T994 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/86.uart_stress_all_with_rand_reset.2771601981 |
|
|
Oct 12 02:01:26 PM UTC 24 |
Oct 12 02:02:32 PM UTC 24 |
8803530009 ps |
T995 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/46.uart_long_xfer_wo_dly.936600330 |
|
|
Oct 12 01:56:19 PM UTC 24 |
Oct 12 02:02:34 PM UTC 24 |
93461884727 ps |
T996 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/97.uart_stress_all_with_rand_reset.3164769184 |
|
|
Oct 12 02:01:56 PM UTC 24 |
Oct 12 02:02:44 PM UTC 24 |
33271095989 ps |
T200 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/97.uart_fifo_reset.225653074 |
|
|
Oct 12 02:01:55 PM UTC 24 |
Oct 12 02:02:44 PM UTC 24 |
44610143054 ps |
T997 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/108.uart_fifo_reset.1714703196 |
|
|
Oct 12 02:02:18 PM UTC 24 |
Oct 12 02:02:44 PM UTC 24 |
45369575385 ps |
T998 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/47.uart_long_xfer_wo_dly.1737497400 |
|
|
Oct 12 01:57:20 PM UTC 24 |
Oct 12 02:02:44 PM UTC 24 |
137752286991 ps |
T999 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/90.uart_stress_all_with_rand_reset.783973318 |
|
|
Oct 12 02:01:45 PM UTC 24 |
Oct 12 02:02:46 PM UTC 24 |
16684792344 ps |
T225 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/100.uart_fifo_reset.2202933849 |
|
|
Oct 12 02:02:09 PM UTC 24 |
Oct 12 02:02:54 PM UTC 24 |
46499285829 ps |
T1000 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/94.uart_fifo_reset.3144570262 |
|
|
Oct 12 02:01:50 PM UTC 24 |
Oct 12 02:02:55 PM UTC 24 |
81936393952 ps |
T1001 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/94.uart_stress_all_with_rand_reset.2318513563 |
|
|
Oct 12 02:01:52 PM UTC 24 |
Oct 12 02:02:56 PM UTC 24 |
9613160616 ps |
T1002 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/45.uart_long_xfer_wo_dly.1962653216 |
|
|
Oct 12 01:55:32 PM UTC 24 |
Oct 12 02:02:56 PM UTC 24 |
110047775958 ps |
T1003 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/85.uart_fifo_reset.384640306 |
|
|
Oct 12 02:01:24 PM UTC 24 |
Oct 12 02:03:00 PM UTC 24 |
39830876886 ps |
T1004 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/91.uart_fifo_reset.788216153 |
|
|
Oct 12 02:01:45 PM UTC 24 |
Oct 12 02:03:01 PM UTC 24 |
84386107537 ps |
T1005 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/120.uart_fifo_reset.165924794 |
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|
Oct 12 02:02:44 PM UTC 24 |
Oct 12 02:03:01 PM UTC 24 |
23790288519 ps |
T1006 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/96.uart_stress_all_with_rand_reset.68638299 |
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|
Oct 12 02:01:55 PM UTC 24 |
Oct 12 02:03:02 PM UTC 24 |
8444019275 ps |
T1007 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/112.uart_fifo_reset.1110887734 |
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|
Oct 12 02:02:29 PM UTC 24 |
Oct 12 02:03:02 PM UTC 24 |
20907615745 ps |
T1008 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/113.uart_fifo_reset.321109152 |
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|
Oct 12 02:02:29 PM UTC 24 |
Oct 12 02:03:03 PM UTC 24 |
57195912577 ps |
T1009 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/118.uart_fifo_reset.3726676366 |
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|
Oct 12 02:02:34 PM UTC 24 |
Oct 12 02:03:04 PM UTC 24 |
41168396624 ps |
T1010 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/109.uart_fifo_reset.4203928573 |
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|
Oct 12 02:02:19 PM UTC 24 |
Oct 12 02:03:08 PM UTC 24 |
54970765217 ps |
T1011 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/98.uart_stress_all_with_rand_reset.3796970072 |
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|
Oct 12 02:02:01 PM UTC 24 |
Oct 12 02:03:08 PM UTC 24 |
13311093618 ps |
T1012 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/110.uart_fifo_reset.4074613111 |
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|
Oct 12 02:02:21 PM UTC 24 |
Oct 12 02:03:09 PM UTC 24 |
212521752136 ps |
T1013 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/56.uart_fifo_reset.3636820719 |
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|
Oct 12 01:59:15 PM UTC 24 |
Oct 12 02:03:11 PM UTC 24 |
104385315374 ps |
T227 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/127.uart_fifo_reset.849732112 |
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|
Oct 12 02:02:57 PM UTC 24 |
Oct 12 02:03:14 PM UTC 24 |
34759512985 ps |
T1014 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/47.uart_perf.1819989985 |
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|
Oct 12 01:57:17 PM UTC 24 |
Oct 12 02:03:16 PM UTC 24 |
6869837520 ps |
T1015 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/116.uart_fifo_reset.2529633817 |
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|
Oct 12 02:02:32 PM UTC 24 |
Oct 12 02:03:18 PM UTC 24 |
106451234469 ps |
T1016 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/114.uart_fifo_reset.1419670086 |
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|
Oct 12 02:02:31 PM UTC 24 |
Oct 12 02:03:19 PM UTC 24 |
36307853418 ps |
T1017 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/128.uart_fifo_reset.890471212 |
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|
Oct 12 02:02:58 PM UTC 24 |
Oct 12 02:03:19 PM UTC 24 |
10501520027 ps |
T204 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/131.uart_fifo_reset.2758854011 |
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|
Oct 12 02:03:02 PM UTC 24 |
Oct 12 02:03:21 PM UTC 24 |
5978379608 ps |
T1018 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/126.uart_fifo_reset.1403972485 |
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|
Oct 12 02:02:57 PM UTC 24 |
Oct 12 02:03:21 PM UTC 24 |
94468290132 ps |
T1019 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/105.uart_fifo_reset.1913790607 |
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|
Oct 12 02:02:15 PM UTC 24 |
Oct 12 02:03:22 PM UTC 24 |
87200986843 ps |
T201 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/101.uart_fifo_reset.2526168516 |
|
|
Oct 12 02:02:10 PM UTC 24 |
Oct 12 02:03:22 PM UTC 24 |
30074148532 ps |
T1020 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/123.uart_fifo_reset.3135838615 |
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|
Oct 12 02:02:47 PM UTC 24 |
Oct 12 02:03:24 PM UTC 24 |
64624843088 ps |
T1021 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/134.uart_fifo_reset.2683329411 |
|
|
Oct 12 02:03:04 PM UTC 24 |
Oct 12 02:03:25 PM UTC 24 |
11476569244 ps |
T1022 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/95.uart_stress_all_with_rand_reset.1577186000 |
|
|
Oct 12 02:01:53 PM UTC 24 |
Oct 12 02:03:30 PM UTC 24 |
11502021577 ps |
T1023 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/135.uart_fifo_reset.1297554523 |
|
|
Oct 12 02:03:05 PM UTC 24 |
Oct 12 02:03:33 PM UTC 24 |
29579033077 ps |
T1024 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/125.uart_fifo_reset.2647643165 |
|
|
Oct 12 02:02:56 PM UTC 24 |
Oct 12 02:03:41 PM UTC 24 |
31454215809 ps |
T209 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/74.uart_fifo_reset.4086308762 |
|
|
Oct 12 02:00:40 PM UTC 24 |
Oct 12 02:03:46 PM UTC 24 |
103220179992 ps |
T178 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/151.uart_fifo_reset.3320027035 |
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|
Oct 12 02:03:30 PM UTC 24 |
Oct 12 02:03:49 PM UTC 24 |
17441688641 ps |
T1025 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/46.uart_fifo_full.2756811433 |
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|
Oct 12 01:55:40 PM UTC 24 |
Oct 12 02:03:50 PM UTC 24 |
137383560342 ps |
T215 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/148.uart_fifo_reset.4213832012 |
|
|
Oct 12 02:03:23 PM UTC 24 |
Oct 12 02:03:52 PM UTC 24 |
15979000733 ps |
T186 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/150.uart_fifo_reset.3795831174 |
|
|
Oct 12 02:03:26 PM UTC 24 |
Oct 12 02:03:55 PM UTC 24 |
56708070323 ps |
T1026 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/139.uart_fifo_reset.732238473 |
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|
Oct 12 02:03:12 PM UTC 24 |
Oct 12 02:03:58 PM UTC 24 |
36653255398 ps |
T1027 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/133.uart_fifo_reset.3614954371 |
|
|
Oct 12 02:03:03 PM UTC 24 |
Oct 12 02:03:59 PM UTC 24 |
28101166061 ps |
T1028 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/90.uart_fifo_reset.2698378052 |
|
|
Oct 12 02:01:41 PM UTC 24 |
Oct 12 02:03:59 PM UTC 24 |
90634894733 ps |
T1029 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/42.uart_perf.1084854579 |
|
|
Oct 12 01:53:22 PM UTC 24 |
Oct 12 02:04:00 PM UTC 24 |
22508684047 ps |
T243 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/103.uart_fifo_reset.855450167 |
|
|
Oct 12 02:02:12 PM UTC 24 |
Oct 12 02:04:02 PM UTC 24 |
175113667855 ps |
T1030 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/144.uart_fifo_reset.330844479 |
|
|
Oct 12 02:03:20 PM UTC 24 |
Oct 12 02:04:03 PM UTC 24 |
13842480297 ps |
T236 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/79.uart_fifo_reset.3234767463 |
|
|
Oct 12 02:00:58 PM UTC 24 |
Oct 12 02:04:03 PM UTC 24 |
201148153827 ps |
T1031 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/39.uart_perf.1799936481 |
|
|
Oct 12 01:51:13 PM UTC 24 |
Oct 12 02:04:05 PM UTC 24 |
13335960648 ps |
T210 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/141.uart_fifo_reset.263837998 |
|
|
Oct 12 02:03:16 PM UTC 24 |
Oct 12 02:04:05 PM UTC 24 |
18981440128 ps |
T1032 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/104.uart_fifo_reset.2328082699 |
|
|
Oct 12 02:02:14 PM UTC 24 |
Oct 12 02:04:07 PM UTC 24 |
51743002123 ps |
T1033 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/84.uart_fifo_reset.596217924 |
|
|
Oct 12 02:01:21 PM UTC 24 |
Oct 12 02:04:10 PM UTC 24 |
143303149316 ps |
T1034 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/46.uart_stress_all.448648213 |
|
|
Oct 12 01:56:22 PM UTC 24 |
Oct 12 02:04:11 PM UTC 24 |
317814873238 ps |
T1035 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/158.uart_fifo_reset.1877582205 |
|
|
Oct 12 02:03:56 PM UTC 24 |
Oct 12 02:04:12 PM UTC 24 |
25641556679 ps |
T237 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/115.uart_fifo_reset.76674216 |
|
|
Oct 12 02:02:31 PM UTC 24 |
Oct 12 02:04:13 PM UTC 24 |
49988934625 ps |
T1036 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/143.uart_fifo_reset.3033082997 |
|
|
Oct 12 02:03:20 PM UTC 24 |
Oct 12 02:04:14 PM UTC 24 |
27884361386 ps |
T234 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/124.uart_fifo_reset.1297060715 |
|
|
Oct 12 02:02:55 PM UTC 24 |
Oct 12 02:04:14 PM UTC 24 |
87236503416 ps |
T1037 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/146.uart_fifo_reset.3590612172 |
|
|
Oct 12 02:03:22 PM UTC 24 |
Oct 12 02:04:14 PM UTC 24 |
145346993782 ps |
T1038 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/48.uart_rx_parity_err.168906116 |
|
|
Oct 12 01:57:48 PM UTC 24 |
Oct 12 02:04:14 PM UTC 24 |
188095850178 ps |
T218 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/117.uart_fifo_reset.4154361529 |
|
|
Oct 12 02:02:33 PM UTC 24 |
Oct 12 02:04:20 PM UTC 24 |
101001180547 ps |
T1039 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/71.uart_fifo_reset.3562229023 |
|
|
Oct 12 02:00:26 PM UTC 24 |
Oct 12 02:04:20 PM UTC 24 |
138921629317 ps |
T1040 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/168.uart_fifo_reset.2483384112 |
|
|
Oct 12 02:04:08 PM UTC 24 |
Oct 12 02:04:21 PM UTC 24 |
26972913288 ps |
T216 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/70.uart_fifo_reset.110603514 |
|
|
Oct 12 02:00:23 PM UTC 24 |
Oct 12 02:04:21 PM UTC 24 |
98676412105 ps |
T1041 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/130.uart_fifo_reset.3569019085 |
|
|
Oct 12 02:03:02 PM UTC 24 |
Oct 12 02:04:24 PM UTC 24 |
24034968780 ps |
T1042 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/92.uart_fifo_reset.3058889618 |
|
|
Oct 12 02:01:46 PM UTC 24 |
Oct 12 02:04:24 PM UTC 24 |
148079698473 ps |
T182 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/149.uart_fifo_reset.1808988946 |
|
|
Oct 12 02:03:25 PM UTC 24 |
Oct 12 02:04:29 PM UTC 24 |
82677997639 ps |
T211 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/138.uart_fifo_reset.3666568311 |
|
|
Oct 12 02:03:09 PM UTC 24 |
Oct 12 02:04:32 PM UTC 24 |
91043873770 ps |
T228 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/172.uart_fifo_reset.2913794692 |
|
|
Oct 12 02:04:14 PM UTC 24 |
Oct 12 02:04:32 PM UTC 24 |
34708286801 ps |
T1043 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/69.uart_fifo_reset.858329201 |
|
|
Oct 12 02:00:21 PM UTC 24 |
Oct 12 02:04:34 PM UTC 24 |
113039559025 ps |
T189 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/161.uart_fifo_reset.637565490 |
|
|
Oct 12 02:04:00 PM UTC 24 |
Oct 12 02:04:34 PM UTC 24 |
86745143387 ps |
T1044 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/154.uart_fifo_reset.2996794279 |
|
|
Oct 12 02:03:47 PM UTC 24 |
Oct 12 02:04:35 PM UTC 24 |
24071945457 ps |
T1045 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/159.uart_fifo_reset.988814211 |
|
|
Oct 12 02:03:59 PM UTC 24 |
Oct 12 02:04:35 PM UTC 24 |
88676228088 ps |
T267 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/176.uart_fifo_reset.3697608998 |
|
|
Oct 12 02:04:15 PM UTC 24 |
Oct 12 02:04:35 PM UTC 24 |
41676388751 ps |
T251 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/160.uart_fifo_reset.149357554 |
|
|
Oct 12 02:04:00 PM UTC 24 |
Oct 12 02:04:37 PM UTC 24 |
49228169420 ps |
T1046 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/189.uart_fifo_reset.2471866791 |
|
|
Oct 12 02:04:36 PM UTC 24 |
Oct 12 02:04:43 PM UTC 24 |
5567742034 ps |
T240 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/165.uart_fifo_reset.3226457278 |
|
|
Oct 12 02:04:05 PM UTC 24 |
Oct 12 02:04:43 PM UTC 24 |
151527604953 ps |
T1047 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/184.uart_fifo_reset.4195786701 |
|
|
Oct 12 02:04:32 PM UTC 24 |
Oct 12 02:04:44 PM UTC 24 |
7733868950 ps |
T1048 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/212.uart_fifo_reset.3761121324 |
|
|
Oct 12 02:05:16 PM UTC 24 |
Oct 12 02:06:06 PM UTC 24 |
64298014737 ps |
T208 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/147.uart_fifo_reset.3109932725 |
|
|
Oct 12 02:03:23 PM UTC 24 |
Oct 12 02:04:45 PM UTC 24 |
94458893203 ps |
T260 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/162.uart_fifo_reset.284412752 |
|
|
Oct 12 02:04:00 PM UTC 24 |
Oct 12 02:04:47 PM UTC 24 |
153335110348 ps |
T1049 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/122.uart_fifo_reset.2920204078 |
|
|
Oct 12 02:02:45 PM UTC 24 |
Oct 12 02:04:49 PM UTC 24 |
140669278524 ps |
T1050 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/177.uart_fifo_reset.407977575 |
|
|
Oct 12 02:04:21 PM UTC 24 |
Oct 12 02:04:54 PM UTC 24 |
115031553114 ps |
T256 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/198.uart_fifo_reset.224756143 |
|
|
Oct 12 02:04:54 PM UTC 24 |
Oct 12 02:06:06 PM UTC 24 |
26858180042 ps |
T1051 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/136.uart_fifo_reset.352938523 |
|
|
Oct 12 02:03:09 PM UTC 24 |
Oct 12 02:04:56 PM UTC 24 |
91836651247 ps |
T1052 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/96.uart_fifo_reset.1946512150 |
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|
Oct 12 02:01:55 PM UTC 24 |
Oct 12 02:04:57 PM UTC 24 |
104505348509 ps |
T219 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/156.uart_fifo_reset.3616832606 |
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|
Oct 12 02:03:51 PM UTC 24 |
Oct 12 02:04:58 PM UTC 24 |
29563191562 ps |
T1053 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/155.uart_fifo_reset.3409505003 |
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|
Oct 12 02:03:50 PM UTC 24 |
Oct 12 02:04:59 PM UTC 24 |
20475481485 ps |
T1054 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/24.uart_perf.2368121435 |
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|
Oct 12 01:40:56 PM UTC 24 |
Oct 12 02:04:59 PM UTC 24 |
18261751843 ps |
T1055 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/175.uart_fifo_reset.3743427989 |
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|
Oct 12 02:04:15 PM UTC 24 |
Oct 12 02:05:00 PM UTC 24 |
65460851034 ps |
T1056 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/145.uart_fifo_reset.3097727717 |
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|
Oct 12 02:03:22 PM UTC 24 |
Oct 12 02:05:01 PM UTC 24 |
98814678034 ps |
T1057 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/193.uart_fifo_reset.3417795891 |
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|
Oct 12 02:04:44 PM UTC 24 |
Oct 12 02:05:03 PM UTC 24 |
17956362101 ps |
T1058 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/140.uart_fifo_reset.1475297810 |
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|
Oct 12 02:03:14 PM UTC 24 |
Oct 12 02:05:07 PM UTC 24 |
172609335598 ps |
T261 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/107.uart_fifo_reset.1690352724 |
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|
Oct 12 02:02:18 PM UTC 24 |
Oct 12 02:05:12 PM UTC 24 |
117186286722 ps |
T233 |
/workspaces/repo/scratch/os_regression_2024_10_11/uart-sim-vcs/coverage/default/163.uart_fifo_reset.2600530751 |
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|
Oct 12 02:04:02 PM UTC 24 |
Oct 12 02:05:12 PM UTC 24 |
35312215363 ps |