USBDEV Simulation Results

Monday June 24 2024 23:02:35 UTC

GitHub Revision: 6e698b4dfe

Branch: os_regression

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 102849012855470111388983783327793201144267754054590670930996118558901483180117

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke usbdev_smoke 1.080s 272.189us 50 50 100.00
V1 csr_hw_reset usbdev_csr_hw_reset 1.020s 175.170us 5 5 100.00
V1 csr_rw usbdev_csr_rw 1.070s 75.005us 20 20 100.00
V1 csr_bit_bash usbdev_csr_bit_bash 9.640s 1.123ms 5 5 100.00
V1 csr_aliasing usbdev_csr_aliasing 3.600s 311.451us 5 5 100.00
V1 csr_mem_rw_with_rand_reset usbdev_csr_mem_rw_with_rand_reset 2.570s 256.762us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr usbdev_csr_rw 1.070s 75.005us 20 20 100.00
usbdev_csr_aliasing 3.600s 311.451us 5 5 100.00
V1 mem_walk usbdev_mem_walk 4.610s 740.342us 5 5 100.00
V1 mem_partial_access usbdev_mem_partial_access 2.340s 180.912us 5 5 100.00
V1 TOTAL 115 115 100.00
V2 in_trans usbdev_in_trans 1.020s 222.879us 50 50 100.00
V2 data_toggle_clear usbdev_data_toggle_clear 1.780s 612.555us 50 50 100.00
V2 phy_pins_sense usbdev_phy_pins_sense 0.750s 61.954us 50 50 100.00
V2 av_buffer usbdev_av_buffer 0.950s 236.629us 50 50 100.00
V2 rx_fifo usbdev_pkt_buffer 52.680s 22.979ms 50 50 100.00
V2 phy_config_tx_osc_test_mode usbdev_phy_config_tx_osc_test_mode 1.030s 357.629us 1 1 100.00
V2 phy_config_eop_single_bit_handling usbdev_phy_config_eop_single_bit_handling 0.890s 183.665us 1 1 100.00
V2 phy_config_pinflip usbdev_phy_config_pinflip 1.080s 254.633us 50 50 100.00
V2 phy_config_rand_bus_type usbdev_phy_config_rand_bus_type 0.980s 228.267us 5 5 100.00
V2 phy_config_rx_dp_dn usbdev_phy_config_rx_dp_dn 0.890s 181.224us 1 1 100.00
V2 phy_config_tx_use_d_se0 usbdev_phy_config_tx_use_d_se0 0.950s 258.702us 1 1 100.00
V2 phy_config_usb_ref_disable usbdev_phy_config_usb_ref_disable 0.840s 201.605us 50 50 100.00
V2 max_length_out_transaction usbdev_max_length_out_transaction 1.010s 247.977us 50 50 100.00
V2 max_length_in_transaction usbdev_max_length_in_transaction 1.100s 307.647us 50 50 100.00
V2 min_length_out_transaction usbdev_min_length_out_transaction 0.880s 182.187us 50 50 100.00
V2 min_length_in_transaction usbdev_min_length_in_transaction 0.940s 185.161us 50 50 100.00
V2 random_length_out_transaction usbdev_random_length_out_transaction 0.990s 262.641us 50 50 100.00
V2 random_length_in_transaction usbdev_random_length_in_transaction 1.020s 283.626us 50 50 100.00
V2 out_stall usbdev_out_stall 0.940s 205.809us 50 50 100.00
V2 in_stall usbdev_in_stall 0.880s 209.579us 50 50 100.00
V2 out_iso usbdev_out_iso 0.970s 204.807us 50 50 100.00
V2 in_iso usbdev_in_iso 1.040s 319.790us 50 50 100.00
V2 pkt_received usbdev_pkt_received 1.060s 217.560us 50 50 100.00
V2 pkt_sent usbdev_pkt_sent 1.010s 255.317us 50 50 100.00
V2 disconnected usbdev_disconnected 0.870s 156.058us 50 50 100.00
V2 host_lost usbdev_host_lost 9.460s 4.172ms 1 1 100.00
V2 link_reset usbdev_link_reset 0.880s 185.364us 1 1 100.00
V2 link_suspend usbdev_link_suspend 4.620s 3.324ms 50 50 100.00
V2 link_resume usbdev_link_resume 29.640s 23.315ms 50 50 100.00
V2 av_empty usbdev_av_empty 0.850s 193.743us 5 5 100.00
V2 rx_full usbdev_rx_full 1.050s 271.219us 1 1 100.00
V2 av_overflow usbdev_av_overflow 0.830s 155.222us 5 5 100.00
V2 link_in_err usbdev_link_in_err 1.020s 282.292us 50 50 100.00
V2 rx_crc_err usbdev_rx_crc_err 0.960s 249.389us 50 50 100.00
V2 rx_pid_err usbdev_rx_pid_err 0.870s 242.997us 5 5 100.00
V2 rx_bitstuff_err usbdev_bitstuff_err 0.900s 217.465us 50 50 100.00
V2 link_out_err usbdev_link_out_err 1.310s 491.064us 1 1 100.00
V2 enable usbdev_enable 0.740s 46.126us 50 50 100.00
V2 resume_link_active usbdev_resume_link_active 18.140s 20.179ms 1 1 100.00
V2 device_address usbdev_device_address 44.800s 20.273ms 50 50 100.00
V2 invalid_data1_data0_toggle_test usbdev_invalid_data1_data0_toggle_test 1.410s 588.193us 1 1 100.00
V2 setup_stage usbdev_setup_stage 0.880s 179.593us 50 50 100.00
V2 endpoint_access usbdev_endpoint_access 2.360s 985.776us 50 50 100.00
V2 disable_endpoint usbdev_disable_endpoint 1.580s 475.385us 50 50 100.00
V2 out_trans_nak usbdev_out_trans_nak 0.970s 185.802us 50 50 100.00
V2 setup_trans_ignored usbdev_setup_trans_ignored 0.890s 152.466us 50 50 100.00
V2 nak_trans usbdev_nak_trans 1.020s 277.212us 50 50 100.00
V2 stall_trans usbdev_stall_trans 0.960s 257.241us 50 50 100.00
V2 setup_priority_over_stall_response setup_priority_over_stall_response 0 0 --
V2 stall_priority_over_nak usbdev_stall_priority_over_nak 0.950s 249.748us 50 50 100.00
V2 pending_in_trans usbdev_pending_in_trans 0.920s 195.077us 50 50 100.00
V2 streaming_test usbdev_streaming_out 7.115m 14.590ms 50 50 100.00
V2 max_clock_error_untracked max_clock_error_untracked 0 0 --
V2 max_clock_error_tracking max_clock_error_tracking 0 0 --
V2 max_phase_error max_phase_error 0 0 --
V2 min_inter_pkt_delay usbdev_min_inter_pkt_delay 6.548m 13.577ms 50 50 100.00
V2 max_inter_pkt_delay usbdev_max_inter_pkt_delay 7.165m 14.670ms 50 50 100.00
V2 device_timeout_missing_host_handshake device_timeout_missing_host_handshake 0 0 --
V2 device_timeout device_timeout 0 0 --
V2 packet_buffer usbdev_pkt_buffer 52.680s 22.979ms 50 50 100.00
V2 nak_to_out_trans_when_avbuffer_empty_rxfifo_full usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full 1.490s 563.732us 1 1 100.00
V2 aon_wake_resume usbdev_aon_wake_resume 29.840s 23.319ms 50 50 100.00
V2 aon_wake_reset usbdev_aon_wake_reset 15.930s 13.343ms 50 50 100.00
V2 aon_wake_disconnect usbdev_aon_wake_disconnect 5.720s 4.061ms 50 50 100.00
V2 invalid_sync usbdev_invalid_sync 7.648m 16.618ms 24 50 48.00
V2 spurious_pids_ignored usbdev_spurious_pids_ignored 6.817m 14.333ms 50 50 100.00
V2 low_speed_traffic low_speed_traffic 0 0 --
V2 rand_bus_resets usbdev_rand_bus_resets 8.917m 20.203ms 10 10 100.00
V2 rand_disconnects usbdev_rand_bus_disconnects 10.303m 25.561ms 10 10 100.00
V2 max_usb_traffic usbdev_max_usb_traffic 6.468m 13.982ms 50 50 100.00
V2 stress_usb_traffic usbdev_stress_usb_traffic 11.430m 27.978ms 5 5 100.00
V2 in_packet_retraction in_packet_retraction 0 0 --
V2 data_toggle_restore usbdev_data_toggle_restore 3.280s 1.426ms 50 50 100.00
V2 setup_priority usbdev_setup_priority 1.410s 451.093us 5 5 100.00
V2 fifo_resets usbdev_fifo_rst 2.630s 428.883us 50 50 100.00
V2 intr_test usbdev_intr_test 0.760s 49.246us 50 50 100.00
V2 alert_test usbdev_alert_test 0 0 --
V2 tl_d_oob_addr_access usbdev_tl_errors 3.500s 300.969us 20 20 100.00
V2 tl_d_illegal_access usbdev_tl_errors 3.500s 300.969us 20 20 100.00
V2 tl_d_outstanding_access usbdev_csr_hw_reset 1.020s 175.170us 5 5 100.00
usbdev_csr_rw 1.070s 75.005us 20 20 100.00
usbdev_csr_aliasing 3.600s 311.451us 5 5 100.00
usbdev_same_csr_outstanding 2.010s 383.838us 20 20 100.00
V2 tl_d_partial_access usbdev_csr_hw_reset 1.020s 175.170us 5 5 100.00
usbdev_csr_rw 1.070s 75.005us 20 20 100.00
usbdev_csr_aliasing 3.600s 311.451us 5 5 100.00
usbdev_same_csr_outstanding 2.010s 383.838us 20 20 100.00
V2 TOTAL 2475 2501 98.96
V2S tl_intg_err usbdev_sec_cm 3.160s 2.596ms 5 5 100.00
usbdev_tl_intg_err 5.460s 919.633us 20 20 100.00
V2S sec_cm_bus_integrity usbdev_tl_intg_err 5.460s 919.633us 20 20 100.00
V2S TOTAL 25 25 100.00
V3 TOTAL 0 0 --
Unmapped tests usbdev_dpi_config_host 2.187m 5.118ms 1 1 100.00
usbdev_rand_suspends 17.170m 39.872ms 10 10 100.00
usbdev_stress_all_with_rand_reset 0.690s 71.474us 0 10 0.00
usbdev_stress_all 0.630s 0 50 0.00
TOTAL 2626 2712 96.83

Testplan Progress

Items Total Written Passing Progress
N.A. 4 4 2 50.00
V1 8 8 8 100.00
V2 78 69 68 87.18
V2S 2 2 2 100.00

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
93.35 97.82 93.79 97.44 73.44 96.21 98.17 96.58

Failure Buckets

Past Results