USBDEV Simulation Results

Tuesday August 06 2024 23:02:29 UTC

GitHub Revision: 5fd4ecc0fc

Branch: os_regression

Testplan

Simulator: VCS

Build randomization enabled with --build-seed 56304622830272859824235340993951659280265419461975949533183046575604373639200

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke usbdev_smoke 1.120s 315.965us 50 50 100.00
V1 csr_hw_reset usbdev_csr_hw_reset 0.970s 81.617us 5 5 100.00
V1 csr_rw usbdev_csr_rw 1.060s 115.087us 20 20 100.00
V1 csr_bit_bash usbdev_csr_bit_bash 9.240s 2.017ms 5 5 100.00
V1 csr_aliasing usbdev_csr_aliasing 3.870s 387.879us 5 5 100.00
V1 csr_mem_rw_with_rand_reset usbdev_csr_mem_rw_with_rand_reset 2.410s 94.199us 20 20 100.00
V1 regwen_csr_and_corresponding_lockable_csr usbdev_csr_rw 1.060s 115.087us 20 20 100.00
usbdev_csr_aliasing 3.870s 387.879us 5 5 100.00
V1 mem_walk usbdev_mem_walk 4.020s 176.427us 5 5 100.00
V1 mem_partial_access usbdev_mem_partial_access 2.230s 80.679us 5 5 100.00
V1 TOTAL 115 115 100.00
V2 in_trans usbdev_in_trans 1.190s 282.786us 50 50 100.00
V2 data_toggle_clear usbdev_data_toggle_clear 2.030s 613.271us 50 50 100.00
V2 phy_pins_sense usbdev_phy_pins_sense 0.810s 109.718us 50 50 100.00
V2 av_buffer usbdev_av_buffer 0.980s 191.506us 50 50 100.00
V2 rx_fifo usbdev_pkt_buffer 58.950s 22.805ms 50 50 100.00
V2 phy_config_tx_osc_test_mode usbdev_phy_config_tx_osc_test_mode 1.200s 357.956us 1 1 100.00
V2 phy_config_eop_single_bit_handling usbdev_phy_config_eop_single_bit_handling 0.860s 173.829us 1 1 100.00
V2 phy_config_pinflip usbdev_phy_config_pinflip 1.160s 277.468us 50 50 100.00
V2 phy_config_rand_bus_type usbdev_phy_config_rand_bus_type 0.990s 237.947us 5 5 100.00
V2 phy_config_rx_dp_dn usbdev_phy_config_rx_dp_dn 1.010s 214.686us 1 1 100.00
V2 phy_config_tx_use_d_se0 usbdev_phy_config_tx_use_d_se0 1.070s 244.527us 1 1 100.00
V2 phy_config_usb_ref_disable usbdev_phy_config_usb_ref_disable 0.930s 187.137us 50 50 100.00
V2 max_length_out_transaction usbdev_max_length_out_transaction 1.080s 274.543us 50 50 100.00
usbdev_stream_len_max 3.300s 1.389ms 50 50 100.00
V2 max_length_in_transaction usbdev_max_length_in_transaction 1.150s 257.085us 50 50 100.00
V2 min_length_out_transaction usbdev_min_length_out_transaction 0.950s 202.927us 50 50 100.00
V2 min_length_in_transaction usbdev_min_length_in_transaction 1.010s 190.548us 50 50 100.00
V2 random_length_out_transaction usbdev_random_length_out_transaction 1.000s 169.774us 50 50 100.00
V2 random_length_in_transaction usbdev_random_length_in_transaction 1.130s 274.180us 50 50 100.00
V2 out_stall usbdev_out_stall 1.020s 204.493us 50 50 100.00
V2 in_stall usbdev_in_stall 0.960s 213.739us 50 50 100.00
V2 out_iso usbdev_out_iso 1.010s 242.219us 50 50 100.00
V2 in_iso usbdev_in_iso 1.370s 293.121us 50 50 100.00
V2 pkt_received usbdev_pkt_received 1.050s 181.980us 50 50 100.00
V2 pkt_sent usbdev_pkt_sent 1.160s 253.264us 50 50 100.00
V2 disconnected usbdev_disconnected 0.920s 137.985us 50 50 100.00
V2 host_lost usbdev_host_lost 9.850s 4.169ms 1 1 100.00
V2 link_reset usbdev_link_reset 0.900s 181.739us 1 1 100.00
V2 link_suspend usbdev_link_suspend 16.020s 10.387ms 50 50 100.00
V2 link_resume usbdev_link_resume 52.550s 32.602ms 49 50 98.00
V2 av_empty usbdev_av_empty 0.940s 205.031us 5 5 100.00
V2 rx_full usbdev_rx_full 1.430s 394.831us 50 50 100.00
V2 av_overflow usbdev_av_overflow 0.850s 163.225us 5 5 100.00
V2 link_in_err usbdev_link_in_err 1.190s 229.148us 50 50 100.00
V2 rx_crc_err usbdev_rx_crc_err 0.960s 245.044us 50 50 100.00
V2 rx_pid_err usbdev_rx_pid_err 0.910s 215.436us 5 5 100.00
V2 rx_bitstuff_err usbdev_bitstuff_err 0.940s 189.866us 50 50 100.00
V2 link_out_err usbdev_link_out_err 1.500s 496.335us 1 1 100.00
V2 enable usbdev_enable 0.870s 92.460us 50 50 100.00
V2 resume_link_active usbdev_resume_link_active 31.680s 20.165ms 20 20 100.00
V2 device_address usbdev_device_address 1.791m 59.898ms 50 50 100.00
V2 invalid_data1_data0_toggle_test usbdev_invalid_data1_data0_toggle_test 1.500s 412.521us 1 1 100.00
V2 setup_stage usbdev_setup_stage 0.960s 216.266us 50 50 100.00
V2 endpoint_access usbdev_endpoint_access 3.130s 982.056us 50 50 100.00
V2 disable_endpoint usbdev_disable_endpoint 2.830s 1.113ms 50 50 100.00
V2 endpoint_types usbdev_endpoint_types 2.170s 895.023us 200 200 100.00
V2 out_trans_nak usbdev_out_trans_nak 1.020s 232.662us 50 50 100.00
V2 setup_trans_ignored usbdev_setup_trans_ignored 0.930s 168.768us 50 50 100.00
V2 nak_trans usbdev_nak_trans 1.030s 279.758us 50 50 100.00
V2 stall_trans usbdev_stall_trans 1.020s 212.238us 50 50 100.00
V2 setup_priority_over_stall_response usbdev_setup_priority_over_stall_response 1.140s 306.149us 5 5 100.00
V2 stall_priority_over_nak usbdev_stall_priority_over_nak 0.970s 190.413us 50 50 100.00
V2 pending_in_trans usbdev_pending_in_trans 0.970s 210.328us 50 50 100.00
V2 streaming_test usbdev_streaming_out 1.970m 4.161ms 50 50 100.00
V2 max_clock_error_untracked usbdev_freq_hiclk 2.818m 118.198ms 5 5 100.00
usbdev_freq_loclk 2.853m 109.105ms 5 5 100.00
V2 max_clock_error_tracking usbdev_freq_hiclk_max 3.147m 105.286ms 5 5 100.00
usbdev_freq_loclk_max 3.159m 117.942ms 5 5 100.00
V2 max_phase_error usbdev_freq_phase 2.956m 93.111ms 5 5 100.00
V2 min_inter_pkt_delay usbdev_min_inter_pkt_delay 1.977m 4.017ms 50 50 100.00
V2 max_inter_pkt_delay usbdev_max_inter_pkt_delay 1.916m 3.862ms 50 50 100.00
V2 device_timeout_missing_host_handshake usbdev_timeout_missing_host_handshake 40.470s 6.389ms 50 50 100.00
V2 device_timeout usbdev_device_timeout 57.140s 8.461ms 50 50 100.00
V2 packet_buffer usbdev_pkt_buffer 58.950s 22.805ms 50 50 100.00
V2 nak_to_out_trans_when_avbuffer_empty_rxfifo_full usbdev_nak_to_out_trans_when_avbuffer_empty_rxfifo_full 1.690s 567.266us 1 1 100.00
V2 aon_wake_resume usbdev_aon_wake_resume 46.390s 31.222ms 50 50 100.00
V2 aon_wake_reset usbdev_aon_wake_reset 30.400s 21.366ms 50 50 100.00
V2 aon_wake_disconnect usbdev_aon_wake_disconnect 16.890s 11.740ms 50 50 100.00
V2 invalid_sync usbdev_invalid_sync 2.508m 5.053ms 50 50 100.00
V2 spurious_pids_ignored usbdev_spurious_pids_ignored 1.914m 3.904ms 50 50 100.00
V2 low_speed_traffic usbdev_low_speed_traffic 2.697m 5.543ms 50 50 100.00
V2 rand_bus_resets usbdev_rand_bus_resets 5.433m 14.360ms 10 10 100.00
V2 rand_disconnects usbdev_rand_bus_disconnects 2.856m 9.092ms 10 10 100.00
V2 rand_suspends usbdev_rand_suspends 2.687m 9.091ms 10 10 100.00
V2 max_usb_traffic usbdev_max_non_iso_usb_traffic 1.582m 3.144ms 25 25 100.00
usbdev_max_usb_traffic 1.637m 3.172ms 15 15 100.00
V2 stress_usb_traffic usbdev_stress_usb_traffic 3.319m 10.527ms 5 5 100.00
V2 in_packet_retraction usbdev_iso_retraction 2.830m 13.399ms 45 50 90.00
V2 data_toggle_restore usbdev_data_toggle_restore 3.520s 1.365ms 50 50 100.00
V2 setup_priority usbdev_setup_priority 1.520s 418.639us 5 5 100.00
V2 fifo_resets usbdev_fifo_rst 2.820s 333.546us 50 50 100.00
V2 intr_test usbdev_intr_test 0.820s 92.818us 50 50 100.00
V2 alert_test usbdev_alert_test 0.780s 84.057us 50 50 100.00
V2 tl_d_oob_addr_access usbdev_tl_errors 3.920s 144.829us 20 20 100.00
V2 tl_d_illegal_access usbdev_tl_errors 3.920s 144.829us 20 20 100.00
V2 tl_d_outstanding_access usbdev_csr_hw_reset 0.970s 81.617us 5 5 100.00
usbdev_csr_rw 1.060s 115.087us 20 20 100.00
usbdev_csr_aliasing 3.870s 387.879us 5 5 100.00
usbdev_same_csr_outstanding 1.990s 261.696us 20 20 100.00
V2 tl_d_partial_access usbdev_csr_hw_reset 0.970s 81.617us 5 5 100.00
usbdev_csr_rw 1.060s 115.087us 20 20 100.00
usbdev_csr_aliasing 3.870s 387.879us 5 5 100.00
usbdev_same_csr_outstanding 1.990s 261.696us 20 20 100.00
V2 TOTAL 3093 3099 99.81
V2S tl_intg_err usbdev_sec_cm 1.770s 844.375us 5 5 100.00
usbdev_tl_intg_err 5.780s 1.858ms 20 20 100.00
V2S sec_cm_bus_integrity usbdev_tl_intg_err 5.780s 1.858ms 20 20 100.00
V2S TOTAL 25 25 100.00
V3 dpi_config_host usbdev_dpi_config_host 48.020s 5.107ms 1 1 100.00
V3 TOTAL 1 1 100.00
Unmapped tests usbdev_stress_all_with_rand_reset 0.680s 34.805us 0 10 0.00
usbdev_stress_all 0.650s 0 50 0.00
TOTAL 3234 3300 98.00

Testplan Progress

Items Total Written Passing Progress
N.A. 2 2 0 0.00
V1 8 8 8 100.00
V2 84 84 82 97.62
V2S 2 2 2 100.00
V3 1 1 1 100.00

Coverage Results

Coverage Dashboard

SCORE LINE COND TOGGLE FSM BRANCH ASSERT GROUP
93.62 97.98 93.97 97.44 81.25 96.46 98.17 90.05

Failure Buckets

Past Results