Tests
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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.22 95.37 94.53 95.15 95.35 97.38 99.53


Total test records in report: 2844
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T1787 /workspace/coverage/cover_reg_top/78.xbar_error_and_unmapped_addr.3916771027 Mar 07 04:21:40 PM PST 24 Mar 07 04:22:14 PM PST 24 741591525 ps
T1788 /workspace/coverage/cover_reg_top/65.xbar_stress_all_with_reset_error.2903236601 Mar 07 04:19:57 PM PST 24 Mar 07 04:22:38 PM PST 24 1197973090 ps
T1789 /workspace/coverage/cover_reg_top/5.xbar_smoke_zero_delays.2602301095 Mar 07 04:06:36 PM PST 24 Mar 07 04:06:44 PM PST 24 49086911 ps
T1790 /workspace/coverage/cover_reg_top/8.xbar_random_zero_delays.4076373885 Mar 07 04:08:05 PM PST 24 Mar 07 04:08:38 PM PST 24 328796076 ps
T1791 /workspace/coverage/cover_reg_top/69.xbar_access_same_device_slow_rsp.1733616882 Mar 07 04:20:24 PM PST 24 Mar 07 05:04:45 PM PST 24 144919794711 ps
T1792 /workspace/coverage/cover_reg_top/57.xbar_random_slow_rsp.4039937174 Mar 07 04:18:47 PM PST 24 Mar 07 04:32:49 PM PST 24 48412147392 ps
T1793 /workspace/coverage/cover_reg_top/4.xbar_same_source.1557518449 Mar 07 04:06:02 PM PST 24 Mar 07 04:06:36 PM PST 24 1027862447 ps
T1794 /workspace/coverage/cover_reg_top/66.xbar_access_same_device_slow_rsp.2573729410 Mar 07 04:19:59 PM PST 24 Mar 07 05:05:58 PM PST 24 164479613304 ps
T1795 /workspace/coverage/cover_reg_top/52.xbar_smoke_large_delays.3512333730 Mar 07 04:18:06 PM PST 24 Mar 07 04:18:53 PM PST 24 3954576365 ps
T1796 /workspace/coverage/cover_reg_top/29.xbar_random_large_delays.448069074 Mar 07 04:14:42 PM PST 24 Mar 07 04:27:57 PM PST 24 75966292529 ps
T1797 /workspace/coverage/cover_reg_top/98.xbar_random_large_delays.2487073462 Mar 07 04:24:17 PM PST 24 Mar 07 04:39:27 PM PST 24 80905712100 ps
T1798 /workspace/coverage/cover_reg_top/23.xbar_random_zero_delays.2696333592 Mar 07 04:13:17 PM PST 24 Mar 07 04:14:13 PM PST 24 561554654 ps
T601 /workspace/coverage/cover_reg_top/83.xbar_stress_all_with_reset_error.3781169318 Mar 07 04:22:17 PM PST 24 Mar 07 04:33:00 PM PST 24 6652598994 ps
T1799 /workspace/coverage/cover_reg_top/22.xbar_random_zero_delays.3756726536 Mar 07 04:12:57 PM PST 24 Mar 07 04:13:33 PM PST 24 352106206 ps
T1800 /workspace/coverage/cover_reg_top/79.xbar_random_zero_delays.1331120043 Mar 07 04:21:39 PM PST 24 Mar 07 04:21:46 PM PST 24 45594337 ps
T1801 /workspace/coverage/cover_reg_top/18.xbar_smoke_large_delays.1010573229 Mar 07 04:11:49 PM PST 24 Mar 07 04:13:23 PM PST 24 8428868587 ps
T1802 /workspace/coverage/cover_reg_top/51.xbar_access_same_device_slow_rsp.697086704 Mar 07 04:18:09 PM PST 24 Mar 07 05:00:35 PM PST 24 150403053735 ps
T1803 /workspace/coverage/cover_reg_top/0.chip_rv_dm_lc_disabled.3482080631 Mar 07 04:02:37 PM PST 24 Mar 07 04:15:34 PM PST 24 18901635267 ps
T1804 /workspace/coverage/cover_reg_top/68.xbar_error_and_unmapped_addr.2650206814 Mar 07 04:20:19 PM PST 24 Mar 07 04:20:55 PM PST 24 328845222 ps
T1805 /workspace/coverage/cover_reg_top/13.xbar_stress_all_with_rand_reset.824899222 Mar 07 04:10:26 PM PST 24 Mar 07 04:18:14 PM PST 24 3355544769 ps
T1806 /workspace/coverage/cover_reg_top/34.xbar_random_slow_rsp.1198524197 Mar 07 04:15:23 PM PST 24 Mar 07 04:19:01 PM PST 24 12133131309 ps
T1807 /workspace/coverage/cover_reg_top/24.xbar_unmapped_addr.2045947771 Mar 07 04:13:34 PM PST 24 Mar 07 04:14:27 PM PST 24 1243189113 ps
T1808 /workspace/coverage/cover_reg_top/61.xbar_smoke.510563917 Mar 07 04:19:11 PM PST 24 Mar 07 04:19:22 PM PST 24 246782563 ps
T1809 /workspace/coverage/cover_reg_top/0.xbar_smoke_large_delays.622923392 Mar 07 04:02:32 PM PST 24 Mar 07 04:03:49 PM PST 24 7192193653 ps
T1810 /workspace/coverage/cover_reg_top/44.xbar_random_large_delays.1774134427 Mar 07 04:17:06 PM PST 24 Mar 07 04:32:02 PM PST 24 78970646929 ps
T685 /workspace/coverage/cover_reg_top/1.chip_tl_errors.2295431682 Mar 07 04:03:25 PM PST 24 Mar 07 04:07:49 PM PST 24 3650332650 ps
T1811 /workspace/coverage/cover_reg_top/53.xbar_stress_all_with_error.1780445764 Mar 07 04:18:21 PM PST 24 Mar 07 04:19:27 PM PST 24 637118638 ps
T1812 /workspace/coverage/cover_reg_top/87.xbar_smoke.3435413345 Mar 07 04:22:45 PM PST 24 Mar 07 04:22:55 PM PST 24 196008588 ps
T1813 /workspace/coverage/cover_reg_top/81.xbar_random_large_delays.2071828585 Mar 07 04:21:55 PM PST 24 Mar 07 04:34:53 PM PST 24 66475767636 ps
T1814 /workspace/coverage/cover_reg_top/5.chip_csr_rw.3042708564 Mar 07 04:06:49 PM PST 24 Mar 07 04:11:43 PM PST 24 4882287262 ps
T1815 /workspace/coverage/cover_reg_top/41.xbar_smoke_zero_delays.2985444446 Mar 07 04:16:31 PM PST 24 Mar 07 04:16:37 PM PST 24 47515761 ps
T1816 /workspace/coverage/cover_reg_top/47.xbar_smoke_zero_delays.3514120704 Mar 07 04:17:20 PM PST 24 Mar 07 04:17:27 PM PST 24 52382500 ps
T1817 /workspace/coverage/cover_reg_top/33.xbar_smoke_slow_rsp.2211961173 Mar 07 04:15:18 PM PST 24 Mar 07 04:17:08 PM PST 24 6403611694 ps
T1818 /workspace/coverage/cover_reg_top/3.xbar_error_and_unmapped_addr.3614112100 Mar 07 04:05:40 PM PST 24 Mar 07 04:05:56 PM PST 24 115437578 ps
T1819 /workspace/coverage/cover_reg_top/48.xbar_same_source.1956223921 Mar 07 04:17:32 PM PST 24 Mar 07 04:17:41 PM PST 24 155429276 ps
T1820 /workspace/coverage/cover_reg_top/8.xbar_access_same_device_slow_rsp.2544061323 Mar 07 04:08:15 PM PST 24 Mar 07 04:13:05 PM PST 24 15994439934 ps
T1821 /workspace/coverage/cover_reg_top/12.xbar_random.2890782205 Mar 07 04:09:48 PM PST 24 Mar 07 04:10:05 PM PST 24 357970251 ps
T1822 /workspace/coverage/cover_reg_top/42.xbar_smoke_slow_rsp.2618858818 Mar 07 04:16:48 PM PST 24 Mar 07 04:17:57 PM PST 24 3568551362 ps
T1823 /workspace/coverage/cover_reg_top/39.xbar_access_same_device_slow_rsp.3991386936 Mar 07 04:16:16 PM PST 24 Mar 07 04:52:49 PM PST 24 130233805392 ps
T1824 /workspace/coverage/cover_reg_top/84.xbar_random.1541510410 Mar 07 04:22:17 PM PST 24 Mar 07 04:23:12 PM PST 24 1369330674 ps
T1825 /workspace/coverage/cover_reg_top/7.xbar_error_and_unmapped_addr.3961353324 Mar 07 04:07:50 PM PST 24 Mar 07 04:08:10 PM PST 24 384761219 ps
T1826 /workspace/coverage/cover_reg_top/89.xbar_stress_all_with_reset_error.2853692009 Mar 07 04:23:13 PM PST 24 Mar 07 04:29:10 PM PST 24 2619011083 ps
T1827 /workspace/coverage/cover_reg_top/57.xbar_access_same_device_slow_rsp.1616320551 Mar 07 04:18:47 PM PST 24 Mar 07 04:21:43 PM PST 24 9854338127 ps
T1828 /workspace/coverage/cover_reg_top/36.xbar_random_slow_rsp.1011826481 Mar 07 04:15:47 PM PST 24 Mar 07 04:16:48 PM PST 24 3532051758 ps
T1829 /workspace/coverage/cover_reg_top/17.chip_tl_errors.617090289 Mar 07 04:11:22 PM PST 24 Mar 07 04:15:32 PM PST 24 3440023750 ps
T837 /workspace/coverage/cover_reg_top/35.xbar_stress_all_with_reset_error.52423721 Mar 07 04:15:40 PM PST 24 Mar 07 04:16:25 PM PST 24 235920877 ps
T1830 /workspace/coverage/cover_reg_top/44.xbar_smoke_large_delays.1679857643 Mar 07 04:16:55 PM PST 24 Mar 07 04:18:42 PM PST 24 10342995888 ps
T1831 /workspace/coverage/cover_reg_top/69.xbar_stress_all_with_rand_reset.3378212093 Mar 07 04:20:26 PM PST 24 Mar 07 04:20:55 PM PST 24 174903526 ps
T1832 /workspace/coverage/cover_reg_top/19.xbar_stress_all.3012250657 Mar 07 04:12:20 PM PST 24 Mar 07 04:16:02 PM PST 24 4933812032 ps
T832 /workspace/coverage/cover_reg_top/42.xbar_stress_all_with_rand_reset.3120277835 Mar 07 04:16:43 PM PST 24 Mar 07 04:24:17 PM PST 24 7757881619 ps
T1833 /workspace/coverage/cover_reg_top/1.chip_csr_aliasing.3073835944 Mar 07 04:03:36 PM PST 24 Mar 07 06:36:14 PM PST 24 50771445838 ps
T1834 /workspace/coverage/cover_reg_top/6.xbar_smoke_slow_rsp.3229790441 Mar 07 04:07:05 PM PST 24 Mar 07 04:08:57 PM PST 24 6174298732 ps
T1835 /workspace/coverage/cover_reg_top/49.xbar_same_source.1324300216 Mar 07 04:17:45 PM PST 24 Mar 07 04:18:21 PM PST 24 1111821264 ps
T1836 /workspace/coverage/cover_reg_top/43.xbar_stress_all_with_error.2612468893 Mar 07 04:16:56 PM PST 24 Mar 07 04:27:19 PM PST 24 17270060172 ps
T1837 /workspace/coverage/cover_reg_top/64.xbar_stress_all_with_reset_error.3738506389 Mar 07 04:19:51 PM PST 24 Mar 07 04:20:39 PM PST 24 111783073 ps
T1838 /workspace/coverage/cover_reg_top/38.xbar_smoke_large_delays.1972195399 Mar 07 04:16:05 PM PST 24 Mar 07 04:18:00 PM PST 24 10473012355 ps
T1839 /workspace/coverage/cover_reg_top/80.xbar_stress_all.1032838555 Mar 07 04:21:45 PM PST 24 Mar 07 04:22:54 PM PST 24 704059045 ps
T1840 /workspace/coverage/cover_reg_top/75.xbar_error_and_unmapped_addr.225435798 Mar 07 04:21:16 PM PST 24 Mar 07 04:21:39 PM PST 24 216290766 ps
T1841 /workspace/coverage/cover_reg_top/62.xbar_smoke_slow_rsp.3300055109 Mar 07 04:19:16 PM PST 24 Mar 07 04:20:24 PM PST 24 3786708567 ps
T1842 /workspace/coverage/cover_reg_top/62.xbar_stress_all_with_reset_error.631724513 Mar 07 04:19:23 PM PST 24 Mar 07 04:26:48 PM PST 24 4399637025 ps
T1843 /workspace/coverage/cover_reg_top/74.xbar_random.2313630192 Mar 07 04:21:01 PM PST 24 Mar 07 04:22:03 PM PST 24 1703406736 ps
T1844 /workspace/coverage/cover_reg_top/79.xbar_smoke_slow_rsp.198473588 Mar 07 04:21:42 PM PST 24 Mar 07 04:23:17 PM PST 24 5230079667 ps
T1845 /workspace/coverage/cover_reg_top/53.xbar_random_large_delays.4125321143 Mar 07 04:18:15 PM PST 24 Mar 07 04:20:12 PM PST 24 10158514204 ps
T1846 /workspace/coverage/cover_reg_top/43.xbar_error_and_unmapped_addr.1126332650 Mar 07 04:17:00 PM PST 24 Mar 07 04:17:13 PM PST 24 235737220 ps
T1847 /workspace/coverage/cover_reg_top/64.xbar_smoke.3741064487 Mar 07 04:19:33 PM PST 24 Mar 07 04:19:42 PM PST 24 182290158 ps
T1848 /workspace/coverage/cover_reg_top/12.xbar_stress_all.4151479837 Mar 07 04:10:11 PM PST 24 Mar 07 04:13:42 PM PST 24 4954003713 ps
T1849 /workspace/coverage/cover_reg_top/54.xbar_stress_all_with_rand_reset.2041514652 Mar 07 04:18:26 PM PST 24 Mar 07 04:23:02 PM PST 24 3839250771 ps
T1850 /workspace/coverage/cover_reg_top/36.xbar_smoke_large_delays.4243423099 Mar 07 04:15:48 PM PST 24 Mar 07 04:17:15 PM PST 24 8199242592 ps
T1851 /workspace/coverage/cover_reg_top/30.xbar_stress_all_with_rand_reset.3187962279 Mar 07 04:14:53 PM PST 24 Mar 07 04:16:56 PM PST 24 404411937 ps
T1852 /workspace/coverage/cover_reg_top/83.xbar_error_and_unmapped_addr.1218510890 Mar 07 04:22:18 PM PST 24 Mar 07 04:22:30 PM PST 24 91936717 ps
T1853 /workspace/coverage/cover_reg_top/34.xbar_stress_all.4011368939 Mar 07 04:15:24 PM PST 24 Mar 07 04:17:09 PM PST 24 2338180122 ps
T1854 /workspace/coverage/cover_reg_top/44.xbar_random.967919162 Mar 07 04:16:58 PM PST 24 Mar 07 04:17:31 PM PST 24 849606200 ps
T1855 /workspace/coverage/cover_reg_top/77.xbar_error_random.474779323 Mar 07 04:21:22 PM PST 24 Mar 07 04:22:54 PM PST 24 2512001646 ps
T1856 /workspace/coverage/cover_reg_top/17.xbar_smoke.1842493120 Mar 07 04:11:27 PM PST 24 Mar 07 04:11:33 PM PST 24 46561779 ps
T817 /workspace/coverage/cover_reg_top/23.xbar_access_same_device_slow_rsp.3673827545 Mar 07 04:13:19 PM PST 24 Mar 07 04:29:31 PM PST 24 53295239322 ps
T1857 /workspace/coverage/cover_reg_top/28.xbar_same_source.337874554 Mar 07 04:14:22 PM PST 24 Mar 07 04:14:48 PM PST 24 718582138 ps
T1858 /workspace/coverage/cover_reg_top/32.xbar_smoke.2485934989 Mar 07 04:14:57 PM PST 24 Mar 07 04:15:05 PM PST 24 185300283 ps
T1859 /workspace/coverage/cover_reg_top/93.xbar_random.1787456590 Mar 07 04:23:40 PM PST 24 Mar 07 04:25:06 PM PST 24 2404560982 ps
T1860 /workspace/coverage/cover_reg_top/89.xbar_access_same_device_slow_rsp.3640463840 Mar 07 04:23:04 PM PST 24 Mar 07 04:44:55 PM PST 24 73691003982 ps
T388 /workspace/coverage/cover_reg_top/6.chip_same_csr_outstanding.19907128 Mar 07 04:06:54 PM PST 24 Mar 07 05:01:01 PM PST 24 32766815820 ps
T1861 /workspace/coverage/cover_reg_top/87.xbar_error_and_unmapped_addr.2380515445 Mar 07 04:22:48 PM PST 24 Mar 07 04:23:20 PM PST 24 777109361 ps
T1862 /workspace/coverage/cover_reg_top/33.xbar_random_zero_delays.2333356538 Mar 07 04:15:16 PM PST 24 Mar 07 04:15:33 PM PST 24 157462261 ps
T1863 /workspace/coverage/cover_reg_top/58.xbar_random.3922055365 Mar 07 04:18:55 PM PST 24 Mar 07 04:19:34 PM PST 24 456781445 ps
T1864 /workspace/coverage/cover_reg_top/67.xbar_random_zero_delays.1000880242 Mar 07 04:20:11 PM PST 24 Mar 07 04:20:21 PM PST 24 99396845 ps
T1865 /workspace/coverage/cover_reg_top/24.xbar_stress_all.262447984 Mar 07 04:13:35 PM PST 24 Mar 07 04:15:53 PM PST 24 1426100471 ps
T1866 /workspace/coverage/cover_reg_top/35.xbar_random_large_delays.1137612615 Mar 07 04:15:40 PM PST 24 Mar 07 04:33:19 PM PST 24 88543388594 ps
T1867 /workspace/coverage/cover_reg_top/41.xbar_smoke.3917552261 Mar 07 04:16:28 PM PST 24 Mar 07 04:16:34 PM PST 24 44066923 ps
T1868 /workspace/coverage/cover_reg_top/36.xbar_stress_all_with_rand_reset.3730906280 Mar 07 04:15:57 PM PST 24 Mar 07 04:17:46 PM PST 24 210594597 ps
T1869 /workspace/coverage/cover_reg_top/5.xbar_random_zero_delays.1307051555 Mar 07 04:06:37 PM PST 24 Mar 07 04:06:50 PM PST 24 96588731 ps
T1870 /workspace/coverage/cover_reg_top/31.xbar_stress_all.1537415860 Mar 07 04:14:58 PM PST 24 Mar 07 04:23:20 PM PST 24 12421764272 ps
T1871 /workspace/coverage/cover_reg_top/91.xbar_stress_all.1497658232 Mar 07 04:23:20 PM PST 24 Mar 07 04:28:50 PM PST 24 8397784160 ps
T1872 /workspace/coverage/cover_reg_top/75.xbar_same_source.2181462533 Mar 07 04:21:13 PM PST 24 Mar 07 04:21:44 PM PST 24 990987163 ps
T1873 /workspace/coverage/cover_reg_top/48.xbar_smoke_slow_rsp.2244930793 Mar 07 04:17:25 PM PST 24 Mar 07 04:19:00 PM PST 24 5140241858 ps
T1874 /workspace/coverage/cover_reg_top/68.xbar_smoke_large_delays.449185828 Mar 07 04:20:12 PM PST 24 Mar 07 04:22:01 PM PST 24 10224585743 ps
T1875 /workspace/coverage/cover_reg_top/56.xbar_smoke_slow_rsp.565409058 Mar 07 04:18:38 PM PST 24 Mar 07 04:20:31 PM PST 24 6153303947 ps
T1876 /workspace/coverage/cover_reg_top/91.xbar_same_source.2783535534 Mar 07 04:23:25 PM PST 24 Mar 07 04:23:52 PM PST 24 364225900 ps
T1877 /workspace/coverage/cover_reg_top/2.chip_csr_bit_bash.2943251065 Mar 07 04:04:22 PM PST 24 Mar 07 04:21:05 PM PST 24 10935040296 ps
T1878 /workspace/coverage/cover_reg_top/91.xbar_smoke_slow_rsp.3031893218 Mar 07 04:23:26 PM PST 24 Mar 07 04:24:19 PM PST 24 2784177048 ps
T1879 /workspace/coverage/cover_reg_top/32.xbar_random_zero_delays.2055771239 Mar 07 04:15:07 PM PST 24 Mar 07 04:15:15 PM PST 24 62090180 ps
T1880 /workspace/coverage/cover_reg_top/94.xbar_stress_all.3256632362 Mar 07 04:23:44 PM PST 24 Mar 07 04:27:00 PM PST 24 2144576777 ps
T1881 /workspace/coverage/cover_reg_top/40.xbar_stress_all.887203426 Mar 07 04:16:34 PM PST 24 Mar 07 04:20:39 PM PST 24 2503695154 ps
T1882 /workspace/coverage/cover_reg_top/28.xbar_smoke_slow_rsp.2977992602 Mar 07 04:14:08 PM PST 24 Mar 07 04:15:15 PM PST 24 3828481324 ps
T1883 /workspace/coverage/cover_reg_top/60.xbar_access_same_device.4104122506 Mar 07 04:19:10 PM PST 24 Mar 07 04:21:24 PM PST 24 2871764154 ps
T1884 /workspace/coverage/cover_reg_top/82.xbar_error_and_unmapped_addr.4235769113 Mar 07 04:22:11 PM PST 24 Mar 07 04:22:17 PM PST 24 38330210 ps
T1885 /workspace/coverage/cover_reg_top/2.chip_rv_dm_lc_disabled.1798845459 Mar 07 04:04:28 PM PST 24 Mar 07 04:11:41 PM PST 24 8245329979 ps
T1886 /workspace/coverage/cover_reg_top/38.xbar_access_same_device_slow_rsp.2551168482 Mar 07 04:16:02 PM PST 24 Mar 07 04:32:58 PM PST 24 56865367356 ps
T1887 /workspace/coverage/cover_reg_top/14.xbar_access_same_device_slow_rsp.2712702077 Mar 07 04:10:55 PM PST 24 Mar 07 04:22:59 PM PST 24 42616317348 ps
T1888 /workspace/coverage/cover_reg_top/65.xbar_smoke_large_delays.2982833734 Mar 07 04:19:48 PM PST 24 Mar 07 04:21:22 PM PST 24 8385324419 ps
T1889 /workspace/coverage/cover_reg_top/64.xbar_access_same_device.1098133 Mar 07 04:19:42 PM PST 24 Mar 07 04:20:28 PM PST 24 808753083 ps
T1890 /workspace/coverage/cover_reg_top/43.xbar_random.3990214282 Mar 07 04:16:49 PM PST 24 Mar 07 04:17:16 PM PST 24 595056242 ps
T1891 /workspace/coverage/cover_reg_top/61.xbar_stress_all_with_error.51761965 Mar 07 04:19:17 PM PST 24 Mar 07 04:22:29 PM PST 24 5844425463 ps
T1892 /workspace/coverage/cover_reg_top/16.xbar_smoke.607843987 Mar 07 04:11:19 PM PST 24 Mar 07 04:11:25 PM PST 24 40324949 ps
T1893 /workspace/coverage/cover_reg_top/64.xbar_unmapped_addr.3809428466 Mar 07 04:19:38 PM PST 24 Mar 07 04:20:08 PM PST 24 224117081 ps
T1894 /workspace/coverage/cover_reg_top/59.xbar_smoke.1468922780 Mar 07 04:18:55 PM PST 24 Mar 07 04:19:06 PM PST 24 240272970 ps
T1895 /workspace/coverage/cover_reg_top/3.xbar_stress_all_with_reset_error.2286721902 Mar 07 04:05:36 PM PST 24 Mar 07 04:07:12 PM PST 24 286538381 ps
T1896 /workspace/coverage/cover_reg_top/82.xbar_stress_all_with_rand_reset.1329964454 Mar 07 04:22:12 PM PST 24 Mar 07 04:26:51 PM PST 24 5543126433 ps
T1897 /workspace/coverage/cover_reg_top/86.xbar_smoke.1824668185 Mar 07 04:22:32 PM PST 24 Mar 07 04:22:43 PM PST 24 209759453 ps
T1898 /workspace/coverage/cover_reg_top/49.xbar_random_slow_rsp.267461175 Mar 07 04:17:39 PM PST 24 Mar 07 04:20:41 PM PST 24 9922656812 ps
T1899 /workspace/coverage/cover_reg_top/10.xbar_access_same_device.1816094225 Mar 07 04:09:00 PM PST 24 Mar 07 04:10:53 PM PST 24 2459145648 ps
T1900 /workspace/coverage/cover_reg_top/31.xbar_random.2664535593 Mar 07 04:14:46 PM PST 24 Mar 07 04:15:17 PM PST 24 297098114 ps
T1901 /workspace/coverage/cover_reg_top/41.xbar_random_zero_delays.819928690 Mar 07 04:16:27 PM PST 24 Mar 07 04:17:25 PM PST 24 545190562 ps
T1902 /workspace/coverage/cover_reg_top/13.xbar_random.3193103309 Mar 07 04:10:22 PM PST 24 Mar 07 04:11:06 PM PST 24 449588208 ps
T1903 /workspace/coverage/cover_reg_top/1.xbar_smoke_large_delays.4291447925 Mar 07 04:03:54 PM PST 24 Mar 07 04:05:30 PM PST 24 8020040082 ps
T1904 /workspace/coverage/cover_reg_top/26.xbar_stress_all_with_reset_error.3192890893 Mar 07 04:14:01 PM PST 24 Mar 07 04:17:58 PM PST 24 2314276206 ps
T1905 /workspace/coverage/cover_reg_top/28.xbar_stress_all_with_rand_reset.242988030 Mar 07 04:14:20 PM PST 24 Mar 07 04:16:52 PM PST 24 464771142 ps
T1906 /workspace/coverage/cover_reg_top/58.xbar_smoke_large_delays.1024512742 Mar 07 04:18:53 PM PST 24 Mar 07 04:20:26 PM PST 24 8099969193 ps
T1907 /workspace/coverage/cover_reg_top/95.xbar_error_random.408454282 Mar 07 04:23:50 PM PST 24 Mar 07 04:24:45 PM PST 24 1742570891 ps
T1908 /workspace/coverage/cover_reg_top/59.xbar_access_same_device.3857161083 Mar 07 04:19:05 PM PST 24 Mar 07 04:20:33 PM PST 24 1709091964 ps
T1909 /workspace/coverage/cover_reg_top/95.xbar_smoke_slow_rsp.2949808529 Mar 07 04:23:53 PM PST 24 Mar 07 04:25:08 PM PST 24 4271561828 ps
T1910 /workspace/coverage/cover_reg_top/21.xbar_random.3259055858 Mar 07 04:12:42 PM PST 24 Mar 07 04:13:19 PM PST 24 815612766 ps
T1911 /workspace/coverage/cover_reg_top/18.chip_csr_rw.1919191851 Mar 07 04:12:00 PM PST 24 Mar 07 04:18:26 PM PST 24 3951116388 ps
T1912 /workspace/coverage/cover_reg_top/81.xbar_unmapped_addr.4191060332 Mar 07 04:21:56 PM PST 24 Mar 07 04:22:12 PM PST 24 125863015 ps
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T1970 /workspace/coverage/cover_reg_top/28.xbar_stress_all_with_error.1123508827 Mar 07 04:14:21 PM PST 24 Mar 07 04:14:52 PM PST 24 296594376 ps
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T1976 /workspace/coverage/cover_reg_top/71.xbar_stress_all_with_reset_error.3059438236 Mar 07 04:20:43 PM PST 24 Mar 07 04:26:47 PM PST 24 2912898424 ps
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T1984 /workspace/coverage/cover_reg_top/39.xbar_error_random.751146296 Mar 07 04:16:19 PM PST 24 Mar 07 04:16:50 PM PST 24 341731010 ps
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T2014 /workspace/coverage/cover_reg_top/57.xbar_smoke_slow_rsp.3913910628 Mar 07 04:18:40 PM PST 24 Mar 07 04:20:30 PM PST 24 6482965699 ps
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T2016 /workspace/coverage/cover_reg_top/71.xbar_random_slow_rsp.1821871688 Mar 07 04:20:50 PM PST 24 Mar 07 04:36:48 PM PST 24 50633887322 ps
T2017 /workspace/coverage/cover_reg_top/88.xbar_error_and_unmapped_addr.644917790 Mar 07 04:23:01 PM PST 24 Mar 07 04:23:52 PM PST 24 1141195425 ps
T2018 /workspace/coverage/cover_reg_top/48.xbar_stress_all_with_reset_error.4123659465 Mar 07 04:17:38 PM PST 24 Mar 07 04:21:37 PM PST 24 703514032 ps
T2019 /workspace/coverage/cover_reg_top/80.xbar_random.2377513106 Mar 07 04:21:47 PM PST 24 Mar 07 04:22:34 PM PST 24 1251561343 ps
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T2021 /workspace/coverage/cover_reg_top/12.xbar_error_random.1453044177 Mar 07 04:09:58 PM PST 24 Mar 07 04:10:17 PM PST 24 344433685 ps
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T2024 /workspace/coverage/cover_reg_top/20.xbar_error_random.1656917365 Mar 07 04:12:29 PM PST 24 Mar 07 04:13:42 PM PST 24 1996577895 ps
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