Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.13 95.57 94.38 95.52 95.30 96.47 99.58


Total test records in report: 2874
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html | tests28.html | tests29.html | tests30.html | tests31.html | tests32.html | tests33.html | tests34.html | tests35.html | tests36.html | tests37.html | tests38.html | tests39.html | tests40.html | tests41.html | tests42.html | tests43.html | tests44.html | tests45.html | tests46.html | tests47.html | tests48.html | tests49.html | tests50.html | tests51.html | tests52.html | tests53.html | tests54.html | tests55.html | tests56.html | tests57.html | tests58.html | tests59.html | tests60.html

T572 /workspace/coverage/cover_reg_top/27.chip_tl_errors.216603974 May 30 03:50:50 PM PDT 24 May 30 03:55:31 PM PDT 24 3679228032 ps
T1572 /workspace/coverage/cover_reg_top/19.xbar_smoke_slow_rsp.2300559230 May 30 03:49:44 PM PDT 24 May 30 03:51:04 PM PDT 24 4609188482 ps
T1573 /workspace/coverage/cover_reg_top/54.xbar_random_zero_delays.2638891211 May 30 03:54:38 PM PDT 24 May 30 03:54:56 PM PDT 24 176358116 ps
T1574 /workspace/coverage/cover_reg_top/65.xbar_smoke_zero_delays.3145784228 May 30 03:56:16 PM PDT 24 May 30 03:56:24 PM PDT 24 43688676 ps
T1575 /workspace/coverage/cover_reg_top/2.xbar_stress_all_with_rand_reset.1027284996 May 30 03:48:37 PM PDT 24 May 30 03:49:51 PM PDT 24 254064780 ps
T1576 /workspace/coverage/cover_reg_top/59.xbar_error_random.212449271 May 30 03:55:25 PM PDT 24 May 30 03:55:32 PM PDT 24 30599136 ps
T1577 /workspace/coverage/cover_reg_top/96.xbar_smoke.4032012154 May 30 04:00:58 PM PDT 24 May 30 04:01:05 PM PDT 24 43026820 ps
T1578 /workspace/coverage/cover_reg_top/93.xbar_random.431936242 May 30 04:00:34 PM PDT 24 May 30 04:01:37 PM PDT 24 1866247644 ps
T821 /workspace/coverage/cover_reg_top/39.xbar_stress_all_with_reset_error.1816907168 May 30 03:52:56 PM PDT 24 May 30 03:58:53 PM PDT 24 8494266676 ps
T1579 /workspace/coverage/cover_reg_top/60.xbar_random_zero_delays.934376746 May 30 03:55:47 PM PDT 24 May 30 03:56:20 PM PDT 24 320634083 ps
T1580 /workspace/coverage/cover_reg_top/98.xbar_smoke_zero_delays.3408159926 May 30 04:01:16 PM PDT 24 May 30 04:01:23 PM PDT 24 51274078 ps
T1581 /workspace/coverage/cover_reg_top/91.xbar_stress_all_with_error.1681028956 May 30 04:00:39 PM PDT 24 May 30 04:02:24 PM PDT 24 1542393865 ps
T1582 /workspace/coverage/cover_reg_top/0.xbar_error_random.720411559 May 30 03:48:36 PM PDT 24 May 30 03:49:19 PM PDT 24 1334112398 ps
T1583 /workspace/coverage/cover_reg_top/93.xbar_random_zero_delays.2811412758 May 30 04:00:30 PM PDT 24 May 30 04:01:09 PM PDT 24 388810540 ps
T450 /workspace/coverage/cover_reg_top/12.chip_csr_rw.774856251 May 30 03:49:07 PM PDT 24 May 30 03:54:13 PM PDT 24 3828570028 ps
T1584 /workspace/coverage/cover_reg_top/90.xbar_random_large_delays.3323266847 May 30 04:00:06 PM PDT 24 May 30 04:10:14 PM PDT 24 57311133485 ps
T1585 /workspace/coverage/cover_reg_top/30.xbar_access_same_device.2081841166 May 30 03:51:23 PM PDT 24 May 30 03:51:38 PM PDT 24 168997884 ps
T1586 /workspace/coverage/cover_reg_top/97.xbar_access_same_device_slow_rsp.458168332 May 30 04:01:08 PM PDT 24 May 30 04:06:27 PM PDT 24 17851785981 ps
T1587 /workspace/coverage/cover_reg_top/33.xbar_stress_all.839960498 May 30 03:51:49 PM PDT 24 May 30 03:53:26 PM PDT 24 1055098497 ps
T1588 /workspace/coverage/cover_reg_top/17.chip_csr_rw.2630944381 May 30 03:49:38 PM PDT 24 May 30 03:54:45 PM PDT 24 4320461810 ps
T1589 /workspace/coverage/cover_reg_top/35.xbar_smoke_large_delays.19046038 May 30 03:52:02 PM PDT 24 May 30 03:53:39 PM PDT 24 9062933879 ps
T1590 /workspace/coverage/cover_reg_top/71.xbar_random_large_delays.2164633295 May 30 03:57:19 PM PDT 24 May 30 04:10:01 PM PDT 24 62553909392 ps
T1591 /workspace/coverage/cover_reg_top/84.xbar_random_large_delays.3719897044 May 30 03:59:17 PM PDT 24 May 30 04:14:30 PM PDT 24 75168406894 ps
T1592 /workspace/coverage/cover_reg_top/94.xbar_same_source.1407589231 May 30 04:00:51 PM PDT 24 May 30 04:01:07 PM PDT 24 407339049 ps
T508 /workspace/coverage/cover_reg_top/89.xbar_random_large_delays.3028903322 May 30 04:00:00 PM PDT 24 May 30 04:10:17 PM PDT 24 55435258702 ps
T1593 /workspace/coverage/cover_reg_top/88.xbar_random.2500794393 May 30 03:59:57 PM PDT 24 May 30 04:01:10 PM PDT 24 2153805333 ps
T1594 /workspace/coverage/cover_reg_top/85.xbar_smoke_large_delays.1450780126 May 30 03:59:22 PM PDT 24 May 30 04:00:56 PM PDT 24 8305533731 ps
T516 /workspace/coverage/cover_reg_top/2.chip_csr_rw.3139791687 May 30 03:48:48 PM PDT 24 May 30 03:57:23 PM PDT 24 5044063149 ps
T1595 /workspace/coverage/cover_reg_top/37.xbar_error_and_unmapped_addr.4114536849 May 30 03:52:17 PM PDT 24 May 30 03:52:31 PM PDT 24 279897923 ps
T1596 /workspace/coverage/cover_reg_top/76.xbar_stress_all_with_error.3670691293 May 30 03:58:14 PM PDT 24 May 30 04:01:13 PM PDT 24 4856873709 ps
T479 /workspace/coverage/cover_reg_top/41.xbar_stress_all_with_rand_reset.3463812333 May 30 03:52:58 PM PDT 24 May 30 04:03:37 PM PDT 24 5486258080 ps
T1597 /workspace/coverage/cover_reg_top/75.xbar_unmapped_addr.4139635537 May 30 03:58:01 PM PDT 24 May 30 03:58:37 PM PDT 24 799385018 ps
T1598 /workspace/coverage/cover_reg_top/4.xbar_random_slow_rsp.1679931973 May 30 03:48:45 PM PDT 24 May 30 04:04:05 PM PDT 24 52741413940 ps
T1599 /workspace/coverage/cover_reg_top/46.xbar_error_random.2489407207 May 30 03:53:36 PM PDT 24 May 30 03:54:01 PM PDT 24 725198461 ps
T483 /workspace/coverage/cover_reg_top/49.xbar_stress_all_with_rand_reset.2543250771 May 30 03:54:15 PM PDT 24 May 30 03:56:04 PM PDT 24 217863040 ps
T1600 /workspace/coverage/cover_reg_top/1.xbar_smoke_zero_delays.4102219844 May 30 03:48:31 PM PDT 24 May 30 03:48:37 PM PDT 24 39812510 ps
T822 /workspace/coverage/cover_reg_top/42.xbar_access_same_device_slow_rsp.731687769 May 30 03:52:55 PM PDT 24 May 30 04:02:49 PM PDT 24 36305639351 ps
T851 /workspace/coverage/cover_reg_top/67.xbar_stress_all_with_reset_error.1369031901 May 30 03:56:46 PM PDT 24 May 30 03:58:46 PM PDT 24 466441789 ps
T1601 /workspace/coverage/cover_reg_top/15.xbar_unmapped_addr.3345820590 May 30 03:49:19 PM PDT 24 May 30 03:49:36 PM PDT 24 252330489 ps
T1602 /workspace/coverage/cover_reg_top/28.xbar_random_slow_rsp.1696122880 May 30 03:51:02 PM PDT 24 May 30 03:54:16 PM PDT 24 10583679959 ps
T1603 /workspace/coverage/cover_reg_top/35.xbar_random_zero_delays.989893156 May 30 03:52:05 PM PDT 24 May 30 03:52:21 PM PDT 24 142752852 ps
T816 /workspace/coverage/cover_reg_top/80.xbar_access_same_device_slow_rsp.3317408180 May 30 03:58:43 PM PDT 24 May 30 04:19:45 PM PDT 24 67321783900 ps
T1604 /workspace/coverage/cover_reg_top/80.xbar_error_and_unmapped_addr.3055881694 May 30 03:58:43 PM PDT 24 May 30 03:59:29 PM PDT 24 1078474052 ps
T491 /workspace/coverage/cover_reg_top/22.xbar_stress_all.2596126194 May 30 03:50:20 PM PDT 24 May 30 03:56:00 PM PDT 24 4006791866 ps
T1605 /workspace/coverage/cover_reg_top/63.xbar_smoke_large_delays.1476912482 May 30 03:56:06 PM PDT 24 May 30 03:57:50 PM PDT 24 8914647433 ps
T847 /workspace/coverage/cover_reg_top/82.xbar_stress_all_with_reset_error.898673405 May 30 03:58:59 PM PDT 24 May 30 04:01:28 PM PDT 24 1033206162 ps
T1606 /workspace/coverage/cover_reg_top/29.xbar_error_random.1758449493 May 30 03:51:09 PM PDT 24 May 30 03:51:22 PM PDT 24 127268210 ps
T1607 /workspace/coverage/cover_reg_top/40.xbar_same_source.194737123 May 30 03:52:44 PM PDT 24 May 30 03:53:57 PM PDT 24 2530908722 ps
T1608 /workspace/coverage/cover_reg_top/88.xbar_random_slow_rsp.897201379 May 30 03:59:55 PM PDT 24 May 30 04:04:44 PM PDT 24 16285024433 ps
T1609 /workspace/coverage/cover_reg_top/21.xbar_random_slow_rsp.3509718554 May 30 03:50:20 PM PDT 24 May 30 03:57:33 PM PDT 24 24559278446 ps
T1610 /workspace/coverage/cover_reg_top/93.xbar_access_same_device.52663851 May 30 04:00:33 PM PDT 24 May 30 04:02:03 PM PDT 24 1366728582 ps
T1611 /workspace/coverage/cover_reg_top/79.xbar_access_same_device.918231170 May 30 03:58:26 PM PDT 24 May 30 03:59:09 PM PDT 24 968445369 ps
T1612 /workspace/coverage/cover_reg_top/9.xbar_error_random.161864331 May 30 03:49:19 PM PDT 24 May 30 03:50:02 PM PDT 24 606745475 ps
T1613 /workspace/coverage/cover_reg_top/49.xbar_random_zero_delays.3186331525 May 30 03:54:03 PM PDT 24 May 30 03:54:51 PM PDT 24 619960272 ps
T1614 /workspace/coverage/cover_reg_top/52.xbar_same_source.3604770914 May 30 03:54:25 PM PDT 24 May 30 03:54:52 PM PDT 24 774126089 ps
T826 /workspace/coverage/cover_reg_top/18.xbar_access_same_device_slow_rsp.3481875898 May 30 03:49:29 PM PDT 24 May 30 04:20:37 PM PDT 24 98689299021 ps
T1615 /workspace/coverage/cover_reg_top/71.xbar_access_same_device.2110186696 May 30 03:57:18 PM PDT 24 May 30 03:58:59 PM PDT 24 2559276680 ps
T1616 /workspace/coverage/cover_reg_top/52.xbar_random_large_delays.3932224877 May 30 03:54:26 PM PDT 24 May 30 03:57:25 PM PDT 24 16476937355 ps
T833 /workspace/coverage/cover_reg_top/15.xbar_stress_all_with_rand_reset.3676834342 May 30 03:49:18 PM PDT 24 May 30 03:52:44 PM PDT 24 520283952 ps
T1617 /workspace/coverage/cover_reg_top/62.xbar_random.3342238940 May 30 03:55:55 PM PDT 24 May 30 03:56:27 PM PDT 24 771863273 ps
T1618 /workspace/coverage/cover_reg_top/21.xbar_stress_all.1401268316 May 30 03:50:13 PM PDT 24 May 30 03:52:18 PM PDT 24 1626252037 ps
T1619 /workspace/coverage/cover_reg_top/33.xbar_same_source.4006696084 May 30 03:51:55 PM PDT 24 May 30 03:52:36 PM PDT 24 567810220 ps
T603 /workspace/coverage/cover_reg_top/14.chip_tl_errors.983099746 May 30 03:49:06 PM PDT 24 May 30 03:53:37 PM PDT 24 3854732344 ps
T1620 /workspace/coverage/cover_reg_top/23.xbar_access_same_device.585188661 May 30 03:50:25 PM PDT 24 May 30 03:51:29 PM PDT 24 817466698 ps
T500 /workspace/coverage/cover_reg_top/88.xbar_stress_all.441293258 May 30 03:59:54 PM PDT 24 May 30 04:12:06 PM PDT 24 18762963741 ps
T1621 /workspace/coverage/cover_reg_top/32.xbar_random_zero_delays.2200885913 May 30 03:51:29 PM PDT 24 May 30 03:51:41 PM PDT 24 90638152 ps
T1622 /workspace/coverage/cover_reg_top/99.xbar_smoke_zero_delays.1493761423 May 30 04:01:21 PM PDT 24 May 30 04:01:29 PM PDT 24 56091334 ps
T1623 /workspace/coverage/cover_reg_top/59.xbar_smoke_zero_delays.2145179743 May 30 03:55:29 PM PDT 24 May 30 03:55:37 PM PDT 24 42555907 ps
T1624 /workspace/coverage/cover_reg_top/3.xbar_same_source.2297282547 May 30 03:48:40 PM PDT 24 May 30 03:48:54 PM PDT 24 134129496 ps
T1625 /workspace/coverage/cover_reg_top/65.xbar_error_and_unmapped_addr.1172697972 May 30 03:56:23 PM PDT 24 May 30 03:56:47 PM PDT 24 521182553 ps
T1626 /workspace/coverage/cover_reg_top/81.xbar_access_same_device.2228201993 May 30 03:58:49 PM PDT 24 May 30 03:59:38 PM PDT 24 1351014974 ps
T1627 /workspace/coverage/cover_reg_top/11.xbar_access_same_device_slow_rsp.2014796783 May 30 03:49:12 PM PDT 24 May 30 03:59:34 PM PDT 24 35447215242 ps
T509 /workspace/coverage/cover_reg_top/89.xbar_stress_all_with_rand_reset.1675209017 May 30 04:00:03 PM PDT 24 May 30 04:14:12 PM PDT 24 6843987520 ps
T1628 /workspace/coverage/cover_reg_top/23.xbar_stress_all_with_reset_error.2046560756 May 30 03:50:31 PM PDT 24 May 30 03:57:12 PM PDT 24 3863755635 ps
T1629 /workspace/coverage/cover_reg_top/89.xbar_stress_all_with_error.3053723181 May 30 04:00:06 PM PDT 24 May 30 04:09:10 PM PDT 24 13131154202 ps
T1630 /workspace/coverage/cover_reg_top/2.xbar_random_large_delays.150954921 May 30 03:48:28 PM PDT 24 May 30 04:05:26 PM PDT 24 97516112685 ps
T1631 /workspace/coverage/cover_reg_top/1.xbar_same_source.2515824830 May 30 03:48:36 PM PDT 24 May 30 03:49:05 PM PDT 24 383371543 ps
T1632 /workspace/coverage/cover_reg_top/43.xbar_smoke_zero_delays.4282035826 May 30 03:53:07 PM PDT 24 May 30 03:53:14 PM PDT 24 44872422 ps
T604 /workspace/coverage/cover_reg_top/13.chip_tl_errors.790300054 May 30 03:49:21 PM PDT 24 May 30 03:55:19 PM PDT 24 4668888014 ps
T1633 /workspace/coverage/cover_reg_top/62.xbar_smoke_zero_delays.730419492 May 30 03:55:58 PM PDT 24 May 30 03:56:05 PM PDT 24 52322402 ps
T1634 /workspace/coverage/cover_reg_top/50.xbar_unmapped_addr.2349119455 May 30 03:54:13 PM PDT 24 May 30 03:54:47 PM PDT 24 666019294 ps
T1635 /workspace/coverage/cover_reg_top/18.xbar_random.118519698 May 30 03:49:25 PM PDT 24 May 30 03:50:47 PM PDT 24 2392884901 ps
T1636 /workspace/coverage/cover_reg_top/73.xbar_error_random.1672640827 May 30 03:57:40 PM PDT 24 May 30 03:58:43 PM PDT 24 1824459592 ps
T1637 /workspace/coverage/cover_reg_top/84.xbar_error_random.910958817 May 30 03:59:20 PM PDT 24 May 30 04:00:14 PM PDT 24 585350145 ps
T1638 /workspace/coverage/cover_reg_top/54.xbar_access_same_device_slow_rsp.315235884 May 30 03:54:49 PM PDT 24 May 30 04:29:13 PM PDT 24 104603192137 ps
T1639 /workspace/coverage/cover_reg_top/27.xbar_stress_all_with_reset_error.1249224467 May 30 03:50:59 PM PDT 24 May 30 03:53:22 PM PDT 24 493491032 ps
T1640 /workspace/coverage/cover_reg_top/46.xbar_access_same_device.1079209466 May 30 03:53:25 PM PDT 24 May 30 03:54:39 PM PDT 24 848260706 ps
T1641 /workspace/coverage/cover_reg_top/58.xbar_error_random.1970878176 May 30 03:55:16 PM PDT 24 May 30 03:56:14 PM PDT 24 1703542007 ps
T1642 /workspace/coverage/cover_reg_top/14.xbar_same_source.2542061297 May 30 03:49:17 PM PDT 24 May 30 03:50:38 PM PDT 24 2717452200 ps
T1643 /workspace/coverage/cover_reg_top/99.xbar_random.636724177 May 30 04:01:18 PM PDT 24 May 30 04:02:00 PM PDT 24 1140373811 ps
T678 /workspace/coverage/cover_reg_top/8.chip_tl_errors.40328093 May 30 03:48:49 PM PDT 24 May 30 03:51:16 PM PDT 24 2876461167 ps
T1644 /workspace/coverage/cover_reg_top/82.xbar_unmapped_addr.2436422379 May 30 03:59:08 PM PDT 24 May 30 03:59:21 PM PDT 24 83859459 ps
T1645 /workspace/coverage/cover_reg_top/98.xbar_smoke_large_delays.4098982806 May 30 04:01:23 PM PDT 24 May 30 04:02:58 PM PDT 24 9348899392 ps
T1646 /workspace/coverage/cover_reg_top/66.xbar_same_source.667987017 May 30 03:56:35 PM PDT 24 May 30 03:57:47 PM PDT 24 2340564031 ps
T1647 /workspace/coverage/cover_reg_top/67.xbar_random_large_delays.1199063562 May 30 03:56:36 PM PDT 24 May 30 04:01:20 PM PDT 24 25003275207 ps
T1648 /workspace/coverage/cover_reg_top/34.xbar_smoke_large_delays.1747815880 May 30 03:51:50 PM PDT 24 May 30 03:53:12 PM PDT 24 7060401880 ps
T1649 /workspace/coverage/cover_reg_top/86.xbar_error_random.4017473196 May 30 03:59:42 PM PDT 24 May 30 04:00:09 PM PDT 24 776604493 ps
T435 /workspace/coverage/cover_reg_top/0.chip_same_csr_outstanding.1504642145 May 30 03:48:21 PM PDT 24 May 30 04:18:11 PM PDT 24 15332096362 ps
T1650 /workspace/coverage/cover_reg_top/98.xbar_smoke_slow_rsp.3400875150 May 30 04:01:23 PM PDT 24 May 30 04:02:15 PM PDT 24 2880216548 ps
T1651 /workspace/coverage/cover_reg_top/13.xbar_stress_all_with_error.3064543871 May 30 03:49:10 PM PDT 24 May 30 03:52:14 PM PDT 24 5452769083 ps
T1652 /workspace/coverage/cover_reg_top/93.xbar_unmapped_addr.4099681254 May 30 04:00:39 PM PDT 24 May 30 04:00:56 PM PDT 24 335299330 ps
T1653 /workspace/coverage/cover_reg_top/42.xbar_stress_all_with_reset_error.894190872 May 30 03:52:59 PM PDT 24 May 30 03:53:46 PM PDT 24 189213938 ps
T1654 /workspace/coverage/cover_reg_top/33.xbar_random.3779020034 May 30 03:51:40 PM PDT 24 May 30 03:51:52 PM PDT 24 250968555 ps
T1655 /workspace/coverage/cover_reg_top/87.xbar_stress_all_with_rand_reset.2457237109 May 30 03:59:54 PM PDT 24 May 30 04:01:34 PM PDT 24 387322306 ps
T1656 /workspace/coverage/cover_reg_top/3.xbar_access_same_device.2655207061 May 30 03:48:48 PM PDT 24 May 30 03:49:10 PM PDT 24 289438204 ps
T1657 /workspace/coverage/cover_reg_top/54.xbar_error_random.2218529529 May 30 03:54:55 PM PDT 24 May 30 03:55:20 PM PDT 24 301744231 ps
T1658 /workspace/coverage/cover_reg_top/76.xbar_error_and_unmapped_addr.3830847718 May 30 03:58:07 PM PDT 24 May 30 03:58:29 PM PDT 24 585812350 ps
T1659 /workspace/coverage/cover_reg_top/96.xbar_smoke_zero_delays.3034470963 May 30 04:01:00 PM PDT 24 May 30 04:01:08 PM PDT 24 46035778 ps
T1660 /workspace/coverage/cover_reg_top/87.xbar_error_and_unmapped_addr.3225430070 May 30 03:59:54 PM PDT 24 May 30 04:00:10 PM PDT 24 327984433 ps
T1661 /workspace/coverage/cover_reg_top/29.xbar_random.453140797 May 30 03:51:09 PM PDT 24 May 30 03:52:26 PM PDT 24 2189240471 ps
T1662 /workspace/coverage/cover_reg_top/90.xbar_random.2008568755 May 30 04:00:09 PM PDT 24 May 30 04:00:37 PM PDT 24 677292818 ps
T1663 /workspace/coverage/cover_reg_top/91.xbar_access_same_device.2660064765 May 30 04:00:22 PM PDT 24 May 30 04:02:27 PM PDT 24 2726075231 ps
T1664 /workspace/coverage/cover_reg_top/75.xbar_access_same_device.753659178 May 30 03:58:03 PM PDT 24 May 30 03:59:30 PM PDT 24 2079575754 ps
T481 /workspace/coverage/cover_reg_top/13.xbar_random.612683944 May 30 03:49:11 PM PDT 24 May 30 03:49:45 PM PDT 24 349522223 ps
T1665 /workspace/coverage/cover_reg_top/34.xbar_access_same_device_slow_rsp.4205776218 May 30 03:51:50 PM PDT 24 May 30 04:19:51 PM PDT 24 96899288858 ps
T1666 /workspace/coverage/cover_reg_top/76.xbar_smoke.2812768198 May 30 03:58:04 PM PDT 24 May 30 03:58:13 PM PDT 24 178901123 ps
T1667 /workspace/coverage/cover_reg_top/8.xbar_error_and_unmapped_addr.3560248206 May 30 03:48:50 PM PDT 24 May 30 03:49:01 PM PDT 24 192894869 ps
T514 /workspace/coverage/cover_reg_top/68.xbar_stress_all.889277536 May 30 03:56:46 PM PDT 24 May 30 04:09:10 PM PDT 24 18489138543 ps
T1668 /workspace/coverage/cover_reg_top/40.xbar_access_same_device.1607644423 May 30 03:52:55 PM PDT 24 May 30 03:54:23 PM PDT 24 2451282869 ps
T1669 /workspace/coverage/cover_reg_top/66.xbar_stress_all.2907811340 May 30 03:56:39 PM PDT 24 May 30 04:06:41 PM PDT 24 15417158054 ps
T1670 /workspace/coverage/cover_reg_top/6.xbar_smoke_slow_rsp.2370480388 May 30 03:48:55 PM PDT 24 May 30 03:50:43 PM PDT 24 6995126644 ps
T1671 /workspace/coverage/cover_reg_top/81.xbar_random_slow_rsp.2095034476 May 30 03:58:50 PM PDT 24 May 30 04:09:24 PM PDT 24 34866686946 ps
T1672 /workspace/coverage/cover_reg_top/80.xbar_random_large_delays.510722116 May 30 03:58:39 PM PDT 24 May 30 04:16:35 PM PDT 24 104520733441 ps
T1673 /workspace/coverage/cover_reg_top/7.xbar_error_and_unmapped_addr.3117424748 May 30 03:48:58 PM PDT 24 May 30 03:49:24 PM PDT 24 208902294 ps
T126 /workspace/coverage/cover_reg_top/3.chip_csr_hw_reset.1247564612 May 30 03:48:53 PM PDT 24 May 30 03:52:09 PM PDT 24 5178246440 ps
T1674 /workspace/coverage/cover_reg_top/0.xbar_access_same_device.1933470915 May 30 03:48:24 PM PDT 24 May 30 03:49:10 PM PDT 24 725526630 ps
T1675 /workspace/coverage/cover_reg_top/64.xbar_random_slow_rsp.1258047355 May 30 03:56:13 PM PDT 24 May 30 04:02:55 PM PDT 24 23246019116 ps
T1676 /workspace/coverage/cover_reg_top/70.xbar_unmapped_addr.3966522959 May 30 03:57:06 PM PDT 24 May 30 03:57:20 PM PDT 24 227666372 ps
T1677 /workspace/coverage/cover_reg_top/42.xbar_smoke_slow_rsp.1296474076 May 30 03:52:56 PM PDT 24 May 30 03:53:45 PM PDT 24 2749665268 ps
T1678 /workspace/coverage/cover_reg_top/71.xbar_error_random.2332728304 May 30 03:57:15 PM PDT 24 May 30 03:57:47 PM PDT 24 337656586 ps
T1679 /workspace/coverage/cover_reg_top/14.xbar_access_same_device.3614609841 May 30 03:49:10 PM PDT 24 May 30 03:50:45 PM PDT 24 1282289448 ps
T1680 /workspace/coverage/cover_reg_top/32.xbar_random_large_delays.3373800128 May 30 03:51:33 PM PDT 24 May 30 03:52:37 PM PDT 24 5229446123 ps
T1681 /workspace/coverage/cover_reg_top/30.xbar_smoke.2019044927 May 30 03:51:22 PM PDT 24 May 30 03:51:29 PM PDT 24 40754614 ps
T1682 /workspace/coverage/cover_reg_top/42.xbar_smoke_large_delays.2580444904 May 30 03:52:58 PM PDT 24 May 30 03:54:28 PM PDT 24 8847834468 ps
T1683 /workspace/coverage/cover_reg_top/75.xbar_smoke_slow_rsp.3335707792 May 30 03:57:51 PM PDT 24 May 30 03:59:01 PM PDT 24 4156847366 ps
T1684 /workspace/coverage/cover_reg_top/62.xbar_stress_all.3898999566 May 30 03:55:57 PM PDT 24 May 30 04:05:30 PM PDT 24 14401041896 ps
T1685 /workspace/coverage/cover_reg_top/60.xbar_access_same_device.714725013 May 30 03:55:42 PM PDT 24 May 30 03:57:02 PM PDT 24 2078631162 ps
T1686 /workspace/coverage/cover_reg_top/7.xbar_error_random.2891753035 May 30 03:48:59 PM PDT 24 May 30 03:50:39 PM PDT 24 2762512409 ps
T1687 /workspace/coverage/cover_reg_top/47.xbar_stress_all.4129008936 May 30 03:53:46 PM PDT 24 May 30 03:54:31 PM PDT 24 452891120 ps
T1688 /workspace/coverage/cover_reg_top/7.xbar_stress_all.1363401633 May 30 03:48:52 PM PDT 24 May 30 03:50:58 PM PDT 24 1465122621 ps
T1689 /workspace/coverage/cover_reg_top/24.xbar_access_same_device_slow_rsp.2438253333 May 30 03:50:32 PM PDT 24 May 30 04:00:03 PM PDT 24 34420875744 ps
T1690 /workspace/coverage/cover_reg_top/5.xbar_smoke_large_delays.753474372 May 30 03:48:38 PM PDT 24 May 30 03:50:18 PM PDT 24 9808346587 ps
T1691 /workspace/coverage/cover_reg_top/84.xbar_access_same_device_slow_rsp.2858167592 May 30 03:59:22 PM PDT 24 May 30 04:02:20 PM PDT 24 10309609943 ps
T1692 /workspace/coverage/cover_reg_top/93.xbar_smoke_slow_rsp.216456950 May 30 04:00:29 PM PDT 24 May 30 04:01:53 PM PDT 24 4712258230 ps
T1693 /workspace/coverage/cover_reg_top/93.xbar_random_slow_rsp.3890468571 May 30 04:00:34 PM PDT 24 May 30 04:12:05 PM PDT 24 36187554637 ps
T1694 /workspace/coverage/cover_reg_top/76.xbar_random_large_delays.3596873565 May 30 03:58:04 PM PDT 24 May 30 04:12:42 PM PDT 24 80979974984 ps
T1695 /workspace/coverage/cover_reg_top/11.chip_csr_rw.4106634700 May 30 03:49:24 PM PDT 24 May 30 03:58:50 PM PDT 24 5888754692 ps
T1696 /workspace/coverage/cover_reg_top/29.xbar_stress_all_with_error.3079262142 May 30 03:51:20 PM PDT 24 May 30 04:01:25 PM PDT 24 15158806680 ps
T1697 /workspace/coverage/cover_reg_top/99.xbar_random_zero_delays.2008375864 May 30 04:01:25 PM PDT 24 May 30 04:02:10 PM PDT 24 478609631 ps
T1698 /workspace/coverage/cover_reg_top/91.xbar_stress_all_with_reset_error.1827157361 May 30 04:00:30 PM PDT 24 May 30 04:04:32 PM PDT 24 2246179711 ps
T1699 /workspace/coverage/cover_reg_top/84.xbar_unmapped_addr.1130137428 May 30 03:59:19 PM PDT 24 May 30 03:59:36 PM PDT 24 265513893 ps
T1700 /workspace/coverage/cover_reg_top/58.xbar_random_slow_rsp.3446971086 May 30 03:55:17 PM PDT 24 May 30 04:17:55 PM PDT 24 68191837793 ps
T839 /workspace/coverage/cover_reg_top/26.xbar_stress_all_with_reset_error.2974614967 May 30 03:50:51 PM PDT 24 May 30 03:57:42 PM PDT 24 9104092172 ps
T1701 /workspace/coverage/cover_reg_top/33.xbar_smoke.4250532047 May 30 03:51:54 PM PDT 24 May 30 03:52:02 PM PDT 24 59615921 ps
T1702 /workspace/coverage/cover_reg_top/88.xbar_access_same_device_slow_rsp.3573009952 May 30 03:59:54 PM PDT 24 May 30 04:20:17 PM PDT 24 63759969493 ps
T1703 /workspace/coverage/cover_reg_top/11.xbar_random_slow_rsp.2104647700 May 30 03:49:01 PM PDT 24 May 30 04:02:16 PM PDT 24 45083895722 ps
T1704 /workspace/coverage/cover_reg_top/67.xbar_smoke_large_delays.2301806516 May 30 03:56:34 PM PDT 24 May 30 03:57:58 PM PDT 24 8075333715 ps
T1705 /workspace/coverage/cover_reg_top/0.xbar_stress_all_with_error.1293315630 May 30 03:48:25 PM PDT 24 May 30 03:49:42 PM PDT 24 1059389171 ps
T1706 /workspace/coverage/cover_reg_top/29.xbar_stress_all_with_reset_error.4152695504 May 30 03:51:19 PM PDT 24 May 30 03:55:51 PM PDT 24 3293373694 ps
T1707 /workspace/coverage/cover_reg_top/56.xbar_random.2597696399 May 30 03:54:58 PM PDT 24 May 30 03:55:15 PM PDT 24 356800714 ps
T1708 /workspace/coverage/cover_reg_top/26.xbar_access_same_device.3854050976 May 30 03:50:40 PM PDT 24 May 30 03:52:35 PM PDT 24 2700486966 ps
T1709 /workspace/coverage/cover_reg_top/65.xbar_access_same_device.3865353723 May 30 03:56:30 PM PDT 24 May 30 03:56:53 PM PDT 24 227552580 ps
T1710 /workspace/coverage/cover_reg_top/87.xbar_random_zero_delays.3212285650 May 30 03:59:48 PM PDT 24 May 30 04:00:14 PM PDT 24 262827867 ps
T1711 /workspace/coverage/cover_reg_top/65.xbar_random_large_delays.2259624566 May 30 03:56:27 PM PDT 24 May 30 04:00:50 PM PDT 24 24648046686 ps
T1712 /workspace/coverage/cover_reg_top/87.xbar_smoke_zero_delays.2014942344 May 30 03:59:46 PM PDT 24 May 30 03:59:54 PM PDT 24 41643654 ps
T1713 /workspace/coverage/cover_reg_top/92.xbar_stress_all_with_error.3716676573 May 30 04:00:38 PM PDT 24 May 30 04:03:54 PM PDT 24 2062946728 ps
T1714 /workspace/coverage/cover_reg_top/89.xbar_smoke_large_delays.1814996022 May 30 03:59:54 PM PDT 24 May 30 04:01:29 PM PDT 24 8580110878 ps
T1715 /workspace/coverage/cover_reg_top/10.xbar_stress_all_with_error.2034428566 May 30 03:49:01 PM PDT 24 May 30 03:51:30 PM PDT 24 2369688804 ps
T1716 /workspace/coverage/cover_reg_top/89.xbar_unmapped_addr.3714284316 May 30 04:00:05 PM PDT 24 May 30 04:00:15 PM PDT 24 68230871 ps
T1717 /workspace/coverage/cover_reg_top/59.xbar_unmapped_addr.3008554898 May 30 03:55:26 PM PDT 24 May 30 03:55:58 PM PDT 24 268942527 ps
T387 /workspace/coverage/cover_reg_top/3.chip_csr_aliasing.2285349814 May 30 03:48:39 PM PDT 24 May 30 06:33:24 PM PDT 24 62980754428 ps
T1718 /workspace/coverage/cover_reg_top/94.xbar_random_zero_delays.2271363176 May 30 04:00:40 PM PDT 24 May 30 04:00:59 PM PDT 24 180064968 ps
T1719 /workspace/coverage/cover_reg_top/5.xbar_random_zero_delays.412792132 May 30 03:48:41 PM PDT 24 May 30 03:49:32 PM PDT 24 595195733 ps
T1720 /workspace/coverage/cover_reg_top/97.xbar_stress_all_with_error.1848420149 May 30 04:01:16 PM PDT 24 May 30 04:06:42 PM PDT 24 9174161691 ps
T1721 /workspace/coverage/cover_reg_top/82.xbar_same_source.906807738 May 30 03:58:59 PM PDT 24 May 30 03:59:21 PM PDT 24 268630241 ps
T1722 /workspace/coverage/cover_reg_top/50.xbar_random_slow_rsp.4012914068 May 30 03:54:12 PM PDT 24 May 30 04:12:32 PM PDT 24 54717992055 ps
T614 /workspace/coverage/cover_reg_top/83.xbar_stress_all_with_error.328843663 May 30 03:59:10 PM PDT 24 May 30 04:12:25 PM PDT 24 19252937132 ps
T1723 /workspace/coverage/cover_reg_top/70.xbar_random_slow_rsp.4281901890 May 30 03:57:08 PM PDT 24 May 30 04:12:39 PM PDT 24 49519903470 ps
T1724 /workspace/coverage/cover_reg_top/46.xbar_random_zero_delays.660580276 May 30 03:53:33 PM PDT 24 May 30 03:54:22 PM PDT 24 655978283 ps
T1725 /workspace/coverage/cover_reg_top/70.xbar_stress_all_with_error.4287677637 May 30 03:57:16 PM PDT 24 May 30 03:57:42 PM PDT 24 355267010 ps
T1726 /workspace/coverage/cover_reg_top/83.xbar_stress_all_with_reset_error.2419694978 May 30 03:59:09 PM PDT 24 May 30 04:01:08 PM PDT 24 386322013 ps
T1727 /workspace/coverage/cover_reg_top/73.xbar_stress_all_with_error.317994226 May 30 03:57:43 PM PDT 24 May 30 04:01:40 PM PDT 24 7682873933 ps
T1728 /workspace/coverage/cover_reg_top/12.xbar_stress_all_with_error.2336183516 May 30 03:49:26 PM PDT 24 May 30 03:53:05 PM PDT 24 6403882654 ps
T1729 /workspace/coverage/cover_reg_top/90.xbar_stress_all.685535226 May 30 04:00:21 PM PDT 24 May 30 04:03:12 PM PDT 24 1915466801 ps
T1730 /workspace/coverage/cover_reg_top/19.xbar_smoke.3678246208 May 30 03:49:27 PM PDT 24 May 30 03:49:34 PM PDT 24 42671110 ps
T1731 /workspace/coverage/cover_reg_top/93.xbar_smoke.3835116955 May 30 04:00:34 PM PDT 24 May 30 04:00:41 PM PDT 24 44981786 ps
T1732 /workspace/coverage/cover_reg_top/41.xbar_smoke_zero_delays.3766029314 May 30 03:52:45 PM PDT 24 May 30 03:52:51 PM PDT 24 38262481 ps
T1733 /workspace/coverage/cover_reg_top/39.xbar_stress_all.123267322 May 30 03:52:38 PM PDT 24 May 30 03:54:12 PM PDT 24 2023528284 ps
T1734 /workspace/coverage/cover_reg_top/12.xbar_access_same_device_slow_rsp.87596179 May 30 03:49:09 PM PDT 24 May 30 04:22:02 PM PDT 24 107231311842 ps
T1735 /workspace/coverage/cover_reg_top/35.xbar_access_same_device_slow_rsp.2556919042 May 30 03:52:03 PM PDT 24 May 30 03:52:59 PM PDT 24 2969856633 ps
T1736 /workspace/coverage/cover_reg_top/77.xbar_unmapped_addr.640069635 May 30 03:58:18 PM PDT 24 May 30 03:58:34 PM PDT 24 120848170 ps
T1737 /workspace/coverage/cover_reg_top/8.xbar_same_source.2499965828 May 30 03:49:01 PM PDT 24 May 30 03:49:23 PM PDT 24 275966992 ps
T1738 /workspace/coverage/cover_reg_top/12.xbar_error_random.4017563956 May 30 03:49:09 PM PDT 24 May 30 03:49:27 PM PDT 24 394408030 ps
T1739 /workspace/coverage/cover_reg_top/37.xbar_random_zero_delays.2235328758 May 30 03:52:22 PM PDT 24 May 30 03:53:00 PM PDT 24 402068871 ps
T1740 /workspace/coverage/cover_reg_top/18.xbar_stress_all_with_reset_error.1458959479 May 30 03:49:33 PM PDT 24 May 30 03:52:46 PM PDT 24 578197228 ps
T1741 /workspace/coverage/cover_reg_top/50.xbar_random_large_delays.3526749155 May 30 03:54:13 PM PDT 24 May 30 04:02:30 PM PDT 24 43874500376 ps
T1742 /workspace/coverage/cover_reg_top/6.xbar_stress_all_with_rand_reset.148622139 May 30 03:48:53 PM PDT 24 May 30 03:52:36 PM PDT 24 1972699569 ps
T668 /workspace/coverage/cover_reg_top/46.xbar_stress_all_with_error.1321412931 May 30 03:53:37 PM PDT 24 May 30 03:57:22 PM PDT 24 2849594627 ps
T498 /workspace/coverage/cover_reg_top/77.xbar_stress_all.1036539573 May 30 03:58:28 PM PDT 24 May 30 04:04:35 PM PDT 24 9844783993 ps
T1743 /workspace/coverage/cover_reg_top/25.xbar_stress_all_with_error.2509198030 May 30 03:50:42 PM PDT 24 May 30 03:58:00 PM PDT 24 11732037638 ps
T1744 /workspace/coverage/cover_reg_top/93.xbar_stress_all_with_error.507736743 May 30 04:00:44 PM PDT 24 May 30 04:08:02 PM PDT 24 11890018907 ps
T1745 /workspace/coverage/cover_reg_top/84.xbar_access_same_device.1656182904 May 30 03:59:21 PM PDT 24 May 30 04:02:03 PM PDT 24 3713888629 ps
T1746 /workspace/coverage/cover_reg_top/82.xbar_error_random.2474776234 May 30 03:59:08 PM PDT 24 May 30 03:59:46 PM PDT 24 462873713 ps
T1747 /workspace/coverage/cover_reg_top/41.xbar_random_slow_rsp.4084946088 May 30 03:52:45 PM PDT 24 May 30 04:02:55 PM PDT 24 33428653334 ps
T1748 /workspace/coverage/cover_reg_top/69.xbar_random_slow_rsp.751954663 May 30 03:56:57 PM PDT 24 May 30 04:14:59 PM PDT 24 61202659883 ps
T1749 /workspace/coverage/cover_reg_top/53.xbar_access_same_device_slow_rsp.2248513575 May 30 03:54:56 PM PDT 24 May 30 04:03:36 PM PDT 24 31228612386 ps
T1750 /workspace/coverage/cover_reg_top/43.xbar_random_zero_delays.485076134 May 30 03:53:10 PM PDT 24 May 30 03:53:51 PM PDT 24 510029702 ps
T1751 /workspace/coverage/cover_reg_top/77.xbar_stress_all_with_rand_reset.3636390825 May 30 03:58:26 PM PDT 24 May 30 04:04:05 PM PDT 24 960160267 ps
T677 /workspace/coverage/cover_reg_top/10.chip_tl_errors.2776376950 May 30 03:48:59 PM PDT 24 May 30 03:54:04 PM PDT 24 4043483693 ps
T1752 /workspace/coverage/cover_reg_top/60.xbar_stress_all_with_error.2002889439 May 30 03:55:36 PM PDT 24 May 30 04:03:34 PM PDT 24 12401475117 ps
T1753 /workspace/coverage/cover_reg_top/42.xbar_error_random.826374208 May 30 03:53:07 PM PDT 24 May 30 03:53:18 PM PDT 24 210165876 ps
T1754 /workspace/coverage/cover_reg_top/23.xbar_random_zero_delays.4019716139 May 30 03:50:24 PM PDT 24 May 30 03:50:43 PM PDT 24 141181227 ps
T1755 /workspace/coverage/cover_reg_top/60.xbar_random_large_delays.3008851053 May 30 03:55:46 PM PDT 24 May 30 04:11:36 PM PDT 24 79802588926 ps
T1756 /workspace/coverage/cover_reg_top/99.xbar_unmapped_addr.47048401 May 30 04:01:27 PM PDT 24 May 30 04:01:40 PM PDT 24 227301586 ps
T1757 /workspace/coverage/cover_reg_top/91.xbar_error_and_unmapped_addr.824514215 May 30 04:00:21 PM PDT 24 May 30 04:00:49 PM PDT 24 228373060 ps
T1758 /workspace/coverage/cover_reg_top/55.xbar_smoke.1051860821 May 30 03:54:57 PM PDT 24 May 30 03:55:08 PM PDT 24 247719204 ps
T817 /workspace/coverage/cover_reg_top/19.xbar_stress_all_with_reset_error.3102407640 May 30 03:49:53 PM PDT 24 May 30 04:02:17 PM PDT 24 15685614911 ps
T1759 /workspace/coverage/cover_reg_top/76.xbar_same_source.3145380043 May 30 03:58:04 PM PDT 24 May 30 03:58:35 PM PDT 24 1089229549 ps
T1760 /workspace/coverage/cover_reg_top/25.xbar_stress_all_with_rand_reset.779187338 May 30 03:50:43 PM PDT 24 May 30 03:55:22 PM PDT 24 2072924598 ps
T1761 /workspace/coverage/cover_reg_top/82.xbar_smoke_zero_delays.1207513307 May 30 03:58:51 PM PDT 24 May 30 03:58:59 PM PDT 24 50132643 ps
T1762 /workspace/coverage/cover_reg_top/84.xbar_same_source.4026675003 May 30 03:59:24 PM PDT 24 May 30 04:00:13 PM PDT 24 1638768077 ps
T1763 /workspace/coverage/cover_reg_top/35.xbar_unmapped_addr.2472156098 May 30 03:52:01 PM PDT 24 May 30 03:52:17 PM PDT 24 109171070 ps
T1764 /workspace/coverage/cover_reg_top/9.xbar_smoke_zero_delays.3070715049 May 30 03:49:01 PM PDT 24 May 30 03:49:10 PM PDT 24 52827693 ps
T501 /workspace/coverage/cover_reg_top/70.xbar_same_source.1522610468 May 30 03:57:06 PM PDT 24 May 30 03:58:24 PM PDT 24 2554088803 ps
T1765 /workspace/coverage/cover_reg_top/47.xbar_random_zero_delays.1155768099 May 30 03:53:37 PM PDT 24 May 30 03:53:50 PM PDT 24 91983103 ps
T840 /workspace/coverage/cover_reg_top/70.xbar_stress_all_with_reset_error.4228558366 May 30 03:57:19 PM PDT 24 May 30 04:01:55 PM PDT 24 1792925161 ps
T1766 /workspace/coverage/cover_reg_top/26.xbar_random_large_delays.4012068229 May 30 03:50:50 PM PDT 24 May 30 03:52:52 PM PDT 24 11976379367 ps
T1767 /workspace/coverage/cover_reg_top/91.xbar_stress_all.1161371626 May 30 04:00:20 PM PDT 24 May 30 04:04:41 PM PDT 24 6349189384 ps
T1768 /workspace/coverage/cover_reg_top/38.xbar_random_zero_delays.2281751699 May 30 03:52:28 PM PDT 24 May 30 03:53:12 PM PDT 24 489739710 ps
T1769 /workspace/coverage/cover_reg_top/47.xbar_smoke_slow_rsp.1363563870 May 30 03:53:38 PM PDT 24 May 30 03:55:16 PM PDT 24 6148860969 ps
T1770 /workspace/coverage/cover_reg_top/16.xbar_stress_all_with_reset_error.1995072599 May 30 03:49:19 PM PDT 24 May 30 03:51:42 PM PDT 24 461258695 ps
T1771 /workspace/coverage/cover_reg_top/54.xbar_smoke_large_delays.794878951 May 30 03:54:43 PM PDT 24 May 30 03:55:55 PM PDT 24 6507339643 ps
T1772 /workspace/coverage/cover_reg_top/80.xbar_smoke_slow_rsp.713574546 May 30 03:58:39 PM PDT 24 May 30 03:59:21 PM PDT 24 2680835502 ps
T1773 /workspace/coverage/cover_reg_top/24.xbar_stress_all.4071448420 May 30 03:50:34 PM PDT 24 May 30 03:55:34 PM PDT 24 7885030381 ps
T1774 /workspace/coverage/cover_reg_top/54.xbar_stress_all_with_reset_error.1636773766 May 30 03:54:46 PM PDT 24 May 30 03:56:29 PM PDT 24 262374091 ps
T1775 /workspace/coverage/cover_reg_top/18.xbar_same_source.3024137302 May 30 03:49:37 PM PDT 24 May 30 03:49:53 PM PDT 24 178459373 ps
T1776 /workspace/coverage/cover_reg_top/70.xbar_smoke_large_delays.2857763225 May 30 03:57:08 PM PDT 24 May 30 03:58:37 PM PDT 24 8505408914 ps
T1777 /workspace/coverage/cover_reg_top/74.xbar_smoke_slow_rsp.3826202429 May 30 03:57:37 PM PDT 24 May 30 03:59:16 PM PDT 24 5385022349 ps
T1778 /workspace/coverage/cover_reg_top/69.xbar_stress_all_with_error.2836638674 May 30 03:56:57 PM PDT 24 May 30 03:58:59 PM PDT 24 1682140252 ps
T1779 /workspace/coverage/cover_reg_top/6.chip_same_csr_outstanding.1157393223 May 30 03:49:01 PM PDT 24 May 30 04:20:32 PM PDT 24 15160857018 ps
T1780 /workspace/coverage/cover_reg_top/77.xbar_stress_all_with_error.1053791361 May 30 03:58:28 PM PDT 24 May 30 04:06:14 PM PDT 24 12142153381 ps
T1781 /workspace/coverage/cover_reg_top/16.xbar_random_large_delays.3215656601 May 30 03:49:18 PM PDT 24 May 30 03:59:55 PM PDT 24 56400586438 ps
T679 /workspace/coverage/cover_reg_top/25.chip_tl_errors.471480104 May 30 03:50:41 PM PDT 24 May 30 03:55:10 PM PDT 24 3463579128 ps
T1782 /workspace/coverage/cover_reg_top/31.xbar_random_slow_rsp.2893005729 May 30 03:51:30 PM PDT 24 May 30 03:55:39 PM PDT 24 12868946735 ps
T1783 /workspace/coverage/cover_reg_top/25.xbar_access_same_device_slow_rsp.660987760 May 30 03:50:50 PM PDT 24 May 30 04:10:25 PM PDT 24 75035397102 ps
T1784 /workspace/coverage/cover_reg_top/52.xbar_smoke.315975838 May 30 03:54:30 PM PDT 24 May 30 03:54:38 PM PDT 24 54854966 ps
T1785 /workspace/coverage/cover_reg_top/82.xbar_stress_all_with_rand_reset.1609956961 May 30 03:59:09 PM PDT 24 May 30 04:07:46 PM PDT 24 6257121061 ps
T1786 /workspace/coverage/cover_reg_top/32.xbar_unmapped_addr.4206744984 May 30 03:51:41 PM PDT 24 May 30 03:52:31 PM PDT 24 1095971322 ps
T1787 /workspace/coverage/cover_reg_top/11.xbar_stress_all_with_reset_error.1414574113 May 30 03:48:58 PM PDT 24 May 30 03:50:10 PM PDT 24 355347566 ps
T1788 /workspace/coverage/cover_reg_top/79.xbar_stress_all_with_error.3539288356 May 30 03:58:29 PM PDT 24 May 30 04:04:21 PM PDT 24 10270204681 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%