Tests
dashboard | hierarchy | modlist | groups | tests | asserts
Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.04 95.47 93.78 95.32 94.52 97.53 99.61


Total test records in report: 2936
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html | tests27.html | tests28.html | tests29.html | tests30.html | tests31.html | tests32.html | tests33.html | tests34.html | tests35.html | tests36.html | tests37.html | tests38.html | tests39.html | tests40.html | tests41.html | tests42.html | tests43.html | tests44.html | tests45.html | tests46.html | tests47.html | tests48.html | tests49.html | tests50.html | tests51.html | tests52.html | tests53.html | tests54.html | tests55.html | tests56.html | tests57.html | tests58.html | tests59.html | tests60.html | tests61.html | tests62.html
T736 /workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.3363508706 Jul 31 08:42:36 PM PDT 24 Jul 31 08:48:33 PM PDT 24 3160096796 ps
T1375 /workspace/coverage/default/0.chip_sw_hmac_multistream.3220292062 Jul 31 08:17:15 PM PDT 24 Jul 31 08:49:41 PM PDT 24 8384737080 ps
T1376 /workspace/coverage/default/1.chip_sw_otbn_mem_scramble.2205629940 Jul 31 08:21:30 PM PDT 24 Jul 31 08:30:12 PM PDT 24 3449523372 ps
T337 /workspace/coverage/default/0.chip_sw_entropy_src_csrng.3616360312 Jul 31 08:14:01 PM PDT 24 Jul 31 08:36:42 PM PDT 24 6180894248 ps
T155 /workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.1565497003 Jul 31 08:22:32 PM PDT 24 Jul 31 08:33:44 PM PDT 24 6497732068 ps
T1377 /workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.4011157118 Jul 31 08:23:40 PM PDT 24 Jul 31 08:34:41 PM PDT 24 8943545668 ps
T1378 /workspace/coverage/default/2.chip_sw_kmac_entropy.1157201478 Jul 31 08:29:39 PM PDT 24 Jul 31 08:33:39 PM PDT 24 2628971500 ps
T1379 /workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.571096304 Jul 31 08:29:13 PM PDT 24 Jul 31 08:32:01 PM PDT 24 3535213302 ps
T815 /workspace/coverage/default/16.chip_sw_all_escalation_resets.512638349 Jul 31 08:42:29 PM PDT 24 Jul 31 08:53:48 PM PDT 24 4840652852 ps
T1380 /workspace/coverage/default/0.chip_sw_clkmgr_jitter.3748874509 Jul 31 08:16:04 PM PDT 24 Jul 31 08:20:58 PM PDT 24 3512022383 ps
T183 /workspace/coverage/default/1.chip_sw_lc_ctrl_program_error.2406208248 Jul 31 08:25:37 PM PDT 24 Jul 31 08:37:01 PM PDT 24 4367455704 ps
T1381 /workspace/coverage/default/0.chip_sw_otbn_randomness.10463514 Jul 31 08:16:19 PM PDT 24 Jul 31 08:32:20 PM PDT 24 6369856092 ps
T306 /workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.778902730 Jul 31 08:15:24 PM PDT 24 Jul 31 08:31:23 PM PDT 24 7683096959 ps
T1382 /workspace/coverage/default/2.chip_sw_edn_kat.1858635855 Jul 31 08:31:49 PM PDT 24 Jul 31 08:41:35 PM PDT 24 3888887256 ps
T722 /workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.2978843404 Jul 31 08:21:42 PM PDT 24 Jul 31 08:35:38 PM PDT 24 4608114560 ps
T1383 /workspace/coverage/default/3.chip_sw_uart_rand_baudrate.2980937016 Jul 31 08:37:54 PM PDT 24 Jul 31 09:15:16 PM PDT 24 13686674016 ps
T1384 /workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.2764030514 Jul 31 08:30:19 PM PDT 24 Jul 31 08:43:03 PM PDT 24 7177244080 ps
T1385 /workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_por_reset.4163267636 Jul 31 08:19:11 PM PDT 24 Jul 31 08:33:31 PM PDT 24 7626011408 ps
T79 /workspace/coverage/cover_reg_top/10.xbar_access_same_device_slow_rsp.2385495479 Jul 31 07:48:16 PM PDT 24 Jul 31 08:26:48 PM PDT 24 128152201254 ps
T80 /workspace/coverage/cover_reg_top/23.xbar_access_same_device_slow_rsp.1590580214 Jul 31 07:51:54 PM PDT 24 Jul 31 08:07:46 PM PDT 24 55882479995 ps
T81 /workspace/coverage/cover_reg_top/78.xbar_random_large_delays.2905961147 Jul 31 08:01:47 PM PDT 24 Jul 31 08:10:19 PM PDT 24 46997351166 ps
T86 /workspace/coverage/cover_reg_top/29.xbar_smoke_slow_rsp.503302864 Jul 31 07:53:12 PM PDT 24 Jul 31 07:54:29 PM PDT 24 4635271527 ps
T84 /workspace/coverage/cover_reg_top/32.xbar_stress_all.208928642 Jul 31 07:53:56 PM PDT 24 Jul 31 08:06:21 PM PDT 24 19467675820 ps
T85 /workspace/coverage/cover_reg_top/57.xbar_unmapped_addr.561579572 Jul 31 07:58:25 PM PDT 24 Jul 31 07:59:14 PM PDT 24 1389713400 ps
T255 /workspace/coverage/cover_reg_top/68.xbar_unmapped_addr.2114305281 Jul 31 08:00:10 PM PDT 24 Jul 31 08:00:44 PM PDT 24 741683561 ps
T521 /workspace/coverage/cover_reg_top/77.xbar_random.2895509215 Jul 31 08:01:39 PM PDT 24 Jul 31 08:02:13 PM PDT 24 1005188010 ps
T435 /workspace/coverage/cover_reg_top/56.xbar_random_zero_delays.3292182233 Jul 31 07:58:12 PM PDT 24 Jul 31 07:59:06 PM PDT 24 629820882 ps
T444 /workspace/coverage/cover_reg_top/68.xbar_stress_all_with_reset_error.3506377798 Jul 31 08:00:16 PM PDT 24 Jul 31 08:07:57 PM PDT 24 8836816566 ps
T522 /workspace/coverage/cover_reg_top/66.xbar_stress_all_with_rand_reset.65719264 Jul 31 07:59:56 PM PDT 24 Jul 31 08:01:57 PM PDT 24 512045301 ps
T450 /workspace/coverage/cover_reg_top/54.xbar_unmapped_addr.2735224133 Jul 31 07:57:50 PM PDT 24 Jul 31 07:58:23 PM PDT 24 778502612 ps
T478 /workspace/coverage/cover_reg_top/91.xbar_same_source.3503925075 Jul 31 08:03:39 PM PDT 24 Jul 31 08:03:53 PM PDT 24 406307529 ps
T434 /workspace/coverage/cover_reg_top/36.xbar_same_source.1744299384 Jul 31 07:54:41 PM PDT 24 Jul 31 07:56:01 PM PDT 24 2710263274 ps
T423 /workspace/coverage/cover_reg_top/18.xbar_unmapped_addr.3852858892 Jul 31 07:50:37 PM PDT 24 Jul 31 07:50:46 PM PDT 24 62874128 ps
T445 /workspace/coverage/cover_reg_top/42.xbar_error_and_unmapped_addr.3156736712 Jul 31 07:55:46 PM PDT 24 Jul 31 07:56:01 PM PDT 24 126355947 ps
T645 /workspace/coverage/cover_reg_top/45.xbar_smoke_slow_rsp.332174661 Jul 31 07:56:18 PM PDT 24 Jul 31 07:57:18 PM PDT 24 3482727718 ps
T534 /workspace/coverage/cover_reg_top/55.xbar_smoke_slow_rsp.2439281777 Jul 31 07:57:56 PM PDT 24 Jul 31 07:59:19 PM PDT 24 4572558876 ps
T380 /workspace/coverage/cover_reg_top/9.chip_csr_mem_rw_with_rand_reset.817833677 Jul 31 07:48:02 PM PDT 24 Jul 31 08:01:55 PM PDT 24 11323859228 ps
T379 /workspace/coverage/cover_reg_top/12.chip_csr_rw.920061564 Jul 31 07:48:59 PM PDT 24 Jul 31 07:57:57 PM PDT 24 5072862051 ps
T525 /workspace/coverage/cover_reg_top/75.xbar_random.101981394 Jul 31 08:01:11 PM PDT 24 Jul 31 08:01:36 PM PDT 24 609211750 ps
T1386 /workspace/coverage/cover_reg_top/76.xbar_smoke.415929042 Jul 31 08:01:20 PM PDT 24 Jul 31 08:01:26 PM PDT 24 53399561 ps
T446 /workspace/coverage/cover_reg_top/13.xbar_stress_all_with_reset_error.3866067167 Jul 31 07:49:10 PM PDT 24 Jul 31 07:49:47 PM PDT 24 104069195 ps
T412 /workspace/coverage/cover_reg_top/20.xbar_random_zero_delays.3489809507 Jul 31 07:51:06 PM PDT 24 Jul 31 07:51:46 PM PDT 24 457056166 ps
T413 /workspace/coverage/cover_reg_top/28.xbar_stress_all_with_rand_reset.4064149222 Jul 31 07:53:18 PM PDT 24 Jul 31 07:56:29 PM PDT 24 1162813868 ps
T1387 /workspace/coverage/cover_reg_top/10.xbar_random.2065543602 Jul 31 07:48:10 PM PDT 24 Jul 31 07:48:17 PM PDT 24 111377687 ps
T523 /workspace/coverage/cover_reg_top/21.xbar_error_and_unmapped_addr.1321836307 Jul 31 07:51:31 PM PDT 24 Jul 31 07:52:08 PM PDT 24 943306671 ps
T524 /workspace/coverage/cover_reg_top/53.xbar_smoke_slow_rsp.1902184135 Jul 31 07:57:40 PM PDT 24 Jul 31 07:59:15 PM PDT 24 6144798177 ps
T563 /workspace/coverage/cover_reg_top/15.xbar_random_slow_rsp.2831970983 Jul 31 07:49:42 PM PDT 24 Jul 31 08:02:13 PM PDT 24 43822160381 ps
T500 /workspace/coverage/cover_reg_top/69.xbar_random_zero_delays.870623952 Jul 31 08:00:17 PM PDT 24 Jul 31 08:00:53 PM PDT 24 396587200 ps
T436 /workspace/coverage/cover_reg_top/22.xbar_random_large_delays.1487904459 Jul 31 07:51:35 PM PDT 24 Jul 31 08:07:29 PM PDT 24 94872962946 ps
T481 /workspace/coverage/cover_reg_top/62.xbar_random_large_delays.2863648721 Jul 31 07:59:08 PM PDT 24 Jul 31 08:19:54 PM PDT 24 122715379816 ps
T730 /workspace/coverage/cover_reg_top/10.xbar_error_and_unmapped_addr.3757238070 Jul 31 07:48:15 PM PDT 24 Jul 31 07:48:24 PM PDT 24 57047084 ps
T509 /workspace/coverage/cover_reg_top/79.xbar_random_large_delays.3428598851 Jul 31 08:01:54 PM PDT 24 Jul 31 08:19:57 PM PDT 24 93908979885 ps
T652 /workspace/coverage/cover_reg_top/69.xbar_stress_all.353975028 Jul 31 08:00:17 PM PDT 24 Jul 31 08:00:47 PM PDT 24 356554707 ps
T689 /workspace/coverage/cover_reg_top/79.xbar_smoke_slow_rsp.4044342513 Jul 31 08:01:52 PM PDT 24 Jul 31 08:03:41 PM PDT 24 6317754292 ps
T617 /workspace/coverage/cover_reg_top/19.xbar_random_zero_delays.2501514241 Jul 31 07:50:47 PM PDT 24 Jul 31 07:51:18 PM PDT 24 335019250 ps
T483 /workspace/coverage/cover_reg_top/86.xbar_random_slow_rsp.370521274 Jul 31 08:02:58 PM PDT 24 Jul 31 08:22:03 PM PDT 24 64760267735 ps
T1388 /workspace/coverage/cover_reg_top/20.xbar_random_slow_rsp.3603404262 Jul 31 07:51:04 PM PDT 24 Jul 31 07:53:14 PM PDT 24 7542973327 ps
T631 /workspace/coverage/cover_reg_top/35.xbar_random_zero_delays.935641182 Jul 31 07:54:21 PM PDT 24 Jul 31 07:54:55 PM PDT 24 416814870 ps
T648 /workspace/coverage/cover_reg_top/24.xbar_same_source.2886340438 Jul 31 07:52:05 PM PDT 24 Jul 31 07:52:40 PM PDT 24 1095873312 ps
T719 /workspace/coverage/cover_reg_top/94.xbar_smoke_zero_delays.1630967052 Jul 31 08:04:02 PM PDT 24 Jul 31 08:04:08 PM PDT 24 48069595 ps
T553 /workspace/coverage/cover_reg_top/21.xbar_stress_all.626792081 Jul 31 07:51:32 PM PDT 24 Jul 31 07:53:41 PM PDT 24 3906649099 ps
T561 /workspace/coverage/cover_reg_top/51.xbar_unmapped_addr.2310712949 Jul 31 07:57:26 PM PDT 24 Jul 31 07:57:44 PM PDT 24 131590960 ps
T1389 /workspace/coverage/cover_reg_top/49.xbar_smoke.1775282027 Jul 31 07:57:00 PM PDT 24 Jul 31 07:57:10 PM PDT 24 241445023 ps
T433 /workspace/coverage/cover_reg_top/81.xbar_stress_all.612286330 Jul 31 08:02:20 PM PDT 24 Jul 31 08:02:48 PM PDT 24 440533735 ps
T868 /workspace/coverage/cover_reg_top/23.xbar_smoke_slow_rsp.3331037771 Jul 31 07:51:46 PM PDT 24 Jul 31 07:53:23 PM PDT 24 5726615860 ps
T1390 /workspace/coverage/cover_reg_top/45.xbar_smoke_zero_delays.3005437711 Jul 31 07:56:18 PM PDT 24 Jul 31 07:56:24 PM PDT 24 49071986 ps
T646 /workspace/coverage/cover_reg_top/55.xbar_smoke_zero_delays.3672604364 Jul 31 07:57:56 PM PDT 24 Jul 31 07:58:03 PM PDT 24 50583827 ps
T679 /workspace/coverage/cover_reg_top/72.xbar_error_random.842079155 Jul 31 08:00:47 PM PDT 24 Jul 31 08:01:28 PM PDT 24 491488107 ps
T728 /workspace/coverage/cover_reg_top/85.xbar_error_random.3078563262 Jul 31 08:02:49 PM PDT 24 Jul 31 08:03:19 PM PDT 24 849975309 ps
T622 /workspace/coverage/cover_reg_top/20.xbar_stress_all.3749420075 Jul 31 07:51:11 PM PDT 24 Jul 31 07:52:52 PM PDT 24 1317140647 ps
T852 /workspace/coverage/cover_reg_top/41.xbar_error_random.3368028827 Jul 31 07:55:37 PM PDT 24 Jul 31 07:56:43 PM PDT 24 1986779537 ps
T835 /workspace/coverage/cover_reg_top/36.xbar_access_same_device_slow_rsp.3437726801 Jul 31 07:54:42 PM PDT 24 Jul 31 08:03:01 PM PDT 24 30241724932 ps
T571 /workspace/coverage/cover_reg_top/90.xbar_random.948165261 Jul 31 08:03:29 PM PDT 24 Jul 31 08:03:50 PM PDT 24 198647394 ps
T688 /workspace/coverage/cover_reg_top/74.xbar_same_source.3356038325 Jul 31 08:01:12 PM PDT 24 Jul 31 08:01:25 PM PDT 24 391931069 ps
T1391 /workspace/coverage/cover_reg_top/26.xbar_smoke_large_delays.1755521002 Jul 31 07:52:35 PM PDT 24 Jul 31 07:53:54 PM PDT 24 6945712450 ps
T668 /workspace/coverage/cover_reg_top/61.xbar_smoke.850222238 Jul 31 07:58:50 PM PDT 24 Jul 31 07:59:00 PM PDT 24 233917496 ps
T869 /workspace/coverage/cover_reg_top/55.xbar_stress_all_with_reset_error.3193779900 Jul 31 07:58:06 PM PDT 24 Jul 31 07:59:11 PM PDT 24 228356357 ps
T644 /workspace/coverage/cover_reg_top/87.xbar_random_large_delays.1816208574 Jul 31 08:03:04 PM PDT 24 Jul 31 08:12:28 PM PDT 24 49304976258 ps
T552 /workspace/coverage/cover_reg_top/84.xbar_smoke_zero_delays.3377967819 Jul 31 08:02:34 PM PDT 24 Jul 31 08:02:41 PM PDT 24 54662829 ps
T576 /workspace/coverage/cover_reg_top/55.xbar_same_source.3874631358 Jul 31 07:57:57 PM PDT 24 Jul 31 07:58:24 PM PDT 24 354759202 ps
T1392 /workspace/coverage/cover_reg_top/1.xbar_smoke_large_delays.2560204738 Jul 31 07:45:19 PM PDT 24 Jul 31 07:46:54 PM PDT 24 9437236101 ps
T680 /workspace/coverage/cover_reg_top/16.xbar_stress_all_with_error.3143880407 Jul 31 07:50:08 PM PDT 24 Jul 31 07:50:51 PM PDT 24 572024804 ps
T1393 /workspace/coverage/cover_reg_top/75.xbar_error_and_unmapped_addr.335819524 Jul 31 08:01:13 PM PDT 24 Jul 31 08:01:18 PM PDT 24 22255570 ps
T599 /workspace/coverage/cover_reg_top/46.xbar_same_source.763082183 Jul 31 07:56:30 PM PDT 24 Jul 31 07:56:56 PM PDT 24 407732143 ps
T1394 /workspace/coverage/cover_reg_top/1.xbar_error_random.1244192203 Jul 31 07:45:25 PM PDT 24 Jul 31 07:46:14 PM PDT 24 574600897 ps
T596 /workspace/coverage/cover_reg_top/80.xbar_random_slow_rsp.3506906585 Jul 31 08:01:59 PM PDT 24 Jul 31 08:11:48 PM PDT 24 34213167480 ps
T639 /workspace/coverage/cover_reg_top/11.xbar_random.873435109 Jul 31 07:48:27 PM PDT 24 Jul 31 07:48:50 PM PDT 24 687862447 ps
T643 /workspace/coverage/cover_reg_top/1.xbar_unmapped_addr.2920360468 Jul 31 07:45:29 PM PDT 24 Jul 31 07:46:04 PM PDT 24 301607447 ps
T458 /workspace/coverage/cover_reg_top/30.xbar_random_large_delays.1224192141 Jul 31 07:53:27 PM PDT 24 Jul 31 08:13:35 PM PDT 24 107726278858 ps
T1395 /workspace/coverage/cover_reg_top/94.xbar_smoke_slow_rsp.2879056807 Jul 31 08:04:04 PM PDT 24 Jul 31 08:05:28 PM PDT 24 4740597310 ps
T1396 /workspace/coverage/cover_reg_top/91.xbar_error_and_unmapped_addr.3219584404 Jul 31 08:03:37 PM PDT 24 Jul 31 08:03:45 PM PDT 24 40145671 ps
T1397 /workspace/coverage/cover_reg_top/42.xbar_smoke.3966394260 Jul 31 07:55:34 PM PDT 24 Jul 31 07:55:43 PM PDT 24 190821294 ps
T846 /workspace/coverage/cover_reg_top/82.xbar_access_same_device_slow_rsp.4009687693 Jul 31 08:02:37 PM PDT 24 Jul 31 08:36:35 PM PDT 24 107867164213 ps
T1398 /workspace/coverage/cover_reg_top/71.xbar_smoke_large_delays.397986030 Jul 31 08:00:30 PM PDT 24 Jul 31 08:01:52 PM PDT 24 7816336325 ps
T1399 /workspace/coverage/cover_reg_top/36.xbar_stress_all_with_error.2000349457 Jul 31 07:54:40 PM PDT 24 Jul 31 07:54:59 PM PDT 24 183330468 ps
T549 /workspace/coverage/cover_reg_top/97.xbar_random_zero_delays.1278792902 Jul 31 08:04:33 PM PDT 24 Jul 31 08:04:48 PM PDT 24 140708632 ps
T569 /workspace/coverage/cover_reg_top/56.xbar_stress_all_with_rand_reset.3725082352 Jul 31 07:58:13 PM PDT 24 Jul 31 07:59:20 PM PDT 24 306461474 ps
T660 /workspace/coverage/cover_reg_top/59.xbar_unmapped_addr.2087208738 Jul 31 07:58:36 PM PDT 24 Jul 31 07:58:58 PM PDT 24 517697039 ps
T1400 /workspace/coverage/cover_reg_top/9.xbar_smoke_zero_delays.2050253891 Jul 31 07:47:50 PM PDT 24 Jul 31 07:47:58 PM PDT 24 59600501 ps
T531 /workspace/coverage/cover_reg_top/5.chip_tl_errors.453730146 Jul 31 07:46:36 PM PDT 24 Jul 31 07:51:53 PM PDT 24 4525714399 ps
T682 /workspace/coverage/cover_reg_top/53.xbar_error_random.3138422009 Jul 31 07:57:41 PM PDT 24 Jul 31 07:58:02 PM PDT 24 230997197 ps
T555 /workspace/coverage/cover_reg_top/36.xbar_random_zero_delays.2797299423 Jul 31 07:54:34 PM PDT 24 Jul 31 07:55:25 PM PDT 24 577260864 ps
T1401 /workspace/coverage/cover_reg_top/97.xbar_error_random.494303962 Jul 31 08:04:36 PM PDT 24 Jul 31 08:05:22 PM PDT 24 565674374 ps
T619 /workspace/coverage/cover_reg_top/18.xbar_error_random.2313576949 Jul 31 07:50:37 PM PDT 24 Jul 31 07:51:01 PM PDT 24 238194774 ps
T685 /workspace/coverage/cover_reg_top/73.xbar_stress_all_with_reset_error.3776399796 Jul 31 08:01:00 PM PDT 24 Jul 31 08:06:27 PM PDT 24 2924285881 ps
T528 /workspace/coverage/cover_reg_top/6.chip_tl_errors.35294442 Jul 31 07:46:50 PM PDT 24 Jul 31 07:50:31 PM PDT 24 3798252300 ps
T721 /workspace/coverage/cover_reg_top/68.xbar_smoke_large_delays.706887439 Jul 31 08:00:02 PM PDT 24 Jul 31 08:01:28 PM PDT 24 7854759193 ps
T1402 /workspace/coverage/cover_reg_top/99.xbar_smoke_zero_delays.2488900392 Jul 31 08:04:52 PM PDT 24 Jul 31 08:04:58 PM PDT 24 46111450 ps
T842 /workspace/coverage/cover_reg_top/53.xbar_access_same_device.2866307811 Jul 31 07:57:44 PM PDT 24 Jul 31 07:58:52 PM PDT 24 925764380 ps
T832 /workspace/coverage/cover_reg_top/75.xbar_access_same_device.1749669442 Jul 31 08:01:16 PM PDT 24 Jul 31 08:03:03 PM PDT 24 2625730574 ps
T833 /workspace/coverage/cover_reg_top/59.xbar_access_same_device_slow_rsp.2152328334 Jul 31 07:58:52 PM PDT 24 Jul 31 08:15:03 PM PDT 24 56132415870 ps
T720 /workspace/coverage/cover_reg_top/72.xbar_random_slow_rsp.172564168 Jul 31 08:00:46 PM PDT 24 Jul 31 08:02:16 PM PDT 24 5374266866 ps
T861 /workspace/coverage/cover_reg_top/1.xbar_access_same_device.2283005012 Jul 31 07:45:29 PM PDT 24 Jul 31 07:45:54 PM PDT 24 726071179 ps
T556 /workspace/coverage/cover_reg_top/14.xbar_smoke_large_delays.2253482261 Jul 31 07:49:24 PM PDT 24 Jul 31 07:51:01 PM PDT 24 9869784398 ps
T465 /workspace/coverage/cover_reg_top/36.xbar_random_large_delays.1747532000 Jul 31 07:54:33 PM PDT 24 Jul 31 08:09:14 PM PDT 24 84544537932 ps
T573 /workspace/coverage/cover_reg_top/32.xbar_stress_all_with_rand_reset.2425714283 Jul 31 07:53:56 PM PDT 24 Jul 31 07:55:42 PM PDT 24 926874110 ps
T580 /workspace/coverage/cover_reg_top/45.xbar_stress_all_with_error.3729983369 Jul 31 07:56:22 PM PDT 24 Jul 31 07:59:23 PM PDT 24 2722115853 ps
T871 /workspace/coverage/cover_reg_top/65.xbar_stress_all_with_reset_error.1117527474 Jul 31 07:59:46 PM PDT 24 Jul 31 08:00:19 PM PDT 24 66725590 ps
T683 /workspace/coverage/cover_reg_top/51.xbar_stress_all_with_error.202139757 Jul 31 07:57:25 PM PDT 24 Jul 31 08:01:32 PM PDT 24 7328512824 ps
T381 /workspace/coverage/cover_reg_top/8.chip_csr_rw.1569377143 Jul 31 07:47:48 PM PDT 24 Jul 31 07:53:40 PM PDT 24 4045815055 ps
T621 /workspace/coverage/cover_reg_top/58.xbar_random_large_delays.2725039111 Jul 31 07:58:26 PM PDT 24 Jul 31 08:03:19 PM PDT 24 29480634933 ps
T623 /workspace/coverage/cover_reg_top/18.xbar_smoke_large_delays.426656740 Jul 31 07:50:23 PM PDT 24 Jul 31 07:51:49 PM PDT 24 8371338682 ps
T640 /workspace/coverage/cover_reg_top/96.xbar_smoke_zero_delays.2313096947 Jul 31 08:04:18 PM PDT 24 Jul 31 08:04:25 PM PDT 24 48136333 ps
T1403 /workspace/coverage/cover_reg_top/23.xbar_stress_all_with_error.584599692 Jul 31 07:52:00 PM PDT 24 Jul 31 07:53:05 PM PDT 24 771938725 ps
T551 /workspace/coverage/cover_reg_top/47.xbar_stress_all_with_rand_reset.787130335 Jul 31 07:56:53 PM PDT 24 Jul 31 08:01:50 PM PDT 24 1094135303 ps
T1404 /workspace/coverage/cover_reg_top/52.xbar_error_and_unmapped_addr.906291472 Jul 31 07:57:32 PM PDT 24 Jul 31 07:58:11 PM PDT 24 344998895 ps
T1405 /workspace/coverage/cover_reg_top/1.chip_rv_dm_lc_disabled.940830877 Jul 31 07:45:19 PM PDT 24 Jul 31 07:49:43 PM PDT 24 6402765309 ps
T1406 /workspace/coverage/cover_reg_top/69.xbar_error_and_unmapped_addr.3910415721 Jul 31 08:00:15 PM PDT 24 Jul 31 08:00:32 PM PDT 24 360860688 ps
T847 /workspace/coverage/cover_reg_top/24.xbar_access_same_device_slow_rsp.2744719413 Jul 31 07:52:06 PM PDT 24 Jul 31 08:18:57 PM PDT 24 91686427478 ps
T603 /workspace/coverage/cover_reg_top/7.xbar_stress_all_with_error.2042137365 Jul 31 07:47:26 PM PDT 24 Jul 31 07:50:58 PM PDT 24 6409803884 ps
T655 /workspace/coverage/cover_reg_top/6.xbar_stress_all_with_error.656335318 Jul 31 07:47:10 PM PDT 24 Jul 31 07:50:48 PM PDT 24 5480097858 ps
T634 /workspace/coverage/cover_reg_top/13.xbar_same_source.784859593 Jul 31 07:49:13 PM PDT 24 Jul 31 07:49:37 PM PDT 24 345099473 ps
T1407 /workspace/coverage/cover_reg_top/96.xbar_smoke.1676854411 Jul 31 08:04:18 PM PDT 24 Jul 31 08:04:25 PM PDT 24 55749866 ps
T836 /workspace/coverage/cover_reg_top/84.xbar_access_same_device_slow_rsp.679283913 Jul 31 08:02:32 PM PDT 24 Jul 31 08:43:05 PM PDT 24 126864899010 ps
T858 /workspace/coverage/cover_reg_top/37.xbar_access_same_device_slow_rsp.2650479239 Jul 31 07:54:45 PM PDT 24 Jul 31 08:14:03 PM PDT 24 71109728296 ps
T849 /workspace/coverage/cover_reg_top/12.xbar_error_random.3989721224 Jul 31 07:48:52 PM PDT 24 Jul 31 07:49:38 PM PDT 24 1295445385 ps
T159 /workspace/coverage/cover_reg_top/11.chip_csr_mem_rw_with_rand_reset.3764395489 Jul 31 07:48:45 PM PDT 24 Jul 31 08:00:43 PM PDT 24 9770532774 ps
T452 /workspace/coverage/cover_reg_top/9.xbar_stress_all.3278888486 Jul 31 07:47:58 PM PDT 24 Jul 31 07:51:34 PM PDT 24 4925490025 ps
T1408 /workspace/coverage/cover_reg_top/2.xbar_smoke_large_delays.2513110185 Jul 31 07:45:36 PM PDT 24 Jul 31 07:47:24 PM PDT 24 10351203247 ps
T457 /workspace/coverage/cover_reg_top/5.xbar_random_zero_delays.3927999150 Jul 31 07:46:41 PM PDT 24 Jul 31 07:47:12 PM PDT 24 303098812 ps
T848 /workspace/coverage/cover_reg_top/0.xbar_access_same_device_slow_rsp.3172612498 Jul 31 07:45:11 PM PDT 24 Jul 31 07:57:44 PM PDT 24 43812459003 ps
T1409 /workspace/coverage/cover_reg_top/75.xbar_error_random.2356797170 Jul 31 08:01:17 PM PDT 24 Jul 31 08:01:51 PM PDT 24 420997843 ps
T453 /workspace/coverage/cover_reg_top/20.xbar_stress_all_with_rand_reset.3547094996 Jul 31 07:51:11 PM PDT 24 Jul 31 08:04:09 PM PDT 24 7331224006 ps
T729 /workspace/coverage/cover_reg_top/29.xbar_stress_all_with_reset_error.4146125510 Jul 31 07:53:24 PM PDT 24 Jul 31 08:01:17 PM PDT 24 8713990852 ps
T723 /workspace/coverage/cover_reg_top/50.xbar_access_same_device_slow_rsp.3596758954 Jul 31 07:57:11 PM PDT 24 Jul 31 08:17:09 PM PDT 24 67178541803 ps
T850 /workspace/coverage/cover_reg_top/34.xbar_access_same_device_slow_rsp.4097416871 Jul 31 07:54:21 PM PDT 24 Jul 31 07:59:40 PM PDT 24 17272256466 ps
T642 /workspace/coverage/cover_reg_top/46.xbar_stress_all_with_error.1571833826 Jul 31 07:56:35 PM PDT 24 Jul 31 07:59:24 PM PDT 24 5150103653 ps
T1410 /workspace/coverage/cover_reg_top/91.xbar_smoke_large_delays.4090358150 Jul 31 08:03:29 PM PDT 24 Jul 31 08:04:34 PM PDT 24 6324394283 ps
T1411 /workspace/coverage/cover_reg_top/77.xbar_smoke_slow_rsp.3944702229 Jul 31 08:01:37 PM PDT 24 Jul 31 08:03:16 PM PDT 24 5978309503 ps
T887 /workspace/coverage/cover_reg_top/40.xbar_stress_all_with_rand_reset.355033341 Jul 31 07:55:22 PM PDT 24 Jul 31 07:56:32 PM PDT 24 192334519 ps
T160 /workspace/coverage/cover_reg_top/10.chip_csr_mem_rw_with_rand_reset.2129519228 Jul 31 07:48:19 PM PDT 24 Jul 31 08:02:22 PM PDT 24 10903246705 ps
T493 /workspace/coverage/cover_reg_top/1.xbar_random_large_delays.2553848636 Jul 31 07:45:24 PM PDT 24 Jul 31 07:59:26 PM PDT 24 90693702635 ps
T1412 /workspace/coverage/cover_reg_top/71.xbar_smoke_zero_delays.565967551 Jul 31 08:00:28 PM PDT 24 Jul 31 08:00:34 PM PDT 24 46302278 ps
T1413 /workspace/coverage/cover_reg_top/12.xbar_random_slow_rsp.3213749111 Jul 31 07:48:46 PM PDT 24 Jul 31 07:51:13 PM PDT 24 8494269115 ps
T541 /workspace/coverage/cover_reg_top/15.xbar_random_zero_delays.338458453 Jul 31 07:49:38 PM PDT 24 Jul 31 07:50:24 PM PDT 24 564575470 ps
T469 /workspace/coverage/cover_reg_top/89.xbar_stress_all.3438783358 Jul 31 08:03:23 PM PDT 24 Jul 31 08:07:37 PM PDT 24 3002634376 ps
T538 /workspace/coverage/cover_reg_top/77.xbar_stress_all_with_rand_reset.549672079 Jul 31 08:01:38 PM PDT 24 Jul 31 08:06:44 PM PDT 24 2662921323 ps
T533 /workspace/coverage/cover_reg_top/0.chip_tl_errors.1327120150 Jul 31 07:45:01 PM PDT 24 Jul 31 07:47:41 PM PDT 24 3082970178 ps
T515 /workspace/coverage/cover_reg_top/6.xbar_random.2774171646 Jul 31 07:46:55 PM PDT 24 Jul 31 07:48:22 PM PDT 24 2620124746 ps
T462 /workspace/coverage/cover_reg_top/44.xbar_stress_all_with_rand_reset.2294835716 Jul 31 07:56:12 PM PDT 24 Jul 31 08:04:37 PM PDT 24 2450999497 ps
T1414 /workspace/coverage/cover_reg_top/89.xbar_random_large_delays.3742722636 Jul 31 08:03:24 PM PDT 24 Jul 31 08:20:42 PM PDT 24 103056005259 ps
T620 /workspace/coverage/cover_reg_top/73.xbar_random.1891607269 Jul 31 08:00:59 PM PDT 24 Jul 31 08:01:43 PM PDT 24 567615207 ps
T633 /workspace/coverage/cover_reg_top/98.xbar_same_source.4177211424 Jul 31 08:04:43 PM PDT 24 Jul 31 08:05:01 PM PDT 24 513674340 ps
T1415 /workspace/coverage/cover_reg_top/87.xbar_error_and_unmapped_addr.1847862902 Jul 31 08:03:04 PM PDT 24 Jul 31 08:03:38 PM PDT 24 870307255 ps
T382 /workspace/coverage/cover_reg_top/12.chip_csr_mem_rw_with_rand_reset.89016956 Jul 31 07:48:59 PM PDT 24 Jul 31 07:57:32 PM PDT 24 6754864276 ps
T862 /workspace/coverage/cover_reg_top/46.xbar_stress_all_with_reset_error.2712707291 Jul 31 07:56:37 PM PDT 24 Jul 31 08:01:22 PM PDT 24 2752532914 ps
T543 /workspace/coverage/cover_reg_top/11.xbar_random_zero_delays.361046185 Jul 31 07:48:27 PM PDT 24 Jul 31 07:49:06 PM PDT 24 430307833 ps
T1416 /workspace/coverage/cover_reg_top/21.xbar_error_random.2419574037 Jul 31 07:51:30 PM PDT 24 Jul 31 07:52:03 PM PDT 24 933851015 ps
T585 /workspace/coverage/cover_reg_top/73.xbar_stress_all_with_error.2694339795 Jul 31 08:01:00 PM PDT 24 Jul 31 08:03:09 PM PDT 24 3543484766 ps
T613 /workspace/coverage/cover_reg_top/16.xbar_same_source.1292121706 Jul 31 07:50:00 PM PDT 24 Jul 31 07:50:50 PM PDT 24 1644586351 ps
T1417 /workspace/coverage/cover_reg_top/90.xbar_smoke_zero_delays.2578643830 Jul 31 08:03:23 PM PDT 24 Jul 31 08:03:30 PM PDT 24 41251248 ps
T1418 /workspace/coverage/cover_reg_top/73.xbar_smoke.1240455075 Jul 31 08:00:53 PM PDT 24 Jul 31 08:00:59 PM PDT 24 43365530 ps
T472 /workspace/coverage/cover_reg_top/18.xbar_smoke_slow_rsp.155485377 Jul 31 07:50:27 PM PDT 24 Jul 31 07:51:48 PM PDT 24 4905794035 ps
T410 /workspace/coverage/cover_reg_top/3.chip_csr_aliasing.1735118871 Jul 31 07:45:47 PM PDT 24 Jul 31 10:07:23 PM PDT 24 57364241215 ps
T851 /workspace/coverage/cover_reg_top/68.xbar_access_same_device_slow_rsp.1026041471 Jul 31 08:00:11 PM PDT 24 Jul 31 08:07:20 PM PDT 24 23457254526 ps
T1419 /workspace/coverage/cover_reg_top/5.xbar_smoke.268500591 Jul 31 07:46:37 PM PDT 24 Jul 31 07:46:46 PM PDT 24 202268812 ps
T476 /workspace/coverage/cover_reg_top/41.xbar_stress_all.3170296027 Jul 31 07:55:35 PM PDT 24 Jul 31 07:57:19 PM PDT 24 2776760177 ps
T401 /workspace/coverage/cover_reg_top/2.chip_csr_rw.3709541543 Jul 31 07:45:48 PM PDT 24 Jul 31 07:56:00 PM PDT 24 5839934120 ps
T1420 /workspace/coverage/cover_reg_top/69.xbar_smoke_large_delays.1341043598 Jul 31 08:00:09 PM PDT 24 Jul 31 08:01:50 PM PDT 24 9658297719 ps
T1421 /workspace/coverage/cover_reg_top/32.xbar_smoke.4250908120 Jul 31 07:53:42 PM PDT 24 Jul 31 07:53:49 PM PDT 24 54336399 ps
T455 /workspace/coverage/cover_reg_top/19.xbar_stress_all_with_rand_reset.2396842736 Jul 31 07:50:52 PM PDT 24 Jul 31 07:53:14 PM PDT 24 458215342 ps
T570 /workspace/coverage/cover_reg_top/38.xbar_stress_all_with_rand_reset.288834351 Jul 31 07:55:04 PM PDT 24 Jul 31 07:57:22 PM PDT 24 1458604296 ps
T614 /workspace/coverage/cover_reg_top/70.xbar_random.49300354 Jul 31 08:00:21 PM PDT 24 Jul 31 08:01:28 PM PDT 24 1869987339 ps
T647 /workspace/coverage/cover_reg_top/2.xbar_random_large_delays.2741042315 Jul 31 07:45:42 PM PDT 24 Jul 31 07:51:10 PM PDT 24 31817993789 ps
T615 /workspace/coverage/cover_reg_top/79.xbar_random_slow_rsp.3690176805 Jul 31 08:01:52 PM PDT 24 Jul 31 08:09:20 PM PDT 24 24553638316 ps
T577 /workspace/coverage/cover_reg_top/29.xbar_unmapped_addr.3278958437 Jul 31 07:53:28 PM PDT 24 Jul 31 07:54:12 PM PDT 24 954330174 ps
T1422 /workspace/coverage/cover_reg_top/35.xbar_smoke_slow_rsp.1965162532 Jul 31 07:54:24 PM PDT 24 Jul 31 07:56:03 PM PDT 24 5958680978 ps
T1423 /workspace/coverage/cover_reg_top/5.xbar_error_random.3696252011 Jul 31 07:46:41 PM PDT 24 Jul 31 07:47:43 PM PDT 24 1841346231 ps
T513 /workspace/coverage/cover_reg_top/64.xbar_access_same_device.1469540247 Jul 31 07:59:28 PM PDT 24 Jul 31 08:00:02 PM PDT 24 354822874 ps
T834 /workspace/coverage/cover_reg_top/38.xbar_access_same_device_slow_rsp.3897237637 Jul 31 07:54:59 PM PDT 24 Jul 31 08:30:33 PM PDT 24 119124130576 ps
T581 /workspace/coverage/cover_reg_top/17.xbar_random_slow_rsp.1748346674 Jul 31 07:50:16 PM PDT 24 Jul 31 08:01:58 PM PDT 24 44293895380 ps
T1424 /workspace/coverage/cover_reg_top/29.xbar_smoke.793678644 Jul 31 07:53:14 PM PDT 24 Jul 31 07:53:21 PM PDT 24 56262923 ps
T1425 /workspace/coverage/cover_reg_top/19.xbar_error_random.1413408533 Jul 31 07:50:50 PM PDT 24 Jul 31 07:51:23 PM PDT 24 433409409 ps
T470 /workspace/coverage/cover_reg_top/82.xbar_stress_all.175812016 Jul 31 08:02:28 PM PDT 24 Jul 31 08:05:40 PM PDT 24 2301667284 ps
T630 /workspace/coverage/cover_reg_top/85.xbar_stress_all_with_rand_reset.607326797 Jul 31 08:02:51 PM PDT 24 Jul 31 08:05:20 PM PDT 24 1476118023 ps
T402 /workspace/coverage/cover_reg_top/7.chip_csr_rw.4282590505 Jul 31 07:47:25 PM PDT 24 Jul 31 07:56:37 PM PDT 24 5287578510 ps
T656 /workspace/coverage/cover_reg_top/95.xbar_random.1651745109 Jul 31 08:04:13 PM PDT 24 Jul 31 08:04:36 PM PDT 24 245238629 ps
T1426 /workspace/coverage/cover_reg_top/60.xbar_error_random.4170342507 Jul 31 07:58:49 PM PDT 24 Jul 31 07:58:55 PM PDT 24 34569203 ps
T471 /workspace/coverage/cover_reg_top/78.xbar_stress_all_with_rand_reset.2790819611 Jul 31 08:01:52 PM PDT 24 Jul 31 08:07:14 PM PDT 24 7285708324 ps
T583 /workspace/coverage/cover_reg_top/81.xbar_random_zero_delays.2082786000 Jul 31 08:02:14 PM PDT 24 Jul 31 08:03:06 PM PDT 24 594134024 ps
T664 /workspace/coverage/cover_reg_top/71.xbar_random.327957806 Jul 31 08:00:27 PM PDT 24 Jul 31 08:01:05 PM PDT 24 526357329 ps
T1427 /workspace/coverage/cover_reg_top/5.xbar_stress_all.3131773698 Jul 31 07:46:53 PM PDT 24 Jul 31 07:46:57 PM PDT 24 5613912 ps
T582 /workspace/coverage/cover_reg_top/54.xbar_same_source.1139813072 Jul 31 07:57:50 PM PDT 24 Jul 31 07:58:19 PM PDT 24 337858883 ps
T632 /workspace/coverage/cover_reg_top/53.xbar_unmapped_addr.213034385 Jul 31 07:57:40 PM PDT 24 Jul 31 07:58:05 PM PDT 24 210306398 ps
T1428 /workspace/coverage/cover_reg_top/27.xbar_smoke_zero_delays.1651486891 Jul 31 07:52:54 PM PDT 24 Jul 31 07:53:00 PM PDT 24 49045209 ps
T1429 /workspace/coverage/cover_reg_top/7.xbar_smoke_large_delays.411131200 Jul 31 07:47:16 PM PDT 24 Jul 31 07:48:20 PM PDT 24 6192237217 ps
T482 /workspace/coverage/cover_reg_top/94.xbar_random_large_delays.2790121074 Jul 31 08:04:02 PM PDT 24 Jul 31 08:20:27 PM PDT 24 92346982363 ps
T544 /workspace/coverage/cover_reg_top/12.xbar_random.1061955930 Jul 31 07:48:48 PM PDT 24 Jul 31 07:49:57 PM PDT 24 1858400244 ps
T1430 /workspace/coverage/cover_reg_top/26.xbar_stress_all_with_error.3755896246 Jul 31 07:52:44 PM PDT 24 Jul 31 07:53:19 PM PDT 24 319241848 ps
T592 /workspace/coverage/cover_reg_top/43.xbar_random_slow_rsp.1270934532 Jul 31 07:55:53 PM PDT 24 Jul 31 07:58:33 PM PDT 24 9985887587 ps
T593 /workspace/coverage/cover_reg_top/15.xbar_stress_all_with_rand_reset.3143574972 Jul 31 07:49:53 PM PDT 24 Jul 31 07:52:40 PM PDT 24 2239555991 ps
T1431 /workspace/coverage/cover_reg_top/86.xbar_error_random.2858604177 Jul 31 08:02:57 PM PDT 24 Jul 31 08:03:03 PM PDT 24 32410202 ps
T562 /workspace/coverage/cover_reg_top/96.xbar_random_large_delays.2886906647 Jul 31 08:04:26 PM PDT 24 Jul 31 08:21:42 PM PDT 24 93978577564 ps
T489 /workspace/coverage/cover_reg_top/27.xbar_random.2307609792 Jul 31 07:52:54 PM PDT 24 Jul 31 07:53:34 PM PDT 24 425030113 ps
T501 /workspace/coverage/cover_reg_top/1.xbar_stress_all_with_rand_reset.3233632893 Jul 31 07:45:28 PM PDT 24 Jul 31 07:54:43 PM PDT 24 3889251014 ps
T857 /workspace/coverage/cover_reg_top/78.xbar_access_same_device_slow_rsp.372347552 Jul 31 08:01:46 PM PDT 24 Jul 31 08:26:26 PM PDT 24 80638958836 ps
T840 /workspace/coverage/cover_reg_top/65.xbar_access_same_device_slow_rsp.3710015883 Jul 31 07:59:38 PM PDT 24 Jul 31 08:13:07 PM PDT 24 45335766506 ps
T672 /workspace/coverage/cover_reg_top/94.xbar_random.1782534407 Jul 31 08:04:01 PM PDT 24 Jul 31 08:04:22 PM PDT 24 503588459 ps
T1432 /workspace/coverage/cover_reg_top/34.xbar_smoke.3992068896 Jul 31 07:54:13 PM PDT 24 Jul 31 07:54:20 PM PDT 24 47940602 ps
T866 /workspace/coverage/cover_reg_top/60.xbar_access_same_device.57046008 Jul 31 07:58:51 PM PDT 24 Jul 31 07:59:59 PM PDT 24 938146452 ps
T891 /workspace/coverage/cover_reg_top/0.xbar_stress_all_with_reset_error.1526553721 Jul 31 07:45:14 PM PDT 24 Jul 31 07:48:53 PM PDT 24 743226375 ps
T537 /workspace/coverage/cover_reg_top/70.xbar_random_zero_delays.1025320428 Jul 31 08:00:20 PM PDT 24 Jul 31 08:01:02 PM PDT 24 533555052 ps
T1433 /workspace/coverage/cover_reg_top/5.xbar_stress_all_with_rand_reset.2192544181 Jul 31 07:46:48 PM PDT 24 Jul 31 07:46:55 PM PDT 24 7525893 ps
T1434 /workspace/coverage/cover_reg_top/4.xbar_smoke_zero_delays.3301548009 Jul 31 07:46:19 PM PDT 24 Jul 31 07:46:25 PM PDT 24 35398933 ps
T1435 /workspace/coverage/cover_reg_top/61.xbar_smoke_large_delays.2380696230 Jul 31 07:58:57 PM PDT 24 Jul 31 08:00:10 PM PDT 24 7172126308 ps
T468 /workspace/coverage/cover_reg_top/51.xbar_stress_all_with_rand_reset.2040139659 Jul 31 07:57:26 PM PDT 24 Jul 31 08:08:15 PM PDT 24 8783406205 ps
T651 /workspace/coverage/cover_reg_top/25.xbar_random_slow_rsp.1092968910 Jul 31 07:52:21 PM PDT 24 Jul 31 08:05:14 PM PDT 24 47084617746 ps
T600 /workspace/coverage/cover_reg_top/29.xbar_random_slow_rsp.4252362836 Jul 31 07:53:18 PM PDT 24 Jul 31 08:01:30 PM PDT 24 27938908723 ps
T1436 /workspace/coverage/cover_reg_top/14.xbar_smoke_zero_delays.2661798203 Jul 31 07:49:24 PM PDT 24 Jul 31 07:49:31 PM PDT 24 51152096 ps
T1437 /workspace/coverage/cover_reg_top/31.xbar_error_and_unmapped_addr.654452667 Jul 31 07:53:49 PM PDT 24 Jul 31 07:53:57 PM PDT 24 61792661 ps
T618 /workspace/coverage/cover_reg_top/91.xbar_random.1824063749 Jul 31 08:03:34 PM PDT 24 Jul 31 08:03:57 PM PDT 24 257621423 ps
T1438 /workspace/coverage/cover_reg_top/11.xbar_stress_all_with_error.3340590300 Jul 31 07:48:33 PM PDT 24 Jul 31 07:49:21 PM PDT 24 678137619 ps
T598 /workspace/coverage/cover_reg_top/95.xbar_stress_all_with_error.3187376250 Jul 31 08:04:22 PM PDT 24 Jul 31 08:06:30 PM PDT 24 1740751632 ps
T545 /workspace/coverage/cover_reg_top/97.xbar_stress_all.325894896 Jul 31 08:04:37 PM PDT 24 Jul 31 08:11:06 PM PDT 24 4265150786 ps
T546 /workspace/coverage/cover_reg_top/5.xbar_random_large_delays.1257291877 Jul 31 07:46:40 PM PDT 24 Jul 31 07:59:57 PM PDT 24 74532902075 ps
T1439 /workspace/coverage/cover_reg_top/72.xbar_smoke_zero_delays.846736957 Jul 31 08:00:41 PM PDT 24 Jul 31 08:00:47 PM PDT 24 55522723 ps
T609 /workspace/coverage/cover_reg_top/89.xbar_smoke.2186846728 Jul 31 08:03:25 PM PDT 24 Jul 31 08:03:33 PM PDT 24 164429307 ps
T511 /workspace/coverage/cover_reg_top/31.xbar_stress_all_with_rand_reset.2996914371 Jul 31 07:53:43 PM PDT 24 Jul 31 07:54:49 PM PDT 24 269664792 ps
T498 /workspace/coverage/cover_reg_top/37.xbar_stress_all.974231891 Jul 31 07:54:51 PM PDT 24 Jul 31 07:57:34 PM PDT 24 4717159537 ps
T1440 /workspace/coverage/cover_reg_top/30.xbar_random_zero_delays.982771039 Jul 31 07:53:27 PM PDT 24 Jul 31 07:53:42 PM PDT 24 131288163 ps
T557 /workspace/coverage/cover_reg_top/82.xbar_random_large_delays.1931184777 Jul 31 08:02:25 PM PDT 24 Jul 31 08:18:41 PM PDT 24 98967201628 ps
T1441 /workspace/coverage/cover_reg_top/68.xbar_error_random.4267593165 Jul 31 08:00:09 PM PDT 24 Jul 31 08:01:09 PM PDT 24 1714131276 ps
T540 /workspace/coverage/cover_reg_top/21.xbar_random_large_delays.1635924259 Jul 31 07:51:24 PM PDT 24 Jul 31 08:01:42 PM PDT 24 60293036526 ps
T560 /workspace/coverage/cover_reg_top/18.xbar_random_slow_rsp.3514814510 Jul 31 07:50:29 PM PDT 24 Jul 31 08:08:32 PM PDT 24 67249972461 ps
T1442 /workspace/coverage/cover_reg_top/87.xbar_smoke_slow_rsp.1363095246 Jul 31 08:04:22 PM PDT 24 Jul 31 08:05:35 PM PDT 24 4754970005 ps
T1443 /workspace/coverage/cover_reg_top/46.xbar_smoke_large_delays.2895486940 Jul 31 07:56:24 PM PDT 24 Jul 31 07:58:01 PM PDT 24 9566078773 ps
T1444 /workspace/coverage/cover_reg_top/84.xbar_smoke.3445069010 Jul 31 08:03:59 PM PDT 24 Jul 31 08:04:08 PM PDT 24 241127163 ps
T461 /workspace/coverage/cover_reg_top/86.xbar_access_same_device.632442489 Jul 31 08:02:57 PM PDT 24 Jul 31 08:04:13 PM PDT 24 1865809673 ps
T1445 /workspace/coverage/cover_reg_top/45.xbar_unmapped_addr.599090015 Jul 31 07:56:17 PM PDT 24 Jul 31 07:56:25 PM PDT 24 48136646 ps
T459 /workspace/coverage/cover_reg_top/64.xbar_random_large_delays.406630303 Jul 31 07:59:29 PM PDT 24 Jul 31 08:08:25 PM PDT 24 54012445922 ps
0% 10% 20% 30% 40% 50% 60% 70% 80% 90% 100%