| T948 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_hmac_trans.1142017104 |
|
|
Aug 02 08:20:38 PM PDT 24 |
Aug 02 08:31:32 PM PDT 24 |
5257439292 ps |
| T949 |
/workspace/coverage/default/1.chip_sw_aon_timer_smoketest.2074088314 |
|
|
Aug 02 08:32:24 PM PDT 24 |
Aug 02 08:39:20 PM PDT 24 |
3024954032 ps |
| T176 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end.3200407302 |
|
|
Aug 02 08:32:10 PM PDT 24 |
Aug 02 09:31:08 PM PDT 24 |
14746286470 ps |
| T950 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.1820180910 |
|
|
Aug 02 08:34:23 PM PDT 24 |
Aug 02 09:04:28 PM PDT 24 |
8278921964 ps |
| T810 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.1835700181 |
|
|
Aug 02 08:47:51 PM PDT 24 |
Aug 02 08:57:09 PM PDT 24 |
5007725128 ps |
| T546 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.3870102255 |
|
|
Aug 02 08:30:42 PM PDT 24 |
Aug 02 08:43:03 PM PDT 24 |
4234970000 ps |
| T951 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod.40436619 |
|
|
Aug 02 08:32:06 PM PDT 24 |
Aug 02 09:27:24 PM PDT 24 |
14112725401 ps |
| T350 |
/workspace/coverage/default/2.chip_sw_i2c_device_tx_rx.3592197649 |
|
|
Aug 02 08:35:09 PM PDT 24 |
Aug 02 08:46:07 PM PDT 24 |
4192707906 ps |
| T952 |
/workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.521276758 |
|
|
Aug 02 08:26:51 PM PDT 24 |
Aug 02 08:33:57 PM PDT 24 |
7218485736 ps |
| T291 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.633345369 |
|
|
Aug 02 08:32:17 PM PDT 24 |
Aug 02 08:42:41 PM PDT 24 |
4817630295 ps |
| T953 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.3117130305 |
|
|
Aug 02 08:42:41 PM PDT 24 |
Aug 02 09:03:42 PM PDT 24 |
5586497360 ps |
| T762 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.2467325627 |
|
|
Aug 02 08:52:25 PM PDT 24 |
Aug 02 08:57:49 PM PDT 24 |
3697481968 ps |
| T336 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.2909810243 |
|
|
Aug 02 08:20:35 PM PDT 24 |
Aug 02 08:37:02 PM PDT 24 |
4255542984 ps |
| T376 |
/workspace/coverage/default/0.chip_sw_hmac_enc.321545156 |
|
|
Aug 02 08:17:28 PM PDT 24 |
Aug 02 08:21:26 PM PDT 24 |
2665833924 ps |
| T184 |
/workspace/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.4149164341 |
|
|
Aug 02 08:40:32 PM PDT 24 |
Aug 02 08:48:10 PM PDT 24 |
4054178756 ps |
| T345 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.364094173 |
|
|
Aug 02 08:16:54 PM PDT 24 |
Aug 02 08:24:36 PM PDT 24 |
3781973242 ps |
| T954 |
/workspace/coverage/default/1.chip_sw_aes_idle.2299659523 |
|
|
Aug 02 08:28:44 PM PDT 24 |
Aug 02 08:32:04 PM PDT 24 |
3009042448 ps |
| T955 |
/workspace/coverage/default/7.chip_sw_uart_rand_baudrate.2295906847 |
|
|
Aug 02 08:45:56 PM PDT 24 |
Aug 02 08:53:57 PM PDT 24 |
4087916632 ps |
| T956 |
/workspace/coverage/default/2.rom_e2e_self_hash.1928890471 |
|
|
Aug 02 08:48:34 PM PDT 24 |
Aug 02 10:20:12 PM PDT 24 |
26501214910 ps |
| T957 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.854186742 |
|
|
Aug 02 08:22:23 PM PDT 24 |
Aug 02 08:47:10 PM PDT 24 |
8157028680 ps |
| T261 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.3596615584 |
|
|
Aug 02 08:24:48 PM PDT 24 |
Aug 02 08:31:58 PM PDT 24 |
2892530548 ps |
| T958 |
/workspace/coverage/default/1.chip_sw_csrng_smoketest.2141481954 |
|
|
Aug 02 08:33:22 PM PDT 24 |
Aug 02 08:39:45 PM PDT 24 |
3317305124 ps |
| T136 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_status.1797368657 |
|
|
Aug 02 08:31:10 PM PDT 24 |
Aug 02 08:34:32 PM PDT 24 |
3161808100 ps |
| T959 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.2946683895 |
|
|
Aug 02 08:40:24 PM PDT 24 |
Aug 02 08:48:23 PM PDT 24 |
4323977932 ps |
| T776 |
/workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.4030246334 |
|
|
Aug 02 08:46:37 PM PDT 24 |
Aug 02 08:53:03 PM PDT 24 |
3505474836 ps |
| T777 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.3059082698 |
|
|
Aug 02 08:53:34 PM PDT 24 |
Aug 02 09:00:42 PM PDT 24 |
3669043992 ps |
| T347 |
/workspace/coverage/default/8.chip_sw_uart_rand_baudrate.2216687476 |
|
|
Aug 02 08:46:21 PM PDT 24 |
Aug 02 09:09:50 PM PDT 24 |
8774289588 ps |
| T960 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.1003229451 |
|
|
Aug 02 08:43:53 PM PDT 24 |
Aug 02 08:51:55 PM PDT 24 |
7713651940 ps |
| T170 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.3874064929 |
|
|
Aug 02 08:17:35 PM PDT 24 |
Aug 02 08:32:31 PM PDT 24 |
8041319609 ps |
| T24 |
/workspace/coverage/default/0.chip_sw_usbdev_setuprx.1273956985 |
|
|
Aug 02 08:18:31 PM PDT 24 |
Aug 02 08:28:17 PM PDT 24 |
3484721710 ps |
| T292 |
/workspace/coverage/default/1.chip_sw_otbn_mem_scramble.3464618768 |
|
|
Aug 02 08:28:24 PM PDT 24 |
Aug 02 08:37:54 PM PDT 24 |
3930961904 ps |
| T743 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.3273040574 |
|
|
Aug 02 08:50:45 PM PDT 24 |
Aug 02 09:00:39 PM PDT 24 |
4505617706 ps |
| T961 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.2494685630 |
|
|
Aug 02 08:37:40 PM PDT 24 |
Aug 02 08:55:03 PM PDT 24 |
4221305172 ps |
| T799 |
/workspace/coverage/default/67.chip_sw_all_escalation_resets.269073357 |
|
|
Aug 02 08:53:08 PM PDT 24 |
Aug 02 09:02:04 PM PDT 24 |
5836050000 ps |
| T962 |
/workspace/coverage/default/2.rom_e2e_shutdown_output.911319803 |
|
|
Aug 02 08:47:40 PM PDT 24 |
Aug 02 09:45:35 PM PDT 24 |
24294935676 ps |
| T963 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.1965529079 |
|
|
Aug 02 08:34:11 PM PDT 24 |
Aug 02 08:58:40 PM PDT 24 |
9954710526 ps |
| T759 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.4283902533 |
|
|
Aug 02 08:54:04 PM PDT 24 |
Aug 02 08:59:14 PM PDT 24 |
3653041608 ps |
| T740 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.1401895762 |
|
|
Aug 02 08:49:22 PM PDT 24 |
Aug 02 08:55:41 PM PDT 24 |
3838445484 ps |
| T964 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency_reduced_freq.2659451771 |
|
|
Aug 02 08:42:54 PM PDT 24 |
Aug 02 09:35:04 PM PDT 24 |
20122894083 ps |
| T403 |
/workspace/coverage/default/2.chip_sw_edn_boot_mode.4061924015 |
|
|
Aug 02 08:39:24 PM PDT 24 |
Aug 02 08:48:38 PM PDT 24 |
3154018920 ps |
| T828 |
/workspace/coverage/default/99.chip_sw_all_escalation_resets.1477251174 |
|
|
Aug 02 08:55:46 PM PDT 24 |
Aug 02 09:04:57 PM PDT 24 |
5288589188 ps |
| T224 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_prod.785928354 |
|
|
Aug 02 08:19:13 PM PDT 24 |
Aug 02 08:33:45 PM PDT 24 |
7755431476 ps |
| T965 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.1724355444 |
|
|
Aug 02 08:17:49 PM PDT 24 |
Aug 02 08:41:23 PM PDT 24 |
16910508754 ps |
| T966 |
/workspace/coverage/default/1.chip_sw_hmac_enc_idle.1998441894 |
|
|
Aug 02 08:28:41 PM PDT 24 |
Aug 02 08:33:27 PM PDT 24 |
2314646028 ps |
| T57 |
/workspace/coverage/default/0.chip_sw_spi_device_pinmux_sleep_retention.3649471914 |
|
|
Aug 02 08:17:55 PM PDT 24 |
Aug 02 08:22:50 PM PDT 24 |
3158259811 ps |
| T321 |
/workspace/coverage/default/61.chip_sw_all_escalation_resets.162550773 |
|
|
Aug 02 08:53:12 PM PDT 24 |
Aug 02 09:05:01 PM PDT 24 |
6112394840 ps |
| T249 |
/workspace/coverage/default/0.chip_sw_rstmgr_cpu_info.2674344622 |
|
|
Aug 02 08:19:12 PM PDT 24 |
Aug 02 08:27:25 PM PDT 24 |
6728913496 ps |
| T226 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_kmac.869654124 |
|
|
Aug 02 08:20:20 PM PDT 24 |
Aug 02 09:06:49 PM PDT 24 |
12917416400 ps |
| T739 |
/workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.572243814 |
|
|
Aug 02 08:52:43 PM PDT 24 |
Aug 02 08:59:03 PM PDT 24 |
3231157264 ps |
| T967 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3955899518 |
|
|
Aug 02 08:23:10 PM PDT 24 |
Aug 02 08:44:32 PM PDT 24 |
9371897879 ps |
| T968 |
/workspace/coverage/default/2.chip_sw_entropy_src_kat_test.2130864707 |
|
|
Aug 02 08:36:31 PM PDT 24 |
Aug 02 08:39:39 PM PDT 24 |
2011340020 ps |
| T969 |
/workspace/coverage/default/37.chip_sw_alert_handler_lpg_sleep_mode_alerts.3480837715 |
|
|
Aug 02 08:51:22 PM PDT 24 |
Aug 02 08:58:29 PM PDT 24 |
3151247800 ps |
| T970 |
/workspace/coverage/default/4.chip_sw_aon_timer_sleep_wdog_sleep_pause.3431782875 |
|
|
Aug 02 08:44:33 PM PDT 24 |
Aug 02 08:53:41 PM PDT 24 |
7383761416 ps |
| T124 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.3858407014 |
|
|
Aug 02 08:21:25 PM PDT 24 |
Aug 02 08:38:32 PM PDT 24 |
7564233500 ps |
| T147 |
/workspace/coverage/default/0.chip_sw_exit_test_unlocked_bootstrap.3329173435 |
|
|
Aug 02 08:16:44 PM PDT 24 |
Aug 02 11:25:42 PM PDT 24 |
57697145720 ps |
| T971 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.3942232935 |
|
|
Aug 02 08:16:48 PM PDT 24 |
Aug 02 08:25:38 PM PDT 24 |
4180326744 ps |
| T732 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.2223810613 |
|
|
Aug 02 08:37:47 PM PDT 24 |
Aug 02 08:52:48 PM PDT 24 |
4928105376 ps |
| T972 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.2452319540 |
|
|
Aug 02 08:43:50 PM PDT 24 |
Aug 02 08:58:52 PM PDT 24 |
5058809632 ps |
| T173 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_rand_to_scrap.3214692192 |
|
|
Aug 02 08:26:42 PM PDT 24 |
Aug 02 08:31:49 PM PDT 24 |
2980713917 ps |
| T104 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.1735131167 |
|
|
Aug 02 08:40:30 PM PDT 24 |
Aug 02 09:01:55 PM PDT 24 |
21421284032 ps |
| T413 |
/workspace/coverage/default/76.chip_sw_all_escalation_resets.2055723196 |
|
|
Aug 02 08:54:21 PM PDT 24 |
Aug 02 09:05:06 PM PDT 24 |
5538616108 ps |
| T339 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.805508505 |
|
|
Aug 02 08:20:56 PM PDT 24 |
Aug 02 08:34:13 PM PDT 24 |
4192072586 ps |
| T973 |
/workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.1330842741 |
|
|
Aug 02 08:23:20 PM PDT 24 |
Aug 02 08:50:25 PM PDT 24 |
9340041878 ps |
| T21 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.985938773 |
|
|
Aug 02 08:17:35 PM PDT 24 |
Aug 02 08:45:34 PM PDT 24 |
25091992700 ps |
| T125 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.3344552727 |
|
|
Aug 02 08:31:28 PM PDT 24 |
Aug 02 08:39:49 PM PDT 24 |
5168507160 ps |
| T974 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.3357931521 |
|
|
Aug 02 08:53:41 PM PDT 24 |
Aug 02 09:01:41 PM PDT 24 |
5040971840 ps |
| T975 |
/workspace/coverage/default/0.chip_sw_kmac_mode_cshake.1065550305 |
|
|
Aug 02 08:18:27 PM PDT 24 |
Aug 02 08:21:35 PM PDT 24 |
2695585010 ps |
| T438 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_test_unlocked0.309908370 |
|
|
Aug 02 08:23:57 PM PDT 24 |
Aug 02 08:56:32 PM PDT 24 |
25668888612 ps |
| T976 |
/workspace/coverage/default/1.chip_sw_example_concurrency.30599559 |
|
|
Aug 02 08:24:05 PM PDT 24 |
Aug 02 08:28:08 PM PDT 24 |
2485719050 ps |
| T977 |
/workspace/coverage/default/15.chip_sw_uart_rand_baudrate.3000543921 |
|
|
Aug 02 08:47:10 PM PDT 24 |
Aug 02 08:56:41 PM PDT 24 |
3844717716 ps |
| T978 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_transition.3440114666 |
|
|
Aug 02 08:36:22 PM PDT 24 |
Aug 02 08:49:02 PM PDT 24 |
10357824317 ps |
| T979 |
/workspace/coverage/default/2.chip_sw_rstmgr_smoketest.3517898812 |
|
|
Aug 02 08:43:15 PM PDT 24 |
Aug 02 08:45:55 PM PDT 24 |
3130629016 ps |
| T13 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.146524666 |
|
|
Aug 02 08:20:27 PM PDT 24 |
Aug 02 08:31:18 PM PDT 24 |
4884434094 ps |
| T980 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.4205763672 |
|
|
Aug 02 08:45:09 PM PDT 24 |
Aug 02 08:53:09 PM PDT 24 |
3876864218 ps |
| T981 |
/workspace/coverage/default/0.chip_sw_rstmgr_smoketest.2475223190 |
|
|
Aug 02 08:24:24 PM PDT 24 |
Aug 02 08:27:46 PM PDT 24 |
3227998916 ps |
| T982 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter.4236060770 |
|
|
Aug 02 08:23:55 PM PDT 24 |
Aug 02 08:28:03 PM PDT 24 |
2755186785 ps |
| T983 |
/workspace/coverage/default/1.chip_sw_entropy_src_smoketest.4160557679 |
|
|
Aug 02 08:35:11 PM PDT 24 |
Aug 02 08:43:01 PM PDT 24 |
4128345136 ps |
| T984 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.3845063458 |
|
|
Aug 02 08:34:10 PM PDT 24 |
Aug 02 08:49:05 PM PDT 24 |
4855327036 ps |
| T358 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx.903692274 |
|
|
Aug 02 08:45:21 PM PDT 24 |
Aug 02 08:56:08 PM PDT 24 |
3960391074 ps |
| T985 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.121040840 |
|
|
Aug 02 08:32:39 PM PDT 24 |
Aug 02 08:53:45 PM PDT 24 |
7366252083 ps |
| T25 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.4146642336 |
|
|
Aug 02 08:18:54 PM PDT 24 |
Aug 02 08:53:05 PM PDT 24 |
8904332414 ps |
| T383 |
/workspace/coverage/default/43.chip_sw_all_escalation_resets.1714702196 |
|
|
Aug 02 08:50:31 PM PDT 24 |
Aug 02 09:02:38 PM PDT 24 |
6295424728 ps |
| T750 |
/workspace/coverage/default/62.chip_sw_all_escalation_resets.2812955369 |
|
|
Aug 02 08:55:07 PM PDT 24 |
Aug 02 09:02:35 PM PDT 24 |
5838518374 ps |
| T986 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.1062577033 |
|
|
Aug 02 08:48:48 PM PDT 24 |
Aug 02 09:01:02 PM PDT 24 |
5391358680 ps |
| T987 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.2048343632 |
|
|
Aug 02 08:24:26 PM PDT 24 |
Aug 02 08:29:03 PM PDT 24 |
3633745875 ps |
| T374 |
/workspace/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.1419760561 |
|
|
Aug 02 08:37:47 PM PDT 24 |
Aug 02 09:02:29 PM PDT 24 |
11126835566 ps |
| T752 |
/workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.2825970749 |
|
|
Aug 02 08:49:51 PM PDT 24 |
Aug 02 08:55:49 PM PDT 24 |
3563820392 ps |
| T988 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.4200380088 |
|
|
Aug 02 08:23:08 PM PDT 24 |
Aug 02 08:27:30 PM PDT 24 |
3126128808 ps |
| T719 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_disabled.824624383 |
|
|
Aug 02 08:25:17 PM PDT 24 |
Aug 02 08:29:34 PM PDT 24 |
3600852500 ps |
| T989 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.1198594647 |
|
|
Aug 02 08:39:00 PM PDT 24 |
Aug 02 08:49:22 PM PDT 24 |
5182988018 ps |
| T356 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops.3515962630 |
|
|
Aug 02 08:35:19 PM PDT 24 |
Aug 02 08:47:52 PM PDT 24 |
3884075572 ps |
| T990 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_meas.865620902 |
|
|
Aug 02 08:50:00 PM PDT 24 |
Aug 02 09:58:49 PM PDT 24 |
15173581528 ps |
| T227 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_rma.2592003458 |
|
|
Aug 02 08:24:32 PM PDT 24 |
Aug 02 08:48:32 PM PDT 24 |
9285826650 ps |
| T991 |
/workspace/coverage/default/0.chip_sw_example_flash.2837013144 |
|
|
Aug 02 08:18:17 PM PDT 24 |
Aug 02 08:21:18 PM PDT 24 |
2898152672 ps |
| T992 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.1216847379 |
|
|
Aug 02 08:28:53 PM PDT 24 |
Aug 02 09:05:46 PM PDT 24 |
9269374968 ps |
| T993 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_rnd.1958243702 |
|
|
Aug 02 08:18:32 PM PDT 24 |
Aug 02 08:35:09 PM PDT 24 |
5760508000 ps |
| T346 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq.341199994 |
|
|
Aug 02 08:21:18 PM PDT 24 |
Aug 02 09:27:15 PM PDT 24 |
17669919966 ps |
| T994 |
/workspace/coverage/default/2.chip_sw_hmac_enc.3246528607 |
|
|
Aug 02 08:39:19 PM PDT 24 |
Aug 02 08:45:53 PM PDT 24 |
2677752012 ps |
| T171 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_rma.2814743111 |
|
|
Aug 02 08:18:43 PM PDT 24 |
Aug 02 09:49:22 PM PDT 24 |
46597879361 ps |
| T293 |
/workspace/coverage/default/0.chip_sw_otbn_mem_scramble.489885139 |
|
|
Aug 02 08:19:19 PM PDT 24 |
Aug 02 08:28:31 PM PDT 24 |
3759256472 ps |
| T251 |
/workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.4192918384 |
|
|
Aug 02 08:56:14 PM PDT 24 |
Aug 02 09:03:35 PM PDT 24 |
4323441128 ps |
| T300 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod.2458342617 |
|
|
Aug 02 08:47:39 PM PDT 24 |
Aug 02 09:45:03 PM PDT 24 |
15275094905 ps |
| T301 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.360836061 |
|
|
Aug 02 08:17:00 PM PDT 24 |
Aug 02 08:26:44 PM PDT 24 |
4871116248 ps |
| T302 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_otp_hw_cfg0.1441811655 |
|
|
Aug 02 08:20:44 PM PDT 24 |
Aug 02 08:26:35 PM PDT 24 |
3223653240 ps |
| T303 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.2712458277 |
|
|
Aug 02 08:35:34 PM PDT 24 |
Aug 02 08:46:30 PM PDT 24 |
4368199366 ps |
| T304 |
/workspace/coverage/default/0.chip_sw_otbn_randomness.3262342703 |
|
|
Aug 02 08:19:35 PM PDT 24 |
Aug 02 08:36:56 PM PDT 24 |
5912442824 ps |
| T305 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.1902063945 |
|
|
Aug 02 08:46:54 PM PDT 24 |
Aug 02 08:55:48 PM PDT 24 |
3847516580 ps |
| T229 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_prod.4252536399 |
|
|
Aug 02 08:19:54 PM PDT 24 |
Aug 02 08:59:32 PM PDT 24 |
10731986064 ps |
| T306 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.1508210936 |
|
|
Aug 02 08:50:14 PM PDT 24 |
Aug 02 08:57:33 PM PDT 24 |
3737978552 ps |
| T307 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.1704474562 |
|
|
Aug 02 08:46:55 PM PDT 24 |
Aug 02 09:04:51 PM PDT 24 |
12222144022 ps |
| T995 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.2899494502 |
|
|
Aug 02 08:41:27 PM PDT 24 |
Aug 02 08:45:35 PM PDT 24 |
3573074165 ps |
| T167 |
/workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.2098239444 |
|
|
Aug 02 08:21:16 PM PDT 24 |
Aug 02 08:58:52 PM PDT 24 |
23215616605 ps |
| T996 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.3963161892 |
|
|
Aug 02 08:37:28 PM PDT 24 |
Aug 02 08:49:50 PM PDT 24 |
5299728798 ps |
| T997 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.4013482382 |
|
|
Aug 02 08:48:36 PM PDT 24 |
Aug 02 09:42:08 PM PDT 24 |
15160801761 ps |
| T998 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_no_meas.876909283 |
|
|
Aug 02 08:47:27 PM PDT 24 |
Aug 02 09:59:08 PM PDT 24 |
15188850178 ps |
| T999 |
/workspace/coverage/default/1.chip_sw_kmac_mode_cshake.3269876515 |
|
|
Aug 02 08:30:37 PM PDT 24 |
Aug 02 08:36:17 PM PDT 24 |
3337463400 ps |
| T1000 |
/workspace/coverage/default/1.chip_sw_power_sleep_load.2949163128 |
|
|
Aug 02 08:32:05 PM PDT 24 |
Aug 02 08:44:18 PM PDT 24 |
11609897450 ps |
| T91 |
/workspace/coverage/default/70.chip_sw_all_escalation_resets.4177923227 |
|
|
Aug 02 08:53:31 PM PDT 24 |
Aug 02 09:04:45 PM PDT 24 |
5181271720 ps |
| T1001 |
/workspace/coverage/default/2.chip_sw_rv_plic_smoketest.1190929961 |
|
|
Aug 02 08:44:17 PM PDT 24 |
Aug 02 08:49:09 PM PDT 24 |
3035849114 ps |
| T343 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.1482731946 |
|
|
Aug 02 08:20:20 PM PDT 24 |
Aug 02 08:39:18 PM PDT 24 |
5682239738 ps |
| T22 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ec_rst_l.2769273502 |
|
|
Aug 02 08:21:50 PM PDT 24 |
Aug 02 09:21:57 PM PDT 24 |
20357516612 ps |
| T1002 |
/workspace/coverage/default/1.chip_sw_aes_masking_off.3636568012 |
|
|
Aug 02 08:27:47 PM PDT 24 |
Aug 02 08:33:44 PM PDT 24 |
3799546833 ps |
| T1003 |
/workspace/coverage/default/3.chip_tap_straps_prod.1025330781 |
|
|
Aug 02 08:43:12 PM PDT 24 |
Aug 02 08:45:41 PM PDT 24 |
2551256739 ps |
| T45 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.2097776333 |
|
|
Aug 02 08:35:06 PM PDT 24 |
Aug 02 08:49:29 PM PDT 24 |
7125529072 ps |
| T1004 |
/workspace/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.1216412944 |
|
|
Aug 02 08:40:03 PM PDT 24 |
Aug 02 09:07:47 PM PDT 24 |
23865511256 ps |
| T826 |
/workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.498170208 |
|
|
Aug 02 08:53:35 PM PDT 24 |
Aug 02 09:00:20 PM PDT 24 |
4043989548 ps |
| T1005 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_req.1766902491 |
|
|
Aug 02 08:22:43 PM PDT 24 |
Aug 02 08:29:24 PM PDT 24 |
4816314200 ps |
| T258 |
/workspace/coverage/default/1.chip_sw_plic_sw_irq.3530821183 |
|
|
Aug 02 08:29:59 PM PDT 24 |
Aug 02 08:34:44 PM PDT 24 |
3133221012 ps |
| T228 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.817793748 |
|
|
Aug 02 08:20:01 PM PDT 24 |
Aug 02 08:47:27 PM PDT 24 |
8770080200 ps |
| T198 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through_collision.2885875034 |
|
|
Aug 02 08:25:25 PM PDT 24 |
Aug 02 08:34:15 PM PDT 24 |
4632077644 ps |
| T751 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.4273933943 |
|
|
Aug 02 08:51:57 PM PDT 24 |
Aug 02 08:58:50 PM PDT 24 |
3350798604 ps |
| T1006 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.235595438 |
|
|
Aug 02 08:21:38 PM PDT 24 |
Aug 02 08:26:13 PM PDT 24 |
2936519724 ps |
| T180 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.2608084843 |
|
|
Aug 02 08:23:26 PM PDT 24 |
Aug 02 08:28:14 PM PDT 24 |
3305231184 ps |
| T168 |
/workspace/coverage/default/0.chip_sw_flash_init.2700622629 |
|
|
Aug 02 08:16:53 PM PDT 24 |
Aug 02 08:56:17 PM PDT 24 |
23051563208 ps |
| T311 |
/workspace/coverage/default/0.chip_sw_csrng_kat_test.1830015977 |
|
|
Aug 02 08:20:23 PM PDT 24 |
Aug 02 08:23:15 PM PDT 24 |
3100829000 ps |
| T55 |
/workspace/coverage/default/0.chip_sw_sleep_pin_retention.532698168 |
|
|
Aug 02 08:21:13 PM PDT 24 |
Aug 02 08:24:36 PM PDT 24 |
3336756300 ps |
| T312 |
/workspace/coverage/default/1.chip_sw_pwrmgr_main_power_glitch_reset.589095554 |
|
|
Aug 02 08:24:04 PM PDT 24 |
Aug 02 08:29:16 PM PDT 24 |
4173849670 ps |
| T74 |
/workspace/coverage/default/0.chip_tap_straps_prod.2582690839 |
|
|
Aug 02 08:18:55 PM PDT 24 |
Aug 02 08:45:42 PM PDT 24 |
13814636414 ps |
| T313 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx2.2571206543 |
|
|
Aug 02 08:24:37 PM PDT 24 |
Aug 02 08:35:16 PM PDT 24 |
5495988304 ps |
| T185 |
/workspace/coverage/default/0.chip_sw_csrng_fuse_en_sw_app_read_test.1152003249 |
|
|
Aug 02 08:19:34 PM PDT 24 |
Aug 02 08:27:05 PM PDT 24 |
3998273560 ps |
| T314 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_bootstrap.2902502851 |
|
|
Aug 02 08:24:58 PM PDT 24 |
Aug 03 12:33:26 AM PDT 24 |
77470355695 ps |
| T315 |
/workspace/coverage/default/0.chip_sw_aes_idle.2521545967 |
|
|
Aug 02 08:22:35 PM PDT 24 |
Aug 02 08:28:00 PM PDT 24 |
2906019546 ps |
| T81 |
/workspace/coverage/default/2.chip_jtag_csr_rw.3401988236 |
|
|
Aug 02 08:33:24 PM PDT 24 |
Aug 02 08:53:03 PM PDT 24 |
10613479013 ps |
| T23 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_outputs.2815949040 |
|
|
Aug 02 08:20:15 PM PDT 24 |
Aug 02 08:26:40 PM PDT 24 |
4069927728 ps |
| T1007 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.1495858587 |
|
|
Aug 02 08:26:07 PM PDT 24 |
Aug 02 08:37:38 PM PDT 24 |
9147466880 ps |
| T1008 |
/workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.1879900384 |
|
|
Aug 02 08:25:01 PM PDT 24 |
Aug 02 09:17:24 PM PDT 24 |
11467620846 ps |
| T1009 |
/workspace/coverage/default/0.chip_sw_uart_smoketest.1246466585 |
|
|
Aug 02 08:26:13 PM PDT 24 |
Aug 02 08:30:56 PM PDT 24 |
3409109914 ps |
| T1010 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq.3987367271 |
|
|
Aug 02 08:37:11 PM PDT 24 |
Aug 02 09:31:34 PM PDT 24 |
17481846216 ps |
| T714 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.2771858762 |
|
|
Aug 02 08:33:00 PM PDT 24 |
Aug 02 08:34:47 PM PDT 24 |
1828060856 ps |
| T793 |
/workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.1449277360 |
|
|
Aug 02 08:55:52 PM PDT 24 |
Aug 02 09:03:08 PM PDT 24 |
3989602492 ps |
| T250 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.3424711367 |
|
|
Aug 02 08:25:19 PM PDT 24 |
Aug 02 08:55:29 PM PDT 24 |
11084397884 ps |
| T1011 |
/workspace/coverage/default/1.chip_sw_hmac_enc.4033647328 |
|
|
Aug 02 08:30:54 PM PDT 24 |
Aug 02 08:34:53 PM PDT 24 |
3227863052 ps |
| T236 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_dev.1620319875 |
|
|
Aug 02 08:38:10 PM PDT 24 |
Aug 02 10:12:04 PM PDT 24 |
49555464591 ps |
| T82 |
/workspace/coverage/default/0.chip_jtag_mem_access.2406289072 |
|
|
Aug 02 08:11:54 PM PDT 24 |
Aug 02 08:39:01 PM PDT 24 |
13377080104 ps |
| T785 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.1608834074 |
|
|
Aug 02 08:52:11 PM PDT 24 |
Aug 02 09:00:33 PM PDT 24 |
4880217356 ps |
| T1012 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_kmac_trans.591431367 |
|
|
Aug 02 08:32:40 PM PDT 24 |
Aug 02 08:39:42 PM PDT 24 |
3914708372 ps |
| T239 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_dev.3068635014 |
|
|
Aug 02 08:19:15 PM PDT 24 |
Aug 02 09:52:27 PM PDT 24 |
50132201604 ps |
| T1013 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.618986501 |
|
|
Aug 02 08:35:19 PM PDT 24 |
Aug 02 08:49:41 PM PDT 24 |
5398447584 ps |
| T770 |
/workspace/coverage/default/4.chip_sw_all_escalation_resets.2810883399 |
|
|
Aug 02 08:43:49 PM PDT 24 |
Aug 02 08:54:33 PM PDT 24 |
5154296680 ps |
| T1014 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.3654143383 |
|
|
Aug 02 08:19:59 PM PDT 24 |
Aug 02 08:31:06 PM PDT 24 |
4100558652 ps |
| T753 |
/workspace/coverage/default/62.chip_sw_alert_handler_lpg_sleep_mode_alerts.2276043282 |
|
|
Aug 02 08:53:29 PM PDT 24 |
Aug 02 08:59:40 PM PDT 24 |
4192408428 ps |
| T715 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.3337042930 |
|
|
Aug 02 08:19:01 PM PDT 24 |
Aug 02 08:20:53 PM PDT 24 |
2496135771 ps |
| T800 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.2338223713 |
|
|
Aug 02 08:51:45 PM PDT 24 |
Aug 02 08:57:37 PM PDT 24 |
3337184132 ps |
| T1015 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.3640960626 |
|
|
Aug 02 08:28:10 PM PDT 24 |
Aug 02 09:31:13 PM PDT 24 |
17333933400 ps |
| T802 |
/workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.3757902940 |
|
|
Aug 02 08:47:45 PM PDT 24 |
Aug 02 08:54:38 PM PDT 24 |
3707041400 ps |
| T1016 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.1034128819 |
|
|
Aug 02 08:22:06 PM PDT 24 |
Aug 02 08:47:10 PM PDT 24 |
9403307874 ps |
| T1017 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.1399716066 |
|
|
Aug 02 08:19:03 PM PDT 24 |
Aug 02 08:28:20 PM PDT 24 |
5230501408 ps |
| T1018 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_power_glitch_reset.763053613 |
|
|
Aug 02 08:21:47 PM PDT 24 |
Aug 02 09:24:28 PM PDT 24 |
46497213381 ps |
| T1019 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_ok.2965619304 |
|
|
Aug 02 08:29:20 PM PDT 24 |
Aug 02 08:58:09 PM PDT 24 |
8207047730 ps |
| T36 |
/workspace/coverage/default/0.chip_sw_spi_host_tx_rx.3046186303 |
|
|
Aug 02 08:21:23 PM PDT 24 |
Aug 02 08:26:06 PM PDT 24 |
3396143188 ps |
| T1020 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.2955789653 |
|
|
Aug 02 08:30:40 PM PDT 24 |
Aug 02 08:41:00 PM PDT 24 |
5521821050 ps |
| T1021 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.275796418 |
|
|
Aug 02 08:24:55 PM PDT 24 |
Aug 02 08:30:38 PM PDT 24 |
5395806140 ps |
| T83 |
/workspace/coverage/default/2.chip_jtag_mem_access.3824766876 |
|
|
Aug 02 08:33:14 PM PDT 24 |
Aug 02 08:54:47 PM PDT 24 |
13358730560 ps |
| T811 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.4173261451 |
|
|
Aug 02 08:48:40 PM PDT 24 |
Aug 02 08:55:51 PM PDT 24 |
3903464514 ps |
| T1022 |
/workspace/coverage/default/2.chip_sw_aes_smoketest.3270878451 |
|
|
Aug 02 08:43:31 PM PDT 24 |
Aug 02 08:49:49 PM PDT 24 |
3380051270 ps |
| T1023 |
/workspace/coverage/default/11.chip_sw_uart_rand_baudrate.2874645303 |
|
|
Aug 02 08:47:36 PM PDT 24 |
Aug 02 08:57:46 PM PDT 24 |
3845827060 ps |
| T207 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_reset.2278702970 |
|
|
Aug 02 08:28:05 PM PDT 24 |
Aug 02 09:00:51 PM PDT 24 |
23697588700 ps |
| T318 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.1496466254 |
|
|
Aug 02 08:32:55 PM PDT 24 |
Aug 02 08:40:13 PM PDT 24 |
3636726956 ps |
| T1024 |
/workspace/coverage/default/2.chip_sw_clkmgr_sleep_frequency.452380183 |
|
|
Aug 02 08:45:10 PM PDT 24 |
Aug 02 08:53:31 PM PDT 24 |
4363225728 ps |
| T1025 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.3166523208 |
|
|
Aug 02 08:51:47 PM PDT 24 |
Aug 02 10:08:20 PM PDT 24 |
15175400998 ps |
| T1026 |
/workspace/coverage/default/0.chip_sw_usbdev_vbus.1988952039 |
|
|
Aug 02 08:16:51 PM PDT 24 |
Aug 02 08:20:39 PM PDT 24 |
3021399428 ps |
| T1027 |
/workspace/coverage/default/2.chip_sw_alert_handler_escalation.4178188152 |
|
|
Aug 02 08:37:59 PM PDT 24 |
Aug 02 08:51:27 PM PDT 24 |
4577710242 ps |
| T1028 |
/workspace/coverage/default/1.chip_sw_edn_kat.3103469495 |
|
|
Aug 02 08:28:32 PM PDT 24 |
Aug 02 08:39:34 PM PDT 24 |
3288563138 ps |
| T53 |
/workspace/coverage/default/1.chip_sw_alert_test.2693446921 |
|
|
Aug 02 08:29:48 PM PDT 24 |
Aug 02 08:34:27 PM PDT 24 |
3088299736 ps |
| T1029 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_wake_5_bug.1648901956 |
|
|
Aug 02 08:20:43 PM PDT 24 |
Aug 02 08:31:05 PM PDT 24 |
5765533278 ps |
| T26 |
/workspace/coverage/default/0.chip_sw_usbdev_dpi.1217015079 |
|
|
Aug 02 08:20:10 PM PDT 24 |
Aug 02 09:12:03 PM PDT 24 |
11406226046 ps |
| T377 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en.4159110477 |
|
|
Aug 02 08:29:54 PM PDT 24 |
Aug 02 08:34:39 PM PDT 24 |
3066521557 ps |
| T716 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.175761677 |
|
|
Aug 02 08:43:56 PM PDT 24 |
Aug 02 08:45:58 PM PDT 24 |
2419039406 ps |
| T1030 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx3.2404129293 |
|
|
Aug 02 08:45:07 PM PDT 24 |
Aug 02 08:56:13 PM PDT 24 |
4284933976 ps |
| T235 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_prod.1434635348 |
|
|
Aug 02 08:38:25 PM PDT 24 |
Aug 02 09:15:09 PM PDT 24 |
12589624800 ps |
| T1031 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_dev.3005745801 |
|
|
Aug 02 08:20:14 PM PDT 24 |
Aug 02 08:41:20 PM PDT 24 |
9030640304 ps |
| T367 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.36226506 |
|
|
Aug 02 08:36:52 PM PDT 24 |
Aug 02 08:46:07 PM PDT 24 |
4341035570 ps |
| T1032 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_prod.3430932636 |
|
|
Aug 02 08:30:38 PM PDT 24 |
Aug 02 09:07:55 PM PDT 24 |
9920788610 ps |
| T156 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.151806825 |
|
|
Aug 02 08:24:33 PM PDT 24 |
Aug 02 08:29:10 PM PDT 24 |
2885980217 ps |
| T1033 |
/workspace/coverage/default/2.chip_sw_power_sleep_load.2727832348 |
|
|
Aug 02 08:42:34 PM PDT 24 |
Aug 02 08:52:53 PM PDT 24 |
10244739232 ps |
| T1034 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.976428363 |
|
|
Aug 02 08:19:34 PM PDT 24 |
Aug 02 08:38:56 PM PDT 24 |
5921013064 ps |
| T771 |
/workspace/coverage/default/87.chip_sw_all_escalation_resets.388748259 |
|
|
Aug 02 08:55:08 PM PDT 24 |
Aug 02 09:04:19 PM PDT 24 |
5047093108 ps |
| T137 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_status.2959244114 |
|
|
Aug 02 08:20:48 PM PDT 24 |
Aug 02 08:26:20 PM PDT 24 |
3440365818 ps |
| T181 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.2054901045 |
|
|
Aug 02 08:29:59 PM PDT 24 |
Aug 02 08:43:55 PM PDT 24 |
7233093975 ps |
| T1035 |
/workspace/coverage/default/72.chip_sw_all_escalation_resets.43905456 |
|
|
Aug 02 08:53:07 PM PDT 24 |
Aug 02 09:03:00 PM PDT 24 |
4905494664 ps |
| T1036 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.1207973261 |
|
|
Aug 02 08:39:08 PM PDT 24 |
Aug 02 08:58:37 PM PDT 24 |
8478096725 ps |
| T1037 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter.3098716671 |
|
|
Aug 02 08:31:06 PM PDT 24 |
Aug 02 08:35:19 PM PDT 24 |
2609237122 ps |
| T748 |
/workspace/coverage/default/85.chip_sw_all_escalation_resets.1630745083 |
|
|
Aug 02 08:55:43 PM PDT 24 |
Aug 02 09:06:46 PM PDT 24 |
5582460520 ps |
| T1038 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.2807298361 |
|
|
Aug 02 08:46:44 PM PDT 24 |
Aug 02 09:20:57 PM PDT 24 |
13607936130 ps |
| T1039 |
/workspace/coverage/default/2.chip_sw_entropy_src_ast_rng_req.2778160271 |
|
|
Aug 02 08:37:42 PM PDT 24 |
Aug 02 08:42:35 PM PDT 24 |
3116176760 ps |
| T1040 |
/workspace/coverage/default/0.chip_sw_kmac_smoketest.1966468547 |
|
|
Aug 02 08:22:13 PM PDT 24 |
Aug 02 08:26:03 PM PDT 24 |
2652986832 ps |
| T772 |
/workspace/coverage/default/64.chip_sw_all_escalation_resets.2046786312 |
|
|
Aug 02 08:53:00 PM PDT 24 |
Aug 02 09:02:44 PM PDT 24 |
4887305350 ps |
| T710 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_escalation_reset.1389229800 |
|
|
Aug 02 08:32:23 PM PDT 24 |
Aug 02 08:41:42 PM PDT 24 |
4471784058 ps |
| T43 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.2443372186 |
|
|
Aug 02 08:18:34 PM PDT 24 |
Aug 02 08:24:07 PM PDT 24 |
3538627721 ps |
| T37 |
/workspace/coverage/default/1.chip_sw_spi_host_tx_rx.3653269781 |
|
|
Aug 02 08:23:57 PM PDT 24 |
Aug 02 08:29:10 PM PDT 24 |
2708739800 ps |
| T812 |
/workspace/coverage/default/16.chip_sw_alert_handler_lpg_sleep_mode_alerts.3388299753 |
|
|
Aug 02 08:47:51 PM PDT 24 |
Aug 02 08:56:55 PM PDT 24 |
3654388072 ps |
| T1041 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.3289702020 |
|
|
Aug 02 08:18:43 PM PDT 24 |
Aug 02 08:22:52 PM PDT 24 |
2527519278 ps |
| T415 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_rst.1481495520 |
|
|
Aug 02 08:24:38 PM PDT 24 |
Aug 02 08:28:09 PM PDT 24 |
2776593248 ps |
| T1042 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.3769183639 |
|
|
Aug 02 08:23:39 PM PDT 24 |
Aug 02 08:26:54 PM PDT 24 |
2160335948 ps |
| T1043 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.2666976401 |
|
|
Aug 02 08:30:42 PM PDT 24 |
Aug 02 08:40:25 PM PDT 24 |
4526975948 ps |
| T691 |
/workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.234807088 |
|
|
Aug 02 08:46:59 PM PDT 24 |
Aug 02 10:19:34 PM PDT 24 |
26924997816 ps |
| T757 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.3036237975 |
|
|
Aug 02 08:51:44 PM PDT 24 |
Aug 02 09:04:52 PM PDT 24 |
4706395856 ps |
| T1044 |
/workspace/coverage/default/2.chip_sw_rv_timer_systick_test.4105007936 |
|
|
Aug 02 08:36:42 PM PDT 24 |
Aug 02 10:28:55 PM PDT 24 |
38574519684 ps |
| T29 |
/workspace/coverage/default/0.chip_sw_gpio.1488586750 |
|
|
Aug 02 08:19:19 PM PDT 24 |
Aug 02 08:28:39 PM PDT 24 |
3911573904 ps |
| T378 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.295401902 |
|
|
Aug 02 08:40:46 PM PDT 24 |
Aug 02 08:47:30 PM PDT 24 |
5802016460 ps |
| T1045 |
/workspace/coverage/default/2.chip_sw_entropy_src_smoketest.1996535014 |
|
|
Aug 02 08:43:36 PM PDT 24 |
Aug 02 08:51:27 PM PDT 24 |
2985346724 ps |
| T199 |
/workspace/coverage/default/0.chip_sw_power_virus.1853303420 |
|
|
Aug 02 08:27:01 PM PDT 24 |
Aug 02 08:53:25 PM PDT 24 |
5565363504 ps |
| T1046 |
/workspace/coverage/default/4.chip_tap_straps_dev.3637491610 |
|
|
Aug 02 08:43:37 PM PDT 24 |
Aug 02 08:48:33 PM PDT 24 |
3641453021 ps |
| T794 |
/workspace/coverage/default/95.chip_sw_all_escalation_resets.2542057638 |
|
|
Aug 02 08:57:06 PM PDT 24 |
Aug 02 09:07:33 PM PDT 24 |
4695545036 ps |
| T807 |
/workspace/coverage/default/42.chip_sw_alert_handler_lpg_sleep_mode_alerts.1106778986 |
|
|
Aug 02 08:50:31 PM PDT 24 |
Aug 02 08:55:51 PM PDT 24 |
3558170408 ps |
| T1047 |
/workspace/coverage/default/9.chip_sw_uart_rand_baudrate.370119368 |
|
|
Aug 02 08:46:43 PM PDT 24 |
Aug 02 08:57:04 PM PDT 24 |
4543777000 ps |
| T1048 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_kmac_trans.1773204424 |
|
|
Aug 02 08:20:02 PM PDT 24 |
Aug 02 08:29:38 PM PDT 24 |
5046522836 ps |
| T1049 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.396838284 |
|
|
Aug 02 08:32:10 PM PDT 24 |
Aug 02 08:54:28 PM PDT 24 |
8619095214 ps |
| T1050 |
/workspace/coverage/default/13.chip_sw_alert_handler_lpg_sleep_mode_alerts.380347636 |
|
|
Aug 02 08:48:07 PM PDT 24 |
Aug 02 08:54:33 PM PDT 24 |
3921463704 ps |
| T774 |
/workspace/coverage/default/3.chip_sw_all_escalation_resets.2870810417 |
|
|
Aug 02 08:43:16 PM PDT 24 |
Aug 02 08:51:31 PM PDT 24 |
5520464696 ps |
| T687 |
/workspace/coverage/default/0.chip_sw_edn_boot_mode.1911663591 |
|
|
Aug 02 08:20:40 PM PDT 24 |
Aug 02 08:30:16 PM PDT 24 |
2724018884 ps |
| T804 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.3213954587 |
|
|
Aug 02 08:47:49 PM PDT 24 |
Aug 02 08:59:21 PM PDT 24 |
5434438740 ps |
| T412 |
/workspace/coverage/default/2.chip_sw_rom_ctrl_integrity_check.1874340238 |
|
|
Aug 02 08:39:36 PM PDT 24 |
Aug 02 08:47:57 PM PDT 24 |
9924844691 ps |
| T1051 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.605158068 |
|
|
Aug 02 08:20:21 PM PDT 24 |
Aug 02 08:34:55 PM PDT 24 |
7630868420 ps |
| T1052 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.631741510 |
|
|
Aug 02 08:33:03 PM PDT 24 |
Aug 02 08:38:34 PM PDT 24 |
3174270920 ps |
| T795 |
/workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.317281973 |
|
|
Aug 02 08:53:28 PM PDT 24 |
Aug 02 09:01:36 PM PDT 24 |
4279379750 ps |
| T366 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.421480944 |
|
|
Aug 02 08:43:13 PM PDT 24 |
Aug 02 08:54:14 PM PDT 24 |
4851757432 ps |
| T1053 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.958868840 |
|
|
Aug 02 08:41:48 PM PDT 24 |
Aug 02 08:56:13 PM PDT 24 |
5976304475 ps |
| T1054 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_ecc_error_vendor_test.865986194 |
|
|
Aug 02 08:27:16 PM PDT 24 |
Aug 02 08:32:15 PM PDT 24 |
2628097692 ps |
| T1055 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.2863974520 |
|
|
Aug 02 08:20:08 PM PDT 24 |
Aug 02 08:34:49 PM PDT 24 |
9756930440 ps |
| T1056 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_power_glitch_reset.159269569 |
|
|
Aug 02 08:37:33 PM PDT 24 |
Aug 02 08:43:43 PM PDT 24 |
5991402723 ps |
| T1057 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_dev.2577481073 |
|
|
Aug 02 08:31:31 PM PDT 24 |
Aug 02 10:43:39 PM PDT 24 |
23623886400 ps |
| T803 |
/workspace/coverage/default/55.chip_sw_alert_handler_lpg_sleep_mode_alerts.3728163735 |
|
|
Aug 02 08:52:04 PM PDT 24 |
Aug 02 08:57:43 PM PDT 24 |
3915561608 ps |
| T243 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prod.2712418277 |
|
|
Aug 02 08:20:12 PM PDT 24 |
Aug 02 09:53:23 PM PDT 24 |
45746223030 ps |
| T1058 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod_end.3809164522 |
|
|
Aug 02 08:28:12 PM PDT 24 |
Aug 02 09:54:33 PM PDT 24 |
24237151324 ps |
| T331 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.3932470826 |
|
|
Aug 02 08:31:15 PM PDT 24 |
Aug 02 08:44:02 PM PDT 24 |
3956457034 ps |
| T1059 |
/workspace/coverage/default/2.chip_sw_edn_kat.377889486 |
|
|
Aug 02 08:40:15 PM PDT 24 |
Aug 02 08:50:55 PM PDT 24 |
3793235656 ps |
| T1060 |
/workspace/coverage/default/82.chip_sw_all_escalation_resets.467648704 |
|
|
Aug 02 08:53:18 PM PDT 24 |
Aug 02 09:03:55 PM PDT 24 |
5461102872 ps |
| T1061 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.1893440132 |
|
|
Aug 02 08:47:20 PM PDT 24 |
Aug 02 08:56:35 PM PDT 24 |
4324680164 ps |
| T58 |
/workspace/coverage/default/2.chip_sw_spi_device_pinmux_sleep_retention.2335299061 |
|
|
Aug 02 08:35:37 PM PDT 24 |
Aug 02 08:39:22 PM PDT 24 |
3218339028 ps |