| T1062 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.4135784027 |
|
|
Aug 02 08:25:47 PM PDT 24 |
Aug 02 10:01:09 PM PDT 24 |
23468722420 ps |
| T1063 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.3276406713 |
|
|
Aug 02 08:32:50 PM PDT 24 |
Aug 02 08:42:20 PM PDT 24 |
3147555366 ps |
| T815 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.1225771143 |
|
|
Aug 02 08:54:56 PM PDT 24 |
Aug 02 09:04:38 PM PDT 24 |
5680225232 ps |
| T1064 |
/workspace/coverage/default/2.chip_sw_edn_sw_mode.3491428243 |
|
|
Aug 02 08:38:10 PM PDT 24 |
Aug 02 09:12:02 PM PDT 24 |
10609595810 ps |
| T1065 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_test_unlocked0.2934869827 |
|
|
Aug 02 08:23:57 PM PDT 24 |
Aug 02 08:35:03 PM PDT 24 |
4262740888 ps |
| T1066 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_invalid_meas.2989182933 |
|
|
Aug 02 08:28:39 PM PDT 24 |
Aug 02 09:26:55 PM PDT 24 |
15510626110 ps |
| T1067 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.3385514843 |
|
|
Aug 02 08:23:36 PM PDT 24 |
Aug 02 08:44:05 PM PDT 24 |
6117921128 ps |
| T61 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.3439226336 |
|
|
Aug 02 08:18:39 PM PDT 24 |
Aug 02 08:24:22 PM PDT 24 |
5744303794 ps |
| T252 |
/workspace/coverage/default/36.chip_sw_alert_handler_lpg_sleep_mode_alerts.3657474207 |
|
|
Aug 02 08:50:21 PM PDT 24 |
Aug 02 08:57:39 PM PDT 24 |
4446180500 ps |
| T1068 |
/workspace/coverage/default/1.chip_sw_kmac_idle.4175233735 |
|
|
Aug 02 08:30:13 PM PDT 24 |
Aug 02 08:34:11 PM PDT 24 |
3344134296 ps |
| T38 |
/workspace/coverage/default/2.chip_sw_spi_host_tx_rx.3903316019 |
|
|
Aug 02 08:34:50 PM PDT 24 |
Aug 02 08:39:05 PM PDT 24 |
2603472912 ps |
| T1069 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.1340812225 |
|
|
Aug 02 08:28:31 PM PDT 24 |
Aug 02 08:44:52 PM PDT 24 |
8756033358 ps |
| T1070 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access.3071906896 |
|
|
Aug 02 08:24:39 PM PDT 24 |
Aug 02 08:42:08 PM PDT 24 |
5265484960 ps |
| T133 |
/workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.685269052 |
|
|
Aug 02 08:43:20 PM PDT 24 |
Aug 02 08:49:31 PM PDT 24 |
4426862984 ps |
| T92 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.3941522794 |
|
|
Aug 02 08:52:09 PM PDT 24 |
Aug 02 09:04:37 PM PDT 24 |
4997285496 ps |
| T294 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.3162981468 |
|
|
Aug 02 08:41:23 PM PDT 24 |
Aug 02 08:50:44 PM PDT 24 |
5274424144 ps |
| T1071 |
/workspace/coverage/default/18.chip_sw_uart_rand_baudrate.2748636162 |
|
|
Aug 02 08:48:13 PM PDT 24 |
Aug 02 09:18:11 PM PDT 24 |
9233626340 ps |
| T1072 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.2627235677 |
|
|
Aug 02 08:24:57 PM PDT 24 |
Aug 02 09:25:33 PM PDT 24 |
15545697600 ps |
| T422 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_wake_ups.1667487648 |
|
|
Aug 02 08:23:08 PM PDT 24 |
Aug 02 08:31:59 PM PDT 24 |
7716487704 ps |
| T270 |
/workspace/coverage/default/1.chip_sw_rstmgr_cpu_info.410749997 |
|
|
Aug 02 08:25:19 PM PDT 24 |
Aug 02 08:33:58 PM PDT 24 |
4229064754 ps |
| T182 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.185143575 |
|
|
Aug 02 08:30:57 PM PDT 24 |
Aug 02 08:34:09 PM PDT 24 |
2931357054 ps |
| T93 |
/workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.1501210434 |
|
|
Aug 02 08:53:25 PM PDT 24 |
Aug 02 08:58:48 PM PDT 24 |
3087770414 ps |
| T1073 |
/workspace/coverage/default/17.chip_sw_uart_rand_baudrate.265037904 |
|
|
Aug 02 08:47:15 PM PDT 24 |
Aug 02 08:56:24 PM PDT 24 |
4280321720 ps |
| T817 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.4166910556 |
|
|
Aug 02 08:50:25 PM PDT 24 |
Aug 02 08:57:25 PM PDT 24 |
3522000136 ps |
| T1074 |
/workspace/coverage/default/4.chip_sw_csrng_edn_concurrency.4271497850 |
|
|
Aug 02 08:45:50 PM PDT 24 |
Aug 02 09:41:05 PM PDT 24 |
15108731118 ps |
| T1075 |
/workspace/coverage/default/14.chip_sw_uart_rand_baudrate.3124198360 |
|
|
Aug 02 08:48:20 PM PDT 24 |
Aug 02 09:30:58 PM PDT 24 |
13186555800 ps |
| T1076 |
/workspace/coverage/default/26.chip_sw_alert_handler_lpg_sleep_mode_alerts.2065978304 |
|
|
Aug 02 08:49:20 PM PDT 24 |
Aug 02 08:56:29 PM PDT 24 |
3929777656 ps |
| T1077 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.3409868438 |
|
|
Aug 02 08:26:42 PM PDT 24 |
Aug 02 09:48:34 PM PDT 24 |
15889473480 ps |
| T230 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.52426715 |
|
|
Aug 02 08:30:36 PM PDT 24 |
Aug 02 08:59:24 PM PDT 24 |
7214961810 ps |
| T211 |
/workspace/coverage/default/1.chip_sw_gpio_smoketest.645558836 |
|
|
Aug 02 08:33:31 PM PDT 24 |
Aug 02 08:39:54 PM PDT 24 |
3639318634 ps |
| T1078 |
/workspace/coverage/default/0.rom_e2e_asm_init_rma.2421169737 |
|
|
Aug 02 08:25:53 PM PDT 24 |
Aug 02 09:33:33 PM PDT 24 |
14960481824 ps |
| T1079 |
/workspace/coverage/default/2.chip_sw_aon_timer_smoketest.3876064921 |
|
|
Aug 02 08:43:12 PM PDT 24 |
Aug 02 08:48:16 PM PDT 24 |
3326412020 ps |
| T1080 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.3040490285 |
|
|
Aug 02 08:43:41 PM PDT 24 |
Aug 02 08:48:05 PM PDT 24 |
2844794326 ps |
| T76 |
/workspace/coverage/default/0.chip_sw_usbdev_pincfg.2858824783 |
|
|
Aug 02 08:18:47 PM PDT 24 |
Aug 02 10:25:44 PM PDT 24 |
31944322876 ps |
| T174 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_test_locked0_to_scrap.3131224093 |
|
|
Aug 02 08:17:38 PM PDT 24 |
Aug 02 08:19:39 PM PDT 24 |
3155066192 ps |
| T1081 |
/workspace/coverage/default/0.chip_sw_entropy_src_ast_rng_req.474292805 |
|
|
Aug 02 08:18:57 PM PDT 24 |
Aug 02 08:24:21 PM PDT 24 |
3258220376 ps |
| T341 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.4197483939 |
|
|
Aug 02 08:21:57 PM PDT 24 |
Aug 02 08:49:48 PM PDT 24 |
11029317470 ps |
| T1082 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.3935745004 |
|
|
Aug 02 08:30:44 PM PDT 24 |
Aug 02 08:41:16 PM PDT 24 |
3500742380 ps |
| T788 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.2949709363 |
|
|
Aug 02 08:49:23 PM PDT 24 |
Aug 02 09:00:52 PM PDT 24 |
6227020472 ps |
| T1083 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.4250027820 |
|
|
Aug 02 08:32:24 PM PDT 24 |
Aug 02 08:51:16 PM PDT 24 |
5705118014 ps |
| T717 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.2928695716 |
|
|
Aug 02 08:19:09 PM PDT 24 |
Aug 02 08:21:12 PM PDT 24 |
2640765751 ps |
| T1084 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_wakeup.722213614 |
|
|
Aug 02 08:31:49 PM PDT 24 |
Aug 02 08:39:52 PM PDT 24 |
5964554560 ps |
| T823 |
/workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.3255992678 |
|
|
Aug 02 08:51:02 PM PDT 24 |
Aug 02 08:58:57 PM PDT 24 |
4264408408 ps |
| T1085 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2881885589 |
|
|
Aug 02 08:44:29 PM PDT 24 |
Aug 02 09:00:43 PM PDT 24 |
7718453506 ps |
| T150 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.4060344544 |
|
|
Aug 02 08:40:00 PM PDT 24 |
Aug 02 08:51:48 PM PDT 24 |
3643511574 ps |
| T364 |
/workspace/coverage/default/13.chip_sw_all_escalation_resets.1181466804 |
|
|
Aug 02 08:49:15 PM PDT 24 |
Aug 02 08:59:01 PM PDT 24 |
5984910478 ps |
| T1086 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac.492926788 |
|
|
Aug 02 08:18:06 PM PDT 24 |
Aug 02 08:22:29 PM PDT 24 |
2670541684 ps |
| T1087 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3918102259 |
|
|
Aug 02 08:40:57 PM PDT 24 |
Aug 02 08:45:28 PM PDT 24 |
3164445311 ps |
| T1088 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.2982726338 |
|
|
Aug 02 08:24:51 PM PDT 24 |
Aug 02 09:37:31 PM PDT 24 |
16176104410 ps |
| T791 |
/workspace/coverage/default/84.chip_sw_all_escalation_resets.1307222841 |
|
|
Aug 02 08:54:30 PM PDT 24 |
Aug 02 09:03:35 PM PDT 24 |
6058985532 ps |
| T1089 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_por_reset.2376783435 |
|
|
Aug 02 08:40:03 PM PDT 24 |
Aug 02 08:54:08 PM PDT 24 |
5572568686 ps |
| T745 |
/workspace/coverage/default/38.chip_sw_all_escalation_resets.1092323937 |
|
|
Aug 02 08:49:25 PM PDT 24 |
Aug 02 08:58:29 PM PDT 24 |
4223761112 ps |
| T271 |
/workspace/coverage/default/56.chip_sw_all_escalation_resets.457495679 |
|
|
Aug 02 08:52:56 PM PDT 24 |
Aug 02 08:59:53 PM PDT 24 |
4509077172 ps |
| T1090 |
/workspace/coverage/default/1.chip_sw_csrng_lc_hw_debug_en_test.2639948697 |
|
|
Aug 02 08:29:54 PM PDT 24 |
Aug 02 08:41:52 PM PDT 24 |
6545536840 ps |
| T741 |
/workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.2963400256 |
|
|
Aug 02 08:52:39 PM PDT 24 |
Aug 02 08:59:28 PM PDT 24 |
3558016264 ps |
| T1091 |
/workspace/coverage/default/2.chip_sw_alert_handler_entropy.2594249644 |
|
|
Aug 02 08:37:35 PM PDT 24 |
Aug 02 08:41:54 PM PDT 24 |
3643165317 ps |
| T40 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.3280823466 |
|
|
Aug 02 08:26:28 PM PDT 24 |
Aug 02 08:34:46 PM PDT 24 |
5703619560 ps |
| T1092 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.1518887621 |
|
|
Aug 02 08:31:30 PM PDT 24 |
Aug 02 08:42:42 PM PDT 24 |
4804039140 ps |
| T1093 |
/workspace/coverage/default/2.chip_sw_aes_idle.1088398126 |
|
|
Aug 02 08:36:34 PM PDT 24 |
Aug 02 08:41:01 PM PDT 24 |
2805798320 ps |
| T1094 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_write_clear.3978144449 |
|
|
Aug 02 08:41:01 PM PDT 24 |
Aug 02 08:46:34 PM PDT 24 |
2730436828 ps |
| T1095 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.2559539019 |
|
|
Aug 02 08:48:00 PM PDT 24 |
Aug 02 08:58:00 PM PDT 24 |
4590383200 ps |
| T203 |
/workspace/coverage/default/1.chip_jtag_mem_access.3716114376 |
|
|
Aug 02 08:23:40 PM PDT 24 |
Aug 02 08:48:44 PM PDT 24 |
13902858254 ps |
| T808 |
/workspace/coverage/default/44.chip_sw_all_escalation_resets.3431636492 |
|
|
Aug 02 08:50:06 PM PDT 24 |
Aug 02 08:59:07 PM PDT 24 |
5087615080 ps |
| T1096 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.3030005383 |
|
|
Aug 02 08:41:33 PM PDT 24 |
Aug 02 08:44:33 PM PDT 24 |
2836257048 ps |
| T1097 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.2410486731 |
|
|
Aug 02 08:27:07 PM PDT 24 |
Aug 02 08:37:50 PM PDT 24 |
4689732644 ps |
| T798 |
/workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.755405162 |
|
|
Aug 02 08:55:58 PM PDT 24 |
Aug 02 09:01:36 PM PDT 24 |
3915552162 ps |
| T1098 |
/workspace/coverage/default/1.chip_tap_straps_prod.4283507397 |
|
|
Aug 02 08:30:31 PM PDT 24 |
Aug 02 08:33:52 PM PDT 24 |
2712390294 ps |
| T796 |
/workspace/coverage/default/89.chip_sw_all_escalation_resets.1782675918 |
|
|
Aug 02 08:54:48 PM PDT 24 |
Aug 02 09:02:36 PM PDT 24 |
4938487168 ps |
| T1099 |
/workspace/coverage/default/4.chip_tap_straps_prod.2094024289 |
|
|
Aug 02 08:44:19 PM PDT 24 |
Aug 02 09:10:36 PM PDT 24 |
16995763895 ps |
| T349 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.2555170962 |
|
|
Aug 02 08:25:44 PM PDT 24 |
Aug 02 08:37:02 PM PDT 24 |
4056678328 ps |
| T1100 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.738193067 |
|
|
Aug 02 08:20:40 PM PDT 24 |
Aug 02 08:27:23 PM PDT 24 |
3187413728 ps |
| T240 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_lc_rw_en.299214306 |
|
|
Aug 02 08:34:32 PM PDT 24 |
Aug 02 08:43:59 PM PDT 24 |
4483000432 ps |
| T711 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.2137943808 |
|
|
Aug 02 08:19:28 PM PDT 24 |
Aug 02 08:29:39 PM PDT 24 |
6080705000 ps |
| T272 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.2420689377 |
|
|
Aug 02 08:48:50 PM PDT 24 |
Aug 02 08:57:25 PM PDT 24 |
5343432090 ps |
| T1101 |
/workspace/coverage/default/3.chip_tap_straps_dev.1210013833 |
|
|
Aug 02 08:43:09 PM PDT 24 |
Aug 02 08:54:02 PM PDT 24 |
7090969073 ps |
| T232 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.2713108241 |
|
|
Aug 02 08:39:19 PM PDT 24 |
Aug 02 09:27:35 PM PDT 24 |
11143658268 ps |
| T186 |
/workspace/coverage/default/0.chip_sw_flash_rma_unlocked.500870249 |
|
|
Aug 02 08:20:44 PM PDT 24 |
Aug 02 09:37:03 PM PDT 24 |
42408279938 ps |
| T337 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.3819137786 |
|
|
Aug 02 08:31:01 PM PDT 24 |
Aug 02 08:51:17 PM PDT 24 |
6047505764 ps |
| T822 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.2021228706 |
|
|
Aug 02 08:27:55 PM PDT 24 |
Aug 02 08:35:13 PM PDT 24 |
4109986274 ps |
| T1102 |
/workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.2519040839 |
|
|
Aug 02 08:20:08 PM PDT 24 |
Aug 02 08:27:47 PM PDT 24 |
7301621768 ps |
| T360 |
/workspace/coverage/default/2.chip_sw_pattgen_ios.3371126574 |
|
|
Aug 02 08:35:08 PM PDT 24 |
Aug 02 08:40:46 PM PDT 24 |
2701760840 ps |
| T1103 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.2823809069 |
|
|
Aug 02 08:39:20 PM PDT 24 |
Aug 02 08:45:11 PM PDT 24 |
2733474514 ps |
| T1104 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.3888559312 |
|
|
Aug 02 08:26:32 PM PDT 24 |
Aug 02 08:47:04 PM PDT 24 |
12566647231 ps |
| T1105 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_otp_hw_cfg0.2989164311 |
|
|
Aug 02 08:35:28 PM PDT 24 |
Aug 02 08:40:11 PM PDT 24 |
3300349386 ps |
| T1106 |
/workspace/coverage/default/0.chip_sw_rstmgr_rst_cnsty_escalation.1738328896 |
|
|
Aug 02 08:20:53 PM PDT 24 |
Aug 02 08:29:25 PM PDT 24 |
5643223592 ps |
| T1107 |
/workspace/coverage/default/2.chip_sw_power_idle_load.3900340546 |
|
|
Aug 02 08:42:17 PM PDT 24 |
Aug 02 08:53:31 PM PDT 24 |
4578012634 ps |
| T56 |
/workspace/coverage/default/1.chip_jtag_csr_rw.2982757671 |
|
|
Aug 02 08:23:40 PM PDT 24 |
Aug 02 08:42:41 PM PDT 24 |
13241808250 ps |
| T423 |
/workspace/coverage/default/0.rom_e2e_self_hash.3253527366 |
|
|
Aug 02 08:29:44 PM PDT 24 |
Aug 02 10:00:07 PM PDT 24 |
25284241640 ps |
| T424 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.3823631459 |
|
|
Aug 02 08:37:22 PM PDT 24 |
Aug 02 08:44:22 PM PDT 24 |
6336295318 ps |
| T425 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.161557880 |
|
|
Aug 02 08:26:36 PM PDT 24 |
Aug 02 10:12:32 PM PDT 24 |
24646143008 ps |
| T241 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_lc_rw_en.4030865358 |
|
|
Aug 02 08:23:13 PM PDT 24 |
Aug 02 08:30:38 PM PDT 24 |
5030838515 ps |
| T426 |
/workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.2235610722 |
|
|
Aug 02 08:46:28 PM PDT 24 |
Aug 02 08:53:17 PM PDT 24 |
3042800096 ps |
| T427 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.3426042090 |
|
|
Aug 02 08:30:20 PM PDT 24 |
Aug 02 09:35:59 PM PDT 24 |
15349589446 ps |
| T322 |
/workspace/coverage/default/71.chip_sw_all_escalation_resets.2611145596 |
|
|
Aug 02 08:53:52 PM PDT 24 |
Aug 02 09:05:06 PM PDT 24 |
6267730836 ps |
| T175 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_raw_to_scrap.1454814888 |
|
|
Aug 02 08:20:22 PM PDT 24 |
Aug 02 08:23:22 PM PDT 24 |
3487178142 ps |
| T94 |
/workspace/coverage/default/92.chip_sw_all_escalation_resets.627741631 |
|
|
Aug 02 08:55:01 PM PDT 24 |
Aug 02 09:06:09 PM PDT 24 |
5767351246 ps |
| T1108 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.295197021 |
|
|
Aug 02 08:18:04 PM PDT 24 |
Aug 02 08:22:33 PM PDT 24 |
3457353410 ps |
| T813 |
/workspace/coverage/default/37.chip_sw_all_escalation_resets.2956582523 |
|
|
Aug 02 08:48:52 PM PDT 24 |
Aug 02 08:59:43 PM PDT 24 |
5668715432 ps |
| T344 |
/workspace/coverage/default/2.chip_sw_entropy_src_csrng.4176164559 |
|
|
Aug 02 08:39:40 PM PDT 24 |
Aug 02 08:59:28 PM PDT 24 |
6306736556 ps |
| T1109 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.3479589488 |
|
|
Aug 02 08:30:09 PM PDT 24 |
Aug 02 08:47:34 PM PDT 24 |
12958132358 ps |
| T1110 |
/workspace/coverage/default/2.chip_sw_pwrmgr_wdog_reset.424976040 |
|
|
Aug 02 08:36:45 PM PDT 24 |
Aug 02 08:47:39 PM PDT 24 |
5745583660 ps |
| T281 |
/workspace/coverage/default/2.chip_sw_data_integrity_escalation.235372737 |
|
|
Aug 02 08:37:41 PM PDT 24 |
Aug 02 08:51:58 PM PDT 24 |
5477914510 ps |
| T283 |
/workspace/coverage/default/0.chip_sw_aon_timer_smoketest.4104351345 |
|
|
Aug 02 08:21:17 PM PDT 24 |
Aug 02 08:25:13 PM PDT 24 |
3354120928 ps |
| T284 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.3055631588 |
|
|
Aug 02 08:28:09 PM PDT 24 |
Aug 02 09:34:08 PM PDT 24 |
18781137523 ps |
| T285 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.3070312936 |
|
|
Aug 02 08:48:19 PM PDT 24 |
Aug 02 08:55:48 PM PDT 24 |
4482352244 ps |
| T286 |
/workspace/coverage/default/1.rom_e2e_asm_init_rma.1028856785 |
|
|
Aug 02 08:41:23 PM PDT 24 |
Aug 02 09:46:30 PM PDT 24 |
15095961663 ps |
| T287 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.1877562602 |
|
|
Aug 02 08:45:02 PM PDT 24 |
Aug 02 08:54:00 PM PDT 24 |
4524132098 ps |
| T288 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.1833902531 |
|
|
Aug 02 08:33:43 PM PDT 24 |
Aug 02 08:38:28 PM PDT 24 |
2984634596 ps |
| T289 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod_end.2984237493 |
|
|
Aug 02 08:42:00 PM PDT 24 |
Aug 02 09:57:13 PM PDT 24 |
15929304060 ps |
| T183 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.1072451625 |
|
|
Aug 02 08:46:07 PM PDT 24 |
Aug 02 08:49:48 PM PDT 24 |
2939340760 ps |
| T290 |
/workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.737545103 |
|
|
Aug 02 08:28:40 PM PDT 24 |
Aug 02 08:36:11 PM PDT 24 |
3341974028 ps |
| T1111 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_reset_reqs.3129380924 |
|
|
Aug 02 08:27:03 PM PDT 24 |
Aug 02 09:11:29 PM PDT 24 |
24573455385 ps |
| T335 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.2761233053 |
|
|
Aug 02 08:42:18 PM PDT 24 |
Aug 02 08:55:57 PM PDT 24 |
4842929384 ps |
| T737 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.3960461121 |
|
|
Aug 02 08:53:52 PM PDT 24 |
Aug 02 08:59:23 PM PDT 24 |
3566274470 ps |
| T1112 |
/workspace/coverage/default/59.chip_sw_all_escalation_resets.917728186 |
|
|
Aug 02 08:53:07 PM PDT 24 |
Aug 02 09:00:40 PM PDT 24 |
5326179576 ps |
| T308 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.2197359959 |
|
|
Aug 02 08:42:49 PM PDT 24 |
Aug 02 08:47:45 PM PDT 24 |
3526458313 ps |
| T1113 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.266855371 |
|
|
Aug 02 08:23:09 PM PDT 24 |
Aug 02 08:48:26 PM PDT 24 |
9305227008 ps |
| T1114 |
/workspace/coverage/default/33.chip_sw_all_escalation_resets.2980990978 |
|
|
Aug 02 08:48:18 PM PDT 24 |
Aug 02 08:57:46 PM PDT 24 |
4849527704 ps |
| T1115 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_wakeup.4260533584 |
|
|
Aug 02 08:24:19 PM PDT 24 |
Aug 02 08:30:41 PM PDT 24 |
5647280370 ps |
| T1116 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2625863851 |
|
|
Aug 02 08:22:01 PM PDT 24 |
Aug 02 08:33:24 PM PDT 24 |
5076797182 ps |
| T1117 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_req.2755719304 |
|
|
Aug 02 08:36:54 PM PDT 24 |
Aug 02 08:45:39 PM PDT 24 |
4939330126 ps |
| T1118 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod.2812913937 |
|
|
Aug 02 08:28:02 PM PDT 24 |
Aug 02 09:25:16 PM PDT 24 |
14864813420 ps |
| T1119 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx2.3384424397 |
|
|
Aug 02 08:45:56 PM PDT 24 |
Aug 02 08:58:42 PM PDT 24 |
3629661896 ps |
| T1120 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_rma.4200166763 |
|
|
Aug 02 08:30:16 PM PDT 24 |
Aug 02 09:34:19 PM PDT 24 |
15598834732 ps |
| T59 |
/workspace/coverage/default/1.chip_sw_spi_device_pinmux_sleep_retention.4197414336 |
|
|
Aug 02 08:25:16 PM PDT 24 |
Aug 02 08:30:22 PM PDT 24 |
4154481878 ps |
| T30 |
/workspace/coverage/default/2.chip_sw_gpio.2457910393 |
|
|
Aug 02 08:35:00 PM PDT 24 |
Aug 02 08:42:25 PM PDT 24 |
4419745908 ps |
| T1121 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_rma.293017325 |
|
|
Aug 02 08:26:37 PM PDT 24 |
Aug 02 09:35:29 PM PDT 24 |
14958305370 ps |
| T163 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_program_error.182507279 |
|
|
Aug 02 08:30:51 PM PDT 24 |
Aug 02 08:39:30 PM PDT 24 |
5479180048 ps |
| T1122 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.1273351579 |
|
|
Aug 02 08:37:46 PM PDT 24 |
Aug 02 09:01:28 PM PDT 24 |
7301873264 ps |
| T66 |
/workspace/coverage/default/4.chip_tap_straps_testunlock0.3654037456 |
|
|
Aug 02 08:43:20 PM PDT 24 |
Aug 02 08:45:59 PM PDT 24 |
2450295593 ps |
| T1123 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.4187987542 |
|
|
Aug 02 08:39:32 PM PDT 24 |
Aug 02 08:51:23 PM PDT 24 |
4922897976 ps |
| T1124 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3565629230 |
|
|
Aug 02 08:32:04 PM PDT 24 |
Aug 02 08:36:50 PM PDT 24 |
3045752921 ps |
| T242 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.121149921 |
|
|
Aug 02 08:19:24 PM PDT 24 |
Aug 02 08:25:01 PM PDT 24 |
4887294644 ps |
| T1125 |
/workspace/coverage/default/7.chip_sw_lc_ctrl_transition.790806304 |
|
|
Aug 02 08:46:14 PM PDT 24 |
Aug 02 09:03:34 PM PDT 24 |
11615053009 ps |
| T1126 |
/workspace/coverage/default/1.chip_sival_flash_info_access.2019488318 |
|
|
Aug 02 08:23:20 PM PDT 24 |
Aug 02 08:27:30 PM PDT 24 |
2372252488 ps |
| T819 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.4156748381 |
|
|
Aug 02 08:49:00 PM PDT 24 |
Aug 02 08:59:41 PM PDT 24 |
5430335020 ps |
| T1127 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.297374073 |
|
|
Aug 02 08:18:24 PM PDT 24 |
Aug 02 08:24:57 PM PDT 24 |
7217119127 ps |
| T1128 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.277457520 |
|
|
Aug 02 08:24:12 PM PDT 24 |
Aug 02 08:29:23 PM PDT 24 |
3488420871 ps |
| T54 |
/workspace/coverage/default/2.chip_sw_alert_test.2268648731 |
|
|
Aug 02 08:38:26 PM PDT 24 |
Aug 02 08:43:16 PM PDT 24 |
2674145710 ps |
| T1129 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.2617044854 |
|
|
Aug 02 08:30:45 PM PDT 24 |
Aug 02 08:39:42 PM PDT 24 |
5036901760 ps |
| T1130 |
/workspace/coverage/default/2.chip_sw_hmac_multistream.3047107053 |
|
|
Aug 02 08:40:46 PM PDT 24 |
Aug 02 09:13:22 PM PDT 24 |
7838002654 ps |
| T1131 |
/workspace/coverage/default/2.chip_sw_kmac_app_rom.1034169331 |
|
|
Aug 02 08:38:55 PM PDT 24 |
Aug 02 08:42:23 PM PDT 24 |
3395716340 ps |
| T204 |
/workspace/coverage/default/0.chip_jtag_csr_rw.4021909029 |
|
|
Aug 02 08:11:45 PM PDT 24 |
Aug 02 08:15:58 PM PDT 24 |
4066847138 ps |
| T1132 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.811898373 |
|
|
Aug 02 08:49:05 PM PDT 24 |
Aug 02 09:00:55 PM PDT 24 |
4985099384 ps |
| T282 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.1258522588 |
|
|
Aug 02 08:21:54 PM PDT 24 |
Aug 02 08:36:05 PM PDT 24 |
5202489104 ps |
| T1133 |
/workspace/coverage/default/12.chip_sw_uart_rand_baudrate.1561462456 |
|
|
Aug 02 08:47:10 PM PDT 24 |
Aug 02 08:56:17 PM PDT 24 |
3885665154 ps |
| T1134 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_dev.2549625090 |
|
|
Aug 02 08:27:46 PM PDT 24 |
Aug 02 09:47:46 PM PDT 24 |
14392226976 ps |
| T200 |
/workspace/coverage/default/1.chip_sw_power_virus.2685708982 |
|
|
Aug 02 08:36:20 PM PDT 24 |
Aug 02 09:00:37 PM PDT 24 |
6233583688 ps |
| T1135 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_timeout.987356246 |
|
|
Aug 02 08:18:36 PM PDT 24 |
Aug 02 08:28:34 PM PDT 24 |
5301119888 ps |
| T688 |
/workspace/coverage/default/1.chip_sw_edn_boot_mode.2368116910 |
|
|
Aug 02 08:28:27 PM PDT 24 |
Aug 02 08:40:12 PM PDT 24 |
3136171980 ps |
| T1136 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.4137006231 |
|
|
Aug 02 08:36:19 PM PDT 24 |
Aug 02 08:55:00 PM PDT 24 |
10301621887 ps |
| T805 |
/workspace/coverage/default/74.chip_sw_all_escalation_resets.2243283309 |
|
|
Aug 02 08:53:37 PM PDT 24 |
Aug 02 09:01:42 PM PDT 24 |
4072765740 ps |
| T1137 |
/workspace/coverage/default/19.chip_sw_uart_rand_baudrate.3071248310 |
|
|
Aug 02 08:47:42 PM PDT 24 |
Aug 02 08:56:27 PM PDT 24 |
4038675200 ps |
| T1138 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en.3619452545 |
|
|
Aug 02 08:38:37 PM PDT 24 |
Aug 02 09:41:43 PM PDT 24 |
19308218158 ps |
| T237 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.3133937687 |
|
|
Aug 02 08:36:48 PM PDT 24 |
Aug 02 10:05:59 PM PDT 24 |
50793205004 ps |
| T1139 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.63227327 |
|
|
Aug 02 08:28:49 PM PDT 24 |
Aug 02 08:49:34 PM PDT 24 |
6051711560 ps |
| T1140 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_no_scramble.2949503944 |
|
|
Aug 02 08:21:12 PM PDT 24 |
Aug 02 08:33:43 PM PDT 24 |
9199922316 ps |
| T781 |
/workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.3739036120 |
|
|
Aug 02 08:53:21 PM PDT 24 |
Aug 02 08:59:46 PM PDT 24 |
3394446256 ps |
| T1141 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.2971705686 |
|
|
Aug 02 08:23:30 PM PDT 24 |
Aug 02 08:28:23 PM PDT 24 |
3364976600 ps |
| T801 |
/workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.1012436192 |
|
|
Aug 02 08:51:52 PM PDT 24 |
Aug 02 08:58:09 PM PDT 24 |
3187359416 ps |
| T384 |
/workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.2134153293 |
|
|
Aug 02 08:54:26 PM PDT 24 |
Aug 02 09:01:12 PM PDT 24 |
3822820280 ps |
| T1142 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_por_reset.3771222130 |
|
|
Aug 02 08:18:03 PM PDT 24 |
Aug 02 08:28:51 PM PDT 24 |
5694836419 ps |
| T1143 |
/workspace/coverage/default/1.chip_sw_flash_init.562621356 |
|
|
Aug 02 08:23:23 PM PDT 24 |
Aug 02 08:50:02 PM PDT 24 |
23089302246 ps |
| T1144 |
/workspace/coverage/default/1.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.1586829833 |
|
|
Aug 02 08:26:22 PM PDT 24 |
Aug 02 08:35:24 PM PDT 24 |
18427487240 ps |
| T1145 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.3562141318 |
|
|
Aug 02 08:38:56 PM PDT 24 |
Aug 02 08:47:12 PM PDT 24 |
5124531632 ps |
| T259 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.1528603530 |
|
|
Aug 02 08:19:23 PM PDT 24 |
Aug 02 08:23:26 PM PDT 24 |
3125346536 ps |
| T1146 |
/workspace/coverage/default/1.chip_sw_rv_plic_smoketest.4158799802 |
|
|
Aug 02 08:33:30 PM PDT 24 |
Aug 02 08:39:06 PM PDT 24 |
2657333374 ps |
| T1147 |
/workspace/coverage/default/2.chip_sw_csrng_smoketest.1186868646 |
|
|
Aug 02 08:43:31 PM PDT 24 |
Aug 02 08:48:18 PM PDT 24 |
3308743424 ps |
| T1148 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.2253011349 |
|
|
Aug 02 08:24:39 PM PDT 24 |
Aug 02 08:33:25 PM PDT 24 |
6891548816 ps |
| T786 |
/workspace/coverage/default/19.chip_sw_alert_handler_lpg_sleep_mode_alerts.3054835989 |
|
|
Aug 02 08:49:40 PM PDT 24 |
Aug 02 08:54:48 PM PDT 24 |
3795671230 ps |
| T829 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.1228381714 |
|
|
Aug 02 08:50:26 PM PDT 24 |
Aug 02 08:57:33 PM PDT 24 |
4102162150 ps |
| T1149 |
/workspace/coverage/default/4.chip_sw_uart_rand_baudrate.2821232339 |
|
|
Aug 02 08:44:39 PM PDT 24 |
Aug 02 09:09:42 PM PDT 24 |
9034325300 ps |
| T31 |
/workspace/coverage/default/1.chip_sw_gpio.833843169 |
|
|
Aug 02 08:21:57 PM PDT 24 |
Aug 02 08:28:13 PM PDT 24 |
4314457949 ps |
| T148 |
/workspace/coverage/default/2.rom_raw_unlock.1145868849 |
|
|
Aug 02 08:42:47 PM PDT 24 |
Aug 02 08:47:29 PM PDT 24 |
6391582773 ps |
| T126 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.1532150821 |
|
|
Aug 02 08:40:40 PM PDT 24 |
Aug 02 08:49:19 PM PDT 24 |
5237430736 ps |
| T1150 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_write_clear.3981617330 |
|
|
Aug 02 08:30:59 PM PDT 24 |
Aug 02 08:35:24 PM PDT 24 |
3557305120 ps |
| T1151 |
/workspace/coverage/default/90.chip_sw_all_escalation_resets.2213302663 |
|
|
Aug 02 08:54:28 PM PDT 24 |
Aug 02 09:03:53 PM PDT 24 |
5103924160 ps |
| T1152 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.2458968463 |
|
|
Aug 02 08:47:52 PM PDT 24 |
Aug 02 08:55:17 PM PDT 24 |
5498527419 ps |
| T1153 |
/workspace/coverage/default/1.chip_sw_pwrmgr_usbdev_smoketest.3081457420 |
|
|
Aug 02 08:32:23 PM PDT 24 |
Aug 02 08:38:43 PM PDT 24 |
4772186806 ps |
| T1154 |
/workspace/coverage/default/3.chip_sw_uart_rand_baudrate.2290474390 |
|
|
Aug 02 08:43:05 PM PDT 24 |
Aug 02 08:55:06 PM PDT 24 |
4820602040 ps |
| T1155 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx.2137922337 |
|
|
Aug 02 08:43:17 PM PDT 24 |
Aug 02 08:56:21 PM PDT 24 |
4516927180 ps |
| T379 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.3071355531 |
|
|
Aug 02 08:30:37 PM PDT 24 |
Aug 02 08:40:38 PM PDT 24 |
7108594532 ps |
| T1156 |
/workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.1809524935 |
|
|
Aug 02 08:54:03 PM PDT 24 |
Aug 02 08:59:47 PM PDT 24 |
4181841300 ps |
| T1157 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.996907045 |
|
|
Aug 02 08:40:48 PM PDT 24 |
Aug 02 08:45:42 PM PDT 24 |
3216228358 ps |
| T1158 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.3061935772 |
|
|
Aug 02 08:36:43 PM PDT 24 |
Aug 02 08:48:56 PM PDT 24 |
5037196734 ps |
| T1159 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx2.3516008965 |
|
|
Aug 02 08:17:49 PM PDT 24 |
Aug 02 08:29:02 PM PDT 24 |
4428147424 ps |
| T1160 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.2424832821 |
|
|
Aug 02 08:36:48 PM PDT 24 |
Aug 02 08:57:38 PM PDT 24 |
10076873556 ps |
| T273 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.3901823225 |
|
|
Aug 02 08:35:34 PM PDT 24 |
Aug 02 08:45:26 PM PDT 24 |
4439410990 ps |
| T1161 |
/workspace/coverage/default/2.chip_sw_uart_rand_baudrate.1052043053 |
|
|
Aug 02 08:37:23 PM PDT 24 |
Aug 02 09:06:23 PM PDT 24 |
8650756522 ps |
| T778 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.3634608388 |
|
|
Aug 02 08:48:38 PM PDT 24 |
Aug 02 08:56:28 PM PDT 24 |
4280583560 ps |
| T1162 |
/workspace/coverage/default/27.chip_sw_all_escalation_resets.18230134 |
|
|
Aug 02 08:49:07 PM PDT 24 |
Aug 02 09:00:48 PM PDT 24 |
5550733778 ps |
| T1163 |
/workspace/coverage/default/69.chip_sw_alert_handler_lpg_sleep_mode_alerts.2759182770 |
|
|
Aug 02 08:55:01 PM PDT 24 |
Aug 02 09:02:42 PM PDT 24 |
3225540504 ps |
| T1164 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.222866895 |
|
|
Aug 02 08:44:32 PM PDT 24 |
Aug 02 09:09:54 PM PDT 24 |
9751923837 ps |
| T9 |
/workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.1349352014 |
|
|
Aug 02 08:37:38 PM PDT 24 |
Aug 02 08:44:23 PM PDT 24 |
3664324750 ps |
| T1165 |
/workspace/coverage/default/0.chip_tap_straps_testunlock0.214133328 |
|
|
Aug 02 08:21:20 PM PDT 24 |
Aug 02 08:33:17 PM PDT 24 |
7344162447 ps |
| T151 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.969047435 |
|
|
Aug 02 08:31:09 PM PDT 24 |
Aug 02 08:40:14 PM PDT 24 |
4681124416 ps |
| T1166 |
/workspace/coverage/default/9.chip_sw_lc_ctrl_transition.525930656 |
|
|
Aug 02 08:48:10 PM PDT 24 |
Aug 02 08:56:16 PM PDT 24 |
4773217920 ps |
| T1167 |
/workspace/coverage/default/0.chip_sw_csrng_smoketest.3312553287 |
|
|
Aug 02 08:24:57 PM PDT 24 |
Aug 02 08:28:45 PM PDT 24 |
2998151982 ps |
| T1168 |
/workspace/coverage/default/0.rom_e2e_smoke.368333806 |
|
|
Aug 02 08:27:16 PM PDT 24 |
Aug 02 09:43:13 PM PDT 24 |
14121797078 ps |
| T1169 |
/workspace/coverage/default/1.rom_e2e_static_critical.1243136746 |
|
|
Aug 02 08:36:45 PM PDT 24 |
Aug 02 09:52:15 PM PDT 24 |
16898336472 ps |
| T1170 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.693402173 |
|
|
Aug 02 08:45:01 PM PDT 24 |
Aug 02 08:54:58 PM PDT 24 |
4820563950 ps |
| T792 |
/workspace/coverage/default/32.chip_sw_all_escalation_resets.748685586 |
|
|
Aug 02 08:48:54 PM PDT 24 |
Aug 02 08:58:49 PM PDT 24 |
5421626656 ps |
| T1171 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.1833227004 |
|
|
Aug 02 08:29:20 PM PDT 24 |
Aug 02 08:32:33 PM PDT 24 |
2801721980 ps |
| T435 |
/workspace/coverage/default/0.chip_rv_dm_ndm_reset_req.2046483795 |
|
|
Aug 02 08:20:55 PM PDT 24 |
Aug 02 08:28:56 PM PDT 24 |
4815228298 ps |
| T41 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.2743663050 |
|
|
Aug 02 08:19:33 PM PDT 24 |
Aug 02 08:26:08 PM PDT 24 |
5292852092 ps |
| T769 |
/workspace/coverage/default/49.chip_sw_all_escalation_resets.76401275 |
|
|
Aug 02 08:50:19 PM PDT 24 |
Aug 02 08:57:54 PM PDT 24 |
4183488732 ps |
| T1172 |
/workspace/coverage/default/0.chip_sw_aes_masking_off.599975945 |
|
|
Aug 02 08:18:23 PM PDT 24 |
Aug 02 08:23:30 PM PDT 24 |
2828889190 ps |
| T323 |
/workspace/coverage/default/23.chip_sw_alert_handler_lpg_sleep_mode_alerts.364038165 |
|
|
Aug 02 08:50:00 PM PDT 24 |
Aug 02 08:55:49 PM PDT 24 |
3344895140 ps |
| T295 |
/workspace/coverage/default/4.chip_sw_data_integrity_escalation.2251612418 |
|
|
Aug 02 08:44:23 PM PDT 24 |
Aug 02 08:54:33 PM PDT 24 |
5799613242 ps |
| T324 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.299744037 |
|
|
Aug 02 08:49:24 PM PDT 24 |
Aug 02 09:02:06 PM PDT 24 |
5055147700 ps |
| T439 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_dev.2912124293 |
|
|
Aug 02 08:22:59 PM PDT 24 |
Aug 02 09:05:54 PM PDT 24 |
32452314955 ps |
| T1173 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.960530598 |
|
|
Aug 02 08:39:47 PM PDT 24 |
Aug 02 08:51:39 PM PDT 24 |
4475640352 ps |
| T1174 |
/workspace/coverage/default/3.chip_sw_lc_ctrl_transition.1533965936 |
|
|
Aug 02 08:43:48 PM PDT 24 |
Aug 02 08:52:22 PM PDT 24 |
5680872895 ps |
| T818 |
/workspace/coverage/default/21.chip_sw_all_escalation_resets.2702279397 |
|
|
Aug 02 08:48:03 PM PDT 24 |
Aug 02 08:59:03 PM PDT 24 |
4593186988 ps |
| T1175 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.3695842147 |
|
|
Aug 02 08:39:20 PM PDT 24 |
Aug 02 08:50:55 PM PDT 24 |
5258619508 ps |
| T1176 |
/workspace/coverage/default/1.chip_sw_csrng_kat_test.2424795252 |
|
|
Aug 02 08:28:26 PM PDT 24 |
Aug 02 08:32:55 PM PDT 24 |
3141319342 ps |
| T1177 |
/workspace/coverage/default/2.chip_sw_clkmgr_reset_frequency.3206330366 |
|
|
Aug 02 08:45:19 PM PDT 24 |
Aug 02 08:51:39 PM PDT 24 |
3752958240 ps |
| T1178 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_reduced_freq.2433817750 |
|
|
Aug 02 08:35:41 PM PDT 24 |
Aug 02 08:39:29 PM PDT 24 |
2992125288 ps |
| T1179 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_test_unlocked0.1089376461 |
|
|
Aug 02 08:19:55 PM PDT 24 |
Aug 02 08:58:33 PM PDT 24 |
11339401014 ps |
| T1180 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod.3993223268 |
|
|
Aug 02 08:27:50 PM PDT 24 |
Aug 02 09:43:21 PM PDT 24 |
15529850176 ps |
| T348 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx.213747915 |
|
|
Aug 02 08:17:18 PM PDT 24 |
Aug 02 08:31:03 PM PDT 24 |
4902764592 ps |
| T1181 |
/workspace/coverage/default/1.chip_sw_example_flash.663733100 |
|
|
Aug 02 08:22:56 PM PDT 24 |
Aug 02 08:27:10 PM PDT 24 |
3309579520 ps |
| T1182 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.751849280 |
|
|
Aug 02 08:20:25 PM PDT 24 |
Aug 02 08:39:59 PM PDT 24 |
11178435230 ps |
| T824 |
/workspace/coverage/default/68.chip_sw_all_escalation_resets.2687964049 |
|
|
Aug 02 08:52:20 PM PDT 24 |
Aug 02 09:00:07 PM PDT 24 |
4985435736 ps |
| T1183 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.3616488160 |
|
|
Aug 02 08:20:22 PM PDT 24 |
Aug 02 08:31:37 PM PDT 24 |
7303624750 ps |
| T110 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.692303723 |
|
|
Aug 02 08:24:45 PM PDT 24 |
Aug 02 08:33:58 PM PDT 24 |
5967655906 ps |
| T1184 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.1503683942 |
|
|
Aug 02 08:24:59 PM PDT 24 |
Aug 02 09:40:12 PM PDT 24 |
18112855300 ps |
| T1185 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.1927789489 |
|
|
Aug 02 08:36:01 PM PDT 24 |
Aug 02 08:42:05 PM PDT 24 |
4147559960 ps |
| T1186 |
/workspace/coverage/default/1.chip_sw_clkmgr_reset_frequency.1042327813 |
|
|
Aug 02 08:30:48 PM PDT 24 |
Aug 02 08:39:01 PM PDT 24 |
3288101040 ps |
| T789 |
/workspace/coverage/default/42.chip_sw_all_escalation_resets.363177597 |
|
|
Aug 02 08:50:38 PM PDT 24 |
Aug 02 08:58:19 PM PDT 24 |
5361391176 ps |
| T1187 |
/workspace/coverage/default/0.chip_sw_usbdev_stream.1650975098 |
|
|
Aug 02 08:18:41 PM PDT 24 |
Aug 02 09:36:47 PM PDT 24 |
19404454674 ps |
| T1188 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs.169937194 |
|
|
Aug 02 08:32:40 PM PDT 24 |
Aug 02 08:51:11 PM PDT 24 |
7187247080 ps |
| T1189 |
/workspace/coverage/default/2.chip_sw_flash_init.82209650 |
|
|
Aug 02 08:34:06 PM PDT 24 |
Aug 02 09:06:05 PM PDT 24 |
22258432500 ps |
| T689 |
/workspace/coverage/default/5.chip_sw_csrng_edn_concurrency.836346039 |
|
|
Aug 02 08:45:51 PM PDT 24 |
Aug 02 11:22:54 PM PDT 24 |
31395886150 ps |
| T720 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.1428111749 |
|
|
Aug 02 08:18:23 PM PDT 24 |
Aug 02 08:22:10 PM PDT 24 |
2725768284 ps |
| T1190 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation.1160991192 |
|
|
Aug 02 08:42:13 PM PDT 24 |
Aug 02 09:17:02 PM PDT 24 |
12005662548 ps |
| T718 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.2429066350 |
|
|
Aug 02 08:18:40 PM PDT 24 |
Aug 02 08:22:44 PM PDT 24 |
3371259372 ps |
| T187 |
/workspace/coverage/default/1.chip_sw_flash_rma_unlocked.1606355729 |
|
|
Aug 02 08:23:05 PM PDT 24 |
Aug 02 09:45:29 PM PDT 24 |
44491847865 ps |
| T1191 |
/workspace/coverage/default/0.chip_sw_clkmgr_sleep_frequency.3075529808 |
|
|
Aug 02 08:23:15 PM PDT 24 |
Aug 02 08:34:17 PM PDT 24 |
4305989730 ps |
| T433 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_wake_ups.4204417385 |
|
|
Aug 02 08:41:37 PM PDT 24 |
Aug 02 08:48:41 PM PDT 24 |
7674276092 ps |
| T1192 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.4268996325 |
|
|
Aug 02 08:21:33 PM PDT 24 |
Aug 02 08:25:54 PM PDT 24 |
3186657059 ps |
| T385 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.2774274498 |
|
|
Aug 02 08:52:36 PM PDT 24 |
Aug 02 09:02:02 PM PDT 24 |
5811880508 ps |
| T1193 |
/workspace/coverage/default/1.rom_e2e_asm_init_dev.1025217277 |
|
|
Aug 02 08:40:09 PM PDT 24 |
Aug 02 09:37:16 PM PDT 24 |
15238678197 ps |
| T1194 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod.296358949 |
|
|
Aug 02 08:28:50 PM PDT 24 |
Aug 02 09:27:15 PM PDT 24 |
15662048557 ps |
| T253 |
/workspace/coverage/default/66.chip_sw_all_escalation_resets.259092073 |
|
|
Aug 02 08:53:11 PM PDT 24 |
Aug 02 09:04:35 PM PDT 24 |
5600561048 ps |
| T135 |
/workspace/coverage/default/0.chip_sw_ast_clk_rst_inputs.896231761 |
|
|
Aug 02 08:24:18 PM PDT 24 |
Aug 02 09:21:51 PM PDT 24 |
21800295433 ps |
| T1195 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_aes_trans.4247217634 |
|
|
Aug 02 08:31:00 PM PDT 24 |
Aug 02 08:38:48 PM PDT 24 |
4285584360 ps |
| T231 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.2073893527 |
|
|
Aug 02 08:38:15 PM PDT 24 |
Aug 02 09:00:37 PM PDT 24 |
7185578386 ps |
| T1196 |
/workspace/coverage/default/2.rom_e2e_shutdown_exception_c.3282165587 |
|
|
Aug 02 08:46:53 PM PDT 24 |
Aug 02 09:43:58 PM PDT 24 |
14910776480 ps |
| T208 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_inputs.2827203434 |
|
|
Aug 02 08:37:13 PM PDT 24 |
Aug 02 08:41:52 PM PDT 24 |
2558320037 ps |