| T772 |
/workspace/coverage/default/1.chip_sw_clkmgr_reset_frequency.2947526880 |
|
|
Aug 06 08:22:57 PM PDT 24 |
Aug 06 08:28:53 PM PDT 24 |
3587369256 ps |
| T979 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod_end.717373913 |
|
|
Aug 06 08:48:28 PM PDT 24 |
Aug 06 09:52:03 PM PDT 24 |
15041443940 ps |
| T389 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.2371887682 |
|
|
Aug 06 08:41:59 PM PDT 24 |
Aug 06 08:49:00 PM PDT 24 |
3606899174 ps |
| T158 |
/workspace/coverage/default/69.chip_sw_alert_handler_lpg_sleep_mode_alerts.478783951 |
|
|
Aug 06 08:53:12 PM PDT 24 |
Aug 06 09:00:32 PM PDT 24 |
3864315620 ps |
| T73 |
/workspace/coverage/default/0.chip_sw_usbdev_pullup.3849914776 |
|
|
Aug 06 08:20:25 PM PDT 24 |
Aug 06 08:24:49 PM PDT 24 |
3061210610 ps |
| T980 |
/workspace/coverage/default/1.chip_sw_example_flash.3386520035 |
|
|
Aug 06 08:26:53 PM PDT 24 |
Aug 06 08:31:13 PM PDT 24 |
3132749560 ps |
| T981 |
/workspace/coverage/default/2.chip_sw_hmac_smoketest.3962831301 |
|
|
Aug 06 08:39:44 PM PDT 24 |
Aug 06 08:47:22 PM PDT 24 |
3176156040 ps |
| T36 |
/workspace/coverage/default/1.chip_sw_spi_device_tpm.1903500590 |
|
|
Aug 06 08:27:22 PM PDT 24 |
Aug 06 08:32:42 PM PDT 24 |
2768785644 ps |
| T246 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod_end.606294261 |
|
|
Aug 06 08:28:35 PM PDT 24 |
Aug 06 09:28:08 PM PDT 24 |
14317654003 ps |
| T162 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.490856842 |
|
|
Aug 06 08:27:45 PM PDT 24 |
Aug 06 08:29:37 PM PDT 24 |
2008311367 ps |
| T736 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_timeout.433889154 |
|
|
Aug 06 08:26:57 PM PDT 24 |
Aug 06 08:34:36 PM PDT 24 |
3583525982 ps |
| T982 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sysrst_ctrl_reset.2120095933 |
|
|
Aug 06 08:28:37 PM PDT 24 |
Aug 06 08:51:51 PM PDT 24 |
8347143060 ps |
| T731 |
/workspace/coverage/default/65.chip_sw_all_escalation_resets.3390107706 |
|
|
Aug 06 08:53:10 PM PDT 24 |
Aug 06 09:03:11 PM PDT 24 |
4818831674 ps |
| T176 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_dev.3693338262 |
|
|
Aug 06 08:31:15 PM PDT 24 |
Aug 06 10:13:02 PM PDT 24 |
47460450380 ps |
| T207 |
/workspace/coverage/default/0.chip_sw_inject_scramble_seed.3431279186 |
|
|
Aug 06 08:25:02 PM PDT 24 |
Aug 06 11:42:18 PM PDT 24 |
63618006282 ps |
| T127 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.2281291259 |
|
|
Aug 06 08:35:34 PM PDT 24 |
Aug 06 08:51:39 PM PDT 24 |
4244019412 ps |
| T983 |
/workspace/coverage/default/2.chip_sw_uart_rand_baudrate.3270987557 |
|
|
Aug 06 08:27:55 PM PDT 24 |
Aug 06 08:40:25 PM PDT 24 |
4671857016 ps |
| T984 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.1102851706 |
|
|
Aug 06 08:43:10 PM PDT 24 |
Aug 06 09:00:11 PM PDT 24 |
12112807669 ps |
| T71 |
/workspace/coverage/default/2.chip_tap_straps_dev.3339360202 |
|
|
Aug 06 08:37:12 PM PDT 24 |
Aug 06 09:02:20 PM PDT 24 |
13086850011 ps |
| T279 |
/workspace/coverage/default/18.chip_sw_all_escalation_resets.3363327998 |
|
|
Aug 06 08:43:32 PM PDT 24 |
Aug 06 08:53:09 PM PDT 24 |
4930668944 ps |
| T757 |
/workspace/coverage/default/0.rom_raw_unlock.3745846969 |
|
|
Aug 06 08:22:22 PM PDT 24 |
Aug 06 08:27:16 PM PDT 24 |
5716309926 ps |
| T550 |
/workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.467794710 |
|
|
Aug 06 08:28:32 PM PDT 24 |
Aug 06 08:48:14 PM PDT 24 |
7198857025 ps |
| T291 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.860838205 |
|
|
Aug 06 08:22:35 PM PDT 24 |
Aug 06 10:04:07 PM PDT 24 |
49710553991 ps |
| T319 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.616817138 |
|
|
Aug 06 08:23:56 PM PDT 24 |
Aug 06 08:44:55 PM PDT 24 |
6158377480 ps |
| T985 |
/workspace/coverage/default/2.rom_raw_unlock.3332292722 |
|
|
Aug 06 08:43:07 PM PDT 24 |
Aug 06 08:47:40 PM PDT 24 |
6419405109 ps |
| T986 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en_reduced_freq.3855693159 |
|
|
Aug 06 08:38:07 PM PDT 24 |
Aug 06 08:43:13 PM PDT 24 |
3437471493 ps |
| T812 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.4149171117 |
|
|
Aug 06 08:35:09 PM PDT 24 |
Aug 06 08:41:46 PM PDT 24 |
3935187126 ps |
| T987 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter.387214042 |
|
|
Aug 06 08:39:32 PM PDT 24 |
Aug 06 08:42:30 PM PDT 24 |
1998103926 ps |
| T183 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.3281513366 |
|
|
Aug 06 08:24:15 PM PDT 24 |
Aug 06 08:29:15 PM PDT 24 |
2767261120 ps |
| T399 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.1040707395 |
|
|
Aug 06 08:28:39 PM PDT 24 |
Aug 06 08:51:20 PM PDT 24 |
9010776348 ps |
| T392 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.1572857627 |
|
|
Aug 06 08:35:58 PM PDT 24 |
Aug 06 10:25:35 PM PDT 24 |
22911036020 ps |
| T146 |
/workspace/coverage/default/0.chip_sw_pwrmgr_full_aon_reset.461668573 |
|
|
Aug 06 08:24:06 PM PDT 24 |
Aug 06 08:33:25 PM PDT 24 |
7918059890 ps |
| T179 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.3367403755 |
|
|
Aug 06 08:22:19 PM PDT 24 |
Aug 06 08:31:11 PM PDT 24 |
7487859560 ps |
| T400 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.4107507084 |
|
|
Aug 06 08:36:36 PM PDT 24 |
Aug 06 08:42:41 PM PDT 24 |
3047093861 ps |
| T401 |
/workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.1452823188 |
|
|
Aug 06 08:50:14 PM PDT 24 |
Aug 06 08:57:25 PM PDT 24 |
3408486120 ps |
| T402 |
/workspace/coverage/default/1.chip_sw_pwrmgr_wdog_reset.3507867449 |
|
|
Aug 06 08:26:47 PM PDT 24 |
Aug 06 08:38:26 PM PDT 24 |
5089917922 ps |
| T349 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.3901533674 |
|
|
Aug 06 08:43:29 PM PDT 24 |
Aug 06 08:54:00 PM PDT 24 |
5018413008 ps |
| T403 |
/workspace/coverage/default/0.chip_sw_clkmgr_smoketest.4016162892 |
|
|
Aug 06 08:27:27 PM PDT 24 |
Aug 06 08:32:17 PM PDT 24 |
2924393140 ps |
| T323 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.282150789 |
|
|
Aug 06 08:25:31 PM PDT 24 |
Aug 06 08:55:52 PM PDT 24 |
11444456750 ps |
| T292 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.1342285877 |
|
|
Aug 06 08:24:47 PM PDT 24 |
Aug 06 10:10:44 PM PDT 24 |
49943787380 ps |
| T358 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.2315659900 |
|
|
Aug 06 08:25:01 PM PDT 24 |
Aug 06 08:37:20 PM PDT 24 |
4869218272 ps |
| T715 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.1121760850 |
|
|
Aug 06 08:25:21 PM PDT 24 |
Aug 06 08:27:28 PM PDT 24 |
2177591825 ps |
| T340 |
/workspace/coverage/default/1.chip_sw_pwrmgr_lowpower_cancel.145328414 |
|
|
Aug 06 08:23:17 PM PDT 24 |
Aug 06 08:31:12 PM PDT 24 |
4211715068 ps |
| T211 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_outputs.2967858146 |
|
|
Aug 06 08:22:20 PM PDT 24 |
Aug 06 08:29:55 PM PDT 24 |
4409641536 ps |
| T988 |
/workspace/coverage/default/1.rom_e2e_self_hash.31898922 |
|
|
Aug 06 08:29:36 PM PDT 24 |
Aug 06 10:18:44 PM PDT 24 |
26158302400 ps |
| T989 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.1217227325 |
|
|
Aug 06 08:30:33 PM PDT 24 |
Aug 06 08:42:30 PM PDT 24 |
7898619260 ps |
| T990 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.3666619136 |
|
|
Aug 06 08:27:56 PM PDT 24 |
Aug 06 09:15:18 PM PDT 24 |
11337972238 ps |
| T991 |
/workspace/coverage/default/1.chip_sw_clkmgr_smoketest.1889223318 |
|
|
Aug 06 08:24:46 PM PDT 24 |
Aug 06 08:29:32 PM PDT 24 |
3119760042 ps |
| T992 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx2.4125542880 |
|
|
Aug 06 08:40:31 PM PDT 24 |
Aug 06 08:55:05 PM PDT 24 |
4156309500 ps |
| T774 |
/workspace/coverage/default/78.chip_sw_all_escalation_resets.1794937172 |
|
|
Aug 06 08:46:49 PM PDT 24 |
Aug 06 08:56:43 PM PDT 24 |
4826901680 ps |
| T163 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.3357080962 |
|
|
Aug 06 08:23:05 PM PDT 24 |
Aug 06 08:28:42 PM PDT 24 |
2810654451 ps |
| T993 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.789853697 |
|
|
Aug 06 08:25:31 PM PDT 24 |
Aug 06 08:35:28 PM PDT 24 |
4536380470 ps |
| T184 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.1630561433 |
|
|
Aug 06 08:37:59 PM PDT 24 |
Aug 06 08:42:38 PM PDT 24 |
2915206256 ps |
| T994 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_no_scramble.1963226066 |
|
|
Aug 06 08:23:23 PM PDT 24 |
Aug 06 08:36:46 PM PDT 24 |
6868623000 ps |
| T995 |
/workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.2251950808 |
|
|
Aug 06 08:48:28 PM PDT 24 |
Aug 06 10:04:38 PM PDT 24 |
20486513496 ps |
| T169 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_program_error.1182500418 |
|
|
Aug 06 08:39:09 PM PDT 24 |
Aug 06 08:49:12 PM PDT 24 |
4290046282 ps |
| T233 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_test_unlocked0.139270652 |
|
|
Aug 06 08:25:42 PM PDT 24 |
Aug 06 09:13:24 PM PDT 24 |
31970370255 ps |
| T348 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx1.1147798458 |
|
|
Aug 06 08:22:29 PM PDT 24 |
Aug 06 08:32:37 PM PDT 24 |
3778649054 ps |
| T548 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.2597101305 |
|
|
Aug 06 08:33:38 PM PDT 24 |
Aug 06 08:51:00 PM PDT 24 |
4731217744 ps |
| T398 |
/workspace/coverage/default/0.chip_sw_usbdev_vbus.3385038820 |
|
|
Aug 06 08:24:21 PM PDT 24 |
Aug 06 08:27:47 PM PDT 24 |
2533058934 ps |
| T22 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.3470541442 |
|
|
Aug 06 08:22:54 PM PDT 24 |
Aug 06 08:59:29 PM PDT 24 |
7960463504 ps |
| T996 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq.1484785251 |
|
|
Aug 06 08:26:20 PM PDT 24 |
Aug 06 08:38:51 PM PDT 24 |
4992542285 ps |
| T738 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.574356107 |
|
|
Aug 06 08:23:08 PM PDT 24 |
Aug 06 08:29:09 PM PDT 24 |
3628776680 ps |
| T997 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod.1338538587 |
|
|
Aug 06 08:43:41 PM PDT 24 |
Aug 06 09:46:50 PM PDT 24 |
15292411865 ps |
| T819 |
/workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.2186880582 |
|
|
Aug 06 08:42:44 PM PDT 24 |
Aug 06 08:50:43 PM PDT 24 |
4224633032 ps |
| T998 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.1089858808 |
|
|
Aug 06 08:33:25 PM PDT 24 |
Aug 06 08:50:54 PM PDT 24 |
5288651514 ps |
| T208 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_bootstrap.2315177189 |
|
|
Aug 06 08:26:01 PM PDT 24 |
Aug 07 12:22:36 AM PDT 24 |
78427930368 ps |
| T999 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.306716716 |
|
|
Aug 06 08:25:37 PM PDT 24 |
Aug 06 08:31:03 PM PDT 24 |
2561539980 ps |
| T1000 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod.3620519839 |
|
|
Aug 06 08:27:11 PM PDT 24 |
Aug 06 09:34:30 PM PDT 24 |
15314435861 ps |
| T1001 |
/workspace/coverage/default/0.chip_sw_example_flash.3491623069 |
|
|
Aug 06 08:21:49 PM PDT 24 |
Aug 06 08:26:15 PM PDT 24 |
2424125064 ps |
| T773 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.347431251 |
|
|
Aug 06 08:42:11 PM PDT 24 |
Aug 06 08:51:04 PM PDT 24 |
4447773112 ps |
| T1002 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_rma.4016552241 |
|
|
Aug 06 08:30:44 PM PDT 24 |
Aug 06 09:31:03 PM PDT 24 |
14188946375 ps |
| T734 |
/workspace/coverage/default/54.chip_sw_all_escalation_resets.448048200 |
|
|
Aug 06 08:49:48 PM PDT 24 |
Aug 06 08:58:52 PM PDT 24 |
4535729150 ps |
| T282 |
/workspace/coverage/default/26.chip_sw_alert_handler_lpg_sleep_mode_alerts.1356882015 |
|
|
Aug 06 08:44:44 PM PDT 24 |
Aug 06 08:51:57 PM PDT 24 |
3256052640 ps |
| T797 |
/workspace/coverage/default/63.chip_sw_all_escalation_resets.3357286975 |
|
|
Aug 06 08:45:31 PM PDT 24 |
Aug 06 08:57:04 PM PDT 24 |
5679970088 ps |
| T1003 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_por_reset.2589086128 |
|
|
Aug 06 08:21:10 PM PDT 24 |
Aug 06 08:35:41 PM PDT 24 |
9938365650 ps |
| T1004 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.4125987856 |
|
|
Aug 06 08:25:01 PM PDT 24 |
Aug 06 09:03:45 PM PDT 24 |
26859051182 ps |
| T1005 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.3076761129 |
|
|
Aug 06 08:22:30 PM PDT 24 |
Aug 06 08:33:23 PM PDT 24 |
5525433486 ps |
| T850 |
/workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.824974924 |
|
|
Aug 06 08:45:22 PM PDT 24 |
Aug 06 08:51:27 PM PDT 24 |
3852943410 ps |
| T134 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.774516237 |
|
|
Aug 06 08:38:05 PM PDT 24 |
Aug 06 08:49:16 PM PDT 24 |
5639246560 ps |
| T393 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_lockstep_glitch.1422941615 |
|
|
Aug 06 08:39:32 PM PDT 24 |
Aug 06 08:42:11 PM PDT 24 |
3106159632 ps |
| T280 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_prod.3874485644 |
|
|
Aug 06 08:25:28 PM PDT 24 |
Aug 06 08:58:44 PM PDT 24 |
8497800280 ps |
| T219 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.2138208865 |
|
|
Aug 06 08:34:11 PM PDT 24 |
Aug 06 09:05:38 PM PDT 24 |
8365515668 ps |
| T776 |
/workspace/coverage/default/72.chip_sw_all_escalation_resets.3808254889 |
|
|
Aug 06 08:44:46 PM PDT 24 |
Aug 06 08:56:41 PM PDT 24 |
5783944928 ps |
| T765 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.3262312202 |
|
|
Aug 06 08:43:46 PM PDT 24 |
Aug 06 08:53:01 PM PDT 24 |
4342537240 ps |
| T1006 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.1865142969 |
|
|
Aug 06 08:33:57 PM PDT 24 |
Aug 06 09:42:37 PM PDT 24 |
15604336808 ps |
| T1007 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.3692835690 |
|
|
Aug 06 08:25:41 PM PDT 24 |
Aug 06 09:34:43 PM PDT 24 |
14817217320 ps |
| T1008 |
/workspace/coverage/default/1.chip_sw_flash_crash_alert.2159200328 |
|
|
Aug 06 08:25:18 PM PDT 24 |
Aug 06 08:36:21 PM PDT 24 |
4254338008 ps |
| T1009 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.3321010375 |
|
|
Aug 06 08:22:40 PM PDT 24 |
Aug 06 08:35:05 PM PDT 24 |
4982089402 ps |
| T1010 |
/workspace/coverage/default/2.chip_sw_kmac_mode_cshake.2420988652 |
|
|
Aug 06 08:35:12 PM PDT 24 |
Aug 06 08:40:23 PM PDT 24 |
3524139282 ps |
| T23 |
/workspace/coverage/default/0.chip_sw_usbdev_setuprx.3043422617 |
|
|
Aug 06 08:21:37 PM PDT 24 |
Aug 06 08:31:04 PM PDT 24 |
3860483928 ps |
| T1011 |
/workspace/coverage/default/1.chip_sw_entropy_src_kat_test.2296129112 |
|
|
Aug 06 08:22:48 PM PDT 24 |
Aug 06 08:26:16 PM PDT 24 |
2734877320 ps |
| T240 |
/workspace/coverage/default/58.chip_sw_all_escalation_resets.39349578 |
|
|
Aug 06 08:44:29 PM PDT 24 |
Aug 06 08:55:35 PM PDT 24 |
4834570856 ps |
| T72 |
/workspace/coverage/default/4.chip_tap_straps_prod.2481515477 |
|
|
Aug 06 08:41:11 PM PDT 24 |
Aug 06 08:59:38 PM PDT 24 |
8393755101 ps |
| T1012 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.234492751 |
|
|
Aug 06 08:38:17 PM PDT 24 |
Aug 06 08:48:00 PM PDT 24 |
5250703336 ps |
| T212 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_inputs.2406296527 |
|
|
Aug 06 08:23:05 PM PDT 24 |
Aug 06 08:28:39 PM PDT 24 |
3244944971 ps |
| T308 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.1159530262 |
|
|
Aug 06 08:46:24 PM PDT 24 |
Aug 06 08:54:49 PM PDT 24 |
4170340440 ps |
| T310 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.1034860783 |
|
|
Aug 06 08:26:10 PM PDT 24 |
Aug 06 09:08:27 PM PDT 24 |
30634090783 ps |
| T311 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.4197899473 |
|
|
Aug 06 08:19:54 PM PDT 24 |
Aug 06 09:14:56 PM PDT 24 |
29134900709 ps |
| T312 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.2458476426 |
|
|
Aug 06 08:22:25 PM PDT 24 |
Aug 06 08:32:56 PM PDT 24 |
4246713370 ps |
| T313 |
/workspace/coverage/default/1.chip_sw_hmac_oneshot.2877219491 |
|
|
Aug 06 08:24:08 PM PDT 24 |
Aug 06 08:30:24 PM PDT 24 |
3009513628 ps |
| T314 |
/workspace/coverage/default/0.chip_sw_example_rom.2622455928 |
|
|
Aug 06 08:20:01 PM PDT 24 |
Aug 06 08:22:25 PM PDT 24 |
2677862224 ps |
| T284 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_prod.962485920 |
|
|
Aug 06 08:27:09 PM PDT 24 |
Aug 06 09:02:19 PM PDT 24 |
9983429920 ps |
| T315 |
/workspace/coverage/default/1.chip_sw_edn_kat.297222710 |
|
|
Aug 06 08:27:51 PM PDT 24 |
Aug 06 08:40:27 PM PDT 24 |
3045480860 ps |
| T283 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.3367126090 |
|
|
Aug 06 08:24:40 PM PDT 24 |
Aug 06 08:58:13 PM PDT 24 |
10270785710 ps |
| T316 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.2277377900 |
|
|
Aug 06 08:25:22 PM PDT 24 |
Aug 06 08:40:40 PM PDT 24 |
8354820050 ps |
| T1013 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_ecc_error_vendor_test.1416956997 |
|
|
Aug 06 08:19:27 PM PDT 24 |
Aug 06 08:25:32 PM PDT 24 |
3713755273 ps |
| T1014 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.3236169169 |
|
|
Aug 06 08:40:22 PM PDT 24 |
Aug 06 09:09:43 PM PDT 24 |
8443819198 ps |
| T285 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_otbn.2938081548 |
|
|
Aug 06 08:23:34 PM PDT 24 |
Aug 06 09:28:32 PM PDT 24 |
12945173532 ps |
| T724 |
/workspace/coverage/default/1.chip_sw_power_idle_load.3240759128 |
|
|
Aug 06 08:28:28 PM PDT 24 |
Aug 06 08:39:40 PM PDT 24 |
5102236328 ps |
| T1015 |
/workspace/coverage/default/1.chip_sw_csrng_smoketest.2592399970 |
|
|
Aug 06 08:28:01 PM PDT 24 |
Aug 06 08:31:39 PM PDT 24 |
2291579272 ps |
| T1016 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.2089565978 |
|
|
Aug 06 08:19:51 PM PDT 24 |
Aug 06 08:24:53 PM PDT 24 |
3396347902 ps |
| T37 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.747898680 |
|
|
Aug 06 08:25:40 PM PDT 24 |
Aug 06 08:31:37 PM PDT 24 |
3912116464 ps |
| T1017 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_wakeup.3630292990 |
|
|
Aug 06 08:27:45 PM PDT 24 |
Aug 06 08:37:51 PM PDT 24 |
5405646800 ps |
| T346 |
/workspace/coverage/default/1.chip_sw_hmac_enc.3493862637 |
|
|
Aug 06 08:27:41 PM PDT 24 |
Aug 06 08:33:20 PM PDT 24 |
3190891420 ps |
| T374 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.13482189 |
|
|
Aug 06 08:44:02 PM PDT 24 |
Aug 06 08:48:53 PM PDT 24 |
3365412172 ps |
| T48 |
/workspace/coverage/default/1.chip_sw_alert_test.1504347549 |
|
|
Aug 06 08:28:07 PM PDT 24 |
Aug 06 08:34:13 PM PDT 24 |
3448054648 ps |
| T379 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.2576352475 |
|
|
Aug 06 08:43:53 PM PDT 24 |
Aug 06 08:50:29 PM PDT 24 |
3584679674 ps |
| T180 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.3470974172 |
|
|
Aug 06 08:25:59 PM PDT 24 |
Aug 06 08:35:50 PM PDT 24 |
4135566905 ps |
| T109 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency_reduced_freq.3426727806 |
|
|
Aug 06 08:38:52 PM PDT 24 |
Aug 06 09:32:04 PM PDT 24 |
17298644465 ps |
| T286 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.1945788573 |
|
|
Aug 06 08:25:16 PM PDT 24 |
Aug 06 09:01:59 PM PDT 24 |
12754460033 ps |
| T380 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.2944279696 |
|
|
Aug 06 08:30:23 PM PDT 24 |
Aug 06 08:32:45 PM PDT 24 |
2957338653 ps |
| T84 |
/workspace/coverage/default/0.chip_sw_alert_handler_entropy.62052455 |
|
|
Aug 06 08:20:25 PM PDT 24 |
Aug 06 08:25:40 PM PDT 24 |
3462847241 ps |
| T167 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.1826566873 |
|
|
Aug 06 08:46:00 PM PDT 24 |
Aug 06 08:59:10 PM PDT 24 |
6007691580 ps |
| T381 |
/workspace/coverage/default/0.chip_sw_pwrmgr_b2b_sleep_reset_req.3513046040 |
|
|
Aug 06 08:21:00 PM PDT 24 |
Aug 06 09:05:29 PM PDT 24 |
24055147600 ps |
| T1018 |
/workspace/coverage/default/0.chip_sw_clkmgr_reset_frequency.1024481944 |
|
|
Aug 06 08:23:36 PM PDT 24 |
Aug 06 08:31:02 PM PDT 24 |
3395068160 ps |
| T460 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.1229515251 |
|
|
Aug 06 08:22:21 PM PDT 24 |
Aug 06 09:37:35 PM PDT 24 |
24277567724 ps |
| T1019 |
/workspace/coverage/default/1.chip_sw_otbn_randomness.2546090536 |
|
|
Aug 06 08:27:37 PM PDT 24 |
Aug 06 08:44:58 PM PDT 24 |
5552715134 ps |
| T248 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.484702674 |
|
|
Aug 06 08:24:07 PM PDT 24 |
Aug 06 08:32:28 PM PDT 24 |
5228841318 ps |
| T289 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.235116520 |
|
|
Aug 06 08:25:34 PM PDT 24 |
Aug 06 09:42:23 PM PDT 24 |
15674580488 ps |
| T318 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.2670810238 |
|
|
Aug 06 08:22:17 PM PDT 24 |
Aug 06 08:42:30 PM PDT 24 |
6134161620 ps |
| T771 |
/workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.1446830311 |
|
|
Aug 06 08:44:36 PM PDT 24 |
Aug 06 08:50:33 PM PDT 24 |
2826237056 ps |
| T788 |
/workspace/coverage/default/7.chip_sw_all_escalation_resets.641500309 |
|
|
Aug 06 08:41:09 PM PDT 24 |
Aug 06 08:53:47 PM PDT 24 |
5876457704 ps |
| T1020 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter_frequency.1485276783 |
|
|
Aug 06 08:37:58 PM PDT 24 |
Aug 06 08:45:52 PM PDT 24 |
2766678852 ps |
| T249 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.3206451745 |
|
|
Aug 06 08:27:09 PM PDT 24 |
Aug 06 08:38:41 PM PDT 24 |
6460582424 ps |
| T300 |
/workspace/coverage/default/0.chip_sw_power_idle_load.4238222032 |
|
|
Aug 06 08:28:59 PM PDT 24 |
Aug 06 08:41:54 PM PDT 24 |
4010946332 ps |
| T80 |
/workspace/coverage/default/2.chip_jtag_mem_access.3642900169 |
|
|
Aug 06 08:30:10 PM PDT 24 |
Aug 06 08:55:15 PM PDT 24 |
13737361598 ps |
| T1021 |
/workspace/coverage/default/7.chip_sw_uart_rand_baudrate.3402324415 |
|
|
Aug 06 08:46:47 PM PDT 24 |
Aug 06 09:16:24 PM PDT 24 |
8492401580 ps |
| T1022 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_dev.4008002514 |
|
|
Aug 06 08:28:37 PM PDT 24 |
Aug 06 09:33:11 PM PDT 24 |
14104478860 ps |
| T1023 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_ecc_error_vendor_test.587847254 |
|
|
Aug 06 08:23:22 PM PDT 24 |
Aug 06 08:28:51 PM PDT 24 |
3096572213 ps |
| T847 |
/workspace/coverage/default/53.chip_sw_alert_handler_lpg_sleep_mode_alerts.401179603 |
|
|
Aug 06 08:44:55 PM PDT 24 |
Aug 06 08:52:12 PM PDT 24 |
3944704400 ps |
| T807 |
/workspace/coverage/default/89.chip_sw_all_escalation_resets.2208846408 |
|
|
Aug 06 08:46:56 PM PDT 24 |
Aug 06 08:59:29 PM PDT 24 |
5510605128 ps |
| T1024 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_rnd.230417878 |
|
|
Aug 06 08:27:16 PM PDT 24 |
Aug 06 08:45:20 PM PDT 24 |
5242843240 ps |
| T225 |
/workspace/coverage/default/92.chip_sw_all_escalation_resets.758433042 |
|
|
Aug 06 08:46:54 PM PDT 24 |
Aug 06 09:03:17 PM PDT 24 |
5995176312 ps |
| T108 |
/workspace/coverage/default/1.chip_sw_ast_clk_rst_inputs.1273847338 |
|
|
Aug 06 08:31:20 PM PDT 24 |
Aug 06 09:23:54 PM PDT 24 |
18624039991 ps |
| T250 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.362447408 |
|
|
Aug 06 08:35:25 PM PDT 24 |
Aug 06 08:43:58 PM PDT 24 |
3840712778 ps |
| T407 |
/workspace/coverage/default/1.chip_sw_kmac_app_rom.2002794364 |
|
|
Aug 06 08:26:28 PM PDT 24 |
Aug 06 08:31:05 PM PDT 24 |
3393472882 ps |
| T34 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.2403572918 |
|
|
Aug 06 08:33:14 PM PDT 24 |
Aug 06 08:40:49 PM PDT 24 |
5927010040 ps |
| T1025 |
/workspace/coverage/default/2.chip_sw_uart_smoketest.194823006 |
|
|
Aug 06 08:39:36 PM PDT 24 |
Aug 06 08:43:47 PM PDT 24 |
3279066976 ps |
| T359 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.1861567344 |
|
|
Aug 06 08:27:09 PM PDT 24 |
Aug 06 08:36:55 PM PDT 24 |
4719147988 ps |
| T1026 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_rma.3185218996 |
|
|
Aug 06 08:26:36 PM PDT 24 |
Aug 06 08:47:30 PM PDT 24 |
7082631992 ps |
| T61 |
/workspace/coverage/default/0.chip_sw_usbdev_aon_pullup.1756966728 |
|
|
Aug 06 08:21:29 PM PDT 24 |
Aug 06 08:31:29 PM PDT 24 |
4265902420 ps |
| T89 |
/workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.1775538828 |
|
|
Aug 06 08:48:19 PM PDT 24 |
Aug 06 08:54:41 PM PDT 24 |
3732911800 ps |
| T846 |
/workspace/coverage/default/42.chip_sw_alert_handler_lpg_sleep_mode_alerts.2895996473 |
|
|
Aug 06 08:44:46 PM PDT 24 |
Aug 06 08:52:34 PM PDT 24 |
4244181710 ps |
| T287 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.1467190976 |
|
|
Aug 06 08:26:14 PM PDT 24 |
Aug 06 08:50:10 PM PDT 24 |
6592022404 ps |
| T309 |
/workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.3526053746 |
|
|
Aug 06 08:44:50 PM PDT 24 |
Aug 06 08:52:22 PM PDT 24 |
3656291366 ps |
| T288 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.2608721908 |
|
|
Aug 06 08:25:59 PM PDT 24 |
Aug 06 08:52:34 PM PDT 24 |
7652826398 ps |
| T1027 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.346589283 |
|
|
Aug 06 08:27:13 PM PDT 24 |
Aug 06 08:44:23 PM PDT 24 |
8649965921 ps |
| T458 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.4286946488 |
|
|
Aug 06 08:35:00 PM PDT 24 |
Aug 06 08:59:23 PM PDT 24 |
7172957361 ps |
| T1028 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.3253419450 |
|
|
Aug 06 08:22:52 PM PDT 24 |
Aug 06 08:32:45 PM PDT 24 |
5204525598 ps |
| T1029 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.790415201 |
|
|
Aug 06 08:24:07 PM PDT 24 |
Aug 06 08:33:49 PM PDT 24 |
4166138108 ps |
| T1030 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.923891213 |
|
|
Aug 06 08:41:37 PM PDT 24 |
Aug 06 08:50:58 PM PDT 24 |
5460272161 ps |
| T1031 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.2227303714 |
|
|
Aug 06 08:19:52 PM PDT 24 |
Aug 06 08:27:06 PM PDT 24 |
6218739090 ps |
| T1032 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_req.3774226183 |
|
|
Aug 06 08:24:47 PM PDT 24 |
Aug 06 08:29:43 PM PDT 24 |
3176958248 ps |
| T159 |
/workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.2047958516 |
|
|
Aug 06 08:28:05 PM PDT 24 |
Aug 07 12:07:48 AM PDT 24 |
255175618616 ps |
| T251 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_scramble.25646277 |
|
|
Aug 06 08:22:49 PM PDT 24 |
Aug 06 08:37:01 PM PDT 24 |
9299579626 ps |
| T234 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_rma.874111874 |
|
|
Aug 06 08:23:22 PM PDT 24 |
Aug 06 08:57:01 PM PDT 24 |
11002265047 ps |
| T1033 |
/workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.1256427338 |
|
|
Aug 06 08:45:27 PM PDT 24 |
Aug 06 08:52:23 PM PDT 24 |
4347724650 ps |
| T49 |
/workspace/coverage/default/0.chip_sw_alert_test.2114290877 |
|
|
Aug 06 08:22:59 PM PDT 24 |
Aug 06 08:29:39 PM PDT 24 |
3452247904 ps |
| T1034 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.1309624258 |
|
|
Aug 06 08:27:42 PM PDT 24 |
Aug 06 08:32:48 PM PDT 24 |
3160618300 ps |
| T1035 |
/workspace/coverage/default/1.chip_sw_hmac_enc_idle.3234567369 |
|
|
Aug 06 08:22:16 PM PDT 24 |
Aug 06 08:26:22 PM PDT 24 |
2587493480 ps |
| T1036 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.1609945948 |
|
|
Aug 06 08:28:49 PM PDT 24 |
Aug 06 09:35:35 PM PDT 24 |
18061536640 ps |
| T12 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through.2186763006 |
|
|
Aug 06 08:23:44 PM PDT 24 |
Aug 06 08:35:53 PM PDT 24 |
6428345636 ps |
| T790 |
/workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.2452137800 |
|
|
Aug 06 08:43:25 PM PDT 24 |
Aug 06 08:53:07 PM PDT 24 |
3450888294 ps |
| T252 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en.2435345995 |
|
|
Aug 06 08:23:59 PM PDT 24 |
Aug 06 08:34:20 PM PDT 24 |
4650478336 ps |
| T1037 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.638080353 |
|
|
Aug 06 08:21:00 PM PDT 24 |
Aug 06 08:24:48 PM PDT 24 |
2415760264 ps |
| T1038 |
/workspace/coverage/default/4.chip_sw_csrng_edn_concurrency.995895477 |
|
|
Aug 06 08:40:41 PM PDT 24 |
Aug 06 09:56:31 PM PDT 24 |
22044206680 ps |
| T1039 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.2569230054 |
|
|
Aug 06 08:42:58 PM PDT 24 |
Aug 06 09:52:44 PM PDT 24 |
15172265818 ps |
| T1040 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.1612690455 |
|
|
Aug 06 08:40:02 PM PDT 24 |
Aug 06 08:49:02 PM PDT 24 |
6273052078 ps |
| T713 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.1010495095 |
|
|
Aug 06 08:37:37 PM PDT 24 |
Aug 06 08:46:12 PM PDT 24 |
5597031284 ps |
| T1041 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.3386625276 |
|
|
Aug 06 08:24:50 PM PDT 24 |
Aug 06 08:29:25 PM PDT 24 |
2714625312 ps |
| T294 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_dev.546570932 |
|
|
Aug 06 08:26:41 PM PDT 24 |
Aug 06 10:01:49 PM PDT 24 |
48189077830 ps |
| T843 |
/workspace/coverage/default/31.chip_sw_alert_handler_lpg_sleep_mode_alerts.3518417417 |
|
|
Aug 06 08:46:56 PM PDT 24 |
Aug 06 08:52:55 PM PDT 24 |
3422318562 ps |
| T38 |
/workspace/coverage/default/2.chip_sw_spi_device_tpm.2459160676 |
|
|
Aug 06 08:27:35 PM PDT 24 |
Aug 06 08:33:31 PM PDT 24 |
3541558737 ps |
| T371 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.3153378109 |
|
|
Aug 06 08:38:07 PM PDT 24 |
Aug 06 08:43:52 PM PDT 24 |
4707932170 ps |
| T1042 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.2512231345 |
|
|
Aug 06 08:36:56 PM PDT 24 |
Aug 06 08:49:01 PM PDT 24 |
4376492390 ps |
| T841 |
/workspace/coverage/default/50.chip_sw_all_escalation_resets.484491723 |
|
|
Aug 06 08:45:43 PM PDT 24 |
Aug 06 08:56:24 PM PDT 24 |
5698207550 ps |
| T85 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_pings.760524196 |
|
|
Aug 06 08:34:31 PM PDT 24 |
Aug 06 08:55:23 PM PDT 24 |
10867798008 ps |
| T365 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.2826566630 |
|
|
Aug 06 08:26:42 PM PDT 24 |
Aug 06 08:32:34 PM PDT 24 |
3318667056 ps |
| T368 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.461622857 |
|
|
Aug 06 08:21:53 PM PDT 24 |
Aug 06 08:26:47 PM PDT 24 |
3720984074 ps |
| T1043 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.2811716424 |
|
|
Aug 06 08:28:25 PM PDT 24 |
Aug 06 08:50:22 PM PDT 24 |
6108974620 ps |
| T188 |
/workspace/coverage/default/1.chip_sw_csrng_lc_hw_debug_en_test.1612646051 |
|
|
Aug 06 08:26:04 PM PDT 24 |
Aug 06 08:34:59 PM PDT 24 |
6864477376 ps |
| T1044 |
/workspace/coverage/default/91.chip_sw_all_escalation_resets.371008527 |
|
|
Aug 06 08:48:40 PM PDT 24 |
Aug 06 08:58:39 PM PDT 24 |
5480263440 ps |
| T1045 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_power_glitch_reset.2370200788 |
|
|
Aug 06 08:30:14 PM PDT 24 |
Aug 06 09:34:21 PM PDT 24 |
38331902212 ps |
| T198 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.1149927519 |
|
|
Aug 06 08:22:45 PM PDT 24 |
Aug 06 08:31:55 PM PDT 24 |
4429246426 ps |
| T808 |
/workspace/coverage/default/66.chip_sw_all_escalation_resets.2710600841 |
|
|
Aug 06 08:45:49 PM PDT 24 |
Aug 06 08:57:58 PM PDT 24 |
6040025374 ps |
| T303 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.453119099 |
|
|
Aug 06 08:24:19 PM PDT 24 |
Aug 06 08:32:03 PM PDT 24 |
4487051356 ps |
| T783 |
/workspace/coverage/default/25.chip_sw_all_escalation_resets.4098665061 |
|
|
Aug 06 08:42:36 PM PDT 24 |
Aug 06 08:54:36 PM PDT 24 |
4911231380 ps |
| T1046 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_otp_hw_cfg0.2294290493 |
|
|
Aug 06 08:29:23 PM PDT 24 |
Aug 06 08:34:29 PM PDT 24 |
2313997460 ps |
| T341 |
/workspace/coverage/default/2.chip_sw_pwrmgr_lowpower_cancel.2123656641 |
|
|
Aug 06 08:37:10 PM PDT 24 |
Aug 06 08:43:29 PM PDT 24 |
3975031870 ps |
| T762 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.1354191371 |
|
|
Aug 06 08:26:07 PM PDT 24 |
Aug 06 08:32:07 PM PDT 24 |
4079433724 ps |
| T90 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.954240047 |
|
|
Aug 06 08:41:40 PM PDT 24 |
Aug 06 08:53:45 PM PDT 24 |
4527737410 ps |
| T51 |
/workspace/coverage/default/1.chip_sw_sleep_pin_retention.3514296685 |
|
|
Aug 06 08:25:01 PM PDT 24 |
Aug 06 08:31:41 PM PDT 24 |
4107163682 ps |
| T356 |
/workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.2657577756 |
|
|
Aug 06 08:20:21 PM PDT 24 |
Aug 06 08:30:16 PM PDT 24 |
19491434070 ps |
| T1047 |
/workspace/coverage/default/1.chip_sw_inject_scramble_seed.4023906956 |
|
|
Aug 06 08:24:29 PM PDT 24 |
Aug 06 11:42:58 PM PDT 24 |
64083529187 ps |
| T1048 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_wakeup.947615486 |
|
|
Aug 06 08:23:44 PM PDT 24 |
Aug 06 08:31:27 PM PDT 24 |
5201846962 ps |
| T375 |
/workspace/coverage/default/64.chip_sw_all_escalation_resets.834230077 |
|
|
Aug 06 08:45:49 PM PDT 24 |
Aug 06 08:58:36 PM PDT 24 |
5174197744 ps |
| T1049 |
/workspace/coverage/default/2.chip_sw_aes_masking_off.3262209161 |
|
|
Aug 06 08:32:51 PM PDT 24 |
Aug 06 08:37:42 PM PDT 24 |
2357198106 ps |
| T1050 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod_end.743032643 |
|
|
Aug 06 08:26:53 PM PDT 24 |
Aug 06 09:19:31 PM PDT 24 |
14270437784 ps |
| T66 |
/workspace/coverage/default/4.chip_tap_straps_rma.1366449004 |
|
|
Aug 06 08:41:10 PM PDT 24 |
Aug 06 08:48:21 PM PDT 24 |
4191966779 ps |
| T1051 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.414280448 |
|
|
Aug 06 08:44:48 PM PDT 24 |
Aug 06 09:40:45 PM PDT 24 |
14440628443 ps |
| T785 |
/workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.2103127686 |
|
|
Aug 06 08:46:18 PM PDT 24 |
Aug 06 08:53:41 PM PDT 24 |
4208792688 ps |
| T1052 |
/workspace/coverage/default/1.chip_tap_straps_dev.3101134989 |
|
|
Aug 06 08:24:14 PM PDT 24 |
Aug 06 08:27:36 PM PDT 24 |
3038561838 ps |
| T822 |
/workspace/coverage/default/95.chip_sw_all_escalation_resets.3358280890 |
|
|
Aug 06 08:46:19 PM PDT 24 |
Aug 06 08:58:46 PM PDT 24 |
5314328000 ps |
| T1053 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2322060018 |
|
|
Aug 06 08:22:58 PM PDT 24 |
Aug 06 08:42:28 PM PDT 24 |
7610759917 ps |
| T1054 |
/workspace/coverage/default/1.chip_sw_aes_enc.345854451 |
|
|
Aug 06 08:25:39 PM PDT 24 |
Aug 06 08:31:17 PM PDT 24 |
3164597232 ps |
| T408 |
/workspace/coverage/default/2.chip_sw_kmac_app_rom.159944786 |
|
|
Aug 06 08:35:44 PM PDT 24 |
Aug 06 08:40:18 PM PDT 24 |
3253497226 ps |
| T290 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_otbn.2427354229 |
|
|
Aug 06 08:36:59 PM PDT 24 |
Aug 06 09:25:11 PM PDT 24 |
11850089700 ps |
| T1055 |
/workspace/coverage/default/3.chip_sw_aon_timer_sleep_wdog_sleep_pause.259983541 |
|
|
Aug 06 08:40:13 PM PDT 24 |
Aug 06 08:49:00 PM PDT 24 |
6651952616 ps |
| T792 |
/workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.3016032049 |
|
|
Aug 06 08:41:59 PM PDT 24 |
Aug 06 08:48:47 PM PDT 24 |
3896015136 ps |
| T1056 |
/workspace/coverage/default/0.chip_sw_flash_scrambling_smoketest.821209467 |
|
|
Aug 06 08:26:52 PM PDT 24 |
Aug 06 08:30:33 PM PDT 24 |
3172156116 ps |
| T1057 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_kmac.1640515535 |
|
|
Aug 06 08:35:52 PM PDT 24 |
Aug 06 09:15:27 PM PDT 24 |
11492501880 ps |
| T295 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.2500917066 |
|
|
Aug 06 08:22:43 PM PDT 24 |
Aug 06 08:33:47 PM PDT 24 |
6066494856 ps |
| T357 |
/workspace/coverage/default/1.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.2663206732 |
|
|
Aug 06 08:27:23 PM PDT 24 |
Aug 06 08:38:57 PM PDT 24 |
17803938600 ps |
| T833 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.2437816947 |
|
|
Aug 06 08:46:43 PM PDT 24 |
Aug 06 08:53:29 PM PDT 24 |
3628701872 ps |
| T135 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.238117649 |
|
|
Aug 06 08:24:27 PM PDT 24 |
Aug 06 08:33:15 PM PDT 24 |
5364143416 ps |
| T53 |
/workspace/coverage/default/2.chip_sw_sleep_pin_retention.806819288 |
|
|
Aug 06 08:25:05 PM PDT 24 |
Aug 06 08:31:43 PM PDT 24 |
3410789444 ps |
| T67 |
/workspace/coverage/default/1.chip_tap_straps_rma.3510333585 |
|
|
Aug 06 08:21:59 PM PDT 24 |
Aug 06 08:32:42 PM PDT 24 |
6717405732 ps |
| T1058 |
/workspace/coverage/default/2.chip_sw_kmac_idle.3056162555 |
|
|
Aug 06 08:35:39 PM PDT 24 |
Aug 06 08:40:23 PM PDT 24 |
2876713184 ps |
| T367 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.1248226760 |
|
|
Aug 06 08:24:48 PM PDT 24 |
Aug 06 08:37:15 PM PDT 24 |
4728484470 ps |
| T75 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_wake_ups.414121661 |
|
|
Aug 06 08:24:11 PM PDT 24 |
Aug 06 08:30:25 PM PDT 24 |
7618079768 ps |
| T1059 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.195831627 |
|
|
Aug 06 08:27:32 PM PDT 24 |
Aug 06 08:31:49 PM PDT 24 |
2476006468 ps |
| T298 |
/workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.304858293 |
|
|
Aug 06 08:25:55 PM PDT 24 |
Aug 06 09:05:29 PM PDT 24 |
17524755022 ps |
| T786 |
/workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.1862658199 |
|
|
Aug 06 08:49:14 PM PDT 24 |
Aug 06 08:55:43 PM PDT 24 |
4045239504 ps |
| T394 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_lockstep_glitch.1727547199 |
|
|
Aug 06 08:23:40 PM PDT 24 |
Aug 06 08:26:30 PM PDT 24 |
2388806528 ps |
| T338 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.1734280478 |
|
|
Aug 06 08:31:08 PM PDT 24 |
Aug 06 08:43:06 PM PDT 24 |
4299501230 ps |
| T1060 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.394099036 |
|
|
Aug 06 08:36:23 PM PDT 24 |
Aug 06 08:45:15 PM PDT 24 |
8326713348 ps |
| T1061 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.2386498721 |
|
|
Aug 06 08:21:23 PM PDT 24 |
Aug 06 08:51:49 PM PDT 24 |
11265581664 ps |
| T1062 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_invalid_meas.2020630982 |
|
|
Aug 06 08:26:27 PM PDT 24 |
Aug 06 09:29:04 PM PDT 24 |
15054195858 ps |
| T241 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.4081977410 |
|
|
Aug 06 08:43:53 PM PDT 24 |
Aug 06 08:56:17 PM PDT 24 |
6013135080 ps |
| T164 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.2801423621 |
|
|
Aug 06 08:22:18 PM PDT 24 |
Aug 06 08:24:20 PM PDT 24 |
2516534803 ps |
| T139 |
/workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.1902147245 |
|
|
Aug 06 08:40:12 PM PDT 24 |
Aug 06 08:49:09 PM PDT 24 |
4325077440 ps |
| T57 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.1109211203 |
|
|
Aug 06 08:27:20 PM PDT 24 |
Aug 06 08:31:53 PM PDT 24 |
3535566968 ps |
| T422 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.174041706 |
|
|
Aug 06 08:32:48 PM PDT 24 |
Aug 06 08:39:18 PM PDT 24 |
4879087208 ps |
| T423 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_rma.663487828 |
|
|
Aug 06 08:21:13 PM PDT 24 |
Aug 06 09:16:13 PM PDT 24 |
29858212003 ps |
| T376 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.105439193 |
|
|
Aug 06 08:41:20 PM PDT 24 |
Aug 06 08:49:05 PM PDT 24 |
3524020960 ps |
| T253 |
/workspace/coverage/default/5.chip_sw_data_integrity_escalation.76008848 |
|
|
Aug 06 08:40:27 PM PDT 24 |
Aug 06 08:51:52 PM PDT 24 |
5307440750 ps |
| T424 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.414416700 |
|
|
Aug 06 08:43:08 PM PDT 24 |
Aug 06 08:52:38 PM PDT 24 |
5238590010 ps |
| T81 |
/workspace/coverage/default/1.chip_jtag_mem_access.2461295649 |
|
|
Aug 06 08:10:39 PM PDT 24 |
Aug 06 08:37:31 PM PDT 24 |
13768783253 ps |
| T425 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod.470100320 |
|
|
Aug 06 08:28:59 PM PDT 24 |
Aug 06 09:43:37 PM PDT 24 |
14871804957 ps |