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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.09 95.39 93.88 95.50 94.82 97.35 99.58


Total test records in report: 2935
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T1401 /workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.1484756627 Aug 10 08:34:19 PM PDT 24 Aug 10 08:36:09 PM PDT 24 2130485563 ps
T272 /workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.4222402845 Aug 10 08:23:46 PM PDT 24 Aug 10 09:32:29 PM PDT 24 16125849196 ps
T1402 /workspace/coverage/default/33.chip_sw_alert_handler_lpg_sleep_mode_alerts.2240864437 Aug 10 08:45:45 PM PDT 24 Aug 10 08:54:22 PM PDT 24 3889711606 ps
T1403 /workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.3409468259 Aug 10 08:16:43 PM PDT 24 Aug 10 08:27:05 PM PDT 24 4563405970 ps
T709 /workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.1129884442 Aug 10 08:33:00 PM PDT 24 Aug 10 08:47:57 PM PDT 24 4454872028 ps
T303 /workspace/coverage/default/1.chip_sw_rstmgr_alert_info.1349545837 Aug 10 08:20:54 PM PDT 24 Aug 10 08:44:18 PM PDT 24 11783776056 ps
T1404 /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.3764595100 Aug 10 08:25:07 PM PDT 24 Aug 10 08:35:09 PM PDT 24 6134328618 ps
T812 /workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.2606576761 Aug 10 08:46:58 PM PDT 24 Aug 10 08:53:43 PM PDT 24 3379580556 ps
T1405 /workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.3760462526 Aug 10 08:27:14 PM PDT 24 Aug 10 08:39:19 PM PDT 24 4670373608 ps
T1406 /workspace/coverage/default/1.rom_raw_unlock.1518117000 Aug 10 08:33:25 PM PDT 24 Aug 10 08:37:51 PM PDT 24 4808419029 ps
T1407 /workspace/coverage/default/2.chip_sw_keymgr_key_derivation_prod.2208724213 Aug 10 08:35:42 PM PDT 24 Aug 10 09:07:23 PM PDT 24 10758305900 ps
T694 /workspace/coverage/default/1.chip_sw_plic_sw_irq.3835861817 Aug 10 08:25:00 PM PDT 24 Aug 10 08:30:12 PM PDT 24 3142977976 ps
T399 /workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.2909857640 Aug 10 08:26:20 PM PDT 24 Aug 10 08:35:39 PM PDT 24 4861502232 ps
T1408 /workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.2345442009 Aug 10 08:18:22 PM PDT 24 Aug 10 11:34:48 PM PDT 24 58464780620 ps
T269 /workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.2312071287 Aug 10 08:12:47 PM PDT 24 Aug 10 08:30:41 PM PDT 24 6376126472 ps
T1409 /workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.2272383307 Aug 10 08:41:05 PM PDT 24 Aug 10 08:50:19 PM PDT 24 6648046212 ps
T693 /workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.3869857384 Aug 10 08:32:55 PM PDT 24 Aug 10 08:38:21 PM PDT 24 3374257320 ps
T79 /workspace/coverage/cover_reg_top/29.xbar_smoke.4258991187 Aug 10 07:49:42 PM PDT 24 Aug 10 07:49:52 PM PDT 24 197426853 ps
T80 /workspace/coverage/cover_reg_top/59.xbar_smoke_large_delays.2662286466 Aug 10 07:55:41 PM PDT 24 Aug 10 07:57:29 PM PDT 24 9984436541 ps
T81 /workspace/coverage/cover_reg_top/51.xbar_error_and_unmapped_addr.2457837400 Aug 10 07:54:20 PM PDT 24 Aug 10 07:54:49 PM PDT 24 761511581 ps
T85 /workspace/coverage/cover_reg_top/87.xbar_random_zero_delays.2635315505 Aug 10 08:00:44 PM PDT 24 Aug 10 08:01:00 PM PDT 24 172485489 ps
T209 /workspace/coverage/cover_reg_top/29.xbar_error_and_unmapped_addr.1450223788 Aug 10 07:49:50 PM PDT 24 Aug 10 07:49:57 PM PDT 24 84787040 ps
T412 /workspace/coverage/cover_reg_top/27.xbar_access_same_device_slow_rsp.3606597919 Aug 10 07:49:27 PM PDT 24 Aug 10 08:16:55 PM PDT 24 88444471585 ps
T137 /workspace/coverage/cover_reg_top/26.xbar_stress_all_with_reset_error.4151252029 Aug 10 07:49:21 PM PDT 24 Aug 10 07:55:13 PM PDT 24 8884411461 ps
T413 /workspace/coverage/cover_reg_top/28.xbar_random_zero_delays.1670060439 Aug 10 07:49:35 PM PDT 24 Aug 10 07:50:16 PM PDT 24 441741476 ps
T482 /workspace/coverage/cover_reg_top/39.xbar_unmapped_addr.2324815951 Aug 10 07:51:59 PM PDT 24 Aug 10 07:52:50 PM PDT 24 1364539613 ps
T521 /workspace/coverage/cover_reg_top/45.xbar_smoke_slow_rsp.3032251342 Aug 10 07:53:16 PM PDT 24 Aug 10 07:54:38 PM PDT 24 5195467620 ps
T523 /workspace/coverage/cover_reg_top/18.xbar_smoke.1872731745 Aug 10 07:47:11 PM PDT 24 Aug 10 07:47:19 PM PDT 24 207051285 ps
T366 /workspace/coverage/cover_reg_top/11.chip_csr_rw.2972077645 Aug 10 07:45:39 PM PDT 24 Aug 10 07:57:14 PM PDT 24 5984742696 ps
T531 /workspace/coverage/cover_reg_top/75.xbar_smoke_large_delays.39584110 Aug 10 07:58:31 PM PDT 24 Aug 10 08:00:02 PM PDT 24 8736818489 ps
T528 /workspace/coverage/cover_reg_top/28.xbar_smoke.2174631771 Aug 10 07:49:38 PM PDT 24 Aug 10 07:49:45 PM PDT 24 44256035 ps
T526 /workspace/coverage/cover_reg_top/29.xbar_smoke_large_delays.2422659081 Aug 10 07:49:43 PM PDT 24 Aug 10 07:51:19 PM PDT 24 8905703366 ps
T391 /workspace/coverage/cover_reg_top/77.xbar_stress_all.2596569468 Aug 10 07:59:05 PM PDT 24 Aug 10 08:11:14 PM PDT 24 19120973121 ps
T533 /workspace/coverage/cover_reg_top/70.xbar_smoke_large_delays.1287505099 Aug 10 07:57:42 PM PDT 24 Aug 10 07:59:04 PM PDT 24 7635601958 ps
T518 /workspace/coverage/cover_reg_top/58.xbar_random_slow_rsp.350337632 Aug 10 07:55:35 PM PDT 24 Aug 10 08:03:11 PM PDT 24 25537066124 ps
T534 /workspace/coverage/cover_reg_top/69.xbar_smoke.1936030777 Aug 10 07:57:27 PM PDT 24 Aug 10 07:57:36 PM PDT 24 219796235 ps
T527 /workspace/coverage/cover_reg_top/23.xbar_smoke_slow_rsp.2054251800 Aug 10 07:48:33 PM PDT 24 Aug 10 07:50:17 PM PDT 24 5925649477 ps
T532 /workspace/coverage/cover_reg_top/65.xbar_smoke_zero_delays.1595186500 Aug 10 07:56:50 PM PDT 24 Aug 10 07:56:56 PM PDT 24 47367031 ps
T512 /workspace/coverage/cover_reg_top/82.xbar_random_large_delays.1647579533 Aug 10 07:59:51 PM PDT 24 Aug 10 08:19:55 PM PDT 24 110682691219 ps
T426 /workspace/coverage/cover_reg_top/25.xbar_stress_all_with_rand_reset.814982257 Aug 10 07:49:04 PM PDT 24 Aug 10 07:50:16 PM PDT 24 97570272 ps
T522 /workspace/coverage/cover_reg_top/0.xbar_smoke_large_delays.94243316 Aug 10 07:43:16 PM PDT 24 Aug 10 07:44:51 PM PDT 24 9396338518 ps
T525 /workspace/coverage/cover_reg_top/85.xbar_error_and_unmapped_addr.4257741956 Aug 10 08:00:27 PM PDT 24 Aug 10 08:00:37 PM PDT 24 78037884 ps
T530 /workspace/coverage/cover_reg_top/60.xbar_random_zero_delays.3897097912 Aug 10 07:55:57 PM PDT 24 Aug 10 07:56:08 PM PDT 24 95535919 ps
T513 /workspace/coverage/cover_reg_top/48.xbar_random_slow_rsp.2986929543 Aug 10 07:53:42 PM PDT 24 Aug 10 08:10:45 PM PDT 24 59041915392 ps
T519 /workspace/coverage/cover_reg_top/92.xbar_access_same_device_slow_rsp.3045507673 Aug 10 08:01:43 PM PDT 24 Aug 10 08:11:50 PM PDT 24 35161009699 ps
T520 /workspace/coverage/cover_reg_top/29.xbar_same_source.389344699 Aug 10 07:49:51 PM PDT 24 Aug 10 07:51:02 PM PDT 24 2540913239 ps
T152 /workspace/coverage/cover_reg_top/15.chip_same_csr_outstanding.890166696 Aug 10 07:46:17 PM PDT 24 Aug 10 08:40:24 PM PDT 24 27432142036 ps
T514 /workspace/coverage/cover_reg_top/37.xbar_access_same_device_slow_rsp.1454479348 Aug 10 07:51:39 PM PDT 24 Aug 10 08:31:46 PM PDT 24 139188731465 ps
T516 /workspace/coverage/cover_reg_top/92.xbar_stress_all_with_reset_error.2281921126 Aug 10 08:01:48 PM PDT 24 Aug 10 08:09:25 PM PDT 24 9868399787 ps
T631 /workspace/coverage/cover_reg_top/68.xbar_smoke_slow_rsp.906835487 Aug 10 07:57:19 PM PDT 24 Aug 10 07:58:58 PM PDT 24 6083056046 ps
T706 /workspace/coverage/cover_reg_top/53.xbar_random_large_delays.71700106 Aug 10 07:54:37 PM PDT 24 Aug 10 07:57:35 PM PDT 24 17096350080 ps
T529 /workspace/coverage/cover_reg_top/42.xbar_unmapped_addr.1263431899 Aug 10 07:52:53 PM PDT 24 Aug 10 07:53:24 PM PDT 24 688781160 ps
T517 /workspace/coverage/cover_reg_top/43.xbar_stress_all.4143729388 Aug 10 07:52:54 PM PDT 24 Aug 10 07:55:18 PM PDT 24 1907881319 ps
T524 /workspace/coverage/cover_reg_top/72.xbar_access_same_device.1137216991 Aug 10 07:58:03 PM PDT 24 Aug 10 07:58:26 PM PDT 24 499072126 ps
T624 /workspace/coverage/cover_reg_top/12.xbar_random_large_delays.3731660227 Aug 10 07:45:46 PM PDT 24 Aug 10 07:50:51 PM PDT 24 29624165951 ps
T432 /workspace/coverage/cover_reg_top/88.xbar_random.4205618951 Aug 10 08:00:52 PM PDT 24 Aug 10 08:01:20 PM PDT 24 330339902 ps
T828 /workspace/coverage/cover_reg_top/55.xbar_access_same_device_slow_rsp.3373533401 Aug 10 07:55:03 PM PDT 24 Aug 10 08:20:46 PM PDT 24 86703478320 ps
T620 /workspace/coverage/cover_reg_top/98.xbar_smoke_zero_delays.2959641899 Aug 10 08:02:40 PM PDT 24 Aug 10 08:02:46 PM PDT 24 49964147 ps
T626 /workspace/coverage/cover_reg_top/80.xbar_smoke.3410730007 Aug 10 07:59:31 PM PDT 24 Aug 10 07:59:37 PM PDT 24 47113013 ps
T713 /workspace/coverage/cover_reg_top/69.xbar_stress_all_with_reset_error.2144967062 Aug 10 07:57:44 PM PDT 24 Aug 10 07:59:57 PM PDT 24 1695011294 ps
T677 /workspace/coverage/cover_reg_top/27.xbar_stress_all_with_error.1551856323 Aug 10 07:49:37 PM PDT 24 Aug 10 07:52:03 PM PDT 24 1764242966 ps
T515 /workspace/coverage/cover_reg_top/4.xbar_stress_all_with_reset_error.2647637071 Aug 10 07:44:09 PM PDT 24 Aug 10 07:55:16 PM PDT 24 13801298930 ps
T1410 /workspace/coverage/cover_reg_top/56.xbar_smoke_slow_rsp.218425222 Aug 10 07:55:08 PM PDT 24 Aug 10 07:56:34 PM PDT 24 5066025499 ps
T551 /workspace/coverage/cover_reg_top/66.xbar_random_zero_delays.1057887609 Aug 10 07:56:57 PM PDT 24 Aug 10 07:57:15 PM PDT 24 171173779 ps
T377 /workspace/coverage/cover_reg_top/1.chip_csr_bit_bash.3090751793 Aug 10 07:43:23 PM PDT 24 Aug 10 08:01:17 PM PDT 24 10055617898 ps
T153 /workspace/coverage/cover_reg_top/16.chip_csr_rw.867872426 Aug 10 07:46:55 PM PDT 24 Aug 10 07:52:38 PM PDT 24 3868358201 ps
T1411 /workspace/coverage/cover_reg_top/10.xbar_error_random.4292646488 Aug 10 07:45:26 PM PDT 24 Aug 10 07:46:11 PM PDT 24 541924059 ps
T469 /workspace/coverage/cover_reg_top/52.xbar_stress_all_with_rand_reset.2275020561 Aug 10 07:54:33 PM PDT 24 Aug 10 08:01:46 PM PDT 24 10604749345 ps
T660 /workspace/coverage/cover_reg_top/89.xbar_smoke_large_delays.4153432701 Aug 10 08:01:09 PM PDT 24 Aug 10 08:02:51 PM PDT 24 9843826855 ps
T687 /workspace/coverage/cover_reg_top/37.xbar_access_same_device.1086264748 Aug 10 07:51:33 PM PDT 24 Aug 10 07:53:51 PM PDT 24 3764431142 ps
T1412 /workspace/coverage/cover_reg_top/67.xbar_error_and_unmapped_addr.3570404520 Aug 10 07:57:11 PM PDT 24 Aug 10 07:57:25 PM PDT 24 326421319 ps
T447 /workspace/coverage/cover_reg_top/76.xbar_random_slow_rsp.3555667187 Aug 10 07:58:43 PM PDT 24 Aug 10 08:06:02 PM PDT 24 25235603391 ps
T830 /workspace/coverage/cover_reg_top/3.xbar_access_same_device_slow_rsp.3669506504 Aug 10 07:43:56 PM PDT 24 Aug 10 08:01:25 PM PDT 24 62922461069 ps
T1413 /workspace/coverage/cover_reg_top/57.xbar_smoke_large_delays.1282317852 Aug 10 07:55:22 PM PDT 24 Aug 10 07:56:58 PM PDT 24 9595872199 ps
T1414 /workspace/coverage/cover_reg_top/22.xbar_smoke.1619750275 Aug 10 07:48:07 PM PDT 24 Aug 10 07:48:13 PM PDT 24 38434566 ps
T680 /workspace/coverage/cover_reg_top/34.xbar_stress_all_with_error.2184724903 Aug 10 07:51:05 PM PDT 24 Aug 10 07:51:52 PM PDT 24 1464852504 ps
T629 /workspace/coverage/cover_reg_top/1.xbar_random_slow_rsp.81661605 Aug 10 07:43:33 PM PDT 24 Aug 10 07:51:04 PM PDT 24 26654215139 ps
T615 /workspace/coverage/cover_reg_top/31.xbar_random_large_delays.2652696226 Aug 10 07:50:18 PM PDT 24 Aug 10 07:51:26 PM PDT 24 6702371252 ps
T545 /workspace/coverage/cover_reg_top/24.xbar_unmapped_addr.3098412527 Aug 10 07:48:47 PM PDT 24 Aug 10 07:49:29 PM PDT 24 947095952 ps
T1415 /workspace/coverage/cover_reg_top/40.xbar_same_source.614542267 Aug 10 07:52:12 PM PDT 24 Aug 10 07:52:21 PM PDT 24 218568153 ps
T427 /workspace/coverage/cover_reg_top/45.xbar_random_zero_delays.2364112937 Aug 10 07:53:10 PM PDT 24 Aug 10 07:53:59 PM PDT 24 620498007 ps
T617 /workspace/coverage/cover_reg_top/10.xbar_random.3669642485 Aug 10 07:45:20 PM PDT 24 Aug 10 07:45:49 PM PDT 24 813367845 ps
T623 /workspace/coverage/cover_reg_top/27.xbar_smoke_slow_rsp.2798999734 Aug 10 07:49:18 PM PDT 24 Aug 10 07:51:00 PM PDT 24 6028362502 ps
T154 /workspace/coverage/cover_reg_top/4.chip_csr_rw.2524774180 Aug 10 07:44:07 PM PDT 24 Aug 10 07:54:23 PM PDT 24 5935420920 ps
T542 /workspace/coverage/cover_reg_top/37.xbar_same_source.2064398212 Aug 10 07:51:34 PM PDT 24 Aug 10 07:51:54 PM PDT 24 241660741 ps
T633 /workspace/coverage/cover_reg_top/25.xbar_smoke_slow_rsp.3459477077 Aug 10 07:48:56 PM PDT 24 Aug 10 07:50:32 PM PDT 24 5447927008 ps
T502 /workspace/coverage/cover_reg_top/51.xbar_random_zero_delays.783023772 Aug 10 07:54:18 PM PDT 24 Aug 10 07:55:09 PM PDT 24 599468463 ps
T543 /workspace/coverage/cover_reg_top/14.xbar_random_slow_rsp.2318355289 Aug 10 07:46:17 PM PDT 24 Aug 10 08:04:10 PM PDT 24 61723484004 ps
T537 /workspace/coverage/cover_reg_top/44.xbar_random_zero_delays.913787150 Aug 10 07:53:03 PM PDT 24 Aug 10 07:53:49 PM PDT 24 506245387 ps
T467 /workspace/coverage/cover_reg_top/25.xbar_random_large_delays.1550580724 Aug 10 07:49:03 PM PDT 24 Aug 10 08:03:46 PM PDT 24 82507398732 ps
T853 /workspace/coverage/cover_reg_top/71.xbar_access_same_device_slow_rsp.2486816577 Aug 10 07:57:55 PM PDT 24 Aug 10 08:03:14 PM PDT 24 18688954439 ps
T1416 /workspace/coverage/cover_reg_top/58.xbar_error_and_unmapped_addr.2478634636 Aug 10 07:55:35 PM PDT 24 Aug 10 07:55:48 PM PDT 24 114840983 ps
T1417 /workspace/coverage/cover_reg_top/43.xbar_error_and_unmapped_addr.2968578211 Aug 10 07:52:53 PM PDT 24 Aug 10 07:53:15 PM PDT 24 209546808 ps
T1418 /workspace/coverage/cover_reg_top/87.xbar_error_and_unmapped_addr.3123239671 Aug 10 08:00:45 PM PDT 24 Aug 10 08:00:51 PM PDT 24 22390388 ps
T681 /workspace/coverage/cover_reg_top/76.xbar_stress_all_with_error.837545686 Aug 10 07:58:48 PM PDT 24 Aug 10 08:02:23 PM PDT 24 6366550907 ps
T1419 /workspace/coverage/cover_reg_top/45.xbar_stress_all_with_error.1831343418 Aug 10 07:53:19 PM PDT 24 Aug 10 07:53:50 PM PDT 24 405381456 ps
T634 /workspace/coverage/cover_reg_top/52.xbar_smoke_zero_delays.4241168475 Aug 10 07:54:23 PM PDT 24 Aug 10 07:54:30 PM PDT 24 42680684 ps
T1420 /workspace/coverage/cover_reg_top/10.xbar_error_and_unmapped_addr.3821767446 Aug 10 07:45:26 PM PDT 24 Aug 10 07:45:52 PM PDT 24 229892716 ps
T632 /workspace/coverage/cover_reg_top/30.xbar_random_large_delays.2812430832 Aug 10 07:50:02 PM PDT 24 Aug 10 07:52:12 PM PDT 24 12567415808 ps
T643 /workspace/coverage/cover_reg_top/59.xbar_same_source.3232736343 Aug 10 07:55:53 PM PDT 24 Aug 10 07:56:18 PM PDT 24 328869633 ps
T1421 /workspace/coverage/cover_reg_top/56.xbar_smoke_large_delays.3551648985 Aug 10 07:55:07 PM PDT 24 Aug 10 07:56:17 PM PDT 24 6720571960 ps
T602 /workspace/coverage/cover_reg_top/51.xbar_random.1871911779 Aug 10 07:54:19 PM PDT 24 Aug 10 07:54:39 PM PDT 24 460896531 ps
T646 /workspace/coverage/cover_reg_top/90.xbar_same_source.1042419339 Aug 10 08:01:25 PM PDT 24 Aug 10 08:01:44 PM PDT 24 691652485 ps
T659 /workspace/coverage/cover_reg_top/29.xbar_smoke_zero_delays.2441384646 Aug 10 07:49:42 PM PDT 24 Aug 10 07:49:48 PM PDT 24 44033443 ps
T581 /workspace/coverage/cover_reg_top/44.xbar_unmapped_addr.893832349 Aug 10 07:53:02 PM PDT 24 Aug 10 07:53:55 PM PDT 24 1394110981 ps
T1422 /workspace/coverage/cover_reg_top/60.xbar_random_slow_rsp.4129987757 Aug 10 07:55:58 PM PDT 24 Aug 10 07:57:04 PM PDT 24 3974220168 ps
T831 /workspace/coverage/cover_reg_top/0.xbar_random_slow_rsp.3291689064 Aug 10 07:43:21 PM PDT 24 Aug 10 07:45:54 PM PDT 24 9254548325 ps
T1423 /workspace/coverage/cover_reg_top/22.xbar_error_and_unmapped_addr.1773441421 Aug 10 07:48:22 PM PDT 24 Aug 10 07:48:50 PM PDT 24 743287624 ps
T599 /workspace/coverage/cover_reg_top/22.xbar_same_source.347794108 Aug 10 07:48:16 PM PDT 24 Aug 10 07:48:28 PM PDT 24 136917491 ps
T574 /workspace/coverage/cover_reg_top/76.xbar_random_zero_delays.1317618713 Aug 10 07:58:43 PM PDT 24 Aug 10 07:59:19 PM PDT 24 428767994 ps
T610 /workspace/coverage/cover_reg_top/85.xbar_random_slow_rsp.2954148557 Aug 10 08:00:17 PM PDT 24 Aug 10 08:03:42 PM PDT 24 12472230672 ps
T688 /workspace/coverage/cover_reg_top/6.xbar_unmapped_addr.1680676277 Aug 10 07:44:38 PM PDT 24 Aug 10 07:45:15 PM PDT 24 927645162 ps
T552 /workspace/coverage/cover_reg_top/10.xbar_unmapped_addr.1641599403 Aug 10 07:45:28 PM PDT 24 Aug 10 07:46:08 PM PDT 24 315089682 ps
T642 /workspace/coverage/cover_reg_top/20.xbar_smoke.4191625831 Aug 10 07:47:44 PM PDT 24 Aug 10 07:47:50 PM PDT 24 46116579 ps
T582 /workspace/coverage/cover_reg_top/1.xbar_random_zero_delays.511054742 Aug 10 07:43:27 PM PDT 24 Aug 10 07:43:48 PM PDT 24 244639369 ps
T628 /workspace/coverage/cover_reg_top/67.xbar_random_zero_delays.792055965 Aug 10 07:57:17 PM PDT 24 Aug 10 07:57:57 PM PDT 24 457308904 ps
T1424 /workspace/coverage/cover_reg_top/80.xbar_random_slow_rsp.4218909931 Aug 10 07:59:28 PM PDT 24 Aug 10 08:01:24 PM PDT 24 7119752166 ps
T1425 /workspace/coverage/cover_reg_top/95.xbar_smoke_slow_rsp.4122441985 Aug 10 08:02:09 PM PDT 24 Aug 10 08:03:38 PM PDT 24 5723678559 ps
T461 /workspace/coverage/cover_reg_top/39.xbar_random_zero_delays.2002822334 Aug 10 07:51:55 PM PDT 24 Aug 10 07:52:39 PM PDT 24 557440418 ps
T442 /workspace/coverage/cover_reg_top/78.xbar_smoke_zero_delays.1292526034 Aug 10 07:59:07 PM PDT 24 Aug 10 07:59:14 PM PDT 24 55720460 ps
T571 /workspace/coverage/cover_reg_top/54.xbar_random_zero_delays.198922831 Aug 10 07:54:55 PM PDT 24 Aug 10 07:55:34 PM PDT 24 476751527 ps
T595 /workspace/coverage/cover_reg_top/21.xbar_random_zero_delays.3532409510 Aug 10 07:48:08 PM PDT 24 Aug 10 07:48:39 PM PDT 24 306311839 ps
T468 /workspace/coverage/cover_reg_top/94.xbar_same_source.2725727251 Aug 10 08:02:03 PM PDT 24 Aug 10 08:02:33 PM PDT 24 1060212668 ps
T535 /workspace/coverage/cover_reg_top/17.chip_tl_errors.2523326365 Aug 10 07:46:54 PM PDT 24 Aug 10 07:52:38 PM PDT 24 3701112180 ps
T1426 /workspace/coverage/cover_reg_top/68.xbar_unmapped_addr.1067465026 Aug 10 07:57:29 PM PDT 24 Aug 10 07:57:45 PM PDT 24 333442629 ps
T439 /workspace/coverage/cover_reg_top/77.xbar_access_same_device.1123021686 Aug 10 07:58:56 PM PDT 24 Aug 10 08:00:10 PM PDT 24 978542613 ps
T871 /workspace/coverage/cover_reg_top/97.xbar_smoke_slow_rsp.1455791972 Aug 10 08:02:33 PM PDT 24 Aug 10 08:04:17 PM PDT 24 6028585588 ps
T1427 /workspace/coverage/cover_reg_top/10.xbar_same_source.3936539145 Aug 10 07:45:33 PM PDT 24 Aug 10 07:45:47 PM PDT 24 169732792 ps
T655 /workspace/coverage/cover_reg_top/67.xbar_random_slow_rsp.2457023134 Aug 10 07:57:11 PM PDT 24 Aug 10 08:00:51 PM PDT 24 14352931266 ps
T554 /workspace/coverage/cover_reg_top/61.xbar_same_source.1068001811 Aug 10 07:56:11 PM PDT 24 Aug 10 07:56:47 PM PDT 24 1289250890 ps
T1428 /workspace/coverage/cover_reg_top/43.xbar_same_source.1746154928 Aug 10 07:52:57 PM PDT 24 Aug 10 07:53:07 PM PDT 24 231567605 ps
T884 /workspace/coverage/cover_reg_top/21.xbar_stress_all_with_reset_error.2719241172 Aug 10 07:48:08 PM PDT 24 Aug 10 07:52:31 PM PDT 24 634004709 ps
T584 /workspace/coverage/cover_reg_top/66.xbar_random_large_delays.2912781864 Aug 10 07:57:09 PM PDT 24 Aug 10 08:02:27 PM PDT 24 30155461051 ps
T429 /workspace/coverage/cover_reg_top/20.xbar_stress_all.2752548919 Aug 10 07:47:58 PM PDT 24 Aug 10 07:52:56 PM PDT 24 3367070761 ps
T590 /workspace/coverage/cover_reg_top/94.xbar_smoke_zero_delays.2585126269 Aug 10 08:01:58 PM PDT 24 Aug 10 08:02:04 PM PDT 24 48833367 ps
T466 /workspace/coverage/cover_reg_top/81.xbar_same_source.1321986171 Aug 10 07:59:45 PM PDT 24 Aug 10 08:00:15 PM PDT 24 1038019877 ps
T630 /workspace/coverage/cover_reg_top/26.xbar_smoke.1350824184 Aug 10 07:49:12 PM PDT 24 Aug 10 07:49:22 PM PDT 24 194655169 ps
T850 /workspace/coverage/cover_reg_top/12.xbar_access_same_device.3279196996 Aug 10 07:45:47 PM PDT 24 Aug 10 07:46:30 PM PDT 24 564010362 ps
T710 /workspace/coverage/cover_reg_top/26.xbar_access_same_device.715067793 Aug 10 07:49:12 PM PDT 24 Aug 10 07:51:06 PM PDT 24 3192846287 ps
T437 /workspace/coverage/cover_reg_top/54.xbar_stress_all.1415021401 Aug 10 07:54:54 PM PDT 24 Aug 10 07:55:43 PM PDT 24 552330822 ps
T1429 /workspace/coverage/cover_reg_top/85.xbar_error_random.2066779907 Aug 10 08:00:25 PM PDT 24 Aug 10 08:01:06 PM PDT 24 487923181 ps
T849 /workspace/coverage/cover_reg_top/22.xbar_access_same_device_slow_rsp.529987613 Aug 10 07:48:19 PM PDT 24 Aug 10 07:54:52 PM PDT 24 23605459516 ps
T1430 /workspace/coverage/cover_reg_top/14.xbar_random_zero_delays.707490345 Aug 10 07:46:14 PM PDT 24 Aug 10 07:46:20 PM PDT 24 38951201 ps
T597 /workspace/coverage/cover_reg_top/37.xbar_stress_all_with_rand_reset.1211330668 Aug 10 07:51:40 PM PDT 24 Aug 10 07:54:04 PM PDT 24 344668436 ps
T1431 /workspace/coverage/cover_reg_top/84.xbar_smoke_zero_delays.1516563751 Aug 10 08:00:14 PM PDT 24 Aug 10 08:00:20 PM PDT 24 53331315 ps
T1432 /workspace/coverage/cover_reg_top/3.xbar_smoke_slow_rsp.3775186906 Aug 10 07:43:57 PM PDT 24 Aug 10 07:45:18 PM PDT 24 4831919135 ps
T577 /workspace/coverage/cover_reg_top/45.xbar_unmapped_addr.3582270147 Aug 10 07:53:13 PM PDT 24 Aug 10 07:54:04 PM PDT 24 1248479573 ps
T608 /workspace/coverage/cover_reg_top/38.xbar_stress_all.2563931031 Aug 10 07:51:48 PM PDT 24 Aug 10 07:52:43 PM PDT 24 1617224091 ps
T1433 /workspace/coverage/cover_reg_top/37.xbar_smoke_zero_delays.3766914079 Aug 10 07:51:25 PM PDT 24 Aug 10 07:51:32 PM PDT 24 45495749 ps
T507 /workspace/coverage/cover_reg_top/86.xbar_unmapped_addr.1553775032 Aug 10 08:00:37 PM PDT 24 Aug 10 08:01:03 PM PDT 24 218311826 ps
T1434 /workspace/coverage/cover_reg_top/75.xbar_smoke_zero_delays.2736826960 Aug 10 07:58:36 PM PDT 24 Aug 10 07:58:42 PM PDT 24 51331236 ps
T1435 /workspace/coverage/cover_reg_top/88.xbar_smoke_zero_delays.2932905910 Aug 10 08:00:52 PM PDT 24 Aug 10 08:00:59 PM PDT 24 48088214 ps
T576 /workspace/coverage/cover_reg_top/6.xbar_stress_all_with_error.2728931784 Aug 10 07:44:38 PM PDT 24 Aug 10 07:50:42 PM PDT 24 10228536133 ps
T558 /workspace/coverage/cover_reg_top/80.xbar_stress_all_with_rand_reset.488019990 Aug 10 07:59:36 PM PDT 24 Aug 10 08:04:40 PM PDT 24 6260458532 ps
T557 /workspace/coverage/cover_reg_top/90.xbar_random_large_delays.2407026796 Aug 10 08:01:22 PM PDT 24 Aug 10 08:13:10 PM PDT 24 64853202679 ps
T600 /workspace/coverage/cover_reg_top/2.xbar_random_zero_delays.998840898 Aug 10 07:43:50 PM PDT 24 Aug 10 07:44:05 PM PDT 24 165486250 ps
T841 /workspace/coverage/cover_reg_top/72.xbar_access_same_device_slow_rsp.3649788405 Aug 10 07:58:02 PM PDT 24 Aug 10 08:21:52 PM PDT 24 81645542692 ps
T836 /workspace/coverage/cover_reg_top/88.xbar_stress_all_with_reset_error.178902730 Aug 10 08:01:07 PM PDT 24 Aug 10 08:03:54 PM PDT 24 1035411699 ps
T832 /workspace/coverage/cover_reg_top/31.xbar_access_same_device.579533466 Aug 10 07:50:18 PM PDT 24 Aug 10 07:51:57 PM PDT 24 2197837959 ps
T1436 /workspace/coverage/cover_reg_top/11.xbar_smoke_slow_rsp.1008794538 Aug 10 07:45:48 PM PDT 24 Aug 10 07:47:06 PM PDT 24 4669031806 ps
T714 /workspace/coverage/cover_reg_top/15.xbar_stress_all_with_error.3635190236 Aug 10 07:46:26 PM PDT 24 Aug 10 07:48:38 PM PDT 24 1588809661 ps
T625 /workspace/coverage/cover_reg_top/50.xbar_unmapped_addr.3184787718 Aug 10 07:54:09 PM PDT 24 Aug 10 07:54:32 PM PDT 24 200392626 ps
T1437 /workspace/coverage/cover_reg_top/60.xbar_stress_all.767304974 Aug 10 07:56:03 PM PDT 24 Aug 10 07:56:07 PM PDT 24 6622382 ps
T471 /workspace/coverage/cover_reg_top/49.xbar_random.1532770468 Aug 10 07:53:54 PM PDT 24 Aug 10 07:55:06 PM PDT 24 1979980606 ps
T428 /workspace/coverage/cover_reg_top/24.xbar_random_zero_delays.2450491240 Aug 10 07:48:45 PM PDT 24 Aug 10 07:49:20 PM PDT 24 412435972 ps
T1438 /workspace/coverage/cover_reg_top/96.xbar_smoke_slow_rsp.1300227024 Aug 10 08:02:21 PM PDT 24 Aug 10 08:03:56 PM PDT 24 5959751865 ps
T644 /workspace/coverage/cover_reg_top/55.xbar_smoke.3538000727 Aug 10 07:55:02 PM PDT 24 Aug 10 07:55:11 PM PDT 24 220951134 ps
T148 /workspace/coverage/cover_reg_top/2.chip_csr_hw_reset.1221357663 Aug 10 07:43:49 PM PDT 24 Aug 10 07:47:28 PM PDT 24 3873192384 ps
T1439 /workspace/coverage/cover_reg_top/83.xbar_smoke.1261590592 Aug 10 07:59:58 PM PDT 24 Aug 10 08:00:04 PM PDT 24 44366673 ps
T847 /workspace/coverage/cover_reg_top/47.xbar_access_same_device.3707284958 Aug 10 07:53:33 PM PDT 24 Aug 10 07:54:10 PM PDT 24 532883171 ps
T536 /workspace/coverage/cover_reg_top/18.chip_tl_errors.1459992673 Aug 10 07:47:07 PM PDT 24 Aug 10 07:53:11 PM PDT 24 4684246547 ps
T472 /workspace/coverage/cover_reg_top/7.xbar_random_large_delays.3076718889 Aug 10 07:44:45 PM PDT 24 Aug 10 08:04:35 PM PDT 24 117516696542 ps
T606 /workspace/coverage/cover_reg_top/89.xbar_unmapped_addr.3717168092 Aug 10 08:01:10 PM PDT 24 Aug 10 08:01:52 PM PDT 24 948796724 ps
T556 /workspace/coverage/cover_reg_top/28.xbar_stress_all_with_rand_reset.3255304223 Aug 10 07:49:48 PM PDT 24 Aug 10 07:58:23 PM PDT 24 5722104632 ps
T567 /workspace/coverage/cover_reg_top/65.xbar_random.3811704502 Aug 10 07:56:48 PM PDT 24 Aug 10 07:57:56 PM PDT 24 2153078746 ps
T1440 /workspace/coverage/cover_reg_top/96.xbar_unmapped_addr.2275991421 Aug 10 08:02:32 PM PDT 24 Aug 10 08:03:08 PM PDT 24 317796564 ps
T1441 /workspace/coverage/cover_reg_top/48.xbar_stress_all_with_error.345283176 Aug 10 07:53:49 PM PDT 24 Aug 10 07:55:32 PM PDT 24 2826205029 ps
T601 /workspace/coverage/cover_reg_top/71.xbar_same_source.1921203726 Aug 10 07:57:55 PM PDT 24 Aug 10 07:58:22 PM PDT 24 860915268 ps
T540 /workspace/coverage/cover_reg_top/19.xbar_random.340428609 Aug 10 07:47:28 PM PDT 24 Aug 10 07:47:57 PM PDT 24 352096170 ps
T363 /workspace/coverage/cover_reg_top/5.chip_same_csr_outstanding.38719883 Aug 10 07:44:08 PM PDT 24 Aug 10 08:37:09 PM PDT 24 26456993302 ps
T1442 /workspace/coverage/cover_reg_top/60.xbar_smoke_slow_rsp.1373285826 Aug 10 07:55:54 PM PDT 24 Aug 10 07:57:12 PM PDT 24 4853442558 ps
T586 /workspace/coverage/cover_reg_top/42.xbar_smoke.378928379 Aug 10 07:52:34 PM PDT 24 Aug 10 07:52:42 PM PDT 24 140094052 ps
T1443 /workspace/coverage/cover_reg_top/74.xbar_smoke_slow_rsp.1110628344 Aug 10 07:58:16 PM PDT 24 Aug 10 07:59:24 PM PDT 24 4077190425 ps
T1444 /workspace/coverage/cover_reg_top/7.xbar_access_same_device.3870730035 Aug 10 07:44:52 PM PDT 24 Aug 10 07:45:28 PM PDT 24 955244622 ps
T1445 /workspace/coverage/cover_reg_top/7.xbar_smoke_slow_rsp.3153748477 Aug 10 07:44:42 PM PDT 24 Aug 10 07:45:42 PM PDT 24 3458067348 ps
T1446 /workspace/coverage/cover_reg_top/82.xbar_error_random.1682271958 Aug 10 07:59:52 PM PDT 24 Aug 10 07:59:58 PM PDT 24 37243582 ps
T892 /workspace/coverage/cover_reg_top/87.xbar_stress_all_with_reset_error.2636001530 Aug 10 08:00:57 PM PDT 24 Aug 10 08:02:34 PM PDT 24 213487145 ps
T384 /workspace/coverage/cover_reg_top/12.chip_csr_mem_rw_with_rand_reset.1483866372 Aug 10 07:45:52 PM PDT 24 Aug 10 07:52:13 PM PDT 24 6157582231 ps
T378 /workspace/coverage/cover_reg_top/1.chip_csr_mem_rw_with_rand_reset.2724558892 Aug 10 07:43:36 PM PDT 24 Aug 10 07:58:44 PM PDT 24 11685581024 ps
T585 /workspace/coverage/cover_reg_top/79.xbar_random_slow_rsp.888466128 Aug 10 07:59:24 PM PDT 24 Aug 10 08:14:26 PM PDT 24 50843533538 ps
T834 /workspace/coverage/cover_reg_top/86.xbar_access_same_device_slow_rsp.1630408630 Aug 10 08:00:32 PM PDT 24 Aug 10 08:25:36 PM PDT 24 81659458333 ps
T682 /workspace/coverage/cover_reg_top/72.xbar_stress_all_with_error.4046233504 Aug 10 07:58:04 PM PDT 24 Aug 10 08:01:23 PM PDT 24 6464985706 ps
T1447 /workspace/coverage/cover_reg_top/78.xbar_smoke_large_delays.3809420287 Aug 10 07:59:04 PM PDT 24 Aug 10 08:00:23 PM PDT 24 7869070109 ps
T1448 /workspace/coverage/cover_reg_top/43.xbar_smoke.73931795 Aug 10 07:52:46 PM PDT 24 Aug 10 07:52:54 PM PDT 24 178025972 ps
T1449 /workspace/coverage/cover_reg_top/11.xbar_error_and_unmapped_addr.3818642538 Aug 10 07:45:39 PM PDT 24 Aug 10 07:46:19 PM PDT 24 969967198 ps
T451 /workspace/coverage/cover_reg_top/37.xbar_random_slow_rsp.2082608080 Aug 10 07:51:34 PM PDT 24 Aug 10 08:01:35 PM PDT 24 35573195040 ps
T385 /workspace/coverage/cover_reg_top/5.chip_csr_rw.3311485799 Aug 10 07:44:25 PM PDT 24 Aug 10 07:53:14 PM PDT 24 5914431610 ps
T508 /workspace/coverage/cover_reg_top/48.xbar_smoke.1353456023 Aug 10 07:53:41 PM PDT 24 Aug 10 07:53:47 PM PDT 24 41311300 ps
T435 /workspace/coverage/cover_reg_top/37.xbar_stress_all.3498609589 Aug 10 07:51:41 PM PDT 24 Aug 10 07:57:02 PM PDT 24 8770404461 ps
T462 /workspace/coverage/cover_reg_top/11.xbar_random_zero_delays.3442618276 Aug 10 07:45:32 PM PDT 24 Aug 10 07:46:08 PM PDT 24 404625904 ps
T1450 /workspace/coverage/cover_reg_top/14.xbar_random.295331875 Aug 10 07:46:14 PM PDT 24 Aug 10 07:46:32 PM PDT 24 414443039 ps
T837 /workspace/coverage/cover_reg_top/75.xbar_access_same_device.3117902082 Aug 10 07:58:41 PM PDT 24 Aug 10 07:59:37 PM PDT 24 704632569 ps
T390 /workspace/coverage/cover_reg_top/17.chip_csr_mem_rw_with_rand_reset.2291223523 Aug 10 07:47:09 PM PDT 24 Aug 10 07:55:30 PM PDT 24 5171684021 ps
T833 /workspace/coverage/cover_reg_top/68.xbar_access_same_device_slow_rsp.3821716671 Aug 10 07:57:22 PM PDT 24 Aug 10 08:27:21 PM PDT 24 92095578966 ps
T1451 /workspace/coverage/cover_reg_top/13.xbar_smoke_large_delays.212684644 Aug 10 07:46:00 PM PDT 24 Aug 10 07:47:43 PM PDT 24 9873722664 ps
T846 /workspace/coverage/cover_reg_top/54.xbar_access_same_device_slow_rsp.732875666 Aug 10 07:54:53 PM PDT 24 Aug 10 08:12:10 PM PDT 24 59489006061 ps
T863 /workspace/coverage/cover_reg_top/16.xbar_access_same_device_slow_rsp.468744445 Aug 10 07:46:48 PM PDT 24 Aug 10 08:03:36 PM PDT 24 62782065338 ps
T433 /workspace/coverage/cover_reg_top/72.xbar_random_zero_delays.984284492 Aug 10 07:58:03 PM PDT 24 Aug 10 07:58:23 PM PDT 24 222421699 ps
T842 /workspace/coverage/cover_reg_top/19.xbar_access_same_device_slow_rsp.3017851239 Aug 10 07:47:28 PM PDT 24 Aug 10 08:02:38 PM PDT 24 54613568181 ps
T589 /workspace/coverage/cover_reg_top/56.xbar_stress_all_with_rand_reset.1097743680 Aug 10 07:55:16 PM PDT 24 Aug 10 07:59:19 PM PDT 24 981144976 ps
T1452 /workspace/coverage/cover_reg_top/9.xbar_smoke_large_delays.3717623733 Aug 10 07:45:14 PM PDT 24 Aug 10 07:46:43 PM PDT 24 8982096245 ps
T1453 /workspace/coverage/cover_reg_top/17.xbar_smoke_slow_rsp.342286030 Aug 10 07:46:53 PM PDT 24 Aug 10 07:48:30 PM PDT 24 5630508563 ps
T896 /workspace/coverage/cover_reg_top/90.xbar_stress_all_with_reset_error.4013870245 Aug 10 08:01:24 PM PDT 24 Aug 10 08:03:21 PM PDT 24 497476879 ps
T1454 /workspace/coverage/cover_reg_top/47.xbar_smoke_large_delays.3327839256 Aug 10 07:53:27 PM PDT 24 Aug 10 07:55:03 PM PDT 24 8870971774 ps
T1455 /workspace/coverage/cover_reg_top/0.xbar_error_and_unmapped_addr.2350007744 Aug 10 07:43:22 PM PDT 24 Aug 10 07:44:05 PM PDT 24 1170952300 ps
T901 /workspace/coverage/cover_reg_top/62.xbar_stress_all_with_rand_reset.3198972330 Aug 10 07:56:29 PM PDT 24 Aug 10 07:57:14 PM PDT 24 120024434 ps
T844 /workspace/coverage/cover_reg_top/20.xbar_stress_all_with_reset_error.2417805737 Aug 10 07:48:00 PM PDT 24 Aug 10 07:50:20 PM PDT 24 706844579 ps
T538 /workspace/coverage/cover_reg_top/3.chip_tl_errors.3633598244 Aug 10 07:43:50 PM PDT 24 Aug 10 07:47:14 PM PDT 24 3367043965 ps
T440 /workspace/coverage/cover_reg_top/61.xbar_stress_all.230006931 Aug 10 07:56:14 PM PDT 24 Aug 10 08:02:48 PM PDT 24 10870172651 ps
T477 /workspace/coverage/cover_reg_top/2.xbar_random_large_delays.1748521021 Aug 10 07:43:45 PM PDT 24 Aug 10 07:54:27 PM PDT 24 65326944402 ps
T1456 /workspace/coverage/cover_reg_top/60.xbar_smoke_zero_delays.2476964083 Aug 10 07:55:49 PM PDT 24 Aug 10 07:55:56 PM PDT 24 44871000 ps
T845 /workspace/coverage/cover_reg_top/48.xbar_access_same_device.4152115030 Aug 10 07:53:40 PM PDT 24 Aug 10 07:54:53 PM PDT 24 1802159017 ps
T1457 /workspace/coverage/cover_reg_top/14.xbar_smoke_slow_rsp.831492702 Aug 10 07:46:17 PM PDT 24 Aug 10 07:47:40 PM PDT 24 5200076839 ps
T1458 /workspace/coverage/cover_reg_top/28.xbar_error_and_unmapped_addr.1959152219 Aug 10 07:49:43 PM PDT 24 Aug 10 07:50:04 PM PDT 24 472354053 ps
T490 /workspace/coverage/cover_reg_top/44.xbar_random_large_delays.77177305 Aug 10 07:53:02 PM PDT 24 Aug 10 07:56:15 PM PDT 24 18722104537 ps
T1459 /workspace/coverage/cover_reg_top/99.xbar_error_and_unmapped_addr.2884929107 Aug 10 08:03:02 PM PDT 24 Aug 10 08:03:58 PM PDT 24 1358914798 ps
T1460 /workspace/coverage/cover_reg_top/38.xbar_smoke_slow_rsp.3901612598 Aug 10 07:51:42 PM PDT 24 Aug 10 07:53:06 PM PDT 24 4974551487 ps
T860 /workspace/coverage/cover_reg_top/13.xbar_stress_all_with_reset_error.2789475459 Aug 10 07:46:06 PM PDT 24 Aug 10 07:58:53 PM PDT 24 18931634413 ps
T859 /workspace/coverage/cover_reg_top/92.xbar_stress_all_with_error.992341853 Aug 10 08:01:51 PM PDT 24 Aug 10 08:08:09 PM PDT 24 10100248942 ps
T1461 /workspace/coverage/cover_reg_top/96.xbar_error_and_unmapped_addr.2648050398 Aug 10 08:02:34 PM PDT 24 Aug 10 08:02:52 PM PDT 24 171967961 ps
T505 /workspace/coverage/cover_reg_top/63.xbar_stress_all_with_rand_reset.1919725812 Aug 10 07:56:32 PM PDT 24 Aug 10 07:58:34 PM PDT 24 298005779 ps
T463 /workspace/coverage/cover_reg_top/21.xbar_unmapped_addr.3259336678 Aug 10 07:48:12 PM PDT 24 Aug 10 07:48:23 PM PDT 24 75282209 ps
T492 /workspace/coverage/cover_reg_top/6.xbar_access_same_device.1703380839 Aug 10 07:44:38 PM PDT 24 Aug 10 07:45:54 PM PDT 24 1138325914 ps
T503 /workspace/coverage/cover_reg_top/99.xbar_stress_all.336256059 Aug 10 08:03:02 PM PDT 24 Aug 10 08:09:46 PM PDT 24 11243020220 ps
T1462 /workspace/coverage/cover_reg_top/49.xbar_smoke_slow_rsp.3590735194 Aug 10 07:53:55 PM PDT 24 Aug 10 07:55:40 PM PDT 24 6219357139 ps
T1463 /workspace/coverage/cover_reg_top/96.xbar_random.2848245271 Aug 10 08:02:28 PM PDT 24 Aug 10 08:02:36 PM PDT 24 149873417 ps
T434 /workspace/coverage/cover_reg_top/26.xbar_stress_all.3985000146 Aug 10 07:49:20 PM PDT 24 Aug 10 07:55:37 PM PDT 24 8752803359 ps
T443 /workspace/coverage/cover_reg_top/23.xbar_random.2201519888 Aug 10 07:48:33 PM PDT 24 Aug 10 07:49:13 PM PDT 24 509199221 ps
T1464 /workspace/coverage/cover_reg_top/58.xbar_error_random.1930213544 Aug 10 07:55:35 PM PDT 24 Aug 10 07:56:56 PM PDT 24 2351009614 ps
T1465 /workspace/coverage/cover_reg_top/0.xbar_smoke_slow_rsp.3413861947 Aug 10 07:43:16 PM PDT 24 Aug 10 07:44:49 PM PDT 24 5215851196 ps
T1466 /workspace/coverage/cover_reg_top/89.xbar_error_and_unmapped_addr.557567644 Aug 10 08:01:16 PM PDT 24 Aug 10 08:02:09 PM PDT 24 1149096144 ps
T539 /workspace/coverage/cover_reg_top/36.xbar_stress_all_with_rand_reset.4152002898 Aug 10 07:51:26 PM PDT 24 Aug 10 08:01:12 PM PDT 24 12835233494 ps
T1467 /workspace/coverage/cover_reg_top/63.xbar_smoke_large_delays.2504860142 Aug 10 07:56:29 PM PDT 24 Aug 10 07:57:43 PM PDT 24 7644681928 ps
T398 /workspace/coverage/cover_reg_top/15.chip_csr_mem_rw_with_rand_reset.237815762 Aug 10 07:46:34 PM PDT 24 Aug 10 07:55:40 PM PDT 24 6907977784 ps
T563 /workspace/coverage/cover_reg_top/39.xbar_stress_all.1883702310 Aug 10 07:51:55 PM PDT 24 Aug 10 07:58:25 PM PDT 24 10104366541 ps
T1468 /workspace/coverage/cover_reg_top/42.xbar_random_zero_delays.323333726 Aug 10 07:52:48 PM PDT 24 Aug 10 07:52:54 PM PDT 24 39338642 ps
T1469 /workspace/coverage/cover_reg_top/61.xbar_smoke_slow_rsp.878064912 Aug 10 07:56:11 PM PDT 24 Aug 10 07:57:29 PM PDT 24 4755841148 ps
T424 /workspace/coverage/cover_reg_top/27.xbar_stress_all.2899530934 Aug 10 07:49:37 PM PDT 24 Aug 10 07:52:01 PM PDT 24 2030373760 ps
T856 /workspace/coverage/cover_reg_top/97.xbar_access_same_device.3166212146 Aug 10 08:02:41 PM PDT 24 Aug 10 08:03:32 PM PDT 24 737830942 ps
T867 /workspace/coverage/cover_reg_top/89.xbar_access_same_device.322537458 Aug 10 08:01:07 PM PDT 24 Aug 10 08:01:47 PM PDT 24 642717804 ps
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