| T904 |
/workspace/coverage/default/2.chip_sw_entropy_src_kat_test.1872950727 |
|
|
Aug 16 07:26:21 PM PDT 24 |
Aug 16 07:30:12 PM PDT 24 |
3137514392 ps |
| T52 |
/workspace/coverage/default/1.chip_sw_alert_test.1429880943 |
|
|
Aug 16 07:16:49 PM PDT 24 |
Aug 16 07:24:20 PM PDT 24 |
3732087740 ps |
| T746 |
/workspace/coverage/default/83.chip_sw_alert_handler_lpg_sleep_mode_alerts.1164030840 |
|
|
Aug 16 07:40:23 PM PDT 24 |
Aug 16 07:46:55 PM PDT 24 |
3472377296 ps |
| T118 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.3392213022 |
|
|
Aug 16 07:18:29 PM PDT 24 |
Aug 16 07:27:53 PM PDT 24 |
4311872346 ps |
| T676 |
/workspace/coverage/default/0.chip_sw_aon_timer_irq.3903221674 |
|
|
Aug 16 07:10:02 PM PDT 24 |
Aug 16 07:19:03 PM PDT 24 |
4190898282 ps |
| T905 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq.454519827 |
|
|
Aug 16 07:32:20 PM PDT 24 |
Aug 16 08:07:51 PM PDT 24 |
13226129140 ps |
| T703 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.3422668799 |
|
|
Aug 16 07:40:24 PM PDT 24 |
Aug 16 07:48:40 PM PDT 24 |
4727172028 ps |
| T906 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.989484973 |
|
|
Aug 16 07:06:38 PM PDT 24 |
Aug 16 07:41:42 PM PDT 24 |
26082465071 ps |
| T907 |
/workspace/coverage/default/1.chip_sw_csrng_kat_test.2441519477 |
|
|
Aug 16 07:15:05 PM PDT 24 |
Aug 16 07:19:34 PM PDT 24 |
3005983434 ps |
| T354 |
/workspace/coverage/default/12.chip_sw_all_escalation_resets.4097789722 |
|
|
Aug 16 07:34:08 PM PDT 24 |
Aug 16 07:43:48 PM PDT 24 |
6474051112 ps |
| T908 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_smoketest.2289581818 |
|
|
Aug 16 07:30:07 PM PDT 24 |
Aug 16 07:34:35 PM PDT 24 |
2936719240 ps |
| T175 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en.1936990389 |
|
|
Aug 16 07:18:22 PM PDT 24 |
Aug 16 07:26:03 PM PDT 24 |
3727129093 ps |
| T909 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx1.3586634716 |
|
|
Aug 16 07:12:40 PM PDT 24 |
Aug 16 07:22:43 PM PDT 24 |
4259601780 ps |
| T910 |
/workspace/coverage/default/13.chip_sw_lc_ctrl_transition.3319436076 |
|
|
Aug 16 07:33:37 PM PDT 24 |
Aug 16 07:41:12 PM PDT 24 |
5625180507 ps |
| T261 |
/workspace/coverage/default/2.chip_sw_rstmgr_cpu_info.3138741492 |
|
|
Aug 16 07:24:02 PM PDT 24 |
Aug 16 07:37:54 PM PDT 24 |
7818559280 ps |
| T911 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.2991333404 |
|
|
Aug 16 07:08:01 PM PDT 24 |
Aug 16 08:34:41 PM PDT 24 |
20841618544 ps |
| T912 |
/workspace/coverage/default/0.chip_sw_uart_smoketest.2096107276 |
|
|
Aug 16 07:12:37 PM PDT 24 |
Aug 16 07:16:43 PM PDT 24 |
2646039326 ps |
| T913 |
/workspace/coverage/default/4.chip_sw_uart_rand_baudrate.3767678290 |
|
|
Aug 16 07:31:46 PM PDT 24 |
Aug 16 07:58:14 PM PDT 24 |
8474060266 ps |
| T914 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.3786043257 |
|
|
Aug 16 07:09:12 PM PDT 24 |
Aug 16 07:14:32 PM PDT 24 |
3160740522 ps |
| T60 |
/workspace/coverage/default/2.chip_sw_spi_device_pinmux_sleep_retention.2060178470 |
|
|
Aug 16 07:22:22 PM PDT 24 |
Aug 16 07:26:22 PM PDT 24 |
2984385058 ps |
| T915 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_smoketest.1571242893 |
|
|
Aug 16 07:21:38 PM PDT 24 |
Aug 16 07:25:10 PM PDT 24 |
2730199144 ps |
| T275 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.1408103363 |
|
|
Aug 16 07:18:18 PM PDT 24 |
Aug 16 08:39:17 PM PDT 24 |
18207103816 ps |
| T386 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_lockstep_glitch.4268414658 |
|
|
Aug 16 07:32:02 PM PDT 24 |
Aug 16 07:37:14 PM PDT 24 |
3322671440 ps |
| T916 |
/workspace/coverage/default/12.chip_sw_lc_ctrl_transition.1206260989 |
|
|
Aug 16 07:33:53 PM PDT 24 |
Aug 16 07:42:44 PM PDT 24 |
7213568850 ps |
| T61 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.4218053991 |
|
|
Aug 16 07:12:56 PM PDT 24 |
Aug 16 07:19:11 PM PDT 24 |
3200543852 ps |
| T220 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_dev.3015850586 |
|
|
Aug 16 07:12:12 PM PDT 24 |
Aug 16 07:32:26 PM PDT 24 |
6352499072 ps |
| T416 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.2476633033 |
|
|
Aug 16 07:14:23 PM PDT 24 |
Aug 16 08:16:01 PM PDT 24 |
17353468740 ps |
| T225 |
/workspace/coverage/default/0.chip_sw_alert_handler_escalation.2551085574 |
|
|
Aug 16 07:09:56 PM PDT 24 |
Aug 16 07:19:37 PM PDT 24 |
5398914820 ps |
| T417 |
/workspace/coverage/default/16.chip_sw_all_escalation_resets.1921275706 |
|
|
Aug 16 07:34:35 PM PDT 24 |
Aug 16 07:45:36 PM PDT 24 |
6033375536 ps |
| T178 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_execution_main.3371903535 |
|
|
Aug 16 07:08:06 PM PDT 24 |
Aug 16 07:19:20 PM PDT 24 |
8336865176 ps |
| T216 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx.2617556037 |
|
|
Aug 16 07:30:55 PM PDT 24 |
Aug 16 07:40:36 PM PDT 24 |
4242551684 ps |
| T418 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.3446106881 |
|
|
Aug 16 07:23:39 PM PDT 24 |
Aug 16 07:50:44 PM PDT 24 |
18470579573 ps |
| T262 |
/workspace/coverage/default/11.chip_sw_all_escalation_resets.3282661463 |
|
|
Aug 16 07:33:10 PM PDT 24 |
Aug 16 07:42:38 PM PDT 24 |
6016471930 ps |
| T419 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency.445336893 |
|
|
Aug 16 07:15:27 PM PDT 24 |
Aug 16 08:19:11 PM PDT 24 |
16410575300 ps |
| T372 |
/workspace/coverage/default/8.chip_sw_all_escalation_resets.3443054457 |
|
|
Aug 16 07:32:26 PM PDT 24 |
Aug 16 07:44:22 PM PDT 24 |
6104111080 ps |
| T288 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access.288956014 |
|
|
Aug 16 07:16:56 PM PDT 24 |
Aug 16 07:26:59 PM PDT 24 |
4307307604 ps |
| T151 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.2579381236 |
|
|
Aug 16 07:09:29 PM PDT 24 |
Aug 16 07:19:15 PM PDT 24 |
4355173798 ps |
| T357 |
/workspace/coverage/default/2.chip_sival_flash_info_access.2510859669 |
|
|
Aug 16 07:24:21 PM PDT 24 |
Aug 16 07:28:56 PM PDT 24 |
2812804202 ps |
| T917 |
/workspace/coverage/default/1.chip_sw_hmac_oneshot.4091777555 |
|
|
Aug 16 07:15:51 PM PDT 24 |
Aug 16 07:21:24 PM PDT 24 |
2421840428 ps |
| T918 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.1938820204 |
|
|
Aug 16 07:37:14 PM PDT 24 |
Aug 16 07:44:13 PM PDT 24 |
3354549394 ps |
| T919 |
/workspace/coverage/default/1.chip_sw_otbn_randomness.605391218 |
|
|
Aug 16 07:14:02 PM PDT 24 |
Aug 16 07:29:01 PM PDT 24 |
6093471816 ps |
| T254 |
/workspace/coverage/default/2.chip_sw_rv_timer_smoketest.4193742931 |
|
|
Aug 16 07:30:51 PM PDT 24 |
Aug 16 07:35:01 PM PDT 24 |
2743441960 ps |
| T246 |
/workspace/coverage/default/95.chip_sw_all_escalation_resets.3920037486 |
|
|
Aug 16 07:41:28 PM PDT 24 |
Aug 16 07:52:02 PM PDT 24 |
4716906380 ps |
| T297 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod_end.2310692926 |
|
|
Aug 16 07:28:12 PM PDT 24 |
Aug 16 08:21:58 PM PDT 24 |
15614021090 ps |
| T298 |
/workspace/coverage/default/18.chip_sw_uart_rand_baudrate.769359461 |
|
|
Aug 16 07:34:21 PM PDT 24 |
Aug 16 07:43:32 PM PDT 24 |
4121091540 ps |
| T51 |
/workspace/coverage/default/1.chip_jtag_csr_rw.2832170960 |
|
|
Aug 16 07:10:35 PM PDT 24 |
Aug 16 07:46:23 PM PDT 24 |
18781707128 ps |
| T39 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_ulp_z3_wakeup.2092274371 |
|
|
Aug 16 07:07:41 PM PDT 24 |
Aug 16 07:16:58 PM PDT 24 |
6405196706 ps |
| T161 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_dev.984923209 |
|
|
Aug 16 07:24:06 PM PDT 24 |
Aug 16 08:46:12 PM PDT 24 |
48134941640 ps |
| T299 |
/workspace/coverage/default/1.chip_sw_entropy_src_kat_test.2663153522 |
|
|
Aug 16 07:15:50 PM PDT 24 |
Aug 16 07:19:46 PM PDT 24 |
2288333480 ps |
| T300 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx2.3317232659 |
|
|
Aug 16 07:32:13 PM PDT 24 |
Aug 16 07:45:35 PM PDT 24 |
4151588110 ps |
| T301 |
/workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.3698412704 |
|
|
Aug 16 07:40:35 PM PDT 24 |
Aug 16 07:47:24 PM PDT 24 |
4004435800 ps |
| T302 |
/workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.4001897531 |
|
|
Aug 16 07:06:42 PM PDT 24 |
Aug 16 07:17:45 PM PDT 24 |
5065441690 ps |
| T169 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_program_error.3724662070 |
|
|
Aug 16 07:28:06 PM PDT 24 |
Aug 16 07:42:13 PM PDT 24 |
5292380228 ps |
| T920 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency.1741892083 |
|
|
Aug 16 07:27:50 PM PDT 24 |
Aug 16 08:23:23 PM PDT 24 |
15418515500 ps |
| T921 |
/workspace/coverage/default/19.chip_sw_uart_rand_baudrate.1817084701 |
|
|
Aug 16 07:35:13 PM PDT 24 |
Aug 16 07:58:08 PM PDT 24 |
8266808632 ps |
| T719 |
/workspace/coverage/default/16.chip_sw_alert_handler_lpg_sleep_mode_alerts.38635902 |
|
|
Aug 16 07:34:03 PM PDT 24 |
Aug 16 07:40:02 PM PDT 24 |
3139271880 ps |
| T67 |
/workspace/coverage/default/1.chip_tap_straps_rma.2025925121 |
|
|
Aug 16 07:18:44 PM PDT 24 |
Aug 16 07:32:28 PM PDT 24 |
7778590666 ps |
| T324 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.2484551549 |
|
|
Aug 16 07:08:32 PM PDT 24 |
Aug 16 07:43:54 PM PDT 24 |
13075367396 ps |
| T922 |
/workspace/coverage/default/4.chip_sw_lc_ctrl_transition.1278253391 |
|
|
Aug 16 07:32:25 PM PDT 24 |
Aug 16 07:49:55 PM PDT 24 |
9963352292 ps |
| T748 |
/workspace/coverage/default/63.chip_sw_alert_handler_lpg_sleep_mode_alerts.1451107341 |
|
|
Aug 16 07:38:02 PM PDT 24 |
Aug 16 07:42:36 PM PDT 24 |
3371443282 ps |
| T289 |
/workspace/coverage/default/2.chip_sw_otbn_mem_scramble.596670727 |
|
|
Aug 16 07:24:58 PM PDT 24 |
Aug 16 07:36:37 PM PDT 24 |
3973808480 ps |
| T325 |
/workspace/coverage/default/1.chip_sw_rstmgr_alert_info.731122723 |
|
|
Aug 16 07:15:08 PM PDT 24 |
Aug 16 07:49:25 PM PDT 24 |
11455683476 ps |
| T923 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.1204851249 |
|
|
Aug 16 07:20:56 PM PDT 24 |
Aug 16 07:25:20 PM PDT 24 |
2955104905 ps |
| T924 |
/workspace/coverage/default/1.chip_sw_aes_idle.563969507 |
|
|
Aug 16 07:14:38 PM PDT 24 |
Aug 16 07:18:13 PM PDT 24 |
3030819288 ps |
| T247 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.2320240386 |
|
|
Aug 16 07:37:26 PM PDT 24 |
Aug 16 07:45:52 PM PDT 24 |
4194762080 ps |
| T233 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.758971436 |
|
|
Aug 16 07:20:04 PM PDT 24 |
Aug 16 07:49:58 PM PDT 24 |
26619455051 ps |
| T925 |
/workspace/coverage/default/0.chip_sw_kmac_entropy.1292588361 |
|
|
Aug 16 07:06:46 PM PDT 24 |
Aug 16 07:10:25 PM PDT 24 |
3137657348 ps |
| T15 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through_collision.2874785741 |
|
|
Aug 16 07:20:59 PM PDT 24 |
Aug 16 07:32:22 PM PDT 24 |
5018578019 ps |
| T926 |
/workspace/coverage/default/1.chip_sw_flash_scrambling_smoketest.1362723686 |
|
|
Aug 16 07:25:25 PM PDT 24 |
Aug 16 07:29:07 PM PDT 24 |
2194521256 ps |
| T211 |
/workspace/coverage/default/2.chip_sw_gpio_smoketest.4322686 |
|
|
Aug 16 07:30:38 PM PDT 24 |
Aug 16 07:34:40 PM PDT 24 |
3395536198 ps |
| T927 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prodend.1814170484 |
|
|
Aug 16 07:27:33 PM PDT 24 |
Aug 16 07:43:19 PM PDT 24 |
9777833024 ps |
| T350 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx.992751015 |
|
|
Aug 16 07:07:01 PM PDT 24 |
Aug 16 07:26:44 PM PDT 24 |
5643809792 ps |
| T928 |
/workspace/coverage/default/50.chip_sw_all_escalation_resets.2328288053 |
|
|
Aug 16 07:37:33 PM PDT 24 |
Aug 16 07:45:51 PM PDT 24 |
4472458334 ps |
| T929 |
/workspace/coverage/default/2.rom_e2e_asm_init_rma.969334185 |
|
|
Aug 16 07:35:15 PM PDT 24 |
Aug 16 08:22:24 PM PDT 24 |
14729382575 ps |
| T248 |
/workspace/coverage/default/57.chip_sw_alert_handler_lpg_sleep_mode_alerts.231479705 |
|
|
Aug 16 07:42:30 PM PDT 24 |
Aug 16 07:51:20 PM PDT 24 |
3789351932 ps |
| T224 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.668632705 |
|
|
Aug 16 07:23:34 PM PDT 24 |
Aug 16 07:44:14 PM PDT 24 |
7119912824 ps |
| T930 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg0.1558045678 |
|
|
Aug 16 07:14:14 PM PDT 24 |
Aug 16 07:19:09 PM PDT 24 |
2801501378 ps |
| T931 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usbdev_smoketest.1265044254 |
|
|
Aug 16 07:29:57 PM PDT 24 |
Aug 16 07:39:07 PM PDT 24 |
6358048006 ps |
| T932 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_test_unlocked0.876308105 |
|
|
Aug 16 07:17:09 PM PDT 24 |
Aug 16 08:08:41 PM PDT 24 |
11740071040 ps |
| T396 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.2521749156 |
|
|
Aug 16 07:08:12 PM PDT 24 |
Aug 16 07:13:58 PM PDT 24 |
3117210218 ps |
| T179 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.1294449384 |
|
|
Aug 16 07:19:07 PM PDT 24 |
Aug 16 07:22:38 PM PDT 24 |
2655011862 ps |
| T41 |
/workspace/coverage/default/2.chip_sw_spi_device_tpm.2090301912 |
|
|
Aug 16 07:23:47 PM PDT 24 |
Aug 16 07:32:01 PM PDT 24 |
3648199920 ps |
| T933 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx1.1730369434 |
|
|
Aug 16 07:24:20 PM PDT 24 |
Aug 16 07:35:28 PM PDT 24 |
3512731128 ps |
| T934 |
/workspace/coverage/default/1.chip_sw_aes_smoketest.1808775167 |
|
|
Aug 16 07:22:10 PM PDT 24 |
Aug 16 07:26:44 PM PDT 24 |
2636824872 ps |
| T935 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_req.980334495 |
|
|
Aug 16 07:24:37 PM PDT 24 |
Aug 16 07:33:29 PM PDT 24 |
4959606204 ps |
| T936 |
/workspace/coverage/default/1.chip_sw_example_manufacturer.4251073374 |
|
|
Aug 16 07:10:06 PM PDT 24 |
Aug 16 07:14:12 PM PDT 24 |
3250765004 ps |
| T364 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.2099037227 |
|
|
Aug 16 07:22:17 PM PDT 24 |
Aug 16 07:28:22 PM PDT 24 |
3230456940 ps |
| T636 |
/workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.3185943726 |
|
|
Aug 16 07:33:59 PM PDT 24 |
Aug 16 09:01:24 PM PDT 24 |
25465801128 ps |
| T937 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.2756241299 |
|
|
Aug 16 07:06:45 PM PDT 24 |
Aug 16 07:10:24 PM PDT 24 |
2972779422 ps |
| T373 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.2695444459 |
|
|
Aug 16 07:41:29 PM PDT 24 |
Aug 16 07:51:56 PM PDT 24 |
5664290308 ps |
| T938 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.3506299450 |
|
|
Aug 16 07:10:38 PM PDT 24 |
Aug 16 07:15:54 PM PDT 24 |
2566749136 ps |
| T939 |
/workspace/coverage/default/3.chip_sw_uart_rand_baudrate.249306780 |
|
|
Aug 16 07:31:11 PM PDT 24 |
Aug 16 07:57:44 PM PDT 24 |
8969377064 ps |
| T940 |
/workspace/coverage/default/2.chip_sw_aon_timer_smoketest.294703640 |
|
|
Aug 16 07:30:31 PM PDT 24 |
Aug 16 07:35:42 PM PDT 24 |
2996694278 ps |
| T223 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_prod.349028006 |
|
|
Aug 16 07:08:49 PM PDT 24 |
Aug 16 07:28:42 PM PDT 24 |
6894968112 ps |
| T652 |
/workspace/coverage/default/35.chip_sw_all_escalation_resets.752721602 |
|
|
Aug 16 07:36:30 PM PDT 24 |
Aug 16 07:45:44 PM PDT 24 |
5117958944 ps |
| T941 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_wake_5_bug.2805442950 |
|
|
Aug 16 07:27:12 PM PDT 24 |
Aug 16 07:32:55 PM PDT 24 |
5529519934 ps |
| T683 |
/workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.652537153 |
|
|
Aug 16 07:39:55 PM PDT 24 |
Aug 16 07:46:35 PM PDT 24 |
4000528072 ps |
| T942 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access.2317517950 |
|
|
Aug 16 07:12:28 PM PDT 24 |
Aug 16 07:29:55 PM PDT 24 |
5690439228 ps |
| T36 |
/workspace/coverage/default/1.chip_sw_spi_host_tx_rx.3182349062 |
|
|
Aug 16 07:13:49 PM PDT 24 |
Aug 16 07:19:54 PM PDT 24 |
3557426578 ps |
| T290 |
/workspace/coverage/default/0.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2200953588 |
|
|
Aug 16 07:09:35 PM PDT 24 |
Aug 16 07:19:54 PM PDT 24 |
4068543808 ps |
| T369 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.1252335394 |
|
|
Aug 16 07:13:44 PM PDT 24 |
Aug 16 07:22:17 PM PDT 24 |
6444117132 ps |
| T943 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter.1301882874 |
|
|
Aug 16 07:28:11 PM PDT 24 |
Aug 16 07:31:05 PM PDT 24 |
2449613648 ps |
| T709 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.1725260920 |
|
|
Aug 16 07:17:05 PM PDT 24 |
Aug 16 07:25:03 PM PDT 24 |
3181123492 ps |
| T460 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.2004239587 |
|
|
Aug 16 07:16:07 PM PDT 24 |
Aug 16 07:30:38 PM PDT 24 |
5017281350 ps |
| T944 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.3928154856 |
|
|
Aug 16 07:08:20 PM PDT 24 |
Aug 16 07:17:15 PM PDT 24 |
4491263340 ps |
| T945 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.1548382056 |
|
|
Aug 16 07:07:37 PM PDT 24 |
Aug 16 07:34:21 PM PDT 24 |
7418493070 ps |
| T946 |
/workspace/coverage/default/1.chip_sw_example_flash.4203073067 |
|
|
Aug 16 07:16:42 PM PDT 24 |
Aug 16 07:20:23 PM PDT 24 |
3266721310 ps |
| T947 |
/workspace/coverage/default/0.chip_tap_straps_rma.3496179521 |
|
|
Aug 16 07:07:29 PM PDT 24 |
Aug 16 07:13:54 PM PDT 24 |
4762691822 ps |
| T316 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.772154392 |
|
|
Aug 16 07:20:31 PM PDT 24 |
Aug 16 07:38:27 PM PDT 24 |
5696964312 ps |
| T948 |
/workspace/coverage/default/1.chip_sw_otbn_mem_scramble.1240072322 |
|
|
Aug 16 07:16:14 PM PDT 24 |
Aug 16 07:24:21 PM PDT 24 |
3504249214 ps |
| T949 |
/workspace/coverage/default/0.chip_sw_pwrmgr_b2b_sleep_reset_req.1375828038 |
|
|
Aug 16 07:07:46 PM PDT 24 |
Aug 16 07:35:37 PM PDT 24 |
26286148929 ps |
| T668 |
/workspace/coverage/default/0.rom_raw_unlock.2913979745 |
|
|
Aug 16 07:12:45 PM PDT 24 |
Aug 16 07:16:48 PM PDT 24 |
4432586523 ps |
| T950 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.2231416165 |
|
|
Aug 16 07:27:51 PM PDT 24 |
Aug 16 07:31:35 PM PDT 24 |
2956318600 ps |
| T730 |
/workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.747576215 |
|
|
Aug 16 07:40:06 PM PDT 24 |
Aug 16 07:47:42 PM PDT 24 |
4106732378 ps |
| T951 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.3657827090 |
|
|
Aug 16 07:20:13 PM PDT 24 |
Aug 16 07:28:24 PM PDT 24 |
4224046253 ps |
| T728 |
/workspace/coverage/default/70.chip_sw_all_escalation_resets.449215478 |
|
|
Aug 16 07:39:44 PM PDT 24 |
Aug 16 07:49:51 PM PDT 24 |
5782657376 ps |
| T221 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.1177664486 |
|
|
Aug 16 07:22:41 PM PDT 24 |
Aug 16 07:46:03 PM PDT 24 |
7329222644 ps |
| T952 |
/workspace/coverage/default/2.rom_e2e_shutdown_exception_c.1145523585 |
|
|
Aug 16 07:34:24 PM PDT 24 |
Aug 16 08:20:22 PM PDT 24 |
14096870540 ps |
| T707 |
/workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.632038328 |
|
|
Aug 16 07:38:48 PM PDT 24 |
Aug 16 07:45:29 PM PDT 24 |
4315951192 ps |
| T355 |
/workspace/coverage/default/2.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.3045768893 |
|
|
Aug 16 07:24:49 PM PDT 24 |
Aug 16 07:37:06 PM PDT 24 |
19116280944 ps |
| T953 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.735371391 |
|
|
Aug 16 07:14:07 PM PDT 24 |
Aug 16 07:42:57 PM PDT 24 |
18262753598 ps |
| T752 |
/workspace/coverage/default/90.chip_sw_all_escalation_resets.4249569254 |
|
|
Aug 16 07:47:39 PM PDT 24 |
Aug 16 07:57:23 PM PDT 24 |
5531912384 ps |
| T677 |
/workspace/coverage/default/5.chip_sw_all_escalation_resets.3983287363 |
|
|
Aug 16 07:34:50 PM PDT 24 |
Aug 16 07:44:28 PM PDT 24 |
5425889178 ps |
| T954 |
/workspace/coverage/default/2.chip_tap_straps_testunlock0.3375287294 |
|
|
Aug 16 07:27:50 PM PDT 24 |
Aug 16 07:33:13 PM PDT 24 |
3701369199 ps |
| T236 |
/workspace/coverage/default/2.chip_sw_flash_init_reduced_freq.3997595071 |
|
|
Aug 16 07:28:23 PM PDT 24 |
Aug 16 08:04:38 PM PDT 24 |
21797498411 ps |
| T955 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_timeout.3186005172 |
|
|
Aug 16 07:14:15 PM PDT 24 |
Aug 16 07:22:41 PM PDT 24 |
5485624416 ps |
| T359 |
/workspace/coverage/default/21.chip_sw_all_escalation_resets.1412087341 |
|
|
Aug 16 07:34:59 PM PDT 24 |
Aug 16 07:46:53 PM PDT 24 |
5885001332 ps |
| T956 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_wake_5_bug.4196975512 |
|
|
Aug 16 07:09:46 PM PDT 24 |
Aug 16 07:18:22 PM PDT 24 |
5695502384 ps |
| T365 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.2942245158 |
|
|
Aug 16 07:12:53 PM PDT 24 |
Aug 16 07:29:23 PM PDT 24 |
9670548986 ps |
| T366 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_reset_reqs.2367194469 |
|
|
Aug 16 07:15:04 PM PDT 24 |
Aug 16 07:52:38 PM PDT 24 |
19996384772 ps |
| T769 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.3635649932 |
|
|
Aug 16 07:35:53 PM PDT 24 |
Aug 16 07:43:08 PM PDT 24 |
3957288578 ps |
| T753 |
/workspace/coverage/default/88.chip_sw_alert_handler_lpg_sleep_mode_alerts.2404937105 |
|
|
Aug 16 07:40:16 PM PDT 24 |
Aug 16 07:45:36 PM PDT 24 |
3892561114 ps |
| T235 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_rma.293474873 |
|
|
Aug 16 07:15:03 PM PDT 24 |
Aug 16 08:37:57 PM PDT 24 |
47668315000 ps |
| T42 |
/workspace/coverage/default/0.chip_sw_spi_device_tpm.2036453956 |
|
|
Aug 16 07:08:03 PM PDT 24 |
Aug 16 07:14:21 PM PDT 24 |
3832330369 ps |
| T721 |
/workspace/coverage/default/69.chip_sw_alert_handler_lpg_sleep_mode_alerts.1333755788 |
|
|
Aug 16 07:39:44 PM PDT 24 |
Aug 16 07:46:31 PM PDT 24 |
3932675160 ps |
| T957 |
/workspace/coverage/default/1.chip_sw_csrng_fuse_en_sw_app_read_test.2703063680 |
|
|
Aug 16 07:17:34 PM PDT 24 |
Aug 16 07:27:24 PM PDT 24 |
4286629970 ps |
| T958 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prodend.995508562 |
|
|
Aug 16 07:07:59 PM PDT 24 |
Aug 16 07:24:51 PM PDT 24 |
10997667656 ps |
| T778 |
/workspace/coverage/default/60.chip_sw_alert_handler_lpg_sleep_mode_alerts.392308829 |
|
|
Aug 16 07:37:48 PM PDT 24 |
Aug 16 07:43:57 PM PDT 24 |
3561811088 ps |
| T959 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx3.414992221 |
|
|
Aug 16 07:22:22 PM PDT 24 |
Aug 16 07:33:24 PM PDT 24 |
4414504680 ps |
| T170 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_program_error.1675587067 |
|
|
Aug 16 07:09:07 PM PDT 24 |
Aug 16 07:19:30 PM PDT 24 |
5109225014 ps |
| T157 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_vendor_test_csr_access.1086329949 |
|
|
Aug 16 07:22:42 PM PDT 24 |
Aug 16 07:24:51 PM PDT 24 |
2771195072 ps |
| T370 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.3224254252 |
|
|
Aug 16 07:30:22 PM PDT 24 |
Aug 16 07:37:59 PM PDT 24 |
5546798812 ps |
| T960 |
/workspace/coverage/default/1.chip_sw_edn_sw_mode.1540918298 |
|
|
Aug 16 07:16:31 PM PDT 24 |
Aug 16 07:35:16 PM PDT 24 |
6383127560 ps |
| T961 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.3512400104 |
|
|
Aug 16 07:29:57 PM PDT 24 |
Aug 16 07:47:48 PM PDT 24 |
5796920208 ps |
| T962 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_invalid_meas.180396845 |
|
|
Aug 16 07:15:58 PM PDT 24 |
Aug 16 08:10:01 PM PDT 24 |
15339818160 ps |
| T963 |
/workspace/coverage/default/2.chip_sw_pwrmgr_b2b_sleep_reset_req.3021068666 |
|
|
Aug 16 07:28:20 PM PDT 24 |
Aug 16 08:05:26 PM PDT 24 |
27189425888 ps |
| T322 |
/workspace/coverage/default/2.chip_sw_rstmgr_alert_info.174448377 |
|
|
Aug 16 07:28:06 PM PDT 24 |
Aug 16 07:52:40 PM PDT 24 |
11115991420 ps |
| T346 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.1343865886 |
|
|
Aug 16 07:25:12 PM PDT 24 |
Aug 16 07:37:16 PM PDT 24 |
4993639378 ps |
| T776 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.1568002710 |
|
|
Aug 16 07:35:56 PM PDT 24 |
Aug 16 07:44:09 PM PDT 24 |
3786623464 ps |
| T964 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_por_reset.2754082908 |
|
|
Aug 16 07:08:01 PM PDT 24 |
Aug 16 07:19:52 PM PDT 24 |
7157312940 ps |
| T710 |
/workspace/coverage/default/2.chip_sw_ast_clk_outputs.1693759768 |
|
|
Aug 16 07:30:01 PM PDT 24 |
Aug 16 07:46:37 PM PDT 24 |
8083979200 ps |
| T358 |
/workspace/coverage/default/2.chip_sw_hmac_enc.3951596596 |
|
|
Aug 16 07:26:40 PM PDT 24 |
Aug 16 07:32:38 PM PDT 24 |
2567734000 ps |
| T360 |
/workspace/coverage/default/72.chip_sw_all_escalation_resets.3158670342 |
|
|
Aug 16 07:38:09 PM PDT 24 |
Aug 16 07:46:17 PM PDT 24 |
4931484060 ps |
| T965 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter.2960755210 |
|
|
Aug 16 07:09:47 PM PDT 24 |
Aug 16 07:14:42 PM PDT 24 |
2714318469 ps |
| T966 |
/workspace/coverage/default/0.rom_e2e_self_hash.645358290 |
|
|
Aug 16 07:15:15 PM PDT 24 |
Aug 16 09:00:56 PM PDT 24 |
26081186852 ps |
| T356 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_status.2907381523 |
|
|
Aug 16 07:10:26 PM PDT 24 |
Aug 16 07:14:08 PM PDT 24 |
2938574885 ps |
| T967 |
/workspace/coverage/default/2.chip_sw_uart_smoketest.1108396714 |
|
|
Aug 16 07:30:30 PM PDT 24 |
Aug 16 07:36:12 PM PDT 24 |
3232669840 ps |
| T126 |
/workspace/coverage/default/0.chip_sw_sensor_ctrl_alert.3066652057 |
|
|
Aug 16 07:08:07 PM PDT 24 |
Aug 16 07:17:36 PM PDT 24 |
5707908744 ps |
| T968 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.2548879685 |
|
|
Aug 16 07:27:47 PM PDT 24 |
Aug 16 07:38:05 PM PDT 24 |
5311232134 ps |
| T969 |
/workspace/coverage/default/1.rom_e2e_self_hash.4158116859 |
|
|
Aug 16 07:28:44 PM PDT 24 |
Aug 16 09:00:45 PM PDT 24 |
25400192440 ps |
| T276 |
/workspace/coverage/default/0.chip_sw_data_integrity_escalation.4041657044 |
|
|
Aug 16 07:05:54 PM PDT 24 |
Aug 16 07:19:31 PM PDT 24 |
6162711908 ps |
| T278 |
/workspace/coverage/default/26.chip_sw_all_escalation_resets.1296222183 |
|
|
Aug 16 07:36:19 PM PDT 24 |
Aug 16 07:46:18 PM PDT 24 |
5739945348 ps |
| T279 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_rma.2458075524 |
|
|
Aug 16 07:16:06 PM PDT 24 |
Aug 16 08:45:38 PM PDT 24 |
23063338732 ps |
| T280 |
/workspace/coverage/default/0.chip_sw_rom_ctrl_integrity_check.451408155 |
|
|
Aug 16 07:08:43 PM PDT 24 |
Aug 16 07:18:10 PM PDT 24 |
9443532747 ps |
| T281 |
/workspace/coverage/default/0.chip_sw_edn_kat.1548374865 |
|
|
Aug 16 07:07:26 PM PDT 24 |
Aug 16 07:18:50 PM PDT 24 |
3340945512 ps |
| T282 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.172711345 |
|
|
Aug 16 07:10:50 PM PDT 24 |
Aug 16 08:15:37 PM PDT 24 |
25074375423 ps |
| T283 |
/workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.3668723465 |
|
|
Aug 16 07:08:53 PM PDT 24 |
Aug 16 07:18:45 PM PDT 24 |
3630819046 ps |
| T284 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.679735150 |
|
|
Aug 16 07:07:25 PM PDT 24 |
Aug 16 07:11:18 PM PDT 24 |
3995022588 ps |
| T110 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency_reduced_freq.2003864604 |
|
|
Aug 16 07:34:28 PM PDT 24 |
Aug 16 08:13:34 PM PDT 24 |
19329170992 ps |
| T25 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_reset.2704693093 |
|
|
Aug 16 07:13:55 PM PDT 24 |
Aug 16 07:45:25 PM PDT 24 |
22233104770 ps |
| T970 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_rma.3221228482 |
|
|
Aug 16 07:09:24 PM PDT 24 |
Aug 16 07:37:18 PM PDT 24 |
9697752450 ps |
| T971 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.1441042089 |
|
|
Aug 16 07:08:28 PM PDT 24 |
Aug 16 07:27:29 PM PDT 24 |
5431139196 ps |
| T972 |
/workspace/coverage/default/1.chip_sw_pwrmgr_wdog_reset.162031224 |
|
|
Aug 16 07:14:34 PM PDT 24 |
Aug 16 07:24:28 PM PDT 24 |
3766198004 ps |
| T759 |
/workspace/coverage/default/25.chip_sw_alert_handler_lpg_sleep_mode_alerts.1425386985 |
|
|
Aug 16 07:34:34 PM PDT 24 |
Aug 16 07:39:13 PM PDT 24 |
3825919176 ps |
| T646 |
/workspace/coverage/default/0.rom_volatile_raw_unlock.2154208340 |
|
|
Aug 16 07:14:31 PM PDT 24 |
Aug 16 07:16:23 PM PDT 24 |
2494985764 ps |
| T973 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.1732607692 |
|
|
Aug 16 07:25:02 PM PDT 24 |
Aug 16 07:48:03 PM PDT 24 |
6297114312 ps |
| T643 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.1245772629 |
|
|
Aug 16 07:08:14 PM PDT 24 |
Aug 16 07:16:33 PM PDT 24 |
5158535700 ps |
| T974 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_testunlocks.3933808333 |
|
|
Aug 16 07:15:02 PM PDT 24 |
Aug 16 07:56:52 PM PDT 24 |
29648010530 ps |
| T670 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_rma.3472501629 |
|
|
Aug 16 07:10:16 PM PDT 24 |
Aug 16 07:55:21 PM PDT 24 |
21803474377 ps |
| T669 |
/workspace/coverage/default/1.rom_raw_unlock.2365689515 |
|
|
Aug 16 07:20:39 PM PDT 24 |
Aug 16 07:24:47 PM PDT 24 |
6782512310 ps |
| T10 |
/workspace/coverage/default/1.chip_sw_sleep_pin_mio_dio_val.707084451 |
|
|
Aug 16 07:13:16 PM PDT 24 |
Aug 16 07:20:26 PM PDT 24 |
2820386809 ps |
| T975 |
/workspace/coverage/default/1.chip_sw_power_sleep_load.4192333868 |
|
|
Aug 16 07:21:14 PM PDT 24 |
Aug 16 07:31:06 PM PDT 24 |
9601680310 ps |
| T27 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.1128953154 |
|
|
Aug 16 07:06:35 PM PDT 24 |
Aug 16 07:40:10 PM PDT 24 |
8225938378 ps |
| T976 |
/workspace/coverage/default/0.chip_sw_rstmgr_sw_rst.3073772157 |
|
|
Aug 16 07:08:08 PM PDT 24 |
Aug 16 07:12:23 PM PDT 24 |
2117945550 ps |
| T977 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_idle_low_power.3133508460 |
|
|
Aug 16 07:12:46 PM PDT 24 |
Aug 16 07:18:40 PM PDT 24 |
3414965880 ps |
| T202 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_inputs.2900395574 |
|
|
Aug 16 07:07:41 PM PDT 24 |
Aug 16 07:13:59 PM PDT 24 |
2541249201 ps |
| T978 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_kmac.369698222 |
|
|
Aug 16 07:10:52 PM PDT 24 |
Aug 16 07:40:45 PM PDT 24 |
8059905936 ps |
| T704 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.1403643558 |
|
|
Aug 16 07:35:43 PM PDT 24 |
Aug 16 07:42:32 PM PDT 24 |
3940010450 ps |
| T171 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_program_error.1117010018 |
|
|
Aug 16 07:19:53 PM PDT 24 |
Aug 16 07:29:04 PM PDT 24 |
4786401880 ps |
| T979 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod_end.2692766831 |
|
|
Aug 16 07:14:40 PM PDT 24 |
Aug 16 08:15:53 PM PDT 24 |
15134031051 ps |
| T229 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en.1174535705 |
|
|
Aug 16 07:16:00 PM PDT 24 |
Aug 16 07:51:11 PM PDT 24 |
12346298741 ps |
| T635 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency_reduced_freq.360348296 |
|
|
Aug 16 07:19:25 PM PDT 24 |
Aug 16 11:28:38 PM PDT 24 |
122446086829 ps |
| T980 |
/workspace/coverage/default/0.chip_tap_straps_dev.386536496 |
|
|
Aug 16 07:09:24 PM PDT 24 |
Aug 16 07:14:42 PM PDT 24 |
3811546477 ps |
| T720 |
/workspace/coverage/default/42.chip_sw_all_escalation_resets.3426203888 |
|
|
Aug 16 07:36:35 PM PDT 24 |
Aug 16 07:50:10 PM PDT 24 |
5789177296 ps |
| T981 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usbdev_smoketest.3711556003 |
|
|
Aug 16 07:10:51 PM PDT 24 |
Aug 16 07:19:01 PM PDT 24 |
5653449812 ps |
| T982 |
/workspace/coverage/default/1.rom_e2e_shutdown_exception_c.3474499495 |
|
|
Aug 16 07:24:30 PM PDT 24 |
Aug 16 08:21:21 PM PDT 24 |
15031676520 ps |
| T983 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_prod.3058109308 |
|
|
Aug 16 07:14:03 PM PDT 24 |
Aug 16 07:35:32 PM PDT 24 |
7011183512 ps |
| T732 |
/workspace/coverage/default/77.chip_sw_all_escalation_resets.2995965011 |
|
|
Aug 16 07:40:55 PM PDT 24 |
Aug 16 07:51:07 PM PDT 24 |
5792552740 ps |
| T771 |
/workspace/coverage/default/93.chip_sw_all_escalation_resets.288518735 |
|
|
Aug 16 07:42:54 PM PDT 24 |
Aug 16 07:51:41 PM PDT 24 |
4899068228 ps |
| T237 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prod.4221680884 |
|
|
Aug 16 07:14:39 PM PDT 24 |
Aug 16 08:48:48 PM PDT 24 |
48789382197 ps |
| T318 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.1999974959 |
|
|
Aug 16 07:11:00 PM PDT 24 |
Aug 16 07:25:38 PM PDT 24 |
5389415670 ps |
| T255 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.3799544132 |
|
|
Aug 16 07:21:54 PM PDT 24 |
Aug 16 07:25:33 PM PDT 24 |
3302686674 ps |
| T984 |
/workspace/coverage/default/3.chip_sw_lc_ctrl_transition.118648491 |
|
|
Aug 16 07:33:45 PM PDT 24 |
Aug 16 07:53:22 PM PDT 24 |
12491730946 ps |
| T985 |
/workspace/coverage/default/0.chip_sw_rv_timer_irq.454007507 |
|
|
Aug 16 07:08:29 PM PDT 24 |
Aug 16 07:13:07 PM PDT 24 |
3056232300 ps |
| T127 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.1034062885 |
|
|
Aug 16 07:27:40 PM PDT 24 |
Aug 16 07:36:30 PM PDT 24 |
5035774320 ps |
| T986 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_timeout.1776838296 |
|
|
Aug 16 07:09:54 PM PDT 24 |
Aug 16 07:19:05 PM PDT 24 |
4728469160 ps |
| T987 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.1608236992 |
|
|
Aug 16 07:33:13 PM PDT 24 |
Aug 16 07:41:06 PM PDT 24 |
4177046108 ps |
| T343 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.1116368312 |
|
|
Aug 16 07:09:04 PM PDT 24 |
Aug 16 07:20:34 PM PDT 24 |
4741825905 ps |
| T736 |
/workspace/coverage/default/31.chip_sw_all_escalation_resets.442224764 |
|
|
Aug 16 07:36:34 PM PDT 24 |
Aug 16 07:48:22 PM PDT 24 |
4834136116 ps |
| T988 |
/workspace/coverage/default/2.chip_sw_aes_entropy.1376535243 |
|
|
Aug 16 07:26:06 PM PDT 24 |
Aug 16 07:30:30 PM PDT 24 |
2856484152 ps |
| T37 |
/workspace/coverage/default/0.chip_sw_spi_host_tx_rx.3566096279 |
|
|
Aug 16 07:06:02 PM PDT 24 |
Aug 16 07:10:07 PM PDT 24 |
3504012050 ps |
| T341 |
/workspace/coverage/default/0.chip_sw_pwrmgr_lowpower_cancel.837495490 |
|
|
Aug 16 07:13:32 PM PDT 24 |
Aug 16 07:21:00 PM PDT 24 |
3677926408 ps |
| T989 |
/workspace/coverage/default/2.chip_sw_data_integrity_escalation.2089957701 |
|
|
Aug 16 07:22:47 PM PDT 24 |
Aug 16 07:36:51 PM PDT 24 |
5221166652 ps |
| T716 |
/workspace/coverage/default/37.chip_sw_all_escalation_resets.2433294727 |
|
|
Aug 16 07:36:45 PM PDT 24 |
Aug 16 07:48:38 PM PDT 24 |
6229455294 ps |
| T722 |
/workspace/coverage/default/28.chip_sw_all_escalation_resets.3546643158 |
|
|
Aug 16 07:36:21 PM PDT 24 |
Aug 16 07:48:41 PM PDT 24 |
5646218090 ps |
| T760 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.483324561 |
|
|
Aug 16 07:38:21 PM PDT 24 |
Aug 16 07:43:50 PM PDT 24 |
3751010744 ps |
| T152 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.430577335 |
|
|
Aug 16 07:17:10 PM PDT 24 |
Aug 16 07:25:29 PM PDT 24 |
3628837992 ps |
| T990 |
/workspace/coverage/default/1.chip_sw_flash_crash_alert.3472255794 |
|
|
Aug 16 07:19:42 PM PDT 24 |
Aug 16 07:29:29 PM PDT 24 |
6143530360 ps |
| T203 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_inputs.1658123225 |
|
|
Aug 16 07:24:36 PM PDT 24 |
Aug 16 07:29:41 PM PDT 24 |
2980843132 ps |
| T991 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_rma.823380903 |
|
|
Aug 16 07:15:50 PM PDT 24 |
Aug 16 08:12:48 PM PDT 24 |
14525335400 ps |
| T733 |
/workspace/coverage/default/6.chip_sw_alert_handler_lpg_sleep_mode_alerts.4200627550 |
|
|
Aug 16 07:33:27 PM PDT 24 |
Aug 16 07:39:22 PM PDT 24 |
3502586576 ps |
| T992 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2637164808 |
|
|
Aug 16 07:28:45 PM PDT 24 |
Aug 16 07:38:17 PM PDT 24 |
5295174652 ps |
| T993 |
/workspace/coverage/default/0.chip_sw_usbdev_stream.3659025683 |
|
|
Aug 16 07:06:55 PM PDT 24 |
Aug 16 08:14:31 PM PDT 24 |
19078855296 ps |
| T327 |
/workspace/coverage/default/0.chip_sw_entropy_src_csrng.4157687343 |
|
|
Aug 16 07:07:58 PM PDT 24 |
Aug 16 07:38:04 PM PDT 24 |
6845721906 ps |
| T647 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.1355258716 |
|
|
Aug 16 07:21:02 PM PDT 24 |
Aug 16 07:22:51 PM PDT 24 |
3156735758 ps |
| T191 |
/workspace/coverage/default/1.chip_sw_spi_device_pass_through.888162241 |
|
|
Aug 16 07:12:39 PM PDT 24 |
Aug 16 07:26:22 PM PDT 24 |
7404805685 ps |
| T263 |
/workspace/coverage/default/88.chip_sw_all_escalation_resets.2060230359 |
|
|
Aug 16 07:41:56 PM PDT 24 |
Aug 16 07:52:31 PM PDT 24 |
6111943616 ps |
| T252 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.3289309049 |
|
|
Aug 16 07:10:34 PM PDT 24 |
Aug 16 07:15:52 PM PDT 24 |
3177210780 ps |
| T994 |
/workspace/coverage/default/2.chip_sw_example_rom.1924874365 |
|
|
Aug 16 07:20:57 PM PDT 24 |
Aug 16 07:23:04 PM PDT 24 |
2459787992 ps |
| T361 |
/workspace/coverage/default/44.chip_sw_all_escalation_resets.3770509081 |
|
|
Aug 16 07:36:35 PM PDT 24 |
Aug 16 07:46:53 PM PDT 24 |
4732733448 ps |
| T725 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.1138923446 |
|
|
Aug 16 07:35:22 PM PDT 24 |
Aug 16 07:41:59 PM PDT 24 |
3711446792 ps |
| T153 |
/workspace/coverage/default/2.chip_plic_all_irqs_10.2377685408 |
|
|
Aug 16 07:27:09 PM PDT 24 |
Aug 16 07:37:21 PM PDT 24 |
3691990590 ps |
| T995 |
/workspace/coverage/default/1.chip_sw_rstmgr_sw_req.4056279118 |
|
|
Aug 16 07:14:01 PM PDT 24 |
Aug 16 07:18:50 PM PDT 24 |
4421181930 ps |
| T996 |
/workspace/coverage/default/2.chip_sw_aes_idle.2434489326 |
|
|
Aug 16 07:30:45 PM PDT 24 |
Aug 16 07:35:00 PM PDT 24 |
3239111250 ps |
| T997 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_peri.3052443250 |
|
|
Aug 16 07:28:01 PM PDT 24 |
Aug 16 07:48:56 PM PDT 24 |
10218499066 ps |
| T998 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.1672493715 |
|
|
Aug 16 07:24:22 PM PDT 24 |
Aug 16 07:35:22 PM PDT 24 |
4799206900 ps |
| T349 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq.850152319 |
|
|
Aug 16 07:22:27 PM PDT 24 |
Aug 16 07:51:27 PM PDT 24 |
8320767831 ps |
| T781 |
/workspace/coverage/default/87.chip_sw_all_escalation_resets.4164982704 |
|
|
Aug 16 07:40:46 PM PDT 24 |
Aug 16 07:49:02 PM PDT 24 |
5125275304 ps |
| T999 |
/workspace/coverage/default/2.rom_e2e_asm_init_test_unlocked0.1016929436 |
|
|
Aug 16 07:38:16 PM PDT 24 |
Aug 16 08:31:25 PM PDT 24 |
11066408999 ps |
| T71 |
/workspace/coverage/default/0.chip_sw_usbdev_pullup.3474845301 |
|
|
Aug 16 07:07:05 PM PDT 24 |
Aug 16 07:11:24 PM PDT 24 |
2847945692 ps |
| T291 |
/workspace/coverage/default/91.chip_sw_all_escalation_resets.2528714428 |
|
|
Aug 16 07:47:32 PM PDT 24 |
Aug 16 07:55:18 PM PDT 24 |
4979525672 ps |
| T1000 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_reset_toggle.3882765465 |
|
|
Aug 16 07:17:17 PM PDT 24 |
Aug 16 07:40:24 PM PDT 24 |
6651146360 ps |
| T1001 |
/workspace/coverage/default/2.chip_sw_alert_handler_entropy.1462452329 |
|
|
Aug 16 07:25:49 PM PDT 24 |
Aug 16 07:32:05 PM PDT 24 |
3468065308 ps |
| T1002 |
/workspace/coverage/default/2.chip_sw_rv_plic_smoketest.2319433766 |
|
|
Aug 16 07:30:52 PM PDT 24 |
Aug 16 07:34:20 PM PDT 24 |
2758539160 ps |
| T1003 |
/workspace/coverage/default/0.chip_sw_aes_entropy.4266019883 |
|
|
Aug 16 07:08:25 PM PDT 24 |
Aug 16 07:13:01 PM PDT 24 |
3334093034 ps |
| T1004 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access.4241593892 |
|
|
Aug 16 07:26:14 PM PDT 24 |
Aug 16 07:36:37 PM PDT 24 |
4357070580 ps |
| T1005 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod_end.2467863760 |
|
|
Aug 16 07:17:16 PM PDT 24 |
Aug 16 08:43:47 PM PDT 24 |
23063476768 ps |
| T1006 |
/workspace/coverage/default/1.chip_sw_uart_rand_baudrate.253519958 |
|
|
Aug 16 07:12:02 PM PDT 24 |
Aug 16 07:42:34 PM PDT 24 |
9298280992 ps |
| T1007 |
/workspace/coverage/default/2.chip_sw_csrng_kat_test.3046288714 |
|
|
Aug 16 07:26:55 PM PDT 24 |
Aug 16 07:31:47 PM PDT 24 |
3282384944 ps |
| T332 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx2.1654056067 |
|
|
Aug 16 07:12:17 PM PDT 24 |
Aug 16 07:26:18 PM PDT 24 |
5031327816 ps |