| T717 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.3504655156 |
|
|
Aug 16 07:33:32 PM PDT 24 |
Aug 16 07:41:15 PM PDT 24 |
3738954214 ps |
| T1008 |
/workspace/coverage/default/0.chip_sw_example_flash.2856338250 |
|
|
Aug 16 07:09:04 PM PDT 24 |
Aug 16 07:15:45 PM PDT 24 |
3616656270 ps |
| T1009 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.1091772887 |
|
|
Aug 16 07:09:07 PM PDT 24 |
Aug 16 07:47:08 PM PDT 24 |
12702065555 ps |
| T311 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.3126475723 |
|
|
Aug 16 07:28:31 PM PDT 24 |
Aug 16 07:47:18 PM PDT 24 |
7121612597 ps |
| T742 |
/workspace/coverage/default/83.chip_sw_all_escalation_resets.565331990 |
|
|
Aug 16 07:42:17 PM PDT 24 |
Aug 16 07:53:24 PM PDT 24 |
5784489368 ps |
| T648 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock.816656210 |
|
|
Aug 16 07:06:42 PM PDT 24 |
Aug 16 07:08:32 PM PDT 24 |
2443291914 ps |
| T1010 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.3458518006 |
|
|
Aug 16 07:10:24 PM PDT 24 |
Aug 16 07:22:50 PM PDT 24 |
4407781490 ps |
| T1011 |
/workspace/coverage/default/2.rom_e2e_smoke.423960489 |
|
|
Aug 16 07:34:13 PM PDT 24 |
Aug 16 08:33:10 PM PDT 24 |
14904548880 ps |
| T1012 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx.2439990559 |
|
|
Aug 16 07:32:15 PM PDT 24 |
Aug 16 07:41:27 PM PDT 24 |
4188172240 ps |
| T398 |
/workspace/coverage/default/1.chip_sw_rom_ctrl_integrity_check.2885025982 |
|
|
Aug 16 07:16:56 PM PDT 24 |
Aug 16 07:25:27 PM PDT 24 |
9122043528 ps |
| T1013 |
/workspace/coverage/default/5.chip_sw_csrng_edn_concurrency.1820306480 |
|
|
Aug 16 07:38:31 PM PDT 24 |
Aug 16 08:37:33 PM PDT 24 |
13037776000 ps |
| T1014 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_por_reset.3552325227 |
|
|
Aug 16 07:17:54 PM PDT 24 |
Aug 16 07:28:19 PM PDT 24 |
10695335078 ps |
| T1015 |
/workspace/coverage/default/9.chip_sw_lc_ctrl_transition.1329783676 |
|
|
Aug 16 07:33:29 PM PDT 24 |
Aug 16 07:42:08 PM PDT 24 |
7591792158 ps |
| T1016 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_write_clear.1531205952 |
|
|
Aug 16 07:08:38 PM PDT 24 |
Aug 16 07:15:23 PM PDT 24 |
3039603776 ps |
| T731 |
/workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.2051679950 |
|
|
Aug 16 07:35:18 PM PDT 24 |
Aug 16 07:40:43 PM PDT 24 |
3182085272 ps |
| T384 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod.1577549944 |
|
|
Aug 16 07:14:28 PM PDT 24 |
Aug 16 08:50:26 PM PDT 24 |
24413109054 ps |
| T645 |
/workspace/coverage/default/2.chip_tap_straps_dev.4186713497 |
|
|
Aug 16 07:27:19 PM PDT 24 |
Aug 16 07:35:39 PM PDT 24 |
6516225877 ps |
| T239 |
/workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.3745170463 |
|
|
Aug 16 07:09:45 PM PDT 24 |
Aug 16 07:50:46 PM PDT 24 |
24935195771 ps |
| T1017 |
/workspace/coverage/default/2.chip_sw_kmac_smoketest.924240753 |
|
|
Aug 16 07:30:01 PM PDT 24 |
Aug 16 07:34:06 PM PDT 24 |
2560307408 ps |
| T1018 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_kmac.2744173090 |
|
|
Aug 16 07:27:48 PM PDT 24 |
Aug 16 07:56:00 PM PDT 24 |
8879549732 ps |
| T1019 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx1.3941299902 |
|
|
Aug 16 07:07:45 PM PDT 24 |
Aug 16 07:18:49 PM PDT 24 |
3953252200 ps |
| T96 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.820609847 |
|
|
Aug 16 07:06:48 PM PDT 24 |
Aug 16 07:12:41 PM PDT 24 |
3919234910 ps |
| T1020 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod_end.3356093916 |
|
|
Aug 16 07:34:23 PM PDT 24 |
Aug 16 08:41:16 PM PDT 24 |
15696193164 ps |
| T1021 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_transition.2856443738 |
|
|
Aug 16 07:23:20 PM PDT 24 |
Aug 16 07:38:43 PM PDT 24 |
9689205621 ps |
| T182 |
/workspace/coverage/default/0.chip_sw_flash_rma_unlocked.545442780 |
|
|
Aug 16 07:06:26 PM PDT 24 |
Aug 16 08:32:43 PM PDT 24 |
43711021115 ps |
| T264 |
/workspace/coverage/default/71.chip_sw_all_escalation_resets.2844282805 |
|
|
Aug 16 07:39:29 PM PDT 24 |
Aug 16 07:48:23 PM PDT 24 |
5977242894 ps |
| T761 |
/workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.3660398079 |
|
|
Aug 16 07:34:28 PM PDT 24 |
Aug 16 07:40:59 PM PDT 24 |
3643197310 ps |
| T1022 |
/workspace/coverage/default/1.chip_sw_kmac_entropy.1105021336 |
|
|
Aug 16 07:12:02 PM PDT 24 |
Aug 16 07:16:05 PM PDT 24 |
2661392756 ps |
| T700 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.3958980803 |
|
|
Aug 16 07:22:19 PM PDT 24 |
Aug 16 07:35:06 PM PDT 24 |
5506686860 ps |
| T1023 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx3.3580084783 |
|
|
Aug 16 07:06:14 PM PDT 24 |
Aug 16 07:16:35 PM PDT 24 |
4671976000 ps |
| T1024 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access.3500051735 |
|
|
Aug 16 07:22:53 PM PDT 24 |
Aug 16 07:39:22 PM PDT 24 |
5503249104 ps |
| T1025 |
/workspace/coverage/default/2.chip_sw_kmac_app_rom.420527719 |
|
|
Aug 16 07:27:00 PM PDT 24 |
Aug 16 07:32:39 PM PDT 24 |
2547167790 ps |
| T649 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.255966849 |
|
|
Aug 16 07:23:53 PM PDT 24 |
Aug 16 07:25:48 PM PDT 24 |
2623908255 ps |
| T734 |
/workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.241917126 |
|
|
Aug 16 07:35:35 PM PDT 24 |
Aug 16 07:43:16 PM PDT 24 |
3791608928 ps |
| T689 |
/workspace/coverage/default/80.chip_sw_all_escalation_resets.1482947107 |
|
|
Aug 16 07:41:48 PM PDT 24 |
Aug 16 07:50:00 PM PDT 24 |
5404181564 ps |
| T292 |
/workspace/coverage/default/20.chip_sw_alert_handler_lpg_sleep_mode_alerts.619898052 |
|
|
Aug 16 07:34:18 PM PDT 24 |
Aug 16 07:41:30 PM PDT 24 |
3786778760 ps |
| T1026 |
/workspace/coverage/default/0.rom_e2e_asm_init_dev.644233172 |
|
|
Aug 16 07:15:06 PM PDT 24 |
Aug 16 08:23:41 PM PDT 24 |
15084062696 ps |
| T1027 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.3797496350 |
|
|
Aug 16 07:20:00 PM PDT 24 |
Aug 16 07:24:37 PM PDT 24 |
2519721478 ps |
| T1028 |
/workspace/coverage/default/2.chip_sw_hmac_multistream.721856540 |
|
|
Aug 16 07:27:24 PM PDT 24 |
Aug 16 07:56:07 PM PDT 24 |
7959228720 ps |
| T1029 |
/workspace/coverage/default/2.chip_sw_rv_timer_irq.970096238 |
|
|
Aug 16 07:24:10 PM PDT 24 |
Aug 16 07:29:08 PM PDT 24 |
2663337804 ps |
| T1030 |
/workspace/coverage/default/2.chip_sw_aon_timer_irq.1591049434 |
|
|
Aug 16 07:30:56 PM PDT 24 |
Aug 16 07:36:56 PM PDT 24 |
3801803536 ps |
| T1031 |
/workspace/coverage/default/0.rom_e2e_smoke.2584898499 |
|
|
Aug 16 07:19:31 PM PDT 24 |
Aug 16 08:26:01 PM PDT 24 |
15298718442 ps |
| T1032 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_prod.3704854461 |
|
|
Aug 16 07:10:10 PM PDT 24 |
Aug 16 07:35:28 PM PDT 24 |
9258253518 ps |
| T1033 |
/workspace/coverage/default/0.rom_e2e_asm_init_test_unlocked0.3649148402 |
|
|
Aug 16 07:17:26 PM PDT 24 |
Aug 16 08:01:28 PM PDT 24 |
11266930814 ps |
| T1034 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_por_reset.2698651263 |
|
|
Aug 16 07:14:03 PM PDT 24 |
Aug 16 07:28:46 PM PDT 24 |
6112310461 ps |
| T1035 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_rma.288451085 |
|
|
Aug 16 07:18:22 PM PDT 24 |
Aug 16 08:17:10 PM PDT 24 |
14345230960 ps |
| T137 |
/workspace/coverage/default/2.chip_sw_ast_clk_rst_inputs.426773288 |
|
|
Aug 16 07:29:42 PM PDT 24 |
Aug 16 07:56:29 PM PDT 24 |
15019850272 ps |
| T1036 |
/workspace/coverage/default/1.chip_sw_rstmgr_rst_cnsty_escalation.435420066 |
|
|
Aug 16 07:12:05 PM PDT 24 |
Aug 16 07:25:12 PM PDT 24 |
5318917668 ps |
| T385 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod_end.2886430819 |
|
|
Aug 16 07:17:05 PM PDT 24 |
Aug 16 08:52:32 PM PDT 24 |
24175659672 ps |
| T1037 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_hmac_trans.2712561067 |
|
|
Aug 16 07:17:20 PM PDT 24 |
Aug 16 07:26:14 PM PDT 24 |
4188973624 ps |
| T1038 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_idx2.2213363325 |
|
|
Aug 16 07:07:54 PM PDT 24 |
Aug 16 07:19:23 PM PDT 24 |
4508136860 ps |
| T1039 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usb_clk_disabled_when_active.2804127501 |
|
|
Aug 16 07:24:50 PM PDT 24 |
Aug 16 07:31:20 PM PDT 24 |
4369601798 ps |
| T77 |
/workspace/coverage/default/2.chip_jtag_csr_rw.4091821226 |
|
|
Aug 16 07:20:45 PM PDT 24 |
Aug 16 07:53:41 PM PDT 24 |
20346169392 ps |
| T106 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.2158435663 |
|
|
Aug 16 07:24:33 PM PDT 24 |
Aug 16 07:33:43 PM PDT 24 |
6464689176 ps |
| T423 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.718867452 |
|
|
Aug 16 07:17:42 PM PDT 24 |
Aug 16 07:35:13 PM PDT 24 |
12026815536 ps |
| T424 |
/workspace/coverage/default/77.chip_sw_alert_handler_lpg_sleep_mode_alerts.1754071904 |
|
|
Aug 16 07:39:09 PM PDT 24 |
Aug 16 07:44:24 PM PDT 24 |
4396224760 ps |
| T425 |
/workspace/coverage/default/67.chip_sw_all_escalation_resets.2776847928 |
|
|
Aug 16 07:38:58 PM PDT 24 |
Aug 16 07:50:45 PM PDT 24 |
5337441000 ps |
| T426 |
/workspace/coverage/default/32.chip_sw_alert_handler_lpg_sleep_mode_alerts.1906271660 |
|
|
Aug 16 07:35:49 PM PDT 24 |
Aug 16 07:42:49 PM PDT 24 |
3536152300 ps |
| T427 |
/workspace/coverage/default/84.chip_sw_all_escalation_resets.217112743 |
|
|
Aug 16 07:40:21 PM PDT 24 |
Aug 16 07:50:32 PM PDT 24 |
4840772320 ps |
| T428 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.843634632 |
|
|
Aug 16 07:15:58 PM PDT 24 |
Aug 16 08:19:11 PM PDT 24 |
16033680850 ps |
| T429 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_dev.17924338 |
|
|
Aug 16 07:21:04 PM PDT 24 |
Aug 16 08:29:38 PM PDT 24 |
15258674180 ps |
| T163 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_escalation.1260259560 |
|
|
Aug 16 07:07:06 PM PDT 24 |
Aug 16 07:19:51 PM PDT 24 |
5147311160 ps |
| T164 |
/workspace/coverage/default/81.chip_sw_all_escalation_resets.2313390419 |
|
|
Aug 16 07:41:42 PM PDT 24 |
Aug 16 07:49:39 PM PDT 24 |
5202683032 ps |
| T1040 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2939057446 |
|
|
Aug 16 07:28:21 PM PDT 24 |
Aug 16 07:40:29 PM PDT 24 |
5662388528 ps |
| T633 |
/workspace/coverage/default/1.chip_sw_edn_boot_mode.2675278650 |
|
|
Aug 16 07:15:20 PM PDT 24 |
Aug 16 07:24:39 PM PDT 24 |
3288695910 ps |
| T1041 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_ecc_error_vendor_test.202696115 |
|
|
Aug 16 07:17:30 PM PDT 24 |
Aug 16 07:22:09 PM PDT 24 |
3167064894 ps |
| T1042 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_dev.1635767424 |
|
|
Aug 16 07:16:42 PM PDT 24 |
Aug 16 08:53:19 PM PDT 24 |
23238679281 ps |
| T1043 |
/workspace/coverage/default/1.chip_sw_pwrmgr_main_power_glitch_reset.3413328748 |
|
|
Aug 16 07:14:22 PM PDT 24 |
Aug 16 07:25:43 PM PDT 24 |
4647799796 ps |
| T1044 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.2253275268 |
|
|
Aug 16 07:08:53 PM PDT 24 |
Aug 16 07:26:49 PM PDT 24 |
6676588255 ps |
| T1045 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1771992583 |
|
|
Aug 16 07:13:56 PM PDT 24 |
Aug 16 07:21:59 PM PDT 24 |
7310692844 ps |
| T1046 |
/workspace/coverage/default/5.chip_sw_lc_ctrl_transition.3631406336 |
|
|
Aug 16 07:32:43 PM PDT 24 |
Aug 16 07:40:47 PM PDT 24 |
6264982368 ps |
| T1047 |
/workspace/coverage/default/4.chip_sw_aon_timer_sleep_wdog_sleep_pause.2593401809 |
|
|
Aug 16 07:32:20 PM PDT 24 |
Aug 16 07:40:45 PM PDT 24 |
6551564296 ps |
| T779 |
/workspace/coverage/default/6.chip_sw_all_escalation_resets.1464233600 |
|
|
Aug 16 07:33:05 PM PDT 24 |
Aug 16 07:42:07 PM PDT 24 |
4653682296 ps |
| T681 |
/workspace/coverage/default/59.chip_sw_all_escalation_resets.2045214577 |
|
|
Aug 16 07:41:58 PM PDT 24 |
Aug 16 07:53:03 PM PDT 24 |
5663119860 ps |
| T1048 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en.3421113225 |
|
|
Aug 16 07:24:36 PM PDT 24 |
Aug 16 07:40:54 PM PDT 24 |
5751267580 ps |
| T1049 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac.3881382830 |
|
|
Aug 16 07:07:09 PM PDT 24 |
Aug 16 07:12:36 PM PDT 24 |
3066157814 ps |
| T402 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_wake_ups.6924529 |
|
|
Aug 16 07:29:28 PM PDT 24 |
Aug 16 07:36:42 PM PDT 24 |
7307207446 ps |
| T1050 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.3533115873 |
|
|
Aug 16 07:31:36 PM PDT 24 |
Aug 16 07:35:06 PM PDT 24 |
3026839860 ps |
| T701 |
/workspace/coverage/default/66.chip_sw_alert_handler_lpg_sleep_mode_alerts.3346919845 |
|
|
Aug 16 07:38:50 PM PDT 24 |
Aug 16 07:45:06 PM PDT 24 |
3635458994 ps |
| T747 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.971548206 |
|
|
Aug 16 07:36:32 PM PDT 24 |
Aug 16 07:45:31 PM PDT 24 |
6006537190 ps |
| T11 |
/workspace/coverage/default/0.chip_sw_sleep_pin_mio_dio_val.2945486290 |
|
|
Aug 16 07:08:17 PM PDT 24 |
Aug 16 07:14:20 PM PDT 24 |
2859782389 ps |
| T1051 |
/workspace/coverage/default/2.chip_sw_edn_sw_mode.90068518 |
|
|
Aug 16 07:25:57 PM PDT 24 |
Aug 16 07:54:45 PM PDT 24 |
7287377280 ps |
| T650 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.3765442688 |
|
|
Aug 16 07:07:05 PM PDT 24 |
Aug 16 07:12:57 PM PDT 24 |
4433629378 ps |
| T1052 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod.4207763038 |
|
|
Aug 16 07:17:22 PM PDT 24 |
Aug 16 08:20:47 PM PDT 24 |
15181948084 ps |
| T1053 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_clkoff.2244118504 |
|
|
Aug 16 07:16:41 PM PDT 24 |
Aug 16 07:42:06 PM PDT 24 |
6701155820 ps |
| T368 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en_reduced_freq.1216748110 |
|
|
Aug 16 07:21:10 PM PDT 24 |
Aug 16 07:25:29 PM PDT 24 |
3097346874 ps |
| T1054 |
/workspace/coverage/default/0.chip_sw_aon_timer_smoketest.1594374035 |
|
|
Aug 16 07:10:10 PM PDT 24 |
Aug 16 07:15:32 PM PDT 24 |
3741522860 ps |
| T331 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.4260293147 |
|
|
Aug 16 07:06:58 PM PDT 24 |
Aug 16 07:22:33 PM PDT 24 |
4916560720 ps |
| T204 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_outputs.1815549484 |
|
|
Aug 16 07:09:05 PM PDT 24 |
Aug 16 07:16:26 PM PDT 24 |
3565726804 ps |
| T1055 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.815798988 |
|
|
Aug 16 07:26:43 PM PDT 24 |
Aug 16 07:51:12 PM PDT 24 |
7327968230 ps |
| T1056 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_no_meas.3529820992 |
|
|
Aug 16 07:33:40 PM PDT 24 |
Aug 16 08:30:15 PM PDT 24 |
14306163770 ps |
| T1057 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_kmac_trans.3099106893 |
|
|
Aug 16 07:27:26 PM PDT 24 |
Aug 16 07:36:02 PM PDT 24 |
5324608648 ps |
| T84 |
/workspace/coverage/default/13.chip_sw_all_escalation_resets.3690044151 |
|
|
Aug 16 07:35:17 PM PDT 24 |
Aug 16 07:43:47 PM PDT 24 |
4768115608 ps |
| T87 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_aes_trans.2601556550 |
|
|
Aug 16 07:20:07 PM PDT 24 |
Aug 16 07:27:48 PM PDT 24 |
5078352030 ps |
| T88 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.2077303797 |
|
|
Aug 16 07:20:29 PM PDT 24 |
Aug 16 08:12:16 PM PDT 24 |
24328704775 ps |
| T89 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_lc_rw_en.1735623533 |
|
|
Aug 16 07:22:48 PM PDT 24 |
Aug 16 07:34:11 PM PDT 24 |
5113857112 ps |
| T90 |
/workspace/coverage/default/34.chip_sw_alert_handler_lpg_sleep_mode_alerts.213491490 |
|
|
Aug 16 07:37:13 PM PDT 24 |
Aug 16 07:43:46 PM PDT 24 |
3849682312 ps |
| T91 |
/workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.2281079391 |
|
|
Aug 16 07:15:43 PM PDT 24 |
Aug 16 10:45:36 PM PDT 24 |
255214751880 ps |
| T12 |
/workspace/coverage/default/2.chip_sw_sleep_pin_mio_dio_val.4167925781 |
|
|
Aug 16 07:22:59 PM PDT 24 |
Aug 16 07:27:43 PM PDT 24 |
2711217870 ps |
| T92 |
/workspace/coverage/default/0.chip_sw_csrng_kat_test.2660092100 |
|
|
Aug 16 07:10:12 PM PDT 24 |
Aug 16 07:14:35 PM PDT 24 |
2554588002 ps |
| T93 |
/workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.1510242854 |
|
|
Aug 16 07:38:42 PM PDT 24 |
Aug 16 07:45:09 PM PDT 24 |
3430766126 ps |
| T94 |
/workspace/coverage/default/1.chip_sw_edn_kat.3372416014 |
|
|
Aug 16 07:16:53 PM PDT 24 |
Aug 16 07:28:13 PM PDT 24 |
3784622200 ps |
| T750 |
/workspace/coverage/default/5.chip_sw_alert_handler_lpg_sleep_mode_alerts.3436726556 |
|
|
Aug 16 07:35:01 PM PDT 24 |
Aug 16 07:41:11 PM PDT 24 |
3865700328 ps |
| T293 |
/workspace/coverage/default/49.chip_sw_all_escalation_resets.3902020857 |
|
|
Aug 16 07:36:46 PM PDT 24 |
Aug 16 07:47:15 PM PDT 24 |
4579096792 ps |
| T1058 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.2252231882 |
|
|
Aug 16 07:17:07 PM PDT 24 |
Aug 16 07:30:05 PM PDT 24 |
4935150554 ps |
| T1059 |
/workspace/coverage/default/15.chip_sw_uart_rand_baudrate.890733213 |
|
|
Aug 16 07:34:28 PM PDT 24 |
Aug 16 07:57:47 PM PDT 24 |
8017951560 ps |
| T1060 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq.1101296588 |
|
|
Aug 16 07:12:55 PM PDT 24 |
Aug 16 07:40:53 PM PDT 24 |
8216393943 ps |
| T1061 |
/workspace/coverage/default/14.chip_sw_lc_ctrl_transition.375167544 |
|
|
Aug 16 07:35:28 PM PDT 24 |
Aug 16 07:50:32 PM PDT 24 |
8875291884 ps |
| T1062 |
/workspace/coverage/default/0.chip_sw_csrng_lc_hw_debug_en_test.2706839050 |
|
|
Aug 16 07:07:04 PM PDT 24 |
Aug 16 07:17:46 PM PDT 24 |
7350073367 ps |
| T740 |
/workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.2994165580 |
|
|
Aug 16 07:39:02 PM PDT 24 |
Aug 16 07:45:12 PM PDT 24 |
3585596110 ps |
| T762 |
/workspace/coverage/default/82.chip_sw_all_escalation_resets.1815593254 |
|
|
Aug 16 07:40:13 PM PDT 24 |
Aug 16 07:47:33 PM PDT 24 |
5376362744 ps |
| T1063 |
/workspace/coverage/default/1.chip_sw_kmac_smoketest.1100516422 |
|
|
Aug 16 07:21:25 PM PDT 24 |
Aug 16 07:25:39 PM PDT 24 |
2799630176 ps |
| T1064 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.3477355927 |
|
|
Aug 16 07:28:46 PM PDT 24 |
Aug 16 07:37:37 PM PDT 24 |
3845526912 ps |
| T1065 |
/workspace/coverage/default/0.chip_sw_inject_scramble_seed.2989143476 |
|
|
Aug 16 07:07:46 PM PDT 24 |
Aug 16 10:11:51 PM PDT 24 |
65346883556 ps |
| T294 |
/workspace/coverage/default/45.chip_sw_all_escalation_resets.3890546600 |
|
|
Aug 16 07:35:49 PM PDT 24 |
Aug 16 07:45:24 PM PDT 24 |
4894805524 ps |
| T1066 |
/workspace/coverage/default/2.chip_sw_flash_crash_alert.3762055079 |
|
|
Aug 16 07:29:54 PM PDT 24 |
Aug 16 07:43:04 PM PDT 24 |
5517645410 ps |
| T1067 |
/workspace/coverage/default/3.chip_tap_straps_dev.3174263065 |
|
|
Aug 16 07:30:43 PM PDT 24 |
Aug 16 07:33:34 PM PDT 24 |
2256184419 ps |
| T342 |
/workspace/coverage/default/1.chip_sw_pwrmgr_lowpower_cancel.3356726301 |
|
|
Aug 16 07:18:29 PM PDT 24 |
Aug 16 07:25:21 PM PDT 24 |
3342845556 ps |
| T128 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_alert.612307539 |
|
|
Aug 16 07:16:52 PM PDT 24 |
Aug 16 07:26:52 PM PDT 24 |
5409267904 ps |
| T1068 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_meas.1980183921 |
|
|
Aug 16 07:34:15 PM PDT 24 |
Aug 16 08:25:55 PM PDT 24 |
15598063896 ps |
| T687 |
/workspace/coverage/default/87.chip_sw_alert_handler_lpg_sleep_mode_alerts.2137889394 |
|
|
Aug 16 07:40:55 PM PDT 24 |
Aug 16 07:46:39 PM PDT 24 |
3390682920 ps |
| T1069 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.2862301356 |
|
|
Aug 16 07:32:24 PM PDT 24 |
Aug 16 08:07:32 PM PDT 24 |
13367848476 ps |
| T1070 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en.1504930682 |
|
|
Aug 16 07:27:25 PM PDT 24 |
Aug 16 07:32:22 PM PDT 24 |
2803891444 ps |
| T104 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_wake_ups.4221376559 |
|
|
Aug 16 07:19:14 PM PDT 24 |
Aug 16 07:53:53 PM PDT 24 |
23563013904 ps |
| T1071 |
/workspace/coverage/default/2.chip_sw_aes_enc.311027501 |
|
|
Aug 16 07:25:00 PM PDT 24 |
Aug 16 07:30:22 PM PDT 24 |
2852467560 ps |
| T765 |
/workspace/coverage/default/1.chip_sw_all_escalation_resets.1780631248 |
|
|
Aug 16 07:14:40 PM PDT 24 |
Aug 16 07:28:16 PM PDT 24 |
5144035754 ps |
| T1072 |
/workspace/coverage/default/89.chip_sw_alert_handler_lpg_sleep_mode_alerts.544108924 |
|
|
Aug 16 07:40:15 PM PDT 24 |
Aug 16 07:46:37 PM PDT 24 |
3754189824 ps |
| T1073 |
/workspace/coverage/default/0.chip_sw_otbn_smoketest.1153633633 |
|
|
Aug 16 07:15:39 PM PDT 24 |
Aug 16 07:45:30 PM PDT 24 |
8737023960 ps |
| T727 |
/workspace/coverage/default/55.chip_sw_alert_handler_lpg_sleep_mode_alerts.639182472 |
|
|
Aug 16 07:37:41 PM PDT 24 |
Aug 16 07:43:31 PM PDT 24 |
3658508216 ps |
| T1074 |
/workspace/coverage/default/0.chip_sw_kmac_mode_cshake.3721667539 |
|
|
Aug 16 07:08:34 PM PDT 24 |
Aug 16 07:13:23 PM PDT 24 |
2852431290 ps |
| T1075 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.3176975057 |
|
|
Aug 16 07:05:54 PM PDT 24 |
Aug 16 07:13:41 PM PDT 24 |
4085982172 ps |
| T205 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.1740840804 |
|
|
Aug 16 07:07:03 PM PDT 24 |
Aug 16 07:37:10 PM PDT 24 |
21930131002 ps |
| T739 |
/workspace/coverage/default/63.chip_sw_all_escalation_resets.2671408820 |
|
|
Aug 16 07:38:16 PM PDT 24 |
Aug 16 07:47:25 PM PDT 24 |
4920850550 ps |
| T1076 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.3104008323 |
|
|
Aug 16 07:23:55 PM PDT 24 |
Aug 16 07:58:00 PM PDT 24 |
28703513336 ps |
| T399 |
/workspace/coverage/default/2.chip_sw_rom_ctrl_integrity_check.164950439 |
|
|
Aug 16 07:27:29 PM PDT 24 |
Aug 16 07:35:41 PM PDT 24 |
9012140136 ps |
| T1077 |
/workspace/coverage/default/0.chip_sw_edn_auto_mode.1233396881 |
|
|
Aug 16 07:08:25 PM PDT 24 |
Aug 16 07:24:00 PM PDT 24 |
5003236800 ps |
| T1078 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_write_clear.2134173732 |
|
|
Aug 16 07:19:23 PM PDT 24 |
Aug 16 07:25:09 PM PDT 24 |
2888192280 ps |
| T319 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.4273264774 |
|
|
Aug 16 07:19:19 PM PDT 24 |
Aug 16 07:32:09 PM PDT 24 |
4407474808 ps |
| T1079 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.710256950 |
|
|
Aug 16 07:24:06 PM PDT 24 |
Aug 16 07:25:51 PM PDT 24 |
2605302974 ps |
| T711 |
/workspace/coverage/default/1.chip_sw_clkmgr_reset_frequency.151104268 |
|
|
Aug 16 07:19:01 PM PDT 24 |
Aug 16 07:27:38 PM PDT 24 |
3848637508 ps |
| T103 |
/workspace/coverage/default/0.chip_rv_dm_ndm_reset_req.3308320269 |
|
|
Aug 16 07:19:57 PM PDT 24 |
Aug 16 07:25:46 PM PDT 24 |
3807878622 ps |
| T58 |
/workspace/coverage/default/1.chip_sw_sleep_pin_retention.2196828347 |
|
|
Aug 16 07:11:04 PM PDT 24 |
Aug 16 07:16:38 PM PDT 24 |
3787041760 ps |
| T433 |
/workspace/coverage/default/2.chip_sw_clkmgr_reset_frequency.4055707794 |
|
|
Aug 16 07:29:19 PM PDT 24 |
Aug 16 07:36:03 PM PDT 24 |
2987837624 ps |
| T265 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.2259058954 |
|
|
Aug 16 07:40:48 PM PDT 24 |
Aug 16 07:48:47 PM PDT 24 |
4940665842 ps |
| T434 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.834787870 |
|
|
Aug 16 07:17:07 PM PDT 24 |
Aug 16 07:27:20 PM PDT 24 |
4483173528 ps |
| T206 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_in_irq.2136117287 |
|
|
Aug 16 07:24:23 PM PDT 24 |
Aug 16 07:34:18 PM PDT 24 |
5079438362 ps |
| T435 |
/workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.602821502 |
|
|
Aug 16 07:37:34 PM PDT 24 |
Aug 16 07:43:26 PM PDT 24 |
3694889176 ps |
| T436 |
/workspace/coverage/default/0.chip_sw_kmac_idle.3023821462 |
|
|
Aug 16 07:10:16 PM PDT 24 |
Aug 16 07:15:19 PM PDT 24 |
3095821926 ps |
| T437 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.1552508616 |
|
|
Aug 16 07:11:01 PM PDT 24 |
Aug 16 07:23:58 PM PDT 24 |
4649680352 ps |
| T438 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_nmi_irq.3801454061 |
|
|
Aug 16 07:08:50 PM PDT 24 |
Aug 16 07:20:59 PM PDT 24 |
4621797188 ps |
| T340 |
/workspace/coverage/default/2.chip_sw_pwrmgr_lowpower_cancel.938507668 |
|
|
Aug 16 07:28:05 PM PDT 24 |
Aug 16 07:36:13 PM PDT 24 |
3813081736 ps |
| T1080 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_mem_protection.1868170985 |
|
|
Aug 16 07:12:30 PM PDT 24 |
Aug 16 07:34:46 PM PDT 24 |
5075285048 ps |
| T1081 |
/workspace/coverage/default/2.chip_sw_example_flash.2721352294 |
|
|
Aug 16 07:22:27 PM PDT 24 |
Aug 16 07:27:40 PM PDT 24 |
3033787798 ps |
| T158 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.3231550411 |
|
|
Aug 16 07:13:50 PM PDT 24 |
Aug 16 07:15:24 PM PDT 24 |
1653266664 ps |
| T238 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_rma.3397038671 |
|
|
Aug 16 07:07:41 PM PDT 24 |
Aug 16 08:56:53 PM PDT 24 |
47749768208 ps |
| T444 |
/workspace/coverage/default/42.chip_sw_alert_handler_lpg_sleep_mode_alerts.2260755359 |
|
|
Aug 16 07:36:47 PM PDT 24 |
Aug 16 07:42:58 PM PDT 24 |
3448534644 ps |
| T344 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops.3560282714 |
|
|
Aug 16 07:22:57 PM PDT 24 |
Aug 16 07:35:28 PM PDT 24 |
4502968888 ps |
| T192 |
/workspace/coverage/default/1.chip_sw_power_virus.3399187434 |
|
|
Aug 16 07:25:15 PM PDT 24 |
Aug 16 07:51:31 PM PDT 24 |
5802682536 ps |
| T448 |
/workspace/coverage/default/70.chip_sw_alert_handler_lpg_sleep_mode_alerts.2846667835 |
|
|
Aug 16 07:38:40 PM PDT 24 |
Aug 16 07:44:57 PM PDT 24 |
3954851150 ps |
| T449 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter.1902251645 |
|
|
Aug 16 07:18:35 PM PDT 24 |
Aug 16 07:22:05 PM PDT 24 |
3100003031 ps |
| T198 |
/workspace/coverage/default/2.chip_jtag_mem_access.2003585514 |
|
|
Aug 16 07:20:39 PM PDT 24 |
Aug 16 07:42:19 PM PDT 24 |
14229273400 ps |
| T450 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx.1025950197 |
|
|
Aug 16 07:12:16 PM PDT 24 |
Aug 16 07:23:52 PM PDT 24 |
4623261550 ps |
| T451 |
/workspace/coverage/default/0.chip_sw_rstmgr_smoketest.1310587162 |
|
|
Aug 16 07:15:04 PM PDT 24 |
Aug 16 07:20:19 PM PDT 24 |
3035640712 ps |
| T452 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_kmac_trans.981362620 |
|
|
Aug 16 07:17:04 PM PDT 24 |
Aug 16 07:25:35 PM PDT 24 |
4974914780 ps |
| T193 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through_collision.2823275493 |
|
|
Aug 16 07:23:55 PM PDT 24 |
Aug 16 07:31:30 PM PDT 24 |
4007279781 ps |
| T1082 |
/workspace/coverage/default/1.chip_sw_clkmgr_smoketest.278230892 |
|
|
Aug 16 07:22:00 PM PDT 24 |
Aug 16 07:26:48 PM PDT 24 |
3082621640 ps |
| T1083 |
/workspace/coverage/default/53.chip_sw_all_escalation_resets.25134923 |
|
|
Aug 16 07:36:36 PM PDT 24 |
Aug 16 07:44:58 PM PDT 24 |
5354243600 ps |
| T1084 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_otbn_trans.3124505180 |
|
|
Aug 16 07:10:50 PM PDT 24 |
Aug 16 07:17:32 PM PDT 24 |
4912698846 ps |
| T1085 |
/workspace/coverage/default/2.chip_sw_rstmgr_smoketest.3057046228 |
|
|
Aug 16 07:30:38 PM PDT 24 |
Aug 16 07:34:19 PM PDT 24 |
2327766448 ps |
| T1086 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_write_clear.173619893 |
|
|
Aug 16 07:28:19 PM PDT 24 |
Aug 16 07:33:30 PM PDT 24 |
3681406200 ps |
| T1087 |
/workspace/coverage/default/1.chip_sw_kmac_mode_cshake.3236405529 |
|
|
Aug 16 07:17:55 PM PDT 24 |
Aug 16 07:23:10 PM PDT 24 |
3122140600 ps |
| T1088 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_rma.1145502752 |
|
|
Aug 16 07:27:49 PM PDT 24 |
Aug 16 08:54:50 PM PDT 24 |
47539619914 ps |
| T755 |
/workspace/coverage/default/34.chip_sw_all_escalation_resets.621270977 |
|
|
Aug 16 07:35:17 PM PDT 24 |
Aug 16 07:44:24 PM PDT 24 |
4556714080 ps |
| T1089 |
/workspace/coverage/default/0.rom_e2e_static_critical.3820526420 |
|
|
Aug 16 07:15:42 PM PDT 24 |
Aug 16 08:24:55 PM PDT 24 |
17612326400 ps |
| T690 |
/workspace/coverage/default/49.chip_sw_alert_handler_lpg_sleep_mode_alerts.2194249208 |
|
|
Aug 16 07:39:42 PM PDT 24 |
Aug 16 07:46:07 PM PDT 24 |
3563234320 ps |
| T737 |
/workspace/coverage/default/98.chip_sw_all_escalation_resets.1734829497 |
|
|
Aug 16 07:46:41 PM PDT 24 |
Aug 16 07:54:27 PM PDT 24 |
3989136120 ps |
| T1090 |
/workspace/coverage/default/0.chip_sw_rv_timer_smoketest.278426239 |
|
|
Aug 16 07:15:21 PM PDT 24 |
Aug 16 07:20:08 PM PDT 24 |
2871225120 ps |
| T207 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_inputs.1637296418 |
|
|
Aug 16 07:14:32 PM PDT 24 |
Aug 16 07:20:44 PM PDT 24 |
2830338569 ps |
| T1091 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_rnd.1082722644 |
|
|
Aug 16 07:15:15 PM PDT 24 |
Aug 16 07:33:20 PM PDT 24 |
5414155800 ps |
| T1092 |
/workspace/coverage/default/2.rom_e2e_self_hash.1471193316 |
|
|
Aug 16 07:33:55 PM PDT 24 |
Aug 16 09:05:57 PM PDT 24 |
26657594472 ps |
| T1093 |
/workspace/coverage/default/0.chip_sw_clkmgr_reset_frequency.1956748264 |
|
|
Aug 16 07:08:22 PM PDT 24 |
Aug 16 07:15:49 PM PDT 24 |
3521231874 ps |
| T348 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en.637155853 |
|
|
Aug 16 07:11:23 PM PDT 24 |
Aug 16 07:21:31 PM PDT 24 |
3712816280 ps |
| T1094 |
/workspace/coverage/default/0.chip_sw_clkmgr_off_peri.2248059120 |
|
|
Aug 16 07:09:03 PM PDT 24 |
Aug 16 07:38:14 PM PDT 24 |
11196069630 ps |
| T1095 |
/workspace/coverage/default/56.chip_sw_all_escalation_resets.1668575535 |
|
|
Aug 16 07:38:22 PM PDT 24 |
Aug 16 07:49:02 PM PDT 24 |
5716460288 ps |
| T1096 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_rma.1536895601 |
|
|
Aug 16 07:17:13 PM PDT 24 |
Aug 16 08:42:12 PM PDT 24 |
22841163050 ps |
| T1097 |
/workspace/coverage/default/0.rom_keymgr_functest.289795963 |
|
|
Aug 16 07:10:45 PM PDT 24 |
Aug 16 07:21:01 PM PDT 24 |
4706103918 ps |
| T1098 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_prod.1319832837 |
|
|
Aug 16 07:23:55 PM PDT 24 |
Aug 16 08:46:46 PM PDT 24 |
49085436575 ps |
| T1099 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_transition.3459651498 |
|
|
Aug 16 07:15:46 PM PDT 24 |
Aug 16 07:33:23 PM PDT 24 |
10388111960 ps |
| T314 |
/workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.2836982249 |
|
|
Aug 16 07:30:07 PM PDT 24 |
Aug 16 07:37:02 PM PDT 24 |
5161120584 ps |
| T777 |
/workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.1657576447 |
|
|
Aug 16 07:36:17 PM PDT 24 |
Aug 16 07:42:58 PM PDT 24 |
3821322852 ps |
| T1100 |
/workspace/coverage/default/7.chip_sw_lc_ctrl_transition.2696566513 |
|
|
Aug 16 07:33:18 PM PDT 24 |
Aug 16 07:46:26 PM PDT 24 |
9069145855 ps |
| T644 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.3440524010 |
|
|
Aug 16 07:28:11 PM PDT 24 |
Aug 16 07:37:58 PM PDT 24 |
4308199393 ps |
| T1101 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx3.2795104984 |
|
|
Aug 16 07:34:43 PM PDT 24 |
Aug 16 07:47:15 PM PDT 24 |
4210342060 ps |
| T1102 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.1598191206 |
|
|
Aug 16 07:40:03 PM PDT 24 |
Aug 16 07:52:18 PM PDT 24 |
4908155286 ps |
| T530 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.2878644037 |
|
|
Aug 16 07:15:26 PM PDT 24 |
Aug 16 07:30:32 PM PDT 24 |
4813934216 ps |
| T1103 |
/workspace/coverage/default/1.chip_sw_aes_entropy.2057966405 |
|
|
Aug 16 07:14:17 PM PDT 24 |
Aug 16 07:19:22 PM PDT 24 |
2580785340 ps |
| T1104 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_ok.3417769882 |
|
|
Aug 16 07:12:36 PM PDT 24 |
Aug 16 07:36:09 PM PDT 24 |
7667934072 ps |
| T656 |
/workspace/coverage/default/0.chip_sw_power_idle_load.940648841 |
|
|
Aug 16 07:11:43 PM PDT 24 |
Aug 16 07:25:26 PM PDT 24 |
3977662596 ps |
| T1105 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.2485422624 |
|
|
Aug 16 07:24:49 PM PDT 24 |
Aug 16 08:24:52 PM PDT 24 |
15043403280 ps |
| T1106 |
/workspace/coverage/default/1.chip_sw_example_rom.368450147 |
|
|
Aug 16 07:11:12 PM PDT 24 |
Aug 16 07:13:07 PM PDT 24 |
2551039766 ps |
| T1107 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_lc.3478267861 |
|
|
Aug 16 07:26:44 PM PDT 24 |
Aug 16 07:37:26 PM PDT 24 |
6040487906 ps |
| T1108 |
/workspace/coverage/default/1.chip_sw_ast_clk_outputs.1425770052 |
|
|
Aug 16 07:17:56 PM PDT 24 |
Aug 16 07:32:43 PM PDT 24 |
7909761536 ps |
| T1109 |
/workspace/coverage/default/1.rom_keymgr_functest.2973113642 |
|
|
Aug 16 07:22:53 PM PDT 24 |
Aug 16 07:36:26 PM PDT 24 |
4383656996 ps |
| T1110 |
/workspace/coverage/default/4.chip_tap_straps_dev.216772741 |
|
|
Aug 16 07:31:56 PM PDT 24 |
Aug 16 07:44:54 PM PDT 24 |
8172235138 ps |
| T1111 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.3468499087 |
|
|
Aug 16 07:12:15 PM PDT 24 |
Aug 16 07:17:36 PM PDT 24 |
3708729440 ps |
| T1112 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.637078861 |
|
|
Aug 16 07:09:01 PM PDT 24 |
Aug 16 07:11:58 PM PDT 24 |
3057428823 ps |
| T672 |
/workspace/coverage/default/2.chip_sw_pattgen_ios.3411552330 |
|
|
Aug 16 07:22:26 PM PDT 24 |
Aug 16 07:27:40 PM PDT 24 |
2858449360 ps |
| T1113 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_prodend.101215466 |
|
|
Aug 16 07:14:59 PM PDT 24 |
Aug 16 07:28:37 PM PDT 24 |
7839129643 ps |
| T1114 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx_idx1.2692893602 |
|
|
Aug 16 07:15:10 PM PDT 24 |
Aug 16 07:27:55 PM PDT 24 |
4877127240 ps |
| T1115 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.713678334 |
|
|
Aug 16 07:10:20 PM PDT 24 |
Aug 16 07:22:25 PM PDT 24 |
3765928590 ps |
| T1116 |
/workspace/coverage/default/2.rom_e2e_shutdown_output.3431220297 |
|
|
Aug 16 07:38:22 PM PDT 24 |
Aug 16 08:37:49 PM PDT 24 |
25077903088 ps |
| T1117 |
/workspace/coverage/default/1.chip_sw_uart_smoketest.320980226 |
|
|
Aug 16 07:21:46 PM PDT 24 |
Aug 16 07:25:51 PM PDT 24 |
2403085860 ps |
| T1118 |
/workspace/coverage/default/1.chip_sw_csrng_lc_hw_debug_en_test.2489115603 |
|
|
Aug 16 07:16:33 PM PDT 24 |
Aug 16 07:26:11 PM PDT 24 |
6372966200 ps |
| T1119 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.1689356197 |
|
|
Aug 16 07:27:46 PM PDT 24 |
Aug 16 07:41:24 PM PDT 24 |
3937444900 ps |
| T1120 |
/workspace/coverage/default/5.chip_sw_uart_rand_baudrate.3620969615 |
|
|
Aug 16 07:33:07 PM PDT 24 |
Aug 16 07:57:30 PM PDT 24 |
8370124604 ps |
| T1121 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod.3057801293 |
|
|
Aug 16 07:25:39 PM PDT 24 |
Aug 16 08:30:42 PM PDT 24 |
15503113005 ps |
| T1122 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.1760440194 |
|
|
Aug 16 07:12:08 PM PDT 24 |
Aug 16 07:28:20 PM PDT 24 |
5674575143 ps |
| T1123 |
/workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.89220428 |
|
|
Aug 16 07:12:30 PM PDT 24 |
Aug 16 07:35:10 PM PDT 24 |
9026943247 ps |
| T1124 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en_reduced_freq.3691452781 |
|
|
Aug 16 07:30:22 PM PDT 24 |
Aug 16 07:34:47 PM PDT 24 |
3093936211 ps |
| T1125 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_bootstrap.4118792323 |
|
|
Aug 16 07:07:49 PM PDT 24 |
Aug 16 10:58:24 PM PDT 24 |
78515944140 ps |
| T1126 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.3300194276 |
|
|
Aug 16 07:06:53 PM PDT 24 |
Aug 16 07:14:02 PM PDT 24 |
7216131200 ps |
| T741 |
/workspace/coverage/default/85.chip_sw_alert_handler_lpg_sleep_mode_alerts.3748584845 |
|
|
Aug 16 07:41:13 PM PDT 24 |
Aug 16 07:48:35 PM PDT 24 |
3881894496 ps |
| T1127 |
/workspace/coverage/default/0.rom_e2e_shutdown_output.2375657701 |
|
|
Aug 16 07:15:00 PM PDT 24 |
Aug 16 08:10:02 PM PDT 24 |
29459065160 ps |
| T199 |
/workspace/coverage/default/0.chip_jtag_mem_access.3465265454 |
|
|
Aug 16 07:00:51 PM PDT 24 |
Aug 16 07:21:54 PM PDT 24 |
12974902685 ps |
| T1128 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.4274700853 |
|
|
Aug 16 07:14:07 PM PDT 24 |
Aug 16 07:24:19 PM PDT 24 |
4835858300 ps |
| T1129 |
/workspace/coverage/default/0.chip_sw_example_manufacturer.3300460425 |
|
|
Aug 16 07:08:20 PM PDT 24 |
Aug 16 07:11:28 PM PDT 24 |
2628316114 ps |
| T1130 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.3074869513 |
|
|
Aug 16 07:18:25 PM PDT 24 |
Aug 16 07:33:04 PM PDT 24 |
7137074172 ps |
| T295 |
/workspace/coverage/default/9.chip_sw_alert_handler_lpg_sleep_mode_alerts.4018350720 |
|
|
Aug 16 07:33:49 PM PDT 24 |
Aug 16 07:40:23 PM PDT 24 |
3612012200 ps |
| T1131 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_smoketest.3684296936 |
|
|
Aug 16 07:21:45 PM PDT 24 |
Aug 16 07:25:55 PM PDT 24 |
2570709184 ps |
| T1132 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx1.2039273673 |
|
|
Aug 16 07:30:52 PM PDT 24 |
Aug 16 07:42:02 PM PDT 24 |
4317016104 ps |
| T208 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_outputs.276951729 |
|
|
Aug 16 07:13:45 PM PDT 24 |
Aug 16 07:18:55 PM PDT 24 |
3550843288 ps |
| T1133 |
/workspace/coverage/default/1.rom_e2e_shutdown_output.1395100029 |
|
|
Aug 16 07:24:14 PM PDT 24 |
Aug 16 08:22:32 PM PDT 24 |
24935733995 ps |
| T1134 |
/workspace/coverage/default/1.chip_sw_aon_timer_irq.3575729003 |
|
|
Aug 16 07:13:22 PM PDT 24 |
Aug 16 07:19:44 PM PDT 24 |
4193075200 ps |
| T1135 |
/workspace/coverage/default/0.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.1709885894 |
|
|
Aug 16 07:10:12 PM PDT 24 |
Aug 16 07:21:59 PM PDT 24 |
18853487880 ps |
| T445 |
/workspace/coverage/default/15.chip_sw_all_escalation_resets.890992363 |
|
|
Aug 16 07:35:51 PM PDT 24 |
Aug 16 07:47:05 PM PDT 24 |
5448794096 ps |
| T43 |
/workspace/coverage/default/1.chip_sw_spi_device_tpm.395197439 |
|
|
Aug 16 07:12:40 PM PDT 24 |
Aug 16 07:17:53 PM PDT 24 |
3340272366 ps |
| T240 |
/workspace/coverage/default/2.chip_sw_flash_init.3059434002 |
|
|
Aug 16 07:23:18 PM PDT 24 |
Aug 16 07:52:57 PM PDT 24 |
21077880088 ps |
| T1136 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_in_irq.1188501278 |
|
|
Aug 16 07:13:05 PM PDT 24 |
Aug 16 07:23:04 PM PDT 24 |
4961777323 ps |
| T1137 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_rma.2171769830 |
|
|
Aug 16 07:17:10 PM PDT 24 |
Aug 16 08:33:34 PM PDT 24 |
15606399596 ps |
| T1138 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.4153560684 |
|
|
Aug 16 07:34:26 PM PDT 24 |
Aug 16 07:58:56 PM PDT 24 |
8491703056 ps |
| T334 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.1165679490 |
|
|
Aug 16 07:28:22 PM PDT 24 |
Aug 16 07:40:14 PM PDT 24 |
4233667060 ps |
| T772 |
/workspace/coverage/default/61.chip_sw_alert_handler_lpg_sleep_mode_alerts.3578769536 |
|
|
Aug 16 07:39:01 PM PDT 24 |
Aug 16 07:45:20 PM PDT 24 |
4244407020 ps |
| T766 |
/workspace/coverage/default/33.chip_sw_alert_handler_lpg_sleep_mode_alerts.326172272 |
|
|
Aug 16 07:35:48 PM PDT 24 |
Aug 16 07:40:56 PM PDT 24 |
4136182916 ps |
| T1139 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod.1244599135 |
|
|
Aug 16 07:14:20 PM PDT 24 |
Aug 16 08:16:38 PM PDT 24 |
14270898079 ps |
| T1140 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation.3279023585 |
|
|
Aug 16 07:12:52 PM PDT 24 |
Aug 16 07:44:04 PM PDT 24 |
9403420988 ps |
| T1141 |
/workspace/coverage/default/2.chip_sw_alert_handler_escalation.3138629490 |
|
|
Aug 16 07:25:06 PM PDT 24 |
Aug 16 07:32:16 PM PDT 24 |
4251825032 ps |
| T1142 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.1054438297 |
|
|
Aug 16 07:07:38 PM PDT 24 |
Aug 16 07:17:31 PM PDT 24 |
4302352276 ps |
| T374 |
/workspace/coverage/default/33.chip_sw_all_escalation_resets.3266071313 |
|
|
Aug 16 07:36:26 PM PDT 24 |
Aug 16 07:46:01 PM PDT 24 |
4183026472 ps |
| T1143 |
/workspace/coverage/default/2.chip_tap_straps_prod.2884199309 |
|
|
Aug 16 07:30:54 PM PDT 24 |
Aug 16 07:44:00 PM PDT 24 |
7952472176 ps |
| T1144 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx.522562587 |
|
|
Aug 16 07:05:58 PM PDT 24 |
Aug 16 07:16:09 PM PDT 24 |
4059606980 ps |