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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.19 95.55 94.14 95.45 94.94 97.53 99.52


Total test records in report: 2938
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T767 /workspace/coverage/default/74.chip_sw_all_escalation_resets.1274996515 Aug 16 07:39:01 PM PDT 24 Aug 16 07:48:17 PM PDT 24 4297394302 ps
T1311 /workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.1866936123 Aug 16 07:24:24 PM PDT 24 Aug 16 07:28:05 PM PDT 24 2968001984 ps
T1312 /workspace/coverage/default/1.chip_sw_pwrmgr_smoketest.1920650719 Aug 16 07:22:41 PM PDT 24 Aug 16 07:28:37 PM PDT 24 5183248932 ps
T1313 /workspace/coverage/default/65.chip_sw_all_escalation_resets.122102802 Aug 16 07:38:04 PM PDT 24 Aug 16 07:49:18 PM PDT 24 4962429454 ps
T1314 /workspace/coverage/default/1.chip_sw_flash_ctrl_lc_rw_en.276858016 Aug 16 07:13:31 PM PDT 24 Aug 16 07:22:46 PM PDT 24 5390328719 ps
T1315 /workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.3638940579 Aug 16 07:08:54 PM PDT 24 Aug 16 07:12:51 PM PDT 24 3047232712 ps
T1316 /workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.3651332294 Aug 16 07:06:27 PM PDT 24 Aug 16 07:08:02 PM PDT 24 3041019134 ps
T1317 /workspace/coverage/default/1.chip_sw_plic_sw_irq.429258169 Aug 16 07:18:10 PM PDT 24 Aug 16 07:24:04 PM PDT 24 2912092774 ps
T1318 /workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.2552215252 Aug 16 07:13:52 PM PDT 24 Aug 16 07:15:40 PM PDT 24 2471774522 ps
T1319 /workspace/coverage/default/1.rom_e2e_asm_init_test_unlocked0.3870567430 Aug 16 07:27:45 PM PDT 24 Aug 16 08:09:37 PM PDT 24 11096437828 ps
T1320 /workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.2655454534 Aug 16 07:20:47 PM PDT 24 Aug 16 07:41:17 PM PDT 24 5803491928 ps
T131 /workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.2174963063 Aug 16 07:28:06 PM PDT 24 Aug 16 07:40:28 PM PDT 24 8761157762 ps
T132 /workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.294573917 Aug 16 07:32:05 PM PDT 24 Aug 16 07:45:12 PM PDT 24 8073010464 ps
T768 /workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.1531167216 Aug 16 07:40:46 PM PDT 24 Aug 16 07:47:48 PM PDT 24 3218015976 ps
T1321 /workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_invalid_meas.1887868612 Aug 16 07:26:02 PM PDT 24 Aug 16 08:21:46 PM PDT 24 14444975102 ps
T745 /workspace/coverage/default/48.chip_sw_alert_handler_lpg_sleep_mode_alerts.1686116479 Aug 16 07:39:34 PM PDT 24 Aug 16 07:47:19 PM PDT 24 3704501044 ps
T1322 /workspace/coverage/default/16.chip_sw_uart_rand_baudrate.3319673283 Aug 16 07:36:08 PM PDT 24 Aug 16 07:58:22 PM PDT 24 8201886606 ps
T72 /workspace/coverage/cover_reg_top/71.xbar_same_source.3609543852 Aug 16 06:54:32 PM PDT 24 Aug 16 06:55:15 PM PDT 24 577990209 ps
T73 /workspace/coverage/cover_reg_top/23.xbar_error_random.464580166 Aug 16 06:46:56 PM PDT 24 Aug 16 06:47:18 PM PDT 24 319256661 ps
T74 /workspace/coverage/cover_reg_top/41.xbar_error_random.3918879586 Aug 16 06:49:59 PM PDT 24 Aug 16 06:50:19 PM PDT 24 202719671 ps
T249 /workspace/coverage/cover_reg_top/94.xbar_random.1435841523 Aug 16 06:57:56 PM PDT 24 Aug 16 06:59:08 PM PDT 24 2165204150 ps
T250 /workspace/coverage/cover_reg_top/49.xbar_smoke_large_delays.1788902414 Aug 16 06:51:15 PM PDT 24 Aug 16 06:52:52 PM PDT 24 9268043421 ps
T251 /workspace/coverage/cover_reg_top/88.xbar_error_and_unmapped_addr.453167429 Aug 16 06:57:06 PM PDT 24 Aug 16 06:57:28 PM PDT 24 557894203 ps
T536 /workspace/coverage/cover_reg_top/27.xbar_stress_all_with_rand_reset.1491067831 Aug 16 06:47:38 PM PDT 24 Aug 16 06:51:36 PM PDT 24 889580861 ps
T715 /workspace/coverage/cover_reg_top/71.xbar_access_same_device.2905169236 Aug 16 06:54:34 PM PDT 24 Aug 16 06:54:45 PM PDT 24 259361912 ps
T467 /workspace/coverage/cover_reg_top/31.xbar_stress_all.4254522243 Aug 16 06:48:08 PM PDT 24 Aug 16 06:50:51 PM PDT 24 4573359721 ps
T714 /workspace/coverage/cover_reg_top/78.xbar_access_same_device_slow_rsp.998142073 Aug 16 06:55:40 PM PDT 24 Aug 16 07:01:00 PM PDT 24 17845878274 ps
T539 /workspace/coverage/cover_reg_top/41.xbar_smoke_large_delays.3535855137 Aug 16 06:49:51 PM PDT 24 Aug 16 06:51:13 PM PDT 24 7922966461 ps
T440 /workspace/coverage/cover_reg_top/26.xbar_random_slow_rsp.2745861910 Aug 16 06:47:24 PM PDT 24 Aug 16 07:01:29 PM PDT 24 47979116447 ps
T441 /workspace/coverage/cover_reg_top/98.xbar_stress_all.2317783332 Aug 16 06:58:33 PM PDT 24 Aug 16 07:08:37 PM PDT 24 15091013193 ps
T531 /workspace/coverage/cover_reg_top/25.xbar_error_random.2507909344 Aug 16 06:47:06 PM PDT 24 Aug 16 06:47:23 PM PDT 24 438673510 ps
T538 /workspace/coverage/cover_reg_top/40.xbar_stress_all_with_reset_error.2713151924 Aug 16 06:49:49 PM PDT 24 Aug 16 06:55:03 PM PDT 24 6784031194 ps
T542 /workspace/coverage/cover_reg_top/90.xbar_stress_all_with_reset_error.1649338070 Aug 16 06:57:27 PM PDT 24 Aug 16 06:58:24 PM PDT 24 219653298 ps
T537 /workspace/coverage/cover_reg_top/51.xbar_random_large_delays.3942161413 Aug 16 06:51:34 PM PDT 24 Aug 16 07:09:13 PM PDT 24 95193187476 ps
T544 /workspace/coverage/cover_reg_top/70.xbar_error_and_unmapped_addr.821546684 Aug 16 06:54:27 PM PDT 24 Aug 16 06:54:37 PM PDT 24 175364938 ps
T420 /workspace/coverage/cover_reg_top/66.xbar_stress_all.1135046665 Aug 16 06:53:54 PM PDT 24 Aug 16 06:58:58 PM PDT 24 3951262265 ps
T464 /workspace/coverage/cover_reg_top/97.xbar_random_zero_delays.4018775722 Aug 16 06:58:24 PM PDT 24 Aug 16 06:58:52 PM PDT 24 275917526 ps
T415 /workspace/coverage/cover_reg_top/59.xbar_same_source.4110001570 Aug 16 06:52:53 PM PDT 24 Aug 16 06:53:35 PM PDT 24 578499128 ps
T1323 /workspace/coverage/cover_reg_top/43.xbar_error_random.4016033441 Aug 16 06:50:14 PM PDT 24 Aug 16 06:50:40 PM PDT 24 664572144 ps
T540 /workspace/coverage/cover_reg_top/70.xbar_same_source.3001356694 Aug 16 06:54:27 PM PDT 24 Aug 16 06:54:49 PM PDT 24 280031072 ps
T1324 /workspace/coverage/cover_reg_top/55.xbar_smoke_zero_delays.3506340964 Aug 16 06:52:07 PM PDT 24 Aug 16 06:52:13 PM PDT 24 41941060 ps
T611 /workspace/coverage/cover_reg_top/46.xbar_same_source.2622243743 Aug 16 06:50:43 PM PDT 24 Aug 16 06:50:59 PM PDT 24 466129159 ps
T637 /workspace/coverage/cover_reg_top/22.chip_tl_errors.211969009 Aug 16 06:46:35 PM PDT 24 Aug 16 06:48:03 PM PDT 24 2651650740 ps
T607 /workspace/coverage/cover_reg_top/2.xbar_unmapped_addr.635361298 Aug 16 06:43:30 PM PDT 24 Aug 16 06:43:35 PM PDT 24 21970424 ps
T1325 /workspace/coverage/cover_reg_top/67.xbar_smoke.4213599467 Aug 16 06:54:08 PM PDT 24 Aug 16 06:54:16 PM PDT 24 202558148 ps
T655 /workspace/coverage/cover_reg_top/65.xbar_access_same_device.668311886 Aug 16 06:53:38 PM PDT 24 Aug 16 06:54:35 PM PDT 24 1284959175 ps
T543 /workspace/coverage/cover_reg_top/69.xbar_error_and_unmapped_addr.869897236 Aug 16 06:54:18 PM PDT 24 Aug 16 06:55:08 PM PDT 24 1293524504 ps
T654 /workspace/coverage/cover_reg_top/28.xbar_access_same_device_slow_rsp.2927949617 Aug 16 06:47:45 PM PDT 24 Aug 16 07:23:05 PM PDT 24 115313445394 ps
T535 /workspace/coverage/cover_reg_top/61.xbar_stress_all_with_error.2558777428 Aug 16 06:53:12 PM PDT 24 Aug 16 06:59:10 PM PDT 24 4416771519 ps
T1326 /workspace/coverage/cover_reg_top/2.chip_rv_dm_lc_disabled.2447944291 Aug 16 06:43:19 PM PDT 24 Aug 16 06:51:29 PM PDT 24 10069684991 ps
T1327 /workspace/coverage/cover_reg_top/45.xbar_smoke.1141232700 Aug 16 06:50:30 PM PDT 24 Aug 16 06:50:37 PM PDT 24 48738298 ps
T844 /workspace/coverage/cover_reg_top/67.xbar_stress_all_with_reset_error.915606786 Aug 16 06:54:03 PM PDT 24 Aug 16 06:56:01 PM PDT 24 354007184 ps
T559 /workspace/coverage/cover_reg_top/18.xbar_random_slow_rsp.2543399467 Aug 16 06:46:00 PM PDT 24 Aug 16 06:54:44 PM PDT 24 29370841836 ps
T378 /workspace/coverage/cover_reg_top/7.chip_csr_mem_rw_with_rand_reset.4292827630 Aug 16 06:44:12 PM PDT 24 Aug 16 06:52:59 PM PDT 24 7579954837 ps
T405 /workspace/coverage/cover_reg_top/1.xbar_random_zero_delays.2685267298 Aug 16 06:43:12 PM PDT 24 Aug 16 06:43:27 PM PDT 24 154516041 ps
T430 /workspace/coverage/cover_reg_top/95.xbar_random_slow_rsp.518904343 Aug 16 06:58:05 PM PDT 24 Aug 16 07:06:15 PM PDT 24 28185428509 ps
T800 /workspace/coverage/cover_reg_top/51.xbar_access_same_device_slow_rsp.2866915262 Aug 16 06:51:43 PM PDT 24 Aug 16 07:15:47 PM PDT 24 88106851305 ps
T541 /workspace/coverage/cover_reg_top/56.xbar_stress_all_with_error.2963089940 Aug 16 06:52:22 PM PDT 24 Aug 16 07:01:09 PM PDT 24 16378426829 ps
T641 /workspace/coverage/cover_reg_top/48.xbar_stress_all_with_error.105108194 Aug 16 06:51:12 PM PDT 24 Aug 16 06:53:51 PM PDT 24 4161679279 ps
T516 /workspace/coverage/cover_reg_top/56.xbar_stress_all_with_rand_reset.1542609929 Aug 16 06:52:23 PM PDT 24 Aug 16 07:02:45 PM PDT 24 7451680636 ps
T623 /workspace/coverage/cover_reg_top/20.xbar_random_slow_rsp.2038325696 Aug 16 06:46:21 PM PDT 24 Aug 16 06:48:28 PM PDT 24 7226369326 ps
T1328 /workspace/coverage/cover_reg_top/42.xbar_random.3591284333 Aug 16 06:50:07 PM PDT 24 Aug 16 06:50:15 PM PDT 24 150912592 ps
T617 /workspace/coverage/cover_reg_top/96.xbar_stress_all_with_reset_error.4027470113 Aug 16 06:58:26 PM PDT 24 Aug 16 07:03:25 PM PDT 24 2286502306 ps
T442 /workspace/coverage/cover_reg_top/92.xbar_smoke_zero_delays.3032339326 Aug 16 06:57:35 PM PDT 24 Aug 16 06:57:41 PM PDT 24 51006609 ps
T1329 /workspace/coverage/cover_reg_top/1.chip_rv_dm_lc_disabled.2079726768 Aug 16 06:43:12 PM PDT 24 Aug 16 06:49:49 PM PDT 24 10066812280 ps
T606 /workspace/coverage/cover_reg_top/86.xbar_error_random.1341159512 Aug 16 06:56:47 PM PDT 24 Aug 16 06:57:46 PM PDT 24 1832186793 ps
T789 /workspace/coverage/cover_reg_top/12.xbar_stress_all_with_error.2968572251 Aug 16 06:45:11 PM PDT 24 Aug 16 06:46:31 PM PDT 24 2399312329 ps
T1330 /workspace/coverage/cover_reg_top/57.xbar_smoke_large_delays.2943143159 Aug 16 06:52:22 PM PDT 24 Aug 16 06:53:55 PM PDT 24 8296434907 ps
T1331 /workspace/coverage/cover_reg_top/81.xbar_error_and_unmapped_addr.702044663 Aug 16 06:56:01 PM PDT 24 Aug 16 06:56:20 PM PDT 24 435428391 ps
T439 /workspace/coverage/cover_reg_top/64.xbar_stress_all_with_rand_reset.741456472 Aug 16 06:53:38 PM PDT 24 Aug 16 07:04:59 PM PDT 24 6373809225 ps
T1332 /workspace/coverage/cover_reg_top/37.xbar_smoke.2200717129 Aug 16 06:49:13 PM PDT 24 Aug 16 06:49:19 PM PDT 24 46702583 ps
T817 /workspace/coverage/cover_reg_top/81.xbar_smoke_slow_rsp.2899275993 Aug 16 06:55:54 PM PDT 24 Aug 16 06:57:26 PM PDT 24 5975203381 ps
T818 /workspace/coverage/cover_reg_top/32.xbar_access_same_device_slow_rsp.4044015153 Aug 16 06:48:22 PM PDT 24 Aug 16 06:55:46 PM PDT 24 25507160786 ps
T782 /workspace/coverage/cover_reg_top/7.xbar_access_same_device_slow_rsp.3919176401 Aug 16 06:44:11 PM PDT 24 Aug 16 07:27:41 PM PDT 24 147249278260 ps
T1333 /workspace/coverage/cover_reg_top/62.xbar_random.3223266855 Aug 16 06:53:14 PM PDT 24 Aug 16 06:53:21 PM PDT 24 35186090 ps
T599 /workspace/coverage/cover_reg_top/98.xbar_unmapped_addr.738533944 Aug 16 06:58:41 PM PDT 24 Aug 16 06:59:22 PM PDT 24 1143928332 ps
T624 /workspace/coverage/cover_reg_top/34.xbar_stress_all_with_rand_reset.1747473629 Aug 16 06:48:55 PM PDT 24 Aug 16 06:50:36 PM PDT 24 246516408 ps
T526 /workspace/coverage/cover_reg_top/17.xbar_random_large_delays.1614389140 Aug 16 06:45:49 PM PDT 24 Aug 16 06:50:13 PM PDT 24 25966255602 ps
T612 /workspace/coverage/cover_reg_top/26.xbar_stress_all_with_error.1883693551 Aug 16 06:47:25 PM PDT 24 Aug 16 06:55:34 PM PDT 24 14766589058 ps
T569 /workspace/coverage/cover_reg_top/17.xbar_stress_all.234500492 Aug 16 06:45:50 PM PDT 24 Aug 16 06:47:05 PM PDT 24 1030712191 ps
T1334 /workspace/coverage/cover_reg_top/75.xbar_smoke_zero_delays.3486201806 Aug 16 06:55:05 PM PDT 24 Aug 16 06:55:11 PM PDT 24 52059025 ps
T1335 /workspace/coverage/cover_reg_top/38.xbar_error_and_unmapped_addr.2871662799 Aug 16 06:49:28 PM PDT 24 Aug 16 06:50:12 PM PDT 24 1005094694 ps
T814 /workspace/coverage/cover_reg_top/99.xbar_access_same_device_slow_rsp.129212189 Aug 16 06:58:43 PM PDT 24 Aug 16 07:02:00 PM PDT 24 11353709391 ps
T1336 /workspace/coverage/cover_reg_top/4.xbar_smoke.3954799779 Aug 16 06:43:40 PM PDT 24 Aug 16 06:43:48 PM PDT 24 182956527 ps
T796 /workspace/coverage/cover_reg_top/47.xbar_access_same_device.4235981808 Aug 16 06:50:57 PM PDT 24 Aug 16 06:52:26 PM PDT 24 2200077880 ps
T561 /workspace/coverage/cover_reg_top/17.xbar_random.3060036129 Aug 16 06:45:47 PM PDT 24 Aug 16 06:47:02 PM PDT 24 2384429927 ps
T824 /workspace/coverage/cover_reg_top/5.xbar_access_same_device.1639366897 Aug 16 06:43:51 PM PDT 24 Aug 16 06:44:27 PM PDT 24 466994104 ps
T1337 /workspace/coverage/cover_reg_top/92.xbar_error_random.3224971986 Aug 16 06:57:43 PM PDT 24 Aug 16 06:58:30 PM PDT 24 1507611530 ps
T1338 /workspace/coverage/cover_reg_top/76.xbar_error_random.1395111272 Aug 16 06:55:27 PM PDT 24 Aug 16 06:55:48 PM PDT 24 238415864 ps
T1339 /workspace/coverage/cover_reg_top/56.xbar_error_random.2179550653 Aug 16 06:52:26 PM PDT 24 Aug 16 06:52:55 PM PDT 24 334811686 ps
T825 /workspace/coverage/cover_reg_top/38.xbar_access_same_device.3280471654 Aug 16 06:49:28 PM PDT 24 Aug 16 06:49:50 PM PDT 24 506498698 ps
T549 /workspace/coverage/cover_reg_top/33.xbar_stress_all_with_error.434705665 Aug 16 06:48:29 PM PDT 24 Aug 16 06:54:09 PM PDT 24 9604696134 ps
T556 /workspace/coverage/cover_reg_top/43.xbar_random.2409026294 Aug 16 06:50:15 PM PDT 24 Aug 16 06:51:22 PM PDT 24 1862874005 ps
T848 /workspace/coverage/cover_reg_top/54.xbar_stress_all_with_rand_reset.2361956587 Aug 16 06:52:04 PM PDT 24 Aug 16 06:52:39 PM PDT 24 178315204 ps
T1340 /workspace/coverage/cover_reg_top/75.xbar_error_random.109293336 Aug 16 06:55:09 PM PDT 24 Aug 16 06:55:44 PM PDT 24 1085954094 ps
T790 /workspace/coverage/cover_reg_top/35.xbar_access_same_device_slow_rsp.1576193684 Aug 16 06:48:55 PM PDT 24 Aug 16 07:25:42 PM PDT 24 125744064621 ps
T1341 /workspace/coverage/cover_reg_top/20.xbar_smoke_large_delays.3057051982 Aug 16 06:46:24 PM PDT 24 Aug 16 06:47:29 PM PDT 24 6386415101 ps
T575 /workspace/coverage/cover_reg_top/81.xbar_unmapped_addr.2536715502 Aug 16 06:56:03 PM PDT 24 Aug 16 06:56:53 PM PDT 24 1408683584 ps
T795 /workspace/coverage/cover_reg_top/43.xbar_access_same_device.396827473 Aug 16 06:50:23 PM PDT 24 Aug 16 06:50:49 PM PDT 24 585757627 ps
T805 /workspace/coverage/cover_reg_top/90.xbar_stress_all_with_error.2675173636 Aug 16 06:57:31 PM PDT 24 Aug 16 07:02:47 PM PDT 24 8832336596 ps
T563 /workspace/coverage/cover_reg_top/93.xbar_unmapped_addr.2612427792 Aug 16 06:58:05 PM PDT 24 Aug 16 06:58:42 PM PDT 24 907363875 ps
T1342 /workspace/coverage/cover_reg_top/11.xbar_smoke_zero_delays.1873763619 Aug 16 06:44:52 PM PDT 24 Aug 16 06:44:58 PM PDT 24 46649528 ps
T586 /workspace/coverage/cover_reg_top/83.xbar_smoke_large_delays.235126677 Aug 16 06:56:18 PM PDT 24 Aug 16 06:57:44 PM PDT 24 7715972558 ps
T794 /workspace/coverage/cover_reg_top/91.xbar_access_same_device_slow_rsp.843051982 Aug 16 06:57:34 PM PDT 24 Aug 16 07:23:40 PM PDT 24 80495642368 ps
T141 /workspace/coverage/cover_reg_top/0.chip_csr_mem_rw_with_rand_reset.701251512 Aug 16 06:43:12 PM PDT 24 Aug 16 06:51:09 PM PDT 24 6552191978 ps
T529 /workspace/coverage/cover_reg_top/92.xbar_same_source.1153261223 Aug 16 06:57:43 PM PDT 24 Aug 16 06:58:05 PM PDT 24 305234937 ps
T620 /workspace/coverage/cover_reg_top/96.xbar_unmapped_addr.111005612 Aug 16 06:58:17 PM PDT 24 Aug 16 06:58:38 PM PDT 24 418246587 ps
T628 /workspace/coverage/cover_reg_top/41.xbar_unmapped_addr.1552565739 Aug 16 06:49:59 PM PDT 24 Aug 16 06:50:04 PM PDT 24 24306896 ps
T584 /workspace/coverage/cover_reg_top/99.xbar_smoke_slow_rsp.947347767 Aug 16 06:58:47 PM PDT 24 Aug 16 07:00:04 PM PDT 24 4511509097 ps
T1343 /workspace/coverage/cover_reg_top/54.xbar_smoke_slow_rsp.4277612520 Aug 16 06:51:56 PM PDT 24 Aug 16 06:52:47 PM PDT 24 3102600406 ps
T1344 /workspace/coverage/cover_reg_top/84.xbar_smoke_slow_rsp.673952701 Aug 16 06:56:26 PM PDT 24 Aug 16 06:57:56 PM PDT 24 5340249303 ps
T589 /workspace/coverage/cover_reg_top/59.xbar_random_large_delays.2709452201 Aug 16 06:52:52 PM PDT 24 Aug 16 07:04:25 PM PDT 24 59539790892 ps
T142 /workspace/coverage/cover_reg_top/0.chip_same_csr_outstanding.3628156295 Aug 16 06:42:59 PM PDT 24 Aug 16 07:58:49 PM PDT 24 32198240296 ps
T783 /workspace/coverage/cover_reg_top/80.xbar_random_slow_rsp.2074611923 Aug 16 06:55:53 PM PDT 24 Aug 16 06:57:24 PM PDT 24 5463264235 ps
T1345 /workspace/coverage/cover_reg_top/11.xbar_smoke_large_delays.3718101305 Aug 16 06:44:49 PM PDT 24 Aug 16 06:46:04 PM PDT 24 7128357904 ps
T1346 /workspace/coverage/cover_reg_top/72.xbar_smoke_slow_rsp.1226348565 Aug 16 06:54:41 PM PDT 24 Aug 16 06:56:20 PM PDT 24 5940726015 ps
T1347 /workspace/coverage/cover_reg_top/87.xbar_smoke_zero_delays.3776993948 Aug 16 06:56:48 PM PDT 24 Aug 16 06:56:54 PM PDT 24 42234419 ps
T546 /workspace/coverage/cover_reg_top/23.chip_tl_errors.4055065613 Aug 16 06:46:46 PM PDT 24 Aug 16 06:51:23 PM PDT 24 3974422784 ps
T629 /workspace/coverage/cover_reg_top/28.xbar_smoke_large_delays.807580963 Aug 16 06:47:39 PM PDT 24 Aug 16 06:49:18 PM PDT 24 9591564268 ps
T604 /workspace/coverage/cover_reg_top/98.xbar_random_zero_delays.2474406534 Aug 16 06:58:35 PM PDT 24 Aug 16 06:58:52 PM PDT 24 219583196 ps
T806 /workspace/coverage/cover_reg_top/87.xbar_access_same_device_slow_rsp.1843725162 Aug 16 06:56:57 PM PDT 24 Aug 16 07:23:52 PM PDT 24 89432641697 ps
T468 /workspace/coverage/cover_reg_top/58.xbar_access_same_device.341171209 Aug 16 06:52:45 PM PDT 24 Aug 16 06:54:12 PM PDT 24 2114689328 ps
T592 /workspace/coverage/cover_reg_top/98.xbar_same_source.3233197493 Aug 16 06:58:36 PM PDT 24 Aug 16 06:59:10 PM PDT 24 533433866 ps
T504 /workspace/coverage/cover_reg_top/74.xbar_stress_all.3355712994 Aug 16 06:55:03 PM PDT 24 Aug 16 07:00:29 PM PDT 24 9551364803 ps
T1348 /workspace/coverage/cover_reg_top/15.xbar_smoke.1108323069 Aug 16 06:45:23 PM PDT 24 Aug 16 06:45:29 PM PDT 24 50378077 ps
T590 /workspace/coverage/cover_reg_top/81.xbar_stress_all_with_error.2787675598 Aug 16 06:56:01 PM PDT 24 Aug 16 06:59:29 PM PDT 24 2599834974 ps
T1349 /workspace/coverage/cover_reg_top/36.xbar_error_random.103430962 Aug 16 06:49:07 PM PDT 24 Aug 16 06:50:26 PM PDT 24 2195498539 ps
T1350 /workspace/coverage/cover_reg_top/35.xbar_error_random.829568466 Aug 16 06:48:54 PM PDT 24 Aug 16 06:49:01 PM PDT 24 37705623 ps
T784 /workspace/coverage/cover_reg_top/74.xbar_access_same_device.1234455794 Aug 16 06:54:56 PM PDT 24 Aug 16 06:55:15 PM PDT 24 248688788 ps
T1351 /workspace/coverage/cover_reg_top/54.xbar_access_same_device.4262062802 Aug 16 06:52:03 PM PDT 24 Aug 16 06:52:19 PM PDT 24 348434769 ps
T807 /workspace/coverage/cover_reg_top/28.xbar_access_same_device.2498380974 Aug 16 06:47:50 PM PDT 24 Aug 16 06:49:12 PM PDT 24 1751015325 ps
T626 /workspace/coverage/cover_reg_top/50.xbar_smoke_slow_rsp.3118522626 Aug 16 06:51:28 PM PDT 24 Aug 16 06:53:14 PM PDT 24 6537803910 ps
T598 /workspace/coverage/cover_reg_top/71.xbar_random.3975520261 Aug 16 06:54:35 PM PDT 24 Aug 16 06:54:53 PM PDT 24 199974524 ps
T791 /workspace/coverage/cover_reg_top/2.xbar_access_same_device.1065923503 Aug 16 06:43:27 PM PDT 24 Aug 16 06:44:51 PM PDT 24 1977549523 ps
T601 /workspace/coverage/cover_reg_top/9.xbar_smoke_slow_rsp.2653785850 Aug 16 06:44:27 PM PDT 24 Aug 16 06:45:39 PM PDT 24 4341361396 ps
T1352 /workspace/coverage/cover_reg_top/81.xbar_smoke_large_delays.2379330582 Aug 16 06:55:52 PM PDT 24 Aug 16 06:57:24 PM PDT 24 8546044823 ps
T1353 /workspace/coverage/cover_reg_top/16.xbar_smoke_zero_delays.2772170381 Aug 16 06:45:45 PM PDT 24 Aug 16 06:45:52 PM PDT 24 41859214 ps
T1354 /workspace/coverage/cover_reg_top/12.xbar_smoke_zero_delays.3651575410 Aug 16 06:45:03 PM PDT 24 Aug 16 06:45:09 PM PDT 24 34790804 ps
T1355 /workspace/coverage/cover_reg_top/2.chip_prim_tl_access.1977259486 Aug 16 06:43:22 PM PDT 24 Aug 16 06:45:53 PM PDT 24 4649280826 ps
T1356 /workspace/coverage/cover_reg_top/20.xbar_error_and_unmapped_addr.2538836032 Aug 16 06:46:21 PM PDT 24 Aug 16 06:46:51 PM PDT 24 228675956 ps
T1357 /workspace/coverage/cover_reg_top/33.xbar_unmapped_addr.305285402 Aug 16 06:48:32 PM PDT 24 Aug 16 06:48:42 PM PDT 24 170828496 ps
T1358 /workspace/coverage/cover_reg_top/80.xbar_smoke.974115651 Aug 16 06:55:49 PM PDT 24 Aug 16 06:55:55 PM PDT 24 45248063 ps
T472 /workspace/coverage/cover_reg_top/30.xbar_same_source.4249423493 Aug 16 06:48:02 PM PDT 24 Aug 16 06:49:13 PM PDT 24 2285767204 ps
T1359 /workspace/coverage/cover_reg_top/8.xbar_smoke.3816088291 Aug 16 06:44:11 PM PDT 24 Aug 16 06:44:21 PM PDT 24 233934500 ps
T619 /workspace/coverage/cover_reg_top/80.xbar_smoke_slow_rsp.1276211825 Aug 16 06:55:58 PM PDT 24 Aug 16 06:57:03 PM PDT 24 3506769458 ps
T1360 /workspace/coverage/cover_reg_top/22.xbar_error_and_unmapped_addr.3796883179 Aug 16 06:46:47 PM PDT 24 Aug 16 06:47:04 PM PDT 24 385934963 ps
T595 /workspace/coverage/cover_reg_top/6.xbar_random_slow_rsp.258694782 Aug 16 06:43:57 PM PDT 24 Aug 16 06:44:45 PM PDT 24 2955463243 ps
T1361 /workspace/coverage/cover_reg_top/6.xbar_same_source.3410606938 Aug 16 06:44:01 PM PDT 24 Aug 16 06:44:09 PM PDT 24 165151863 ps
T1362 /workspace/coverage/cover_reg_top/82.xbar_smoke.2582477405 Aug 16 06:56:03 PM PDT 24 Aug 16 06:56:11 PM PDT 24 115366001 ps
T1363 /workspace/coverage/cover_reg_top/70.xbar_smoke_slow_rsp.150606893 Aug 16 06:54:22 PM PDT 24 Aug 16 06:55:38 PM PDT 24 4653164836 ps
T578 /workspace/coverage/cover_reg_top/60.xbar_stress_all_with_rand_reset.778109732 Aug 16 06:52:59 PM PDT 24 Aug 16 06:53:21 PM PDT 24 146483435 ps
T582 /workspace/coverage/cover_reg_top/80.xbar_random.3507886305 Aug 16 06:55:55 PM PDT 24 Aug 16 06:56:32 PM PDT 24 478258179 ps
T580 /workspace/coverage/cover_reg_top/66.xbar_random.3237971547 Aug 16 06:53:47 PM PDT 24 Aug 16 06:54:54 PM PDT 24 1873080372 ps
T517 /workspace/coverage/cover_reg_top/47.xbar_stress_all_with_rand_reset.4148542794 Aug 16 06:50:59 PM PDT 24 Aug 16 07:04:25 PM PDT 24 14825082381 ps
T570 /workspace/coverage/cover_reg_top/43.xbar_random_zero_delays.1621383011 Aug 16 06:50:15 PM PDT 24 Aug 16 06:50:40 PM PDT 24 307014814 ps
T615 /workspace/coverage/cover_reg_top/74.xbar_random.2504898114 Aug 16 06:54:54 PM PDT 24 Aug 16 06:55:04 PM PDT 24 98730970 ps
T837 /workspace/coverage/cover_reg_top/69.xbar_stress_all_with_reset_error.1342379713 Aug 16 06:54:22 PM PDT 24 Aug 16 06:59:11 PM PDT 24 984764394 ps
T545 /workspace/coverage/cover_reg_top/1.chip_tl_errors.4051987318 Aug 16 06:43:14 PM PDT 24 Aug 16 06:49:25 PM PDT 24 4838275200 ps
T834 /workspace/coverage/cover_reg_top/63.xbar_stress_all_with_reset_error.3954430376 Aug 16 06:53:33 PM PDT 24 Aug 16 06:57:51 PM PDT 24 1138301592 ps
T1364 /workspace/coverage/cover_reg_top/61.xbar_smoke_slow_rsp.2048436092 Aug 16 06:53:14 PM PDT 24 Aug 16 06:54:57 PM PDT 24 6145684714 ps
T507 /workspace/coverage/cover_reg_top/48.xbar_random.931708555 Aug 16 06:51:03 PM PDT 24 Aug 16 06:52:25 PM PDT 24 1992027361 ps
T573 /workspace/coverage/cover_reg_top/98.xbar_random.1254012935 Aug 16 06:58:38 PM PDT 24 Aug 16 06:59:29 PM PDT 24 1420477667 ps
T812 /workspace/coverage/cover_reg_top/99.xbar_stress_all_with_reset_error.3742137676 Aug 16 06:58:42 PM PDT 24 Aug 16 07:11:14 PM PDT 24 13111697896 ps
T1365 /workspace/coverage/cover_reg_top/79.xbar_smoke_large_delays.2935204098 Aug 16 06:55:48 PM PDT 24 Aug 16 06:57:35 PM PDT 24 9851250444 ps
T478 /workspace/coverage/cover_reg_top/75.xbar_stress_all.658079578 Aug 16 06:55:17 PM PDT 24 Aug 16 06:57:25 PM PDT 24 1574146146 ps
T470 /workspace/coverage/cover_reg_top/3.xbar_access_same_device_slow_rsp.2827024160 Aug 16 06:43:33 PM PDT 24 Aug 16 06:56:04 PM PDT 24 40630343728 ps
T627 /workspace/coverage/cover_reg_top/67.xbar_same_source.1178515692 Aug 16 06:54:01 PM PDT 24 Aug 16 06:54:21 PM PDT 24 711466797 ps
T1366 /workspace/coverage/cover_reg_top/34.xbar_error_and_unmapped_addr.2365213816 Aug 16 06:48:43 PM PDT 24 Aug 16 06:49:21 PM PDT 24 960892696 ps
T593 /workspace/coverage/cover_reg_top/28.xbar_random_zero_delays.3139048710 Aug 16 06:47:38 PM PDT 24 Aug 16 06:48:18 PM PDT 24 445770567 ps
T597 /workspace/coverage/cover_reg_top/54.xbar_random_large_delays.2995701096 Aug 16 06:51:57 PM PDT 24 Aug 16 07:03:59 PM PDT 24 65955934398 ps
T1367 /workspace/coverage/cover_reg_top/17.xbar_error_and_unmapped_addr.4257781934 Aug 16 06:45:47 PM PDT 24 Aug 16 06:45:53 PM PDT 24 58163238 ps
T1368 /workspace/coverage/cover_reg_top/50.xbar_same_source.1341283713 Aug 16 06:51:28 PM PDT 24 Aug 16 06:52:09 PM PDT 24 1389105463 ps
T1369 /workspace/coverage/cover_reg_top/61.xbar_random.4270388760 Aug 16 06:53:09 PM PDT 24 Aug 16 06:53:23 PM PDT 24 321661222 ps
T1370 /workspace/coverage/cover_reg_top/16.xbar_random_slow_rsp.3312546416 Aug 16 06:45:43 PM PDT 24 Aug 16 06:52:30 PM PDT 24 23218725801 ps
T1371 /workspace/coverage/cover_reg_top/26.xbar_error_and_unmapped_addr.4273371951 Aug 16 06:47:30 PM PDT 24 Aug 16 06:47:46 PM PDT 24 154397962 ps
T505 /workspace/coverage/cover_reg_top/39.xbar_random_slow_rsp.2894166547 Aug 16 06:49:37 PM PDT 24 Aug 16 06:51:03 PM PDT 24 5117853279 ps
T471 /workspace/coverage/cover_reg_top/85.xbar_stress_all.4209486459 Aug 16 06:56:35 PM PDT 24 Aug 16 07:01:10 PM PDT 24 3388516442 ps
T1372 /workspace/coverage/cover_reg_top/60.xbar_smoke_large_delays.2880777693 Aug 16 06:53:00 PM PDT 24 Aug 16 06:54:38 PM PDT 24 9212292436 ps
T1373 /workspace/coverage/cover_reg_top/98.xbar_stress_all_with_error.3397244753 Aug 16 06:58:35 PM PDT 24 Aug 16 07:01:08 PM PDT 24 4853702254 ps
T1374 /workspace/coverage/cover_reg_top/37.xbar_error_random.2157643055 Aug 16 06:49:22 PM PDT 24 Aug 16 06:50:17 PM PDT 24 1718597023 ps
T1375 /workspace/coverage/cover_reg_top/67.xbar_error_random.3840046484 Aug 16 06:54:00 PM PDT 24 Aug 16 06:54:45 PM PDT 24 1388890772 ps
T797 /workspace/coverage/cover_reg_top/76.xbar_stress_all_with_error.708603671 Aug 16 06:55:24 PM PDT 24 Aug 16 06:57:36 PM PDT 24 1686952154 ps
T524 /workspace/coverage/cover_reg_top/75.xbar_stress_all_with_rand_reset.3956681330 Aug 16 06:55:20 PM PDT 24 Aug 16 06:58:40 PM PDT 24 667706994 ps
T602 /workspace/coverage/cover_reg_top/56.xbar_random_slow_rsp.173166387 Aug 16 06:52:21 PM PDT 24 Aug 16 07:04:12 PM PDT 24 43870903849 ps
T500 /workspace/coverage/cover_reg_top/41.xbar_random_large_delays.1067098313 Aug 16 06:49:57 PM PDT 24 Aug 16 07:06:44 PM PDT 24 92264899295 ps
T576 /workspace/coverage/cover_reg_top/21.xbar_stress_all_with_error.2983969065 Aug 16 06:46:36 PM PDT 24 Aug 16 06:51:31 PM PDT 24 3757050356 ps
T1376 /workspace/coverage/cover_reg_top/37.xbar_same_source.227451434 Aug 16 06:49:21 PM PDT 24 Aug 16 06:49:39 PM PDT 24 524734347 ps
T1377 /workspace/coverage/cover_reg_top/21.xbar_stress_all_with_rand_reset.264665704 Aug 16 06:46:37 PM PDT 24 Aug 16 06:46:45 PM PDT 24 9706213 ps
T560 /workspace/coverage/cover_reg_top/28.xbar_random_large_delays.3752669936 Aug 16 06:47:45 PM PDT 24 Aug 16 06:55:52 PM PDT 24 42310500442 ps
T508 /workspace/coverage/cover_reg_top/67.xbar_stress_all.2794379227 Aug 16 06:54:01 PM PDT 24 Aug 16 06:55:49 PM PDT 24 3031309899 ps
T1378 /workspace/coverage/cover_reg_top/51.xbar_smoke_large_delays.2264510672 Aug 16 06:51:43 PM PDT 24 Aug 16 06:53:12 PM PDT 24 8536411520 ps
T585 /workspace/coverage/cover_reg_top/35.xbar_same_source.1522737257 Aug 16 06:48:55 PM PDT 24 Aug 16 06:50:05 PM PDT 24 2523854066 ps
T514 /workspace/coverage/cover_reg_top/18.xbar_stress_all_with_rand_reset.4149298171 Aug 16 06:46:04 PM PDT 24 Aug 16 06:49:28 PM PDT 24 1561397394 ps
T594 /workspace/coverage/cover_reg_top/25.xbar_random_slow_rsp.3660183598 Aug 16 06:47:09 PM PDT 24 Aug 16 07:00:25 PM PDT 24 46565464552 ps
T503 /workspace/coverage/cover_reg_top/41.xbar_stress_all_with_rand_reset.1897833106 Aug 16 06:49:58 PM PDT 24 Aug 16 06:58:41 PM PDT 24 3202176521 ps
T1379 /workspace/coverage/cover_reg_top/29.xbar_error_and_unmapped_addr.3760165899 Aug 16 06:47:57 PM PDT 24 Aug 16 06:48:29 PM PDT 24 297461332 ps
T1380 /workspace/coverage/cover_reg_top/78.xbar_error_random.746844685 Aug 16 06:55:40 PM PDT 24 Aug 16 06:55:55 PM PDT 24 361228618 ps
T501 /workspace/coverage/cover_reg_top/90.xbar_random.2135675187 Aug 16 06:57:21 PM PDT 24 Aug 16 06:57:54 PM PDT 24 441259724 ps
T603 /workspace/coverage/cover_reg_top/87.xbar_smoke.1164258987 Aug 16 06:56:49 PM PDT 24 Aug 16 06:56:55 PM PDT 24 48344832 ps
T506 /workspace/coverage/cover_reg_top/14.xbar_random_zero_delays.1671213825 Aug 16 06:45:23 PM PDT 24 Aug 16 06:46:06 PM PDT 24 423930809 ps
T1381 /workspace/coverage/cover_reg_top/91.xbar_error_random.3458593059 Aug 16 06:57:36 PM PDT 24 Aug 16 06:58:22 PM PDT 24 1342023454 ps
T577 /workspace/coverage/cover_reg_top/20.xbar_random_large_delays.1822975393 Aug 16 06:46:26 PM PDT 24 Aug 16 06:52:14 PM PDT 24 32718984256 ps
T469 /workspace/coverage/cover_reg_top/80.xbar_smoke_large_delays.145998591 Aug 16 06:55:54 PM PDT 24 Aug 16 06:57:47 PM PDT 24 10196787622 ps
T480 /workspace/coverage/cover_reg_top/53.xbar_stress_all_with_rand_reset.930151653 Aug 16 06:52:01 PM PDT 24 Aug 16 07:01:59 PM PDT 24 4229428973 ps
T476 /workspace/coverage/cover_reg_top/78.xbar_access_same_device.4095543955 Aug 16 06:55:40 PM PDT 24 Aug 16 06:57:18 PM PDT 24 2235545961 ps
T1382 /workspace/coverage/cover_reg_top/75.xbar_stress_all_with_error.2674566178 Aug 16 06:55:19 PM PDT 24 Aug 16 06:57:28 PM PDT 24 1680027919 ps
T481 /workspace/coverage/cover_reg_top/48.xbar_stress_all_with_rand_reset.1368999096 Aug 16 06:51:12 PM PDT 24 Aug 16 06:58:48 PM PDT 24 3242615148 ps
T518 /workspace/coverage/cover_reg_top/0.xbar_stress_all_with_rand_reset.4190892192 Aug 16 06:43:07 PM PDT 24 Aug 16 06:45:48 PM PDT 24 359633784 ps
T1383 /workspace/coverage/cover_reg_top/90.xbar_error_random.1080447768 Aug 16 06:57:21 PM PDT 24 Aug 16 06:57:37 PM PDT 24 375718095 ps
T473 /workspace/coverage/cover_reg_top/94.xbar_stress_all.2923877445 Aug 16 06:58:03 PM PDT 24 Aug 16 07:05:02 PM PDT 24 11448318684 ps
T1384 /workspace/coverage/cover_reg_top/53.xbar_stress_all.2628346497 Aug 16 06:52:01 PM PDT 24 Aug 16 06:52:27 PM PDT 24 287490701 ps
T484 /workspace/coverage/cover_reg_top/60.xbar_random_slow_rsp.1106652931 Aug 16 06:52:59 PM PDT 24 Aug 16 07:13:40 PM PDT 24 65032840764 ps
T605 /workspace/coverage/cover_reg_top/29.xbar_random_zero_delays.2478115300 Aug 16 06:47:53 PM PDT 24 Aug 16 06:48:43 PM PDT 24 547205022 ps
T479 /workspace/coverage/cover_reg_top/33.xbar_stress_all.2207868961 Aug 16 06:48:30 PM PDT 24 Aug 16 06:52:59 PM PDT 24 3303846253 ps
T1385 /workspace/coverage/cover_reg_top/63.xbar_same_source.180713524 Aug 16 06:53:34 PM PDT 24 Aug 16 06:54:07 PM PDT 24 1039920428 ps
T1386 /workspace/coverage/cover_reg_top/53.xbar_smoke.3988765163 Aug 16 06:51:50 PM PDT 24 Aug 16 06:52:00 PM PDT 24 224236870 ps
T804 /workspace/coverage/cover_reg_top/69.xbar_stress_all_with_error.3311721061 Aug 16 06:54:17 PM PDT 24 Aug 16 06:58:30 PM PDT 24 6717883017 ps
T1387 /workspace/coverage/cover_reg_top/36.xbar_stress_all_with_error.773766099 Aug 16 06:49:08 PM PDT 24 Aug 16 06:50:43 PM PDT 24 1320884350 ps
T1388 /workspace/coverage/cover_reg_top/68.xbar_stress_all_with_error.4098858062 Aug 16 06:54:14 PM PDT 24 Aug 16 06:55:39 PM PDT 24 1127493743 ps
T591 /workspace/coverage/cover_reg_top/35.xbar_random.3909513824 Aug 16 06:48:55 PM PDT 24 Aug 16 06:50:02 PM PDT 24 1919521757 ps
T553 /workspace/coverage/cover_reg_top/86.xbar_same_source.2551379861 Aug 16 06:56:47 PM PDT 24 Aug 16 06:57:29 PM PDT 24 592941511 ps
T1389 /workspace/coverage/cover_reg_top/79.xbar_smoke.2239171903 Aug 16 06:55:38 PM PDT 24 Aug 16 06:55:47 PM PDT 24 207207213 ps
T1390 /workspace/coverage/cover_reg_top/75.xbar_error_and_unmapped_addr.1433626548 Aug 16 06:55:09 PM PDT 24 Aug 16 06:55:54 PM PDT 24 1186607231 ps
T785 /workspace/coverage/cover_reg_top/57.xbar_access_same_device.162860593 Aug 16 06:52:31 PM PDT 24 Aug 16 06:53:14 PM PDT 24 1200259681 ps
T491 /workspace/coverage/cover_reg_top/60.xbar_random.764644872 Aug 16 06:53:02 PM PDT 24 Aug 16 06:53:43 PM PDT 24 519877905 ps
T622 /workspace/coverage/cover_reg_top/29.xbar_same_source.1044432585 Aug 16 06:47:52 PM PDT 24 Aug 16 06:48:18 PM PDT 24 371328134 ps
T494 /workspace/coverage/cover_reg_top/39.xbar_stress_all_with_rand_reset.2494330293 Aug 16 06:49:36 PM PDT 24 Aug 16 06:59:19 PM PDT 24 10768683651 ps
T1391 /workspace/coverage/cover_reg_top/57.xbar_random_slow_rsp.2952082158 Aug 16 06:52:31 PM PDT 24 Aug 16 06:57:42 PM PDT 24 19671455693 ps
T1392 /workspace/coverage/cover_reg_top/47.xbar_stress_all_with_error.2248501412 Aug 16 06:50:58 PM PDT 24 Aug 16 06:51:34 PM PDT 24 1085074068 ps
T554 /workspace/coverage/cover_reg_top/61.xbar_random_slow_rsp.2056726218 Aug 16 06:53:11 PM PDT 24 Aug 16 07:08:22 PM PDT 24 49607939145 ps
T547 /workspace/coverage/cover_reg_top/23.xbar_random.4244680413 Aug 16 06:46:51 PM PDT 24 Aug 16 06:47:27 PM PDT 24 390063551 ps
T143 /workspace/coverage/cover_reg_top/5.chip_csr_rw.4089957237 Aug 16 06:43:56 PM PDT 24 Aug 16 06:52:48 PM PDT 24 6479092202 ps
T1393 /workspace/coverage/cover_reg_top/7.xbar_error_random.1175568727 Aug 16 06:44:26 PM PDT 24 Aug 16 06:45:04 PM PDT 24 1147659422 ps
T492 /workspace/coverage/cover_reg_top/22.xbar_stress_all_with_rand_reset.2287138020 Aug 16 06:46:46 PM PDT 24 Aug 16 07:01:45 PM PDT 24 8625625830 ps
T565 /workspace/coverage/cover_reg_top/13.xbar_stress_all.1366547197 Aug 16 06:45:18 PM PDT 24 Aug 16 06:46:56 PM PDT 24 3056163076 ps
T571 /workspace/coverage/cover_reg_top/38.xbar_unmapped_addr.2891448670 Aug 16 06:49:38 PM PDT 24 Aug 16 06:49:55 PM PDT 24 145656393 ps
T610 /workspace/coverage/cover_reg_top/43.xbar_random_large_delays.3644634076 Aug 16 06:50:15 PM PDT 24 Aug 16 07:03:50 PM PDT 24 79070241962 ps
T1394 /workspace/coverage/cover_reg_top/52.xbar_error_and_unmapped_addr.2817182781 Aug 16 06:51:49 PM PDT 24 Aug 16 06:52:19 PM PDT 24 758605486 ps
T1395 /workspace/coverage/cover_reg_top/64.xbar_smoke_zero_delays.1717196640 Aug 16 06:53:33 PM PDT 24 Aug 16 06:53:39 PM PDT 24 45227222 ps
T808 /workspace/coverage/cover_reg_top/20.xbar_access_same_device.1148052022 Aug 16 06:46:22 PM PDT 24 Aug 16 06:47:40 PM PDT 24 1874804122 ps
T502 /workspace/coverage/cover_reg_top/73.xbar_random.3193270359 Aug 16 06:54:51 PM PDT 24 Aug 16 06:55:58 PM PDT 24 1927182759 ps
T1396 /workspace/coverage/cover_reg_top/54.xbar_random_zero_delays.2627138435 Aug 16 06:51:58 PM PDT 24 Aug 16 06:52:24 PM PDT 24 277969520 ps
T562 /workspace/coverage/cover_reg_top/24.xbar_smoke.27900717 Aug 16 06:46:55 PM PDT 24 Aug 16 06:47:03 PM PDT 24 175072164 ps
T1397 /workspace/coverage/cover_reg_top/84.xbar_smoke_zero_delays.3718531754 Aug 16 06:56:26 PM PDT 24 Aug 16 06:56:32 PM PDT 24 48147370 ps
T566 /workspace/coverage/cover_reg_top/92.xbar_stress_all_with_rand_reset.3645144796 Aug 16 06:57:44 PM PDT 24 Aug 16 07:04:20 PM PDT 24 4451976841 ps
T1398 /workspace/coverage/cover_reg_top/99.xbar_smoke.3928688292 Aug 16 06:58:42 PM PDT 24 Aug 16 06:58:48 PM PDT 24 46046575 ps
T832 /workspace/coverage/cover_reg_top/45.xbar_access_same_device_slow_rsp.2416985182 Aug 16 06:50:36 PM PDT 24 Aug 16 06:57:39 PM PDT 24 25714988639 ps
T1399 /workspace/coverage/cover_reg_top/71.xbar_smoke_zero_delays.4013774826 Aug 16 06:54:25 PM PDT 24 Aug 16 06:54:31 PM PDT 24 49851852 ps
T1400 /workspace/coverage/cover_reg_top/2.xbar_smoke.268446706 Aug 16 06:43:19 PM PDT 24 Aug 16 06:43:25 PM PDT 24 43102995 ps
T568 /workspace/coverage/cover_reg_top/68.xbar_same_source.2049753147 Aug 16 06:54:14 PM PDT 24 Aug 16 06:54:50 PM PDT 24 470897960 ps
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