| T138 |
/workspace/coverage/default/0.chip_sw_ast_clk_rst_inputs.1823328106 |
|
|
Aug 16 07:10:20 PM PDT 24 |
Aug 16 07:54:17 PM PDT 24 |
17705092744 ps |
| T1145 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx3.2185931528 |
|
|
Aug 16 07:13:11 PM PDT 24 |
Aug 16 07:24:25 PM PDT 24 |
4441470600 ps |
| T1146 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_volatile_raw_unlock.3035644034 |
|
|
Aug 16 07:12:47 PM PDT 24 |
Aug 16 07:15:04 PM PDT 24 |
2602578469 ps |
| T1147 |
/workspace/coverage/default/10.chip_sw_lc_ctrl_transition.2221196531 |
|
|
Aug 16 07:33:45 PM PDT 24 |
Aug 16 07:45:14 PM PDT 24 |
7924062878 ps |
| T1148 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.2095170063 |
|
|
Aug 16 07:07:36 PM PDT 24 |
Aug 16 07:35:40 PM PDT 24 |
8381207078 ps |
| T1149 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_lc_escalate.613918518 |
|
|
Aug 16 07:26:30 PM PDT 24 |
Aug 16 07:37:57 PM PDT 24 |
4772613070 ps |
| T1150 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.3333915788 |
|
|
Aug 16 07:15:11 PM PDT 24 |
Aug 16 07:18:39 PM PDT 24 |
3437693345 ps |
| T1151 |
/workspace/coverage/default/1.chip_tap_straps_dev.2959989192 |
|
|
Aug 16 07:18:32 PM PDT 24 |
Aug 16 07:22:37 PM PDT 24 |
3319025643 ps |
| T194 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through.814809714 |
|
|
Aug 16 07:08:27 PM PDT 24 |
Aug 16 07:22:59 PM PDT 24 |
7563775453 ps |
| T1152 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.1623218543 |
|
|
Aug 16 07:20:40 PM PDT 24 |
Aug 16 07:33:49 PM PDT 24 |
4259316556 ps |
| T1153 |
/workspace/coverage/default/0.chip_sw_kmac_smoketest.4095229230 |
|
|
Aug 16 07:13:39 PM PDT 24 |
Aug 16 07:17:43 PM PDT 24 |
3072363882 ps |
| T1154 |
/workspace/coverage/default/0.chip_sw_example_rom.2849171114 |
|
|
Aug 16 07:06:34 PM PDT 24 |
Aug 16 07:08:17 PM PDT 24 |
2233906688 ps |
| T1155 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.3275451792 |
|
|
Aug 16 07:39:41 PM PDT 24 |
Aug 16 07:49:56 PM PDT 24 |
5008657160 ps |
| T1156 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_smoketest.2693914557 |
|
|
Aug 16 07:11:49 PM PDT 24 |
Aug 16 07:15:57 PM PDT 24 |
3306046092 ps |
| T775 |
/workspace/coverage/default/7.chip_sw_all_escalation_resets.476083741 |
|
|
Aug 16 07:32:44 PM PDT 24 |
Aug 16 07:43:52 PM PDT 24 |
5267788042 ps |
| T345 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.3661119309 |
|
|
Aug 16 07:29:09 PM PDT 24 |
Aug 16 07:42:00 PM PDT 24 |
5009931971 ps |
| T1157 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.1035999535 |
|
|
Aug 16 07:25:03 PM PDT 24 |
Aug 16 07:35:56 PM PDT 24 |
9608560632 ps |
| T231 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.652763616 |
|
|
Aug 16 07:16:13 PM PDT 24 |
Aug 16 08:05:20 PM PDT 24 |
11313564608 ps |
| T105 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.1476907486 |
|
|
Aug 16 07:27:19 PM PDT 24 |
Aug 16 07:48:56 PM PDT 24 |
20069077704 ps |
| T1158 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_frequency.2300205755 |
|
|
Aug 16 07:09:13 PM PDT 24 |
Aug 16 07:17:26 PM PDT 24 |
3176347884 ps |
| T1159 |
/workspace/coverage/default/2.rom_raw_unlock.1148445991 |
|
|
Aug 16 07:30:13 PM PDT 24 |
Aug 16 07:34:58 PM PDT 24 |
5974678081 ps |
| T666 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_nmi_irq.3681266380 |
|
|
Aug 16 07:25:42 PM PDT 24 |
Aug 16 07:41:00 PM PDT 24 |
5213150470 ps |
| T1160 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs_jitter.1082051981 |
|
|
Aug 16 07:07:56 PM PDT 24 |
Aug 16 07:27:03 PM PDT 24 |
6783913034 ps |
| T1161 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_prod.2743942848 |
|
|
Aug 16 07:17:17 PM PDT 24 |
Aug 16 07:40:20 PM PDT 24 |
7237126914 ps |
| T1162 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.3383127005 |
|
|
Aug 16 07:07:49 PM PDT 24 |
Aug 16 07:15:15 PM PDT 24 |
4291444628 ps |
| T1163 |
/workspace/coverage/default/0.chip_sw_pwrmgr_main_power_glitch_reset.26675267 |
|
|
Aug 16 07:10:18 PM PDT 24 |
Aug 16 07:21:09 PM PDT 24 |
4467192076 ps |
| T1164 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.4137515715 |
|
|
Aug 16 07:07:02 PM PDT 24 |
Aug 16 07:14:29 PM PDT 24 |
5036576896 ps |
| T1165 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_scramble.636314234 |
|
|
Aug 16 07:26:41 PM PDT 24 |
Aug 16 07:36:03 PM PDT 24 |
7332386152 ps |
| T1166 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.333840003 |
|
|
Aug 16 07:21:50 PM PDT 24 |
Aug 16 07:28:50 PM PDT 24 |
3950771548 ps |
| T1167 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_dev.1410248398 |
|
|
Aug 16 07:06:27 PM PDT 24 |
Aug 16 07:23:07 PM PDT 24 |
7024021578 ps |
| T1168 |
/workspace/coverage/default/0.chip_sw_example_concurrency.3467187138 |
|
|
Aug 16 07:06:03 PM PDT 24 |
Aug 16 07:08:45 PM PDT 24 |
2133636680 ps |
| T53 |
/workspace/coverage/default/2.chip_sw_alert_test.1717990053 |
|
|
Aug 16 07:25:22 PM PDT 24 |
Aug 16 07:30:16 PM PDT 24 |
2583234528 ps |
| T1169 |
/workspace/coverage/default/0.chip_sw_ast_clk_outputs.826510961 |
|
|
Aug 16 07:08:46 PM PDT 24 |
Aug 16 07:26:17 PM PDT 24 |
7901178132 ps |
| T85 |
/workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.1784221299 |
|
|
Aug 16 07:39:15 PM PDT 24 |
Aug 16 07:45:19 PM PDT 24 |
3518199062 ps |
| T1170 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access.71622779 |
|
|
Aug 16 07:08:12 PM PDT 24 |
Aug 16 07:29:05 PM PDT 24 |
5487889150 ps |
| T303 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.2012552267 |
|
|
Aug 16 07:09:07 PM PDT 24 |
Aug 16 07:12:41 PM PDT 24 |
2832595633 ps |
| T756 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.3355464318 |
|
|
Aug 16 07:36:46 PM PDT 24 |
Aug 16 07:46:16 PM PDT 24 |
5726015992 ps |
| T40 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ulp_z3_wakeup.3287462710 |
|
|
Aug 16 07:14:15 PM PDT 24 |
Aug 16 07:23:23 PM PDT 24 |
5490244620 ps |
| T692 |
/workspace/coverage/default/3.chip_sw_alert_handler_lpg_sleep_mode_alerts.3474975284 |
|
|
Aug 16 07:31:49 PM PDT 24 |
Aug 16 07:37:08 PM PDT 24 |
3652313700 ps |
| T1171 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.101991532 |
|
|
Aug 16 07:35:53 PM PDT 24 |
Aug 16 07:42:04 PM PDT 24 |
3858143400 ps |
| T1172 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_dev.2266308603 |
|
|
Aug 16 07:14:34 PM PDT 24 |
Aug 16 08:56:57 PM PDT 24 |
48964203752 ps |
| T1173 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.2331251361 |
|
|
Aug 16 07:30:57 PM PDT 24 |
Aug 16 07:32:58 PM PDT 24 |
2224943199 ps |
| T678 |
/workspace/coverage/default/85.chip_sw_all_escalation_resets.566552404 |
|
|
Aug 16 07:40:28 PM PDT 24 |
Aug 16 07:50:32 PM PDT 24 |
5078655548 ps |
| T1174 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_reset_toggle.1817987259 |
|
|
Aug 16 07:28:14 PM PDT 24 |
Aug 16 07:49:40 PM PDT 24 |
6643122044 ps |
| T1175 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.1759550638 |
|
|
Aug 16 07:11:29 PM PDT 24 |
Aug 16 07:27:24 PM PDT 24 |
11962081991 ps |
| T1176 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_meas.3449427579 |
|
|
Aug 16 07:14:55 PM PDT 24 |
Aug 16 08:15:17 PM PDT 24 |
15659506184 ps |
| T1177 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.2429526395 |
|
|
Aug 16 07:29:24 PM PDT 24 |
Aug 16 07:41:08 PM PDT 24 |
4516050012 ps |
| T401 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.1502998813 |
|
|
Aug 16 07:19:09 PM PDT 24 |
Aug 16 07:25:22 PM PDT 24 |
3445463400 ps |
| T195 |
/workspace/coverage/default/2.chip_sw_power_virus.3685090382 |
|
|
Aug 16 07:33:35 PM PDT 24 |
Aug 16 08:02:38 PM PDT 24 |
5918901562 ps |
| T1178 |
/workspace/coverage/default/11.chip_sw_uart_rand_baudrate.2771641996 |
|
|
Aug 16 07:33:49 PM PDT 24 |
Aug 16 07:43:26 PM PDT 24 |
3649736928 ps |
| T691 |
/workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.3964635212 |
|
|
Aug 16 07:33:55 PM PDT 24 |
Aug 16 07:41:44 PM PDT 24 |
3800429492 ps |
| T1179 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.3535126419 |
|
|
Aug 16 07:07:55 PM PDT 24 |
Aug 16 07:32:19 PM PDT 24 |
10798893766 ps |
| T266 |
/workspace/coverage/default/68.chip_sw_all_escalation_resets.1478036446 |
|
|
Aug 16 07:38:41 PM PDT 24 |
Aug 16 07:48:02 PM PDT 24 |
6232069762 ps |
| T1180 |
/workspace/coverage/default/2.chip_sw_aes_masking_off.3099284070 |
|
|
Aug 16 07:31:02 PM PDT 24 |
Aug 16 07:36:20 PM PDT 24 |
3820527270 ps |
| T1181 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.1306777545 |
|
|
Aug 16 07:13:17 PM PDT 24 |
Aug 16 07:18:08 PM PDT 24 |
2446771059 ps |
| T333 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.1596316929 |
|
|
Aug 16 07:06:17 PM PDT 24 |
Aug 16 07:15:37 PM PDT 24 |
4625405280 ps |
| T1182 |
/workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.844421522 |
|
|
Aug 16 07:11:17 PM PDT 24 |
Aug 16 09:59:01 PM PDT 24 |
59543930742 ps |
| T1183 |
/workspace/coverage/default/1.chip_sw_example_concurrency.4018840131 |
|
|
Aug 16 07:15:04 PM PDT 24 |
Aug 16 07:19:45 PM PDT 24 |
2522475454 ps |
| T1184 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod_end.3827134109 |
|
|
Aug 16 07:15:49 PM PDT 24 |
Aug 16 08:12:54 PM PDT 24 |
15017814780 ps |
| T673 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_rma.1380798819 |
|
|
Aug 16 07:14:07 PM PDT 24 |
Aug 16 07:44:11 PM PDT 24 |
10721733944 ps |
| T1185 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0.3581302859 |
|
|
Aug 16 07:20:46 PM PDT 24 |
Aug 16 08:18:25 PM PDT 24 |
11967513144 ps |
| T1186 |
/workspace/coverage/default/0.chip_tap_straps_testunlock0.2462222333 |
|
|
Aug 16 07:07:43 PM PDT 24 |
Aug 16 07:13:09 PM PDT 24 |
4803992684 ps |
| T679 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.2929906150 |
|
|
Aug 16 07:35:44 PM PDT 24 |
Aug 16 07:44:41 PM PDT 24 |
5545903104 ps |
| T1187 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac.3358214949 |
|
|
Aug 16 07:15:17 PM PDT 24 |
Aug 16 07:20:22 PM PDT 24 |
3491769702 ps |
| T723 |
/workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.1660196648 |
|
|
Aug 16 07:39:10 PM PDT 24 |
Aug 16 07:45:14 PM PDT 24 |
3356560342 ps |
| T1188 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation.2279319490 |
|
|
Aug 16 07:27:35 PM PDT 24 |
Aug 16 08:06:42 PM PDT 24 |
13807997852 ps |
| T1189 |
/workspace/coverage/default/2.chip_sw_kmac_idle.4121137285 |
|
|
Aug 16 07:26:20 PM PDT 24 |
Aug 16 07:32:10 PM PDT 24 |
2948901636 ps |
| T1190 |
/workspace/coverage/default/2.chip_tap_straps_rma.574967443 |
|
|
Aug 16 07:30:44 PM PDT 24 |
Aug 16 07:35:42 PM PDT 24 |
3882470137 ps |
| T1191 |
/workspace/coverage/default/1.chip_sw_power_idle_load.627895000 |
|
|
Aug 16 07:20:24 PM PDT 24 |
Aug 16 07:32:18 PM PDT 24 |
4426020256 ps |
| T1192 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.2584144556 |
|
|
Aug 16 07:05:38 PM PDT 24 |
Aug 16 07:21:41 PM PDT 24 |
6544795391 ps |
| T774 |
/workspace/coverage/default/46.chip_sw_all_escalation_resets.1367687717 |
|
|
Aug 16 07:36:44 PM PDT 24 |
Aug 16 07:44:44 PM PDT 24 |
5345075692 ps |
| T1193 |
/workspace/coverage/default/38.chip_sw_alert_handler_lpg_sleep_mode_alerts.1151309882 |
|
|
Aug 16 07:36:49 PM PDT 24 |
Aug 16 07:42:54 PM PDT 24 |
3369843048 ps |
| T1194 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en_reduced_freq.3943040190 |
|
|
Aug 16 07:09:31 PM PDT 24 |
Aug 16 07:13:04 PM PDT 24 |
3335001641 ps |
| T751 |
/workspace/coverage/default/35.chip_sw_alert_handler_lpg_sleep_mode_alerts.1985615535 |
|
|
Aug 16 07:36:48 PM PDT 24 |
Aug 16 07:42:19 PM PDT 24 |
3727901072 ps |
| T773 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.3914577989 |
|
|
Aug 16 07:40:53 PM PDT 24 |
Aug 16 07:45:51 PM PDT 24 |
3425059670 ps |
| T1195 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx2.3036774932 |
|
|
Aug 16 07:12:06 PM PDT 24 |
Aug 16 07:25:31 PM PDT 24 |
4619696800 ps |
| T1196 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_test_unlocked0.2320738536 |
|
|
Aug 16 07:10:14 PM PDT 24 |
Aug 16 07:48:23 PM PDT 24 |
25211957867 ps |
| T1197 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.1273145152 |
|
|
Aug 16 07:40:24 PM PDT 24 |
Aug 16 07:49:25 PM PDT 24 |
4940659024 ps |
| T1198 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_test_unlocked0.3272639291 |
|
|
Aug 16 07:16:14 PM PDT 24 |
Aug 16 08:05:27 PM PDT 24 |
10680323500 ps |
| T1199 |
/workspace/coverage/default/3.chip_sw_aon_timer_sleep_wdog_sleep_pause.592410611 |
|
|
Aug 16 07:31:59 PM PDT 24 |
Aug 16 07:40:01 PM PDT 24 |
6810566120 ps |
| T1200 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0.4016813167 |
|
|
Aug 16 07:13:30 PM PDT 24 |
Aug 16 08:30:49 PM PDT 24 |
18397617500 ps |
| T1201 |
/workspace/coverage/default/4.chip_tap_straps_testunlock0.1069589976 |
|
|
Aug 16 07:31:43 PM PDT 24 |
Aug 16 07:35:43 PM PDT 24 |
3778087515 ps |
| T315 |
/workspace/coverage/default/1.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.223475670 |
|
|
Aug 16 07:20:42 PM PDT 24 |
Aug 16 07:32:49 PM PDT 24 |
4721111208 ps |
| T1202 |
/workspace/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.3815253907 |
|
|
Aug 16 07:25:36 PM PDT 24 |
Aug 16 07:32:19 PM PDT 24 |
3910378520 ps |
| T1203 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.3060029359 |
|
|
Aug 16 07:11:28 PM PDT 24 |
Aug 16 08:11:06 PM PDT 24 |
19602922425 ps |
| T693 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.2604306999 |
|
|
Aug 16 07:41:12 PM PDT 24 |
Aug 16 07:48:14 PM PDT 24 |
4433839876 ps |
| T743 |
/workspace/coverage/default/0.chip_sw_all_escalation_resets.2713590133 |
|
|
Aug 16 07:05:32 PM PDT 24 |
Aug 16 07:16:40 PM PDT 24 |
6202148470 ps |
| T1204 |
/workspace/coverage/default/2.chip_sw_pwrmgr_full_aon_reset.3733909054 |
|
|
Aug 16 07:24:36 PM PDT 24 |
Aug 16 07:35:49 PM PDT 24 |
7557167830 ps |
| T367 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.634345587 |
|
|
Aug 16 07:12:14 PM PDT 24 |
Aug 16 07:21:43 PM PDT 24 |
4724643680 ps |
| T446 |
/workspace/coverage/default/73.chip_sw_all_escalation_resets.3511221096 |
|
|
Aug 16 07:39:59 PM PDT 24 |
Aug 16 07:48:41 PM PDT 24 |
5532032908 ps |
| T226 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_aes.2651547800 |
|
|
Aug 16 07:15:35 PM PDT 24 |
Aug 16 07:39:45 PM PDT 24 |
7143078476 ps |
| T1205 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_clkoff.2496225031 |
|
|
Aug 16 07:09:38 PM PDT 24 |
Aug 16 07:39:46 PM PDT 24 |
7783524884 ps |
| T684 |
/workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.2322928427 |
|
|
Aug 16 07:38:29 PM PDT 24 |
Aug 16 07:44:28 PM PDT 24 |
3262997236 ps |
| T1206 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq.1810062565 |
|
|
Aug 16 07:26:20 PM PDT 24 |
Aug 16 08:15:08 PM PDT 24 |
17071935260 ps |
| T304 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.3427470760 |
|
|
Aug 16 07:29:25 PM PDT 24 |
Aug 16 07:36:25 PM PDT 24 |
3228728216 ps |
| T1207 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs.188559257 |
|
|
Aug 16 07:16:30 PM PDT 24 |
Aug 16 07:36:09 PM PDT 24 |
6421452808 ps |
| T267 |
/workspace/coverage/default/9.chip_sw_all_escalation_resets.1583975980 |
|
|
Aug 16 07:32:41 PM PDT 24 |
Aug 16 07:38:54 PM PDT 24 |
4209194280 ps |
| T305 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_icache_invalidate.2599667204 |
|
|
Aug 16 07:28:12 PM PDT 24 |
Aug 16 07:32:21 PM PDT 24 |
2731952664 ps |
| T1208 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod.506482549 |
|
|
Aug 16 07:33:23 PM PDT 24 |
Aug 16 08:21:27 PM PDT 24 |
14861231327 ps |
| T653 |
/workspace/coverage/default/10.chip_sw_all_escalation_resets.2997710685 |
|
|
Aug 16 07:34:15 PM PDT 24 |
Aug 16 07:43:10 PM PDT 24 |
4126049716 ps |
| T1209 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.948656646 |
|
|
Aug 16 07:34:09 PM PDT 24 |
Aug 16 07:38:17 PM PDT 24 |
3386029858 ps |
| T320 |
/workspace/coverage/default/1.chip_plic_all_irqs_0.452698943 |
|
|
Aug 16 07:16:37 PM PDT 24 |
Aug 16 07:36:51 PM PDT 24 |
6303815496 ps |
| T1210 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_idle_low_power.2218758852 |
|
|
Aug 16 07:07:56 PM PDT 24 |
Aug 16 07:12:50 PM PDT 24 |
2979198504 ps |
| T754 |
/workspace/coverage/default/66.chip_sw_all_escalation_resets.565635676 |
|
|
Aug 16 07:39:19 PM PDT 24 |
Aug 16 07:48:12 PM PDT 24 |
5315517410 ps |
| T1211 |
/workspace/coverage/default/6.chip_sw_csrng_edn_concurrency.1888546457 |
|
|
Aug 16 07:33:39 PM PDT 24 |
Aug 16 08:54:23 PM PDT 24 |
19420161792 ps |
| T54 |
/workspace/coverage/default/0.chip_sw_alert_test.811733968 |
|
|
Aug 16 07:10:11 PM PDT 24 |
Aug 16 07:14:43 PM PDT 24 |
3714206680 ps |
| T763 |
/workspace/coverage/default/23.chip_sw_alert_handler_lpg_sleep_mode_alerts.2472422286 |
|
|
Aug 16 07:34:31 PM PDT 24 |
Aug 16 07:39:50 PM PDT 24 |
3555770920 ps |
| T1212 |
/workspace/coverage/default/61.chip_sw_all_escalation_resets.65768822 |
|
|
Aug 16 07:37:22 PM PDT 24 |
Aug 16 07:46:46 PM PDT 24 |
5885552922 ps |
| T1213 |
/workspace/coverage/default/1.chip_sw_aon_timer_smoketest.3132075743 |
|
|
Aug 16 07:21:55 PM PDT 24 |
Aug 16 07:27:07 PM PDT 24 |
3339416528 ps |
| T30 |
/workspace/coverage/default/0.chip_sw_gpio.718470075 |
|
|
Aug 16 07:06:39 PM PDT 24 |
Aug 16 07:16:25 PM PDT 24 |
4846521521 ps |
| T695 |
/workspace/coverage/default/1.chip_sw_rstmgr_cpu_info.3272058979 |
|
|
Aug 16 07:15:32 PM PDT 24 |
Aug 16 07:28:11 PM PDT 24 |
5904313788 ps |
| T1214 |
/workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.2482862387 |
|
|
Aug 16 07:11:42 PM PDT 24 |
Aug 16 07:34:12 PM PDT 24 |
8511823016 ps |
| T682 |
/workspace/coverage/default/25.chip_sw_all_escalation_resets.3941737738 |
|
|
Aug 16 07:34:54 PM PDT 24 |
Aug 16 07:45:32 PM PDT 24 |
6071667140 ps |
| T1215 |
/workspace/coverage/default/8.chip_sw_lc_ctrl_transition.538857163 |
|
|
Aug 16 07:34:20 PM PDT 24 |
Aug 16 07:40:45 PM PDT 24 |
6839627905 ps |
| T1216 |
/workspace/coverage/default/1.chip_tap_straps_prod.2703773537 |
|
|
Aug 16 07:18:00 PM PDT 24 |
Aug 16 07:44:12 PM PDT 24 |
13861848408 ps |
| T770 |
/workspace/coverage/default/55.chip_sw_all_escalation_resets.3862455722 |
|
|
Aug 16 07:38:26 PM PDT 24 |
Aug 16 07:46:22 PM PDT 24 |
4710607464 ps |
| T1217 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops.1696733114 |
|
|
Aug 16 07:07:00 PM PDT 24 |
Aug 16 07:16:29 PM PDT 24 |
3586298030 ps |
| T1218 |
/workspace/coverage/default/0.chip_sw_rv_plic_smoketest.2649655354 |
|
|
Aug 16 07:14:45 PM PDT 24 |
Aug 16 07:19:27 PM PDT 24 |
2798100902 ps |
| T253 |
/workspace/coverage/default/2.chip_sw_plic_sw_irq.2747941659 |
|
|
Aug 16 07:28:15 PM PDT 24 |
Aug 16 07:33:16 PM PDT 24 |
2540451928 ps |
| T1219 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq.3044843713 |
|
|
Aug 16 07:08:00 PM PDT 24 |
Aug 16 08:03:44 PM PDT 24 |
16509725116 ps |
| T232 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_otbn.4182195799 |
|
|
Aug 16 07:09:14 PM PDT 24 |
Aug 16 08:09:02 PM PDT 24 |
13111801564 ps |
| T1220 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_reset.392086192 |
|
|
Aug 16 07:24:42 PM PDT 24 |
Aug 16 07:50:48 PM PDT 24 |
22313832552 ps |
| T296 |
/workspace/coverage/default/99.chip_sw_all_escalation_resets.1501032323 |
|
|
Aug 16 07:41:15 PM PDT 24 |
Aug 16 07:52:27 PM PDT 24 |
5667555416 ps |
| T1221 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.1664967710 |
|
|
Aug 16 07:15:14 PM PDT 24 |
Aug 16 08:13:52 PM PDT 24 |
15325234086 ps |
| T1222 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.4269370639 |
|
|
Aug 16 07:11:25 PM PDT 24 |
Aug 16 07:43:46 PM PDT 24 |
10549611346 ps |
| T59 |
/workspace/coverage/default/0.chip_jtag_csr_rw.3869421965 |
|
|
Aug 16 07:00:50 PM PDT 24 |
Aug 16 07:21:45 PM PDT 24 |
12780424976 ps |
| T406 |
/workspace/coverage/default/2.chip_sw_power_sleep_load.4093862882 |
|
|
Aug 16 07:29:44 PM PDT 24 |
Aug 16 07:37:31 PM PDT 24 |
4905528690 ps |
| T407 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.1210762570 |
|
|
Aug 16 07:23:42 PM PDT 24 |
Aug 16 07:36:27 PM PDT 24 |
5519345000 ps |
| T408 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_prod.3317367100 |
|
|
Aug 16 07:26:57 PM PDT 24 |
Aug 16 07:51:40 PM PDT 24 |
8590203980 ps |
| T409 |
/workspace/coverage/default/0.chip_sw_aes_enc.3069739235 |
|
|
Aug 16 07:07:59 PM PDT 24 |
Aug 16 07:12:36 PM PDT 24 |
3555549010 ps |
| T410 |
/workspace/coverage/default/2.chip_sw_pwrmgr_wdog_reset.1901639805 |
|
|
Aug 16 07:24:17 PM PDT 24 |
Aug 16 07:35:33 PM PDT 24 |
3745107980 ps |
| T411 |
/workspace/coverage/default/2.chip_sw_flash_scrambling_smoketest.2556283648 |
|
|
Aug 16 07:36:46 PM PDT 24 |
Aug 16 07:41:32 PM PDT 24 |
2477511096 ps |
| T412 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.27200892 |
|
|
Aug 16 07:10:11 PM PDT 24 |
Aug 16 07:15:01 PM PDT 24 |
3166531614 ps |
| T413 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.2855026518 |
|
|
Aug 16 07:36:40 PM PDT 24 |
Aug 16 07:45:20 PM PDT 24 |
5217026452 ps |
| T414 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx2.2061364519 |
|
|
Aug 16 07:22:15 PM PDT 24 |
Aug 16 07:31:55 PM PDT 24 |
4781634540 ps |
| T1223 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.262759020 |
|
|
Aug 16 07:09:15 PM PDT 24 |
Aug 16 07:20:11 PM PDT 24 |
8388927094 ps |
| T1224 |
/workspace/coverage/default/1.chip_sw_edn_auto_mode.586381652 |
|
|
Aug 16 07:15:21 PM PDT 24 |
Aug 16 07:32:45 PM PDT 24 |
4103413432 ps |
| T1225 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.3053122935 |
|
|
Aug 16 07:16:01 PM PDT 24 |
Aug 16 07:43:53 PM PDT 24 |
9329827048 ps |
| T196 |
/workspace/coverage/default/0.chip_sw_power_virus.396390954 |
|
|
Aug 16 07:15:47 PM PDT 24 |
Aug 16 07:39:35 PM PDT 24 |
6177325480 ps |
| T1226 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sysrst_ctrl_reset.3006839589 |
|
|
Aug 16 07:24:41 PM PDT 24 |
Aug 16 07:41:45 PM PDT 24 |
6486264731 ps |
| T1227 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_rma.1735016224 |
|
|
Aug 16 07:12:17 PM PDT 24 |
Aug 16 07:28:08 PM PDT 24 |
8899254454 ps |
| T86 |
/workspace/coverage/default/41.chip_sw_alert_handler_lpg_sleep_mode_alerts.2283854968 |
|
|
Aug 16 07:37:06 PM PDT 24 |
Aug 16 07:43:00 PM PDT 24 |
4296234200 ps |
| T1228 |
/workspace/coverage/default/1.chip_sw_csrng_smoketest.1714324614 |
|
|
Aug 16 07:21:07 PM PDT 24 |
Aug 16 07:24:46 PM PDT 24 |
2914945914 ps |
| T1229 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_wakeup.3889333802 |
|
|
Aug 16 07:19:17 PM PDT 24 |
Aug 16 07:26:43 PM PDT 24 |
5517460560 ps |
| T1230 |
/workspace/coverage/default/2.chip_sw_inject_scramble_seed.218038890 |
|
|
Aug 16 07:24:19 PM PDT 24 |
Aug 16 10:45:29 PM PDT 24 |
66028666750 ps |
| T1231 |
/workspace/coverage/default/0.chip_sw_aes_masking_off.1834433950 |
|
|
Aug 16 07:08:57 PM PDT 24 |
Aug 16 07:13:49 PM PDT 24 |
3081198147 ps |
| T1232 |
/workspace/coverage/default/0.chip_sw_aes_enc_jitter_en.2454041938 |
|
|
Aug 16 07:07:32 PM PDT 24 |
Aug 16 07:13:43 PM PDT 24 |
3529051173 ps |
| T1233 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.3671001735 |
|
|
Aug 16 07:11:31 PM PDT 24 |
Aug 16 07:19:12 PM PDT 24 |
3665317472 ps |
| T1234 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_otp_hw_cfg0.1450454717 |
|
|
Aug 16 07:07:46 PM PDT 24 |
Aug 16 07:13:07 PM PDT 24 |
3300589728 ps |
| T1235 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_reset_reqs.3452257419 |
|
|
Aug 16 07:23:41 PM PDT 24 |
Aug 16 08:10:07 PM PDT 24 |
20210611206 ps |
| T659 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_disabled.2614228428 |
|
|
Aug 16 07:11:59 PM PDT 24 |
Aug 16 07:17:13 PM PDT 24 |
2974089920 ps |
| T1236 |
/workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.2011306619 |
|
|
Aug 16 07:36:43 PM PDT 24 |
Aug 16 07:42:31 PM PDT 24 |
4385202452 ps |
| T159 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_vendor_test_csr_access.4011668037 |
|
|
Aug 16 07:06:05 PM PDT 24 |
Aug 16 07:07:50 PM PDT 24 |
2048316608 ps |
| T1237 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_ecc_error_vendor_test.3044535547 |
|
|
Aug 16 07:24:46 PM PDT 24 |
Aug 16 07:29:41 PM PDT 24 |
3103317270 ps |
| T1238 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_rnd.3789170710 |
|
|
Aug 16 07:25:16 PM PDT 24 |
Aug 16 07:42:20 PM PDT 24 |
5314179132 ps |
| T1239 |
/workspace/coverage/default/37.chip_sw_alert_handler_lpg_sleep_mode_alerts.3164517015 |
|
|
Aug 16 07:42:18 PM PDT 24 |
Aug 16 07:48:30 PM PDT 24 |
3848743400 ps |
| T1240 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.2611851313 |
|
|
Aug 16 07:13:24 PM PDT 24 |
Aug 16 07:17:52 PM PDT 24 |
2551449432 ps |
| T1241 |
/workspace/coverage/default/0.chip_sw_usbdev_dpi.2825814912 |
|
|
Aug 16 07:06:06 PM PDT 24 |
Aug 16 07:50:46 PM PDT 24 |
12440614540 ps |
| T338 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.2232654006 |
|
|
Aug 16 07:15:01 PM PDT 24 |
Aug 16 07:26:46 PM PDT 24 |
4698072456 ps |
| T1242 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.4182338905 |
|
|
Aug 16 07:41:58 PM PDT 24 |
Aug 16 07:52:29 PM PDT 24 |
4785954702 ps |
| T1243 |
/workspace/coverage/default/1.chip_sw_clkmgr_sleep_frequency.3677036967 |
|
|
Aug 16 07:17:21 PM PDT 24 |
Aug 16 07:27:10 PM PDT 24 |
4653199348 ps |
| T1244 |
/workspace/coverage/default/0.chip_sw_sleep_sram_ret_contents_scramble.2732533342 |
|
|
Aug 16 07:11:07 PM PDT 24 |
Aug 16 07:24:40 PM PDT 24 |
9204160200 ps |
| T1245 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.1647386586 |
|
|
Aug 16 07:20:57 PM PDT 24 |
Aug 16 07:42:16 PM PDT 24 |
7634116238 ps |
| T1246 |
/workspace/coverage/default/2.chip_sw_entropy_src_ast_rng_req.39807968 |
|
|
Aug 16 07:26:08 PM PDT 24 |
Aug 16 07:30:03 PM PDT 24 |
3236947998 ps |
| T694 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.4182258430 |
|
|
Aug 16 07:34:25 PM PDT 24 |
Aug 16 07:43:31 PM PDT 24 |
3920212032 ps |
| T1247 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_por_reset.2268509885 |
|
|
Aug 16 07:24:16 PM PDT 24 |
Aug 16 07:31:12 PM PDT 24 |
7919959534 ps |
| T1248 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.2821708579 |
|
|
Aug 16 07:15:34 PM PDT 24 |
Aug 16 08:44:15 PM PDT 24 |
24788538608 ps |
| T1249 |
/workspace/coverage/default/0.chip_sw_flash_crash_alert.2346127959 |
|
|
Aug 16 07:08:47 PM PDT 24 |
Aug 16 07:19:04 PM PDT 24 |
4219865320 ps |
| T1250 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_reset_reqs.1353423876 |
|
|
Aug 16 07:06:41 PM PDT 24 |
Aug 16 07:26:25 PM PDT 24 |
14878509717 ps |
| T1251 |
/workspace/coverage/default/0.rom_e2e_asm_init_rma.1363672135 |
|
|
Aug 16 07:16:11 PM PDT 24 |
Aug 16 08:18:35 PM PDT 24 |
15340272443 ps |
| T1252 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation.1665303929 |
|
|
Aug 16 07:15:42 PM PDT 24 |
Aug 16 07:54:56 PM PDT 24 |
11712702124 ps |
| T738 |
/workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.3767550464 |
|
|
Aug 16 07:40:38 PM PDT 24 |
Aug 16 07:46:47 PM PDT 24 |
4325399660 ps |
| T1253 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_no_scramble.3807025592 |
|
|
Aug 16 07:28:31 PM PDT 24 |
Aug 16 07:40:28 PM PDT 24 |
7755697000 ps |
| T757 |
/workspace/coverage/default/89.chip_sw_all_escalation_resets.309945872 |
|
|
Aug 16 07:47:43 PM PDT 24 |
Aug 16 07:57:30 PM PDT 24 |
4586544192 ps |
| T1254 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3629046303 |
|
|
Aug 16 07:32:03 PM PDT 24 |
Aug 16 07:49:12 PM PDT 24 |
9095623020 ps |
| T421 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_all_wake_ups.1632086047 |
|
|
Aug 16 07:19:32 PM PDT 24 |
Aug 16 07:41:38 PM PDT 24 |
26367698160 ps |
| T1255 |
/workspace/coverage/default/12.chip_sw_uart_rand_baudrate.2372458777 |
|
|
Aug 16 07:32:54 PM PDT 24 |
Aug 16 07:41:40 PM PDT 24 |
4335085342 ps |
| T1256 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_rnd.2555827886 |
|
|
Aug 16 07:08:08 PM PDT 24 |
Aug 16 07:22:39 PM PDT 24 |
5326947640 ps |
| T1257 |
/workspace/coverage/default/7.chip_sw_csrng_edn_concurrency.2617571139 |
|
|
Aug 16 07:32:49 PM PDT 24 |
Aug 16 09:07:01 PM PDT 24 |
27483017906 ps |
| T1258 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_no_meas.577008409 |
|
|
Aug 16 07:24:20 PM PDT 24 |
Aug 16 08:20:59 PM PDT 24 |
15233419400 ps |
| T1259 |
/workspace/coverage/default/0.chip_tap_straps_prod.3734638817 |
|
|
Aug 16 07:07:55 PM PDT 24 |
Aug 16 07:36:26 PM PDT 24 |
14103247056 ps |
| T328 |
/workspace/coverage/default/1.chip_sw_entropy_src_csrng.1312174287 |
|
|
Aug 16 07:17:59 PM PDT 24 |
Aug 16 07:49:01 PM PDT 24 |
7538065520 ps |
| T1260 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_dev.3524343051 |
|
|
Aug 16 07:23:49 PM PDT 24 |
Aug 16 07:44:25 PM PDT 24 |
7199922070 ps |
| T1261 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.3100005067 |
|
|
Aug 16 07:16:59 PM PDT 24 |
Aug 16 08:19:57 PM PDT 24 |
18819856256 ps |
| T57 |
/workspace/coverage/default/2.chip_sw_sleep_pin_retention.2202665316 |
|
|
Aug 16 07:22:28 PM PDT 24 |
Aug 16 07:27:48 PM PDT 24 |
3725547344 ps |
| T1262 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac_jitter_en.1177353552 |
|
|
Aug 16 07:16:58 PM PDT 24 |
Aug 16 07:21:17 PM PDT 24 |
2934008871 ps |
| T1263 |
/workspace/coverage/default/0.chip_sw_gpio_smoketest.927421884 |
|
|
Aug 16 07:16:54 PM PDT 24 |
Aug 16 07:22:45 PM PDT 24 |
2904932066 ps |
| T133 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.3655344232 |
|
|
Aug 16 07:16:16 PM PDT 24 |
Aug 16 07:24:47 PM PDT 24 |
5495317116 ps |
| T1264 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.2080283203 |
|
|
Aug 16 07:30:35 PM PDT 24 |
Aug 16 07:35:36 PM PDT 24 |
3267219154 ps |
| T1265 |
/workspace/coverage/default/2.chip_sw_otbn_ecdsa_op_irq_jitter_en_reduced_freq.531001698 |
|
|
Aug 16 07:29:31 PM PDT 24 |
Aug 16 08:40:42 PM PDT 24 |
25222541504 ps |
| T1266 |
/workspace/coverage/default/2.chip_sw_pwrmgr_smoketest.3376837240 |
|
|
Aug 16 07:31:25 PM PDT 24 |
Aug 16 07:39:09 PM PDT 24 |
5233800134 ps |
| T1267 |
/workspace/coverage/default/2.chip_sw_uart_rand_baudrate.2920761148 |
|
|
Aug 16 07:21:41 PM PDT 24 |
Aug 16 07:47:43 PM PDT 24 |
8466623404 ps |
| T1268 |
/workspace/coverage/default/1.chip_sw_aes_enc.2928446769 |
|
|
Aug 16 07:14:24 PM PDT 24 |
Aug 16 07:17:56 PM PDT 24 |
2381128252 ps |
| T1269 |
/workspace/coverage/default/0.chip_sw_hmac_multistream.247568684 |
|
|
Aug 16 07:10:29 PM PDT 24 |
Aug 16 07:39:52 PM PDT 24 |
8053064246 ps |
| T1270 |
/workspace/coverage/default/2.chip_sw_pwrmgr_all_reset_reqs.1064247879 |
|
|
Aug 16 07:24:48 PM PDT 24 |
Aug 16 07:54:49 PM PDT 24 |
9593680486 ps |
| T227 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.1003071719 |
|
|
Aug 16 07:26:59 PM PDT 24 |
Aug 16 08:01:53 PM PDT 24 |
12161874764 ps |
| T1271 |
/workspace/coverage/default/2.chip_sw_example_manufacturer.4219989031 |
|
|
Aug 16 07:22:28 PM PDT 24 |
Aug 16 07:26:20 PM PDT 24 |
2701218788 ps |
| T1272 |
/workspace/coverage/default/2.chip_sw_edn_kat.3734780672 |
|
|
Aug 16 07:26:20 PM PDT 24 |
Aug 16 07:36:53 PM PDT 24 |
3853890624 ps |
| T1273 |
/workspace/coverage/default/3.chip_tap_straps_rma.741850364 |
|
|
Aug 16 07:31:00 PM PDT 24 |
Aug 16 07:34:42 PM PDT 24 |
3279305265 ps |
| T1274 |
/workspace/coverage/default/2.chip_sw_hmac_smoketest.3838231464 |
|
|
Aug 16 07:29:44 PM PDT 24 |
Aug 16 07:36:17 PM PDT 24 |
3679357312 ps |
| T1275 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.120965436 |
|
|
Aug 16 07:29:25 PM PDT 24 |
Aug 16 07:50:07 PM PDT 24 |
7555449576 ps |
| T1276 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_testunlocks.835149898 |
|
|
Aug 16 07:08:15 PM PDT 24 |
Aug 16 07:50:19 PM PDT 24 |
34693039230 ps |
| T780 |
/workspace/coverage/default/12.chip_sw_alert_handler_lpg_sleep_mode_alerts.920185076 |
|
|
Aug 16 07:34:15 PM PDT 24 |
Aug 16 07:40:03 PM PDT 24 |
4084807672 ps |
| T312 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.3592171048 |
|
|
Aug 16 07:15:44 PM PDT 24 |
Aug 16 07:29:57 PM PDT 24 |
9889170172 ps |
| T1277 |
/workspace/coverage/default/2.chip_sw_aes_enc_jitter_en.4049776595 |
|
|
Aug 16 07:25:21 PM PDT 24 |
Aug 16 07:31:36 PM PDT 24 |
3550106747 ps |
| T764 |
/workspace/coverage/default/62.chip_sw_all_escalation_resets.4234340233 |
|
|
Aug 16 07:37:09 PM PDT 24 |
Aug 16 07:45:12 PM PDT 24 |
4857295600 ps |
| T1278 |
/workspace/coverage/default/0.chip_sw_otbn_randomness.2039519219 |
|
|
Aug 16 07:08:37 PM PDT 24 |
Aug 16 07:24:18 PM PDT 24 |
5927996200 ps |
| T1279 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_clock_freqs.4083095141 |
|
|
Aug 16 07:22:48 PM PDT 24 |
Aug 16 07:41:53 PM PDT 24 |
5597019491 ps |
| T1280 |
/workspace/coverage/default/1.chip_sw_hmac_enc.2069306635 |
|
|
Aug 16 07:14:54 PM PDT 24 |
Aug 16 07:18:33 PM PDT 24 |
2565552488 ps |
| T197 |
/workspace/coverage/default/0.chip_sw_spi_device_pass_through_collision.2286124646 |
|
|
Aug 16 07:07:36 PM PDT 24 |
Aug 16 07:16:17 PM PDT 24 |
4035085486 ps |
| T1281 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.759299530 |
|
|
Aug 16 07:34:47 PM PDT 24 |
Aug 16 08:36:12 PM PDT 24 |
15684858718 ps |
| T1282 |
/workspace/coverage/default/0.chip_sw_clkmgr_smoketest.3448405721 |
|
|
Aug 16 07:12:15 PM PDT 24 |
Aug 16 07:16:37 PM PDT 24 |
3619531886 ps |
| T749 |
/workspace/coverage/default/51.chip_sw_all_escalation_resets.1211354139 |
|
|
Aug 16 07:37:01 PM PDT 24 |
Aug 16 07:46:18 PM PDT 24 |
6276175160 ps |
| T1283 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac.2460927216 |
|
|
Aug 16 07:27:46 PM PDT 24 |
Aug 16 07:31:49 PM PDT 24 |
2627667736 ps |
| T1284 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.2989932658 |
|
|
Aug 16 07:26:22 PM PDT 24 |
Aug 16 08:02:52 PM PDT 24 |
12071610606 ps |
| T1285 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_fast_rma.3142905364 |
|
|
Aug 16 07:08:59 PM PDT 24 |
Aug 16 07:20:18 PM PDT 24 |
3870288034 ps |
| T1286 |
/workspace/coverage/default/1.rom_e2e_static_critical.36089958 |
|
|
Aug 16 07:25:03 PM PDT 24 |
Aug 16 08:33:17 PM PDT 24 |
16723499718 ps |
| T1287 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.3306699983 |
|
|
Aug 16 07:27:26 PM PDT 24 |
Aug 16 07:39:56 PM PDT 24 |
3839923752 ps |
| T1288 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_transition.3468046679 |
|
|
Aug 16 07:08:11 PM PDT 24 |
Aug 16 07:17:12 PM PDT 24 |
7337061062 ps |
| T1289 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_reduced_freq.3160076870 |
|
|
Aug 16 07:20:27 PM PDT 24 |
Aug 16 07:23:25 PM PDT 24 |
2059532251 ps |
| T1290 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_slow_test_unlocked0.4104935363 |
|
|
Aug 16 07:28:18 PM PDT 24 |
Aug 16 07:42:17 PM PDT 24 |
5308711020 ps |
| T1291 |
/workspace/coverage/default/0.chip_sw_aon_timer_sleep_wdog_sleep_pause.2715758891 |
|
|
Aug 16 07:06:51 PM PDT 24 |
Aug 16 07:13:31 PM PDT 24 |
7296378536 ps |
| T1292 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_outputs.559944515 |
|
|
Aug 16 07:25:01 PM PDT 24 |
Aug 16 07:31:46 PM PDT 24 |
4071886888 ps |
| T1293 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.4191748295 |
|
|
Aug 16 07:35:24 PM PDT 24 |
Aug 16 07:44:28 PM PDT 24 |
6167988362 ps |
| T735 |
/workspace/coverage/default/40.chip_sw_alert_handler_lpg_sleep_mode_alerts.3586239762 |
|
|
Aug 16 07:42:09 PM PDT 24 |
Aug 16 07:48:49 PM PDT 24 |
4364286496 ps |
| T447 |
/workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.981736318 |
|
|
Aug 16 07:38:13 PM PDT 24 |
Aug 16 07:43:45 PM PDT 24 |
2947762808 ps |
| T1294 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2740225032 |
|
|
Aug 16 07:18:17 PM PDT 24 |
Aug 16 07:30:12 PM PDT 24 |
4672090214 ps |
| T1295 |
/workspace/coverage/default/58.chip_sw_alert_handler_lpg_sleep_mode_alerts.879272884 |
|
|
Aug 16 07:42:35 PM PDT 24 |
Aug 16 07:49:24 PM PDT 24 |
3817592644 ps |
| T1296 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_peri.1449808111 |
|
|
Aug 16 07:17:16 PM PDT 24 |
Aug 16 07:40:27 PM PDT 24 |
11017346744 ps |
| T1297 |
/workspace/coverage/default/2.chip_sw_power_idle_load.404210864 |
|
|
Aug 16 07:34:00 PM PDT 24 |
Aug 16 07:43:05 PM PDT 24 |
4245127810 ps |
| T31 |
/workspace/coverage/default/2.chip_sw_gpio.1365503777 |
|
|
Aug 16 07:23:49 PM PDT 24 |
Aug 16 07:32:40 PM PDT 24 |
3878893740 ps |
| T1298 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_frequency.557645176 |
|
|
Aug 16 07:18:29 PM PDT 24 |
Aug 16 07:26:57 PM PDT 24 |
2903736288 ps |
| T1299 |
/workspace/coverage/default/10.chip_sw_alert_handler_lpg_sleep_mode_alerts.1877825893 |
|
|
Aug 16 07:34:18 PM PDT 24 |
Aug 16 07:41:34 PM PDT 24 |
4466157272 ps |
| T758 |
/workspace/coverage/default/17.chip_sw_all_escalation_resets.3574727252 |
|
|
Aug 16 07:36:29 PM PDT 24 |
Aug 16 07:46:24 PM PDT 24 |
5656390954 ps |
| T1300 |
/workspace/coverage/default/1.chip_tap_straps_testunlock0.1779530147 |
|
|
Aug 16 07:18:13 PM PDT 24 |
Aug 16 07:25:44 PM PDT 24 |
5581406927 ps |
| T1301 |
/workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.3848624644 |
|
|
Aug 16 07:26:12 PM PDT 24 |
Aug 16 07:40:34 PM PDT 24 |
7086080192 ps |
| T1302 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_alerts.2404661406 |
|
|
Aug 16 07:10:39 PM PDT 24 |
Aug 16 07:17:33 PM PDT 24 |
3958132000 ps |
| T1303 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_in_irq.3026164372 |
|
|
Aug 16 07:08:55 PM PDT 24 |
Aug 16 07:21:27 PM PDT 24 |
4261720556 ps |
| T1304 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.677697863 |
|
|
Aug 16 07:23:20 PM PDT 24 |
Aug 16 07:39:37 PM PDT 24 |
8508933963 ps |
| T422 |
/workspace/coverage/default/1.chip_sw_pwrmgr_normal_sleep_all_wake_ups.2237957381 |
|
|
Aug 16 07:18:27 PM PDT 24 |
Aug 16 07:25:03 PM PDT 24 |
7263333086 ps |
| T180 |
/workspace/coverage/default/2.chip_sw_flash_rma_unlocked.226784736 |
|
|
Aug 16 07:22:52 PM PDT 24 |
Aug 16 08:47:36 PM PDT 24 |
44258337150 ps |
| T1305 |
/workspace/coverage/default/0.chip_sw_hmac_enc.3783017578 |
|
|
Aug 16 07:07:20 PM PDT 24 |
Aug 16 07:10:35 PM PDT 24 |
3251983240 ps |
| T685 |
/workspace/coverage/default/23.chip_sw_all_escalation_resets.3945217579 |
|
|
Aug 16 07:35:22 PM PDT 24 |
Aug 16 07:46:26 PM PDT 24 |
5232223000 ps |
| T277 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.548383368 |
|
|
Aug 16 07:11:55 PM PDT 24 |
Aug 16 07:27:17 PM PDT 24 |
6889153976 ps |
| T1306 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod.3864949288 |
|
|
Aug 16 07:19:18 PM PDT 24 |
Aug 16 08:15:10 PM PDT 24 |
15761843530 ps |
| T228 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.2814709771 |
|
|
Aug 16 07:16:46 PM PDT 24 |
Aug 16 07:58:20 PM PDT 24 |
12779231906 ps |
| T1307 |
/workspace/coverage/default/0.chip_sw_coremark.2095835153 |
|
|
Aug 16 07:10:27 PM PDT 24 |
Aug 16 11:06:38 PM PDT 24 |
71995209554 ps |
| T1308 |
/workspace/coverage/default/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.1423507715 |
|
|
Aug 16 07:20:38 PM PDT 24 |
Aug 16 07:28:41 PM PDT 24 |
5552828244 ps |
| T1309 |
/workspace/coverage/default/1.chip_sw_entropy_src_smoketest.131181599 |
|
|
Aug 16 07:20:34 PM PDT 24 |
Aug 16 07:28:56 PM PDT 24 |
4129943010 ps |
| T1310 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_ec_rst_l.793097154 |
|
|
Aug 16 07:13:19 PM PDT 24 |
Aug 16 08:07:16 PM PDT 24 |
20180177978 ps |