| T924 |
/workspace/coverage/default/8.chip_sw_lc_ctrl_transition.1603446511 |
|
|
Aug 17 07:30:00 PM PDT 24 |
Aug 17 07:36:41 PM PDT 24 |
6900309204 ps |
| T66 |
/workspace/coverage/default/4.chip_tap_straps_testunlock0.2540132334 |
|
|
Aug 17 07:30:02 PM PDT 24 |
Aug 17 07:40:47 PM PDT 24 |
7314620522 ps |
| T396 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_lockstep_glitch.1195621945 |
|
|
Aug 17 07:06:32 PM PDT 24 |
Aug 17 07:10:35 PM PDT 24 |
2931885368 ps |
| T741 |
/workspace/coverage/default/75.chip_sw_alert_handler_lpg_sleep_mode_alerts.498948049 |
|
|
Aug 17 07:37:49 PM PDT 24 |
Aug 17 07:44:10 PM PDT 24 |
4024958646 ps |
| T130 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_wake_5_bug.3629997278 |
|
|
Aug 17 07:07:31 PM PDT 24 |
Aug 17 07:16:15 PM PDT 24 |
6436735900 ps |
| T202 |
/workspace/coverage/default/2.chip_sw_inject_scramble_seed.632301111 |
|
|
Aug 17 07:20:08 PM PDT 24 |
Aug 17 10:26:24 PM PDT 24 |
65080654744 ps |
| T925 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_idx1.1399905231 |
|
|
Aug 17 07:19:41 PM PDT 24 |
Aug 17 07:29:25 PM PDT 24 |
4828422280 ps |
| T693 |
/workspace/coverage/default/2.chip_sw_power_sleep_load.4084051630 |
|
|
Aug 17 07:28:22 PM PDT 24 |
Aug 17 07:38:08 PM PDT 24 |
11160013014 ps |
| T721 |
/workspace/coverage/default/12.chip_sw_all_escalation_resets.2014071856 |
|
|
Aug 17 07:32:52 PM PDT 24 |
Aug 17 07:43:18 PM PDT 24 |
5817050212 ps |
| T172 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_program_error.1748014808 |
|
|
Aug 17 07:26:42 PM PDT 24 |
Aug 17 07:33:49 PM PDT 24 |
4479558100 ps |
| T790 |
/workspace/coverage/default/2.chip_sw_all_escalation_resets.2920841388 |
|
|
Aug 17 07:19:08 PM PDT 24 |
Aug 17 07:28:58 PM PDT 24 |
4757978692 ps |
| T926 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_lc.642551910 |
|
|
Aug 17 07:14:28 PM PDT 24 |
Aug 17 07:22:44 PM PDT 24 |
5155983213 ps |
| T226 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation.582457058 |
|
|
Aug 17 07:07:04 PM PDT 24 |
Aug 17 07:53:55 PM PDT 24 |
11382303612 ps |
| T292 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en.452713541 |
|
|
Aug 17 07:31:25 PM PDT 24 |
Aug 17 07:42:03 PM PDT 24 |
3874202909 ps |
| T760 |
/workspace/coverage/default/73.chip_sw_alert_handler_lpg_sleep_mode_alerts.1258360846 |
|
|
Aug 17 07:36:25 PM PDT 24 |
Aug 17 07:43:02 PM PDT 24 |
3931626180 ps |
| T250 |
/workspace/coverage/default/9.chip_sw_all_escalation_resets.3327521939 |
|
|
Aug 17 07:29:56 PM PDT 24 |
Aug 17 07:41:08 PM PDT 24 |
4782402260 ps |
| T278 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_prod.316846654 |
|
|
Aug 17 07:12:41 PM PDT 24 |
Aug 17 08:16:33 PM PDT 24 |
14093425551 ps |
| T348 |
/workspace/coverage/default/2.chip_sw_pwrmgr_lowpower_cancel.1665760267 |
|
|
Aug 17 07:26:13 PM PDT 24 |
Aug 17 07:33:46 PM PDT 24 |
3897715040 ps |
| T131 |
/workspace/coverage/default/4.chip_sw_sensor_ctrl_alert.4033834848 |
|
|
Aug 17 07:29:34 PM PDT 24 |
Aug 17 07:40:23 PM PDT 24 |
6309165512 ps |
| T293 |
/workspace/coverage/default/0.chip_sw_data_integrity_escalation.1909749193 |
|
|
Aug 17 07:05:46 PM PDT 24 |
Aug 17 07:17:31 PM PDT 24 |
6255722732 ps |
| T927 |
/workspace/coverage/default/0.chip_sw_pwrmgr_random_sleep_all_reset_reqs.1023830272 |
|
|
Aug 17 07:05:43 PM PDT 24 |
Aug 17 07:48:58 PM PDT 24 |
24452153502 ps |
| T207 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_outputs.1449753585 |
|
|
Aug 17 07:23:01 PM PDT 24 |
Aug 17 07:29:27 PM PDT 24 |
3802514520 ps |
| T928 |
/workspace/coverage/default/2.chip_sw_kmac_idle.1075832262 |
|
|
Aug 17 07:25:01 PM PDT 24 |
Aug 17 07:30:33 PM PDT 24 |
2809465720 ps |
| T739 |
/workspace/coverage/default/51.chip_sw_alert_handler_lpg_sleep_mode_alerts.390196223 |
|
|
Aug 17 07:35:18 PM PDT 24 |
Aug 17 07:40:16 PM PDT 24 |
4142216188 ps |
| T233 |
/workspace/coverage/default/1.chip_sw_flash_init_reduced_freq.997687252 |
|
|
Aug 17 07:15:18 PM PDT 24 |
Aug 17 07:46:27 PM PDT 24 |
23127273550 ps |
| T234 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_rma.854440500 |
|
|
Aug 17 07:20:28 PM PDT 24 |
Aug 17 08:39:02 PM PDT 24 |
48662179374 ps |
| T107 |
/workspace/coverage/default/0.chip_rv_dm_ndm_reset_req.110569182 |
|
|
Aug 17 07:10:57 PM PDT 24 |
Aug 17 07:18:50 PM PDT 24 |
4455853504 ps |
| T698 |
/workspace/coverage/default/47.chip_sw_alert_handler_lpg_sleep_mode_alerts.3626754585 |
|
|
Aug 17 07:35:12 PM PDT 24 |
Aug 17 07:42:40 PM PDT 24 |
3606070600 ps |
| T699 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_no_scramble.3651079807 |
|
|
Aug 17 07:16:48 PM PDT 24 |
Aug 17 07:29:02 PM PDT 24 |
7303127184 ps |
| T83 |
/workspace/coverage/default/0.chip_sw_power_virus.1705569995 |
|
|
Aug 17 07:15:37 PM PDT 24 |
Aug 17 07:42:42 PM PDT 24 |
5832622660 ps |
| T700 |
/workspace/coverage/default/0.chip_sw_edn_sw_mode.1151211108 |
|
|
Aug 17 07:07:30 PM PDT 24 |
Aug 17 07:32:10 PM PDT 24 |
6088884448 ps |
| T701 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod.1283183512 |
|
|
Aug 17 07:13:27 PM PDT 24 |
Aug 17 08:17:18 PM PDT 24 |
15325043112 ps |
| T702 |
/workspace/coverage/default/48.chip_sw_all_escalation_resets.3382855967 |
|
|
Aug 17 07:34:13 PM PDT 24 |
Aug 17 07:43:50 PM PDT 24 |
5689411560 ps |
| T703 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_lc.1008273200 |
|
|
Aug 17 07:12:32 PM PDT 24 |
Aug 17 07:31:13 PM PDT 24 |
13307756371 ps |
| T704 |
/workspace/coverage/default/1.chip_sw_otbn_randomness.2237190990 |
|
|
Aug 17 07:15:02 PM PDT 24 |
Aug 17 07:31:46 PM PDT 24 |
5352606712 ps |
| T227 |
/workspace/coverage/default/0.chip_sw_rv_dm_access_after_escalation_reset.3998223420 |
|
|
Aug 17 07:10:31 PM PDT 24 |
Aug 17 07:21:07 PM PDT 24 |
5311605787 ps |
| T113 |
/workspace/coverage/default/2.chip_sw_ast_clk_rst_inputs.992095098 |
|
|
Aug 17 07:27:03 PM PDT 24 |
Aug 17 08:17:50 PM PDT 24 |
22433329897 ps |
| T132 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.4071432941 |
|
|
Aug 17 07:08:14 PM PDT 24 |
Aug 17 07:16:18 PM PDT 24 |
5452428480 ps |
| T929 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq.1386889316 |
|
|
Aug 17 07:31:38 PM PDT 24 |
Aug 17 07:40:00 PM PDT 24 |
4342812993 ps |
| T930 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.386244466 |
|
|
Aug 17 07:30:46 PM PDT 24 |
Aug 17 07:45:11 PM PDT 24 |
8904865542 ps |
| T931 |
/workspace/coverage/default/1.chip_sw_aon_timer_sleep_wdog_sleep_pause.1222963677 |
|
|
Aug 17 07:11:50 PM PDT 24 |
Aug 17 07:20:05 PM PDT 24 |
7300543128 ps |
| T932 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_otp_hw_cfg0.2330180643 |
|
|
Aug 17 07:12:16 PM PDT 24 |
Aug 17 07:16:51 PM PDT 24 |
2742161160 ps |
| T933 |
/workspace/coverage/default/1.chip_sw_flash_crash_alert.10319941 |
|
|
Aug 17 07:16:49 PM PDT 24 |
Aug 17 07:26:25 PM PDT 24 |
4243605838 ps |
| T317 |
/workspace/coverage/default/72.chip_sw_alert_handler_lpg_sleep_mode_alerts.2864872994 |
|
|
Aug 17 07:37:11 PM PDT 24 |
Aug 17 07:42:43 PM PDT 24 |
3405513112 ps |
| T934 |
/workspace/coverage/default/0.chip_sw_otbn_smoketest.1342704337 |
|
|
Aug 17 07:11:25 PM PDT 24 |
Aug 17 07:28:20 PM PDT 24 |
6230094760 ps |
| T182 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_icache_invalidate.3833205636 |
|
|
Aug 17 07:16:22 PM PDT 24 |
Aug 17 07:19:30 PM PDT 24 |
2496112537 ps |
| T301 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_reset_reqs.4089291511 |
|
|
Aug 17 07:12:36 PM PDT 24 |
Aug 17 07:46:42 PM PDT 24 |
26633129823 ps |
| T302 |
/workspace/coverage/default/4.chip_sw_uart_rand_baudrate.809226811 |
|
|
Aug 17 07:29:44 PM PDT 24 |
Aug 17 08:17:02 PM PDT 24 |
13304122978 ps |
| T303 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx.840589114 |
|
|
Aug 17 07:21:08 PM PDT 24 |
Aug 17 07:35:57 PM PDT 24 |
4420549472 ps |
| T304 |
/workspace/coverage/default/1.chip_sw_kmac_smoketest.4078955047 |
|
|
Aug 17 07:19:42 PM PDT 24 |
Aug 17 07:24:14 PM PDT 24 |
2898107624 ps |
| T18 |
/workspace/coverage/default/0.chip_sw_usbdev_config_host.3426749952 |
|
|
Aug 17 07:05:00 PM PDT 24 |
Aug 17 07:38:09 PM PDT 24 |
8082241264 ps |
| T305 |
/workspace/coverage/default/14.chip_sw_alert_handler_lpg_sleep_mode_alerts.1617482390 |
|
|
Aug 17 07:32:04 PM PDT 24 |
Aug 17 07:39:48 PM PDT 24 |
3736922592 ps |
| T19 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_wake_ups.543757930 |
|
|
Aug 17 07:26:57 PM PDT 24 |
Aug 17 07:48:24 PM PDT 24 |
20062858684 ps |
| T24 |
/workspace/coverage/default/1.chip_sw_gpio_smoketest.1026566767 |
|
|
Aug 17 07:19:24 PM PDT 24 |
Aug 17 07:23:16 PM PDT 24 |
2866534250 ps |
| T306 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_wake_5_bug.12209150 |
|
|
Aug 17 07:25:34 PM PDT 24 |
Aug 17 07:36:17 PM PDT 24 |
5820296806 ps |
| T935 |
/workspace/coverage/default/1.chip_sw_clkmgr_reset_frequency.414748636 |
|
|
Aug 17 07:16:26 PM PDT 24 |
Aug 17 07:23:14 PM PDT 24 |
3339058635 ps |
| T936 |
/workspace/coverage/default/0.chip_sw_aes_enc.3286189653 |
|
|
Aug 17 07:06:55 PM PDT 24 |
Aug 17 07:12:09 PM PDT 24 |
3278010632 ps |
| T661 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.2862603957 |
|
|
Aug 17 07:08:12 PM PDT 24 |
Aug 17 07:10:13 PM PDT 24 |
2615472269 ps |
| T937 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_dev.1924190046 |
|
|
Aug 17 07:05:22 PM PDT 24 |
Aug 17 07:28:21 PM PDT 24 |
8455925208 ps |
| T353 |
/workspace/coverage/default/0.chip_sw_hmac_enc.2212089552 |
|
|
Aug 17 07:06:34 PM PDT 24 |
Aug 17 07:11:22 PM PDT 24 |
3104741284 ps |
| T938 |
/workspace/coverage/default/0.chip_sw_aon_timer_smoketest.425645333 |
|
|
Aug 17 07:13:13 PM PDT 24 |
Aug 17 07:17:54 PM PDT 24 |
2586836404 ps |
| T939 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs_jitter.2487570984 |
|
|
Aug 17 07:30:09 PM PDT 24 |
Aug 17 07:50:37 PM PDT 24 |
8059354565 ps |
| T940 |
/workspace/coverage/default/1.rom_e2e_asm_init_prod.3490789518 |
|
|
Aug 17 07:22:14 PM PDT 24 |
Aug 17 08:25:27 PM PDT 24 |
15368268536 ps |
| T54 |
/workspace/coverage/default/2.chip_sw_spi_device_pinmux_sleep_retention.2993649072 |
|
|
Aug 17 07:20:12 PM PDT 24 |
Aug 17 07:24:02 PM PDT 24 |
2935867656 ps |
| T793 |
/workspace/coverage/default/27.chip_sw_alert_handler_lpg_sleep_mode_alerts.1871038595 |
|
|
Aug 17 07:35:04 PM PDT 24 |
Aug 17 07:41:05 PM PDT 24 |
3926371480 ps |
| T941 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_dev.3071253943 |
|
|
Aug 17 07:15:02 PM PDT 24 |
Aug 17 07:24:56 PM PDT 24 |
3976323496 ps |
| T942 |
/workspace/coverage/default/0.chip_sw_hmac_multistream.2641260724 |
|
|
Aug 17 07:14:19 PM PDT 24 |
Aug 17 07:42:13 PM PDT 24 |
7314371570 ps |
| T943 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx2.1757270932 |
|
|
Aug 17 07:29:12 PM PDT 24 |
Aug 17 07:40:28 PM PDT 24 |
4216066198 ps |
| T944 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_lc_escalate.656094058 |
|
|
Aug 17 07:11:14 PM PDT 24 |
Aug 17 07:22:02 PM PDT 24 |
6178414920 ps |
| T945 |
/workspace/coverage/default/0.chip_sw_rv_plic_smoketest.1546086770 |
|
|
Aug 17 07:15:35 PM PDT 24 |
Aug 17 07:20:16 PM PDT 24 |
2529636216 ps |
| T946 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_por_reset.3396724869 |
|
|
Aug 17 07:11:02 PM PDT 24 |
Aug 17 07:26:15 PM PDT 24 |
10839648728 ps |
| T294 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.3469496084 |
|
|
Aug 17 07:17:31 PM PDT 24 |
Aug 17 07:26:25 PM PDT 24 |
5417759989 ps |
| T947 |
/workspace/coverage/default/2.chip_sw_csrng_lc_hw_debug_en_test.3566772536 |
|
|
Aug 17 07:24:33 PM PDT 24 |
Aug 17 07:37:18 PM PDT 24 |
5680857540 ps |
| T114 |
/workspace/coverage/default/1.chip_sw_ast_clk_rst_inputs.363002139 |
|
|
Aug 17 07:17:59 PM PDT 24 |
Aug 17 08:18:09 PM PDT 24 |
22768329195 ps |
| T948 |
/workspace/coverage/default/1.rom_e2e_asm_init_rma.1965237760 |
|
|
Aug 17 07:21:33 PM PDT 24 |
Aug 17 08:24:00 PM PDT 24 |
15244772794 ps |
| T394 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_prod.3322843930 |
|
|
Aug 17 07:17:10 PM PDT 24 |
Aug 17 09:02:18 PM PDT 24 |
24374978328 ps |
| T748 |
/workspace/coverage/default/60.chip_sw_all_escalation_resets.4218993897 |
|
|
Aug 17 07:37:09 PM PDT 24 |
Aug 17 07:46:29 PM PDT 24 |
5149876670 ps |
| T949 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_invalid_meas.1895001004 |
|
|
Aug 17 07:32:10 PM PDT 24 |
Aug 17 08:45:03 PM PDT 24 |
15179230296 ps |
| T726 |
/workspace/coverage/default/66.chip_sw_all_escalation_resets.2391218655 |
|
|
Aug 17 07:36:04 PM PDT 24 |
Aug 17 07:44:23 PM PDT 24 |
5140162520 ps |
| T694 |
/workspace/coverage/default/31.chip_sw_all_escalation_resets.928980152 |
|
|
Aug 17 07:32:21 PM PDT 24 |
Aug 17 07:41:32 PM PDT 24 |
4280567782 ps |
| T950 |
/workspace/coverage/default/0.chip_sw_entropy_src_kat_test.802132329 |
|
|
Aug 17 07:06:28 PM PDT 24 |
Aug 17 07:11:19 PM PDT 24 |
3379483840 ps |
| T335 |
/workspace/coverage/default/1.chip_sw_entropy_src_csrng.113080407 |
|
|
Aug 17 07:13:59 PM PDT 24 |
Aug 17 07:36:14 PM PDT 24 |
5903664788 ps |
| T951 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq_jitter_en.833380446 |
|
|
Aug 17 07:15:21 PM PDT 24 |
Aug 17 08:36:43 PM PDT 24 |
18247508337 ps |
| T742 |
/workspace/coverage/default/24.chip_sw_all_escalation_resets.3386310764 |
|
|
Aug 17 07:32:38 PM PDT 24 |
Aug 17 07:43:34 PM PDT 24 |
5933206210 ps |
| T179 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_rand_to_scrap.2295260702 |
|
|
Aug 17 07:13:17 PM PDT 24 |
Aug 17 07:16:09 PM PDT 24 |
3280107128 ps |
| T952 |
/workspace/coverage/default/0.chip_sw_aes_idle.3672179028 |
|
|
Aug 17 07:14:54 PM PDT 24 |
Aug 17 07:18:56 PM PDT 24 |
2537452088 ps |
| T953 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_dev.98331762 |
|
|
Aug 17 07:15:04 PM PDT 24 |
Aug 17 08:21:28 PM PDT 24 |
15407777540 ps |
| T798 |
/workspace/coverage/default/44.chip_sw_alert_handler_lpg_sleep_mode_alerts.1805973378 |
|
|
Aug 17 07:34:06 PM PDT 24 |
Aug 17 07:39:27 PM PDT 24 |
4233913960 ps |
| T262 |
/workspace/coverage/default/94.chip_sw_all_escalation_resets.2182583559 |
|
|
Aug 17 07:39:12 PM PDT 24 |
Aug 17 07:48:37 PM PDT 24 |
4457283090 ps |
| T954 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_good_prod_end.678101529 |
|
|
Aug 17 07:14:26 PM PDT 24 |
Aug 17 08:09:22 PM PDT 24 |
15766134498 ps |
| T413 |
/workspace/coverage/default/0.chip_sw_kmac_app_rom.1457310566 |
|
|
Aug 17 07:15:08 PM PDT 24 |
Aug 17 07:18:26 PM PDT 24 |
2621697620 ps |
| T159 |
/workspace/coverage/default/0.chip_plic_all_irqs_10.2061412059 |
|
|
Aug 17 07:06:40 PM PDT 24 |
Aug 17 07:15:47 PM PDT 24 |
3353099352 ps |
| T63 |
/workspace/coverage/default/3.chip_tap_straps_rma.2339688606 |
|
|
Aug 17 07:29:04 PM PDT 24 |
Aug 17 07:39:58 PM PDT 24 |
7663596228 ps |
| T144 |
/workspace/coverage/default/1.chip_sw_pwrmgr_full_aon_reset.4074576808 |
|
|
Aug 17 07:14:53 PM PDT 24 |
Aug 17 07:22:50 PM PDT 24 |
8949219016 ps |
| T955 |
/workspace/coverage/default/1.rom_e2e_shutdown_output.3080926840 |
|
|
Aug 17 07:24:49 PM PDT 24 |
Aug 17 08:19:25 PM PDT 24 |
24004918954 ps |
| T956 |
/workspace/coverage/default/2.rom_e2e_shutdown_exception_c.3955032459 |
|
|
Aug 17 07:32:57 PM PDT 24 |
Aug 17 08:22:59 PM PDT 24 |
14426242916 ps |
| T957 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx1.170831829 |
|
|
Aug 17 07:13:00 PM PDT 24 |
Aug 17 07:23:11 PM PDT 24 |
4526917136 ps |
| T958 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en.1513648914 |
|
|
Aug 17 07:16:09 PM PDT 24 |
Aug 17 07:35:59 PM PDT 24 |
5715548114 ps |
| T959 |
/workspace/coverage/default/3.chip_sw_lc_ctrl_transition.4056800127 |
|
|
Aug 17 07:29:00 PM PDT 24 |
Aug 17 07:43:33 PM PDT 24 |
8745262397 ps |
| T88 |
/workspace/coverage/default/82.chip_sw_alert_handler_lpg_sleep_mode_alerts.3799602277 |
|
|
Aug 17 07:37:03 PM PDT 24 |
Aug 17 07:42:49 PM PDT 24 |
4221759036 ps |
| T662 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rma_to_scrap.609803203 |
|
|
Aug 17 07:06:00 PM PDT 24 |
Aug 17 07:11:35 PM PDT 24 |
3069624158 ps |
| T960 |
/workspace/coverage/default/2.rom_e2e_static_critical.4178760180 |
|
|
Aug 17 07:31:32 PM PDT 24 |
Aug 17 08:30:09 PM PDT 24 |
17616690274 ps |
| T380 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.3212175023 |
|
|
Aug 17 07:17:25 PM PDT 24 |
Aug 17 07:26:01 PM PDT 24 |
6169861080 ps |
| T212 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_reset_toggle.2462301700 |
|
|
Aug 17 07:06:33 PM PDT 24 |
Aug 17 07:34:49 PM PDT 24 |
7818979518 ps |
| T961 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en.2323886910 |
|
|
Aug 17 07:06:45 PM PDT 24 |
Aug 17 07:11:28 PM PDT 24 |
3190768459 ps |
| T962 |
/workspace/coverage/default/1.chip_sw_alert_handler_escalation.2802329667 |
|
|
Aug 17 07:13:33 PM PDT 24 |
Aug 17 07:25:36 PM PDT 24 |
5006369196 ps |
| T963 |
/workspace/coverage/default/0.chip_sw_clkmgr_external_clk_src_for_sw_slow_rma.2690223085 |
|
|
Aug 17 07:08:33 PM PDT 24 |
Aug 17 07:18:54 PM PDT 24 |
4472680520 ps |
| T964 |
/workspace/coverage/default/1.rom_e2e_static_critical.2173429306 |
|
|
Aug 17 07:21:06 PM PDT 24 |
Aug 17 08:24:40 PM PDT 24 |
16893998766 ps |
| T965 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2827403942 |
|
|
Aug 17 07:20:25 PM PDT 24 |
Aug 17 07:55:31 PM PDT 24 |
13587361025 ps |
| T655 |
/workspace/coverage/default/9.chip_sw_csrng_edn_concurrency.1080750341 |
|
|
Aug 17 07:33:52 PM PDT 24 |
Aug 17 08:03:27 PM PDT 24 |
8880716296 ps |
| T97 |
/workspace/coverage/default/0.chip_sw_sleep_pin_wake.2344627044 |
|
|
Aug 17 07:07:53 PM PDT 24 |
Aug 17 07:11:47 PM PDT 24 |
2668328000 ps |
| T966 |
/workspace/coverage/default/2.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.1375317708 |
|
|
Aug 17 07:25:58 PM PDT 24 |
Aug 17 07:35:50 PM PDT 24 |
3824025292 ps |
| T663 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock_ext_clk_48mhz.899035199 |
|
|
Aug 17 07:24:20 PM PDT 24 |
Aug 17 07:26:17 PM PDT 24 |
2413886584 ps |
| T75 |
/workspace/coverage/default/2.chip_jtag_csr_rw.1017925339 |
|
|
Aug 17 07:18:13 PM PDT 24 |
Aug 17 07:37:36 PM PDT 24 |
10724359107 ps |
| T967 |
/workspace/coverage/default/19.chip_sw_uart_rand_baudrate.1095978176 |
|
|
Aug 17 07:31:00 PM PDT 24 |
Aug 17 07:41:58 PM PDT 24 |
4580612964 ps |
| T732 |
/workspace/coverage/default/15.chip_sw_all_escalation_resets.2292725975 |
|
|
Aug 17 07:34:43 PM PDT 24 |
Aug 17 07:46:40 PM PDT 24 |
5216214590 ps |
| T664 |
/workspace/coverage/default/1.rom_volatile_raw_unlock.761243040 |
|
|
Aug 17 07:20:44 PM PDT 24 |
Aug 17 07:22:39 PM PDT 24 |
1831294230 ps |
| T794 |
/workspace/coverage/default/65.chip_sw_alert_handler_lpg_sleep_mode_alerts.1970365778 |
|
|
Aug 17 07:35:59 PM PDT 24 |
Aug 17 07:44:51 PM PDT 24 |
3627550882 ps |
| T370 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_idle_low_power.2807801194 |
|
|
Aug 17 07:21:49 PM PDT 24 |
Aug 17 07:27:30 PM PDT 24 |
3940977880 ps |
| T968 |
/workspace/coverage/default/0.chip_sw_aes_smoketest.2784899999 |
|
|
Aug 17 07:12:37 PM PDT 24 |
Aug 17 07:17:12 PM PDT 24 |
3143185480 ps |
| T738 |
/workspace/coverage/default/64.chip_sw_all_escalation_resets.2231780740 |
|
|
Aug 17 07:35:15 PM PDT 24 |
Aug 17 07:43:03 PM PDT 24 |
4388424680 ps |
| T969 |
/workspace/coverage/default/0.chip_sw_otbn_ecdsa_op_irq_jitter_en.3277416520 |
|
|
Aug 17 07:09:49 PM PDT 24 |
Aug 17 08:06:54 PM PDT 24 |
19115395252 ps |
| T970 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx.2288005363 |
|
|
Aug 17 07:09:05 PM PDT 24 |
Aug 17 07:19:24 PM PDT 24 |
5003676812 ps |
| T971 |
/workspace/coverage/default/4.chip_sw_aon_timer_sleep_wdog_sleep_pause.223274926 |
|
|
Aug 17 07:29:32 PM PDT 24 |
Aug 17 07:36:20 PM PDT 24 |
6720521176 ps |
| T972 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_test_unlocked0.2775736184 |
|
|
Aug 17 07:05:57 PM PDT 24 |
Aug 17 07:15:34 PM PDT 24 |
4876392520 ps |
| T203 |
/workspace/coverage/default/0.chip_sw_inject_scramble_seed.794399671 |
|
|
Aug 17 07:07:22 PM PDT 24 |
Aug 17 10:18:30 PM PDT 24 |
65810046667 ps |
| T324 |
/workspace/coverage/default/2.chip_plic_all_irqs_20.563562802 |
|
|
Aug 17 07:25:34 PM PDT 24 |
Aug 17 07:38:32 PM PDT 24 |
4654051242 ps |
| T253 |
/workspace/coverage/default/2.chip_sw_plic_sw_irq.1060234665 |
|
|
Aug 17 07:23:57 PM PDT 24 |
Aug 17 07:29:01 PM PDT 24 |
2436838536 ps |
| T795 |
/workspace/coverage/default/64.chip_sw_alert_handler_lpg_sleep_mode_alerts.2305346532 |
|
|
Aug 17 07:36:08 PM PDT 24 |
Aug 17 07:42:03 PM PDT 24 |
3680551950 ps |
| T783 |
/workspace/coverage/default/21.chip_sw_alert_handler_lpg_sleep_mode_alerts.1119693445 |
|
|
Aug 17 07:32:33 PM PDT 24 |
Aug 17 07:38:20 PM PDT 24 |
3409211256 ps |
| T973 |
/workspace/coverage/default/1.chip_sw_uart_smoketest.805694443 |
|
|
Aug 17 07:18:35 PM PDT 24 |
Aug 17 07:21:33 PM PDT 24 |
2620591600 ps |
| T25 |
/workspace/coverage/default/1.chip_sw_gpio.447061239 |
|
|
Aug 17 07:11:28 PM PDT 24 |
Aug 17 07:18:31 PM PDT 24 |
4060255348 ps |
| T974 |
/workspace/coverage/default/2.chip_sw_hmac_enc_idle.1705381 |
|
|
Aug 17 07:31:11 PM PDT 24 |
Aug 17 07:35:04 PM PDT 24 |
2844491510 ps |
| T340 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx2.3291653538 |
|
|
Aug 17 07:06:04 PM PDT 24 |
Aug 17 07:22:08 PM PDT 24 |
4776910792 ps |
| T975 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_prod.3351897529 |
|
|
Aug 17 07:13:50 PM PDT 24 |
Aug 17 07:48:37 PM PDT 24 |
10178797504 ps |
| T976 |
/workspace/coverage/default/0.rom_e2e_asm_init_dev.4229225081 |
|
|
Aug 17 07:12:40 PM PDT 24 |
Aug 17 08:27:45 PM PDT 24 |
15486372001 ps |
| T977 |
/workspace/coverage/default/2.chip_sw_edn_auto_mode.2488461184 |
|
|
Aug 17 07:24:29 PM PDT 24 |
Aug 17 07:41:25 PM PDT 24 |
4432801330 ps |
| T978 |
/workspace/coverage/default/2.chip_sw_aon_timer_smoketest.2533158785 |
|
|
Aug 17 07:27:17 PM PDT 24 |
Aug 17 07:32:02 PM PDT 24 |
3312013736 ps |
| T258 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_rma.3826567765 |
|
|
Aug 17 07:12:00 PM PDT 24 |
Aug 17 07:52:08 PM PDT 24 |
24772019366 ps |
| T743 |
/workspace/coverage/default/29.chip_sw_alert_handler_lpg_sleep_mode_alerts.1964070534 |
|
|
Aug 17 07:35:48 PM PDT 24 |
Aug 17 07:41:47 PM PDT 24 |
3320938440 ps |
| T979 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_lc_signals_prod.67239654 |
|
|
Aug 17 07:08:08 PM PDT 24 |
Aug 17 07:25:51 PM PDT 24 |
8113635640 ps |
| T980 |
/workspace/coverage/default/0.chip_tap_straps_testunlock0.697889411 |
|
|
Aug 17 07:07:12 PM PDT 24 |
Aug 17 07:15:04 PM PDT 24 |
5507277299 ps |
| T352 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en.1471868408 |
|
|
Aug 17 07:05:49 PM PDT 24 |
Aug 17 07:20:08 PM PDT 24 |
4892409784 ps |
| T733 |
/workspace/coverage/default/81.chip_sw_alert_handler_lpg_sleep_mode_alerts.2955616019 |
|
|
Aug 17 07:36:53 PM PDT 24 |
Aug 17 07:43:31 PM PDT 24 |
3960529322 ps |
| T356 |
/workspace/coverage/default/2.chip_sw_pattgen_ios.4269620858 |
|
|
Aug 17 07:18:35 PM PDT 24 |
Aug 17 07:21:41 PM PDT 24 |
2482376444 ps |
| T981 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.3094150391 |
|
|
Aug 17 07:09:38 PM PDT 24 |
Aug 17 07:29:17 PM PDT 24 |
8990457659 ps |
| T982 |
/workspace/coverage/default/2.chip_sw_aes_enc.2732335495 |
|
|
Aug 17 07:23:22 PM PDT 24 |
Aug 17 07:29:04 PM PDT 24 |
3546923716 ps |
| T983 |
/workspace/coverage/default/3.chip_sw_uart_tx_rx_idx3.562951885 |
|
|
Aug 17 07:28:04 PM PDT 24 |
Aug 17 07:39:20 PM PDT 24 |
4415819510 ps |
| T984 |
/workspace/coverage/default/2.chip_sw_otbn_mem_scramble.1025659941 |
|
|
Aug 17 07:24:48 PM PDT 24 |
Aug 17 07:33:57 PM PDT 24 |
4248030516 ps |
| T985 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.3027207419 |
|
|
Aug 17 07:06:53 PM PDT 24 |
Aug 17 07:15:52 PM PDT 24 |
7569715618 ps |
| T986 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_nothing_test_unlocked0.3038156755 |
|
|
Aug 17 07:12:37 PM PDT 24 |
Aug 17 07:59:26 PM PDT 24 |
10905489004 ps |
| T791 |
/workspace/coverage/default/75.chip_sw_all_escalation_resets.2697024932 |
|
|
Aug 17 07:37:43 PM PDT 24 |
Aug 17 07:48:35 PM PDT 24 |
5001599512 ps |
| T987 |
/workspace/coverage/default/2.rom_e2e_keymgr_init_rom_ext_meas.4282176223 |
|
|
Aug 17 07:33:19 PM PDT 24 |
Aug 17 08:27:12 PM PDT 24 |
15581234446 ps |
| T988 |
/workspace/coverage/default/0.chip_sw_flash_crash_alert.886104772 |
|
|
Aug 17 07:11:00 PM PDT 24 |
Aug 17 07:21:20 PM PDT 24 |
5867304986 ps |
| T989 |
/workspace/coverage/default/0.chip_sw_otp_ctrl_dai_lock.1065588478 |
|
|
Aug 17 07:10:07 PM PDT 24 |
Aug 17 08:32:26 PM PDT 24 |
27525380040 ps |
| T990 |
/workspace/coverage/default/2.chip_sw_edn_entropy_reqs.552653704 |
|
|
Aug 17 07:24:39 PM PDT 24 |
Aug 17 07:45:52 PM PDT 24 |
7367853696 ps |
| T71 |
/workspace/coverage/default/0.chip_sw_pwrmgr_deep_sleep_all_wake_ups.3987584361 |
|
|
Aug 17 07:08:43 PM PDT 24 |
Aug 17 07:38:33 PM PDT 24 |
21640020964 ps |
| T991 |
/workspace/coverage/default/11.chip_sw_uart_rand_baudrate.192523074 |
|
|
Aug 17 07:31:18 PM PDT 24 |
Aug 17 08:02:04 PM PDT 24 |
8717564552 ps |
| T992 |
/workspace/coverage/default/4.chip_sw_data_integrity_escalation.953013575 |
|
|
Aug 17 07:29:22 PM PDT 24 |
Aug 17 07:44:29 PM PDT 24 |
6577044144 ps |
| T993 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_rma.2843483066 |
|
|
Aug 17 07:13:40 PM PDT 24 |
Aug 17 08:03:57 PM PDT 24 |
13649999774 ps |
| T994 |
/workspace/coverage/default/2.chip_sw_pwrmgr_smoketest.1772626307 |
|
|
Aug 17 07:28:23 PM PDT 24 |
Aug 17 07:35:44 PM PDT 24 |
4961872176 ps |
| T80 |
/workspace/coverage/default/0.chip_sw_alert_handler_entropy.626345204 |
|
|
Aug 17 07:08:22 PM PDT 24 |
Aug 17 07:14:17 PM PDT 24 |
3843779594 ps |
| T183 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_address_translation.4261417475 |
|
|
Aug 17 07:07:49 PM PDT 24 |
Aug 17 07:12:04 PM PDT 24 |
3481469832 ps |
| T399 |
/workspace/coverage/default/2.chip_sw_aes_masking_off.998683111 |
|
|
Aug 17 07:23:32 PM PDT 24 |
Aug 17 07:29:15 PM PDT 24 |
3815393966 ps |
| T400 |
/workspace/coverage/default/0.chip_sw_usbdev_vbus.530122262 |
|
|
Aug 17 07:07:59 PM PDT 24 |
Aug 17 07:11:13 PM PDT 24 |
2770216796 ps |
| T401 |
/workspace/coverage/default/1.chip_sw_aes_enc.4215315496 |
|
|
Aug 17 07:12:53 PM PDT 24 |
Aug 17 07:17:16 PM PDT 24 |
2666874378 ps |
| T402 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_aes_trans.1985636264 |
|
|
Aug 17 07:13:05 PM PDT 24 |
Aug 17 07:21:30 PM PDT 24 |
6025580596 ps |
| T403 |
/workspace/coverage/default/21.chip_sw_all_escalation_resets.2107607942 |
|
|
Aug 17 07:33:34 PM PDT 24 |
Aug 17 07:44:20 PM PDT 24 |
6179532252 ps |
| T404 |
/workspace/coverage/default/2.chip_sw_hmac_multistream.2155871874 |
|
|
Aug 17 07:23:31 PM PDT 24 |
Aug 17 07:49:10 PM PDT 24 |
7477458550 ps |
| T405 |
/workspace/coverage/default/4.chip_sw_alert_handler_lpg_sleep_mode_alerts.3353971258 |
|
|
Aug 17 07:30:18 PM PDT 24 |
Aug 17 07:36:59 PM PDT 24 |
2994276230 ps |
| T406 |
/workspace/coverage/default/2.chip_sw_pwrmgr_random_sleep_all_reset_reqs.1299393884 |
|
|
Aug 17 07:21:43 PM PDT 24 |
Aug 17 08:02:52 PM PDT 24 |
27702507124 ps |
| T50 |
/workspace/coverage/default/2.chip_sw_alert_test.1379471082 |
|
|
Aug 17 07:25:24 PM PDT 24 |
Aug 17 07:31:53 PM PDT 24 |
3147754410 ps |
| T755 |
/workspace/coverage/default/1.chip_sw_all_escalation_resets.1769799688 |
|
|
Aug 17 07:12:12 PM PDT 24 |
Aug 17 07:25:01 PM PDT 24 |
5624837416 ps |
| T995 |
/workspace/coverage/default/1.rom_e2e_self_hash.851677155 |
|
|
Aug 17 07:23:20 PM PDT 24 |
Aug 17 09:02:14 PM PDT 24 |
25460379352 ps |
| T55 |
/workspace/coverage/default/0.chip_sw_spi_device_pinmux_sleep_retention.2001896236 |
|
|
Aug 17 07:06:33 PM PDT 24 |
Aug 17 07:12:11 PM PDT 24 |
4086951101 ps |
| T996 |
/workspace/coverage/default/2.chip_sw_aon_timer_sleep_wdog_sleep_pause.273825506 |
|
|
Aug 17 07:24:09 PM PDT 24 |
Aug 17 07:34:06 PM PDT 24 |
8440496608 ps |
| T997 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1920001934 |
|
|
Aug 17 07:21:56 PM PDT 24 |
Aug 17 07:30:14 PM PDT 24 |
6046068156 ps |
| T998 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_test_unlocked0.3557172076 |
|
|
Aug 17 07:18:23 PM PDT 24 |
Aug 17 08:42:40 PM PDT 24 |
17766293527 ps |
| T163 |
/workspace/coverage/default/8.chip_sw_alert_handler_lpg_sleep_mode_alerts.3857446188 |
|
|
Aug 17 07:30:39 PM PDT 24 |
Aug 17 07:37:25 PM PDT 24 |
3571476144 ps |
| T784 |
/workspace/coverage/default/14.chip_sw_all_escalation_resets.1437889707 |
|
|
Aug 17 07:31:54 PM PDT 24 |
Aug 17 07:43:17 PM PDT 24 |
6496973600 ps |
| T64 |
/workspace/coverage/default/4.chip_tap_straps_rma.2584442287 |
|
|
Aug 17 07:29:23 PM PDT 24 |
Aug 17 07:37:57 PM PDT 24 |
5143355571 ps |
| T999 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_no_meas.2710517887 |
|
|
Aug 17 07:18:48 PM PDT 24 |
Aug 17 08:11:56 PM PDT 24 |
15181059810 ps |
| T1000 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_prod.2787691955 |
|
|
Aug 17 07:16:55 PM PDT 24 |
Aug 17 07:37:10 PM PDT 24 |
7072742590 ps |
| T1001 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_testunlocks.929098204 |
|
|
Aug 17 07:14:46 PM PDT 24 |
Aug 17 07:48:35 PM PDT 24 |
22225716415 ps |
| T208 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_reset.494796414 |
|
|
Aug 17 07:10:26 PM PDT 24 |
Aug 17 07:41:33 PM PDT 24 |
23841410516 ps |
| T244 |
/workspace/coverage/default/52.chip_sw_all_escalation_resets.209904167 |
|
|
Aug 17 07:35:24 PM PDT 24 |
Aug 17 07:42:11 PM PDT 24 |
4395448000 ps |
| T1002 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en_reduced_freq.3655709018 |
|
|
Aug 17 07:16:49 PM PDT 24 |
Aug 17 07:20:20 PM PDT 24 |
2644904563 ps |
| T1003 |
/workspace/coverage/default/2.chip_sw_aon_timer_wdog_bite_reset.500874066 |
|
|
Aug 17 07:23:45 PM PDT 24 |
Aug 17 07:39:33 PM PDT 24 |
9874508570 ps |
| T740 |
/workspace/coverage/default/50.chip_sw_alert_handler_lpg_sleep_mode_alerts.3495206692 |
|
|
Aug 17 07:35:53 PM PDT 24 |
Aug 17 07:41:47 PM PDT 24 |
3927302946 ps |
| T1004 |
/workspace/coverage/default/0.rom_e2e_shutdown_output.3900207447 |
|
|
Aug 17 07:16:33 PM PDT 24 |
Aug 17 08:12:31 PM PDT 24 |
27173193305 ps |
| T1005 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_test_unlocked0.1202300044 |
|
|
Aug 17 07:21:22 PM PDT 24 |
Aug 17 07:33:02 PM PDT 24 |
4486877458 ps |
| T362 |
/workspace/coverage/default/1.chip_sw_hmac_enc_jitter_en.722093128 |
|
|
Aug 17 07:11:34 PM PDT 24 |
Aug 17 07:16:38 PM PDT 24 |
2746152496 ps |
| T218 |
/workspace/coverage/default/2.chip_sw_gpio_smoketest.3989732291 |
|
|
Aug 17 07:29:25 PM PDT 24 |
Aug 17 07:33:55 PM PDT 24 |
3062780209 ps |
| T1006 |
/workspace/coverage/default/2.chip_sw_alert_handler_ping_ok.3813499837 |
|
|
Aug 17 07:23:19 PM PDT 24 |
Aug 17 07:45:07 PM PDT 24 |
8060823836 ps |
| T1007 |
/workspace/coverage/default/42.chip_sw_alert_handler_lpg_sleep_mode_alerts.2393702221 |
|
|
Aug 17 07:34:06 PM PDT 24 |
Aug 17 07:41:00 PM PDT 24 |
3764606864 ps |
| T58 |
/workspace/coverage/default/1.chip_sw_sleep_pin_wake.3883211567 |
|
|
Aug 17 07:13:41 PM PDT 24 |
Aug 17 07:18:29 PM PDT 24 |
3535470784 ps |
| T425 |
/workspace/coverage/default/1.chip_sw_alert_handler_lpg_sleep_mode_alerts.2353668243 |
|
|
Aug 17 07:11:50 PM PDT 24 |
Aug 17 07:18:11 PM PDT 24 |
3083342140 ps |
| T426 |
/workspace/coverage/default/98.chip_sw_all_escalation_resets.2494190488 |
|
|
Aug 17 07:38:51 PM PDT 24 |
Aug 17 07:45:56 PM PDT 24 |
4307073176 ps |
| T427 |
/workspace/coverage/default/0.rom_e2e_asm_init_prod_end.3336703125 |
|
|
Aug 17 07:15:51 PM PDT 24 |
Aug 17 08:33:41 PM PDT 24 |
15575873769 ps |
| T428 |
/workspace/coverage/default/6.chip_sw_uart_rand_baudrate.1036875425 |
|
|
Aug 17 07:31:01 PM PDT 24 |
Aug 17 07:56:20 PM PDT 24 |
9094728542 ps |
| T363 |
/workspace/coverage/default/2.chip_sw_hmac_enc.350548307 |
|
|
Aug 17 07:31:49 PM PDT 24 |
Aug 17 07:34:59 PM PDT 24 |
2777165350 ps |
| T429 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_kmac.2477542039 |
|
|
Aug 17 07:14:01 PM PDT 24 |
Aug 17 07:56:28 PM PDT 24 |
12881105212 ps |
| T38 |
/workspace/coverage/default/1.chip_sw_spi_device_tpm.989542975 |
|
|
Aug 17 07:10:36 PM PDT 24 |
Aug 17 07:16:29 PM PDT 24 |
2718479535 ps |
| T430 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_idx3.3846895038 |
|
|
Aug 17 07:13:06 PM PDT 24 |
Aug 17 07:26:19 PM PDT 24 |
4062517878 ps |
| T98 |
/workspace/coverage/default/2.chip_sw_pwrmgr_deep_sleep_all_wake_ups.2292940012 |
|
|
Aug 17 07:26:25 PM PDT 24 |
Aug 17 08:00:28 PM PDT 24 |
25679479996 ps |
| T1008 |
/workspace/coverage/default/0.chip_sw_otbn_randomness.2547911932 |
|
|
Aug 17 07:08:32 PM PDT 24 |
Aug 17 07:27:56 PM PDT 24 |
5217838604 ps |
| T1009 |
/workspace/coverage/default/5.chip_sw_data_integrity_escalation.2444819615 |
|
|
Aug 17 07:30:08 PM PDT 24 |
Aug 17 07:43:09 PM PDT 24 |
5906214668 ps |
| T802 |
/workspace/coverage/default/71.chip_sw_alert_handler_lpg_sleep_mode_alerts.3887533724 |
|
|
Aug 17 07:36:31 PM PDT 24 |
Aug 17 07:43:47 PM PDT 24 |
3370931320 ps |
| T1010 |
/workspace/coverage/default/2.chip_sw_hmac_enc_jitter_en.380465625 |
|
|
Aug 17 07:23:51 PM PDT 24 |
Aug 17 07:28:54 PM PDT 24 |
2733756088 ps |
| T1011 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_testunlocks.3587860815 |
|
|
Aug 17 07:20:53 PM PDT 24 |
Aug 17 07:55:39 PM PDT 24 |
31583828014 ps |
| T1012 |
/workspace/coverage/default/2.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.3222664371 |
|
|
Aug 17 07:25:04 PM PDT 24 |
Aug 17 07:35:47 PM PDT 24 |
19017902948 ps |
| T1013 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_reset.513280618 |
|
|
Aug 17 07:10:18 PM PDT 24 |
Aug 17 07:29:10 PM PDT 24 |
21949753112 ps |
| T1014 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_access_jitter_en.1326476623 |
|
|
Aug 17 07:07:28 PM PDT 24 |
Aug 17 07:24:39 PM PDT 24 |
6120503429 ps |
| T1015 |
/workspace/coverage/default/1.chip_sw_pwrmgr_deep_sleep_power_glitch_reset.1616757862 |
|
|
Aug 17 07:20:13 PM PDT 24 |
Aug 17 07:28:07 PM PDT 24 |
7185960454 ps |
| T1016 |
/workspace/coverage/default/1.chip_sw_aes_enc_jitter_en.1689316025 |
|
|
Aug 17 07:12:02 PM PDT 24 |
Aug 17 07:16:32 PM PDT 24 |
2499130275 ps |
| T1017 |
/workspace/coverage/default/1.chip_sw_edn_entropy_reqs_jitter.3154289501 |
|
|
Aug 17 07:14:01 PM PDT 24 |
Aug 17 07:30:52 PM PDT 24 |
5181268321 ps |
| T259 |
/workspace/coverage/default/0.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.2919851754 |
|
|
Aug 17 07:07:09 PM PDT 24 |
Aug 17 07:15:19 PM PDT 24 |
4479995180 ps |
| T519 |
/workspace/coverage/default/0.chip_sw_pwrmgr_all_reset_reqs.4075571647 |
|
|
Aug 17 07:08:38 PM PDT 24 |
Aug 17 07:42:20 PM PDT 24 |
11975007697 ps |
| T1018 |
/workspace/coverage/default/4.chip_sw_csrng_edn_concurrency.2242168787 |
|
|
Aug 17 07:29:20 PM PDT 24 |
Aug 17 08:52:44 PM PDT 24 |
22521052604 ps |
| T377 |
/workspace/coverage/default/30.chip_sw_all_escalation_resets.2538880226 |
|
|
Aug 17 07:32:52 PM PDT 24 |
Aug 17 07:44:42 PM PDT 24 |
4871294528 ps |
| T52 |
/workspace/coverage/default/1.chip_sw_sleep_pin_retention.2659905457 |
|
|
Aug 17 07:09:55 PM PDT 24 |
Aug 17 07:15:06 PM PDT 24 |
4044661470 ps |
| T808 |
/workspace/coverage/default/7.chip_sw_all_escalation_resets.1665300641 |
|
|
Aug 17 07:31:05 PM PDT 24 |
Aug 17 07:40:01 PM PDT 24 |
5058523704 ps |
| T1019 |
/workspace/coverage/default/1.chip_sw_pwrmgr_smoketest.949383475 |
|
|
Aug 17 07:17:43 PM PDT 24 |
Aug 17 07:24:17 PM PDT 24 |
6081804320 ps |
| T1020 |
/workspace/coverage/default/2.chip_tap_straps_testunlock0.1060396239 |
|
|
Aug 17 07:25:57 PM PDT 24 |
Aug 17 07:35:00 PM PDT 24 |
6233544452 ps |
| T1021 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access.1299370807 |
|
|
Aug 17 07:11:12 PM PDT 24 |
Aug 17 07:30:55 PM PDT 24 |
6438080696 ps |
| T169 |
/workspace/coverage/default/57.chip_sw_all_escalation_resets.2083675051 |
|
|
Aug 17 07:34:23 PM PDT 24 |
Aug 17 07:43:09 PM PDT 24 |
4184506852 ps |
| T411 |
/workspace/coverage/default/2.chip_sw_pwrmgr_usbdev_smoketest.3449143407 |
|
|
Aug 17 07:29:33 PM PDT 24 |
Aug 17 07:38:53 PM PDT 24 |
5250961676 ps |
| T81 |
/workspace/coverage/default/1.chip_sw_alert_handler_reverse_ping_in_deep_sleep.1901445689 |
|
|
Aug 17 07:17:04 PM PDT 24 |
Aug 17 10:47:57 PM PDT 24 |
254455076238 ps |
| T772 |
/workspace/coverage/default/77.chip_sw_all_escalation_resets.1090614668 |
|
|
Aug 17 07:37:32 PM PDT 24 |
Aug 17 07:47:32 PM PDT 24 |
5241008600 ps |
| T729 |
/workspace/coverage/default/80.chip_sw_alert_handler_lpg_sleep_mode_alerts.470110278 |
|
|
Aug 17 07:37:59 PM PDT 24 |
Aug 17 07:45:08 PM PDT 24 |
3737026260 ps |
| T1022 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_sleep_mode_alerts.3154691533 |
|
|
Aug 17 07:25:35 PM PDT 24 |
Aug 17 07:33:40 PM PDT 24 |
3636225494 ps |
| T412 |
/workspace/coverage/default/0.chip_sw_usb_ast_clk_calib.3328088075 |
|
|
Aug 17 07:08:01 PM PDT 24 |
Aug 17 07:13:07 PM PDT 24 |
3251902126 ps |
| T145 |
/workspace/coverage/default/1.chip_sw_sensor_ctrl_status.1366238397 |
|
|
Aug 17 07:13:26 PM PDT 24 |
Aug 17 07:16:20 PM PDT 24 |
2441398807 ps |
| T1023 |
/workspace/coverage/default/0.chip_sw_uart_tx_rx_alt_clk_freq.1889361465 |
|
|
Aug 17 07:09:29 PM PDT 24 |
Aug 17 07:37:56 PM PDT 24 |
8320806325 ps |
| T1024 |
/workspace/coverage/default/0.chip_sw_csrng_edn_concurrency.1944087195 |
|
|
Aug 17 07:08:19 PM PDT 24 |
Aug 17 08:17:46 PM PDT 24 |
17558775296 ps |
| T1025 |
/workspace/coverage/default/1.chip_tap_straps_rma.454340747 |
|
|
Aug 17 07:15:27 PM PDT 24 |
Aug 17 07:28:22 PM PDT 24 |
7563130126 ps |
| T712 |
/workspace/coverage/default/0.rom_e2e_jtag_debug_dev.3688532632 |
|
|
Aug 17 07:13:35 PM PDT 24 |
Aug 17 07:48:16 PM PDT 24 |
11538282134 ps |
| T769 |
/workspace/coverage/default/54.chip_sw_alert_handler_lpg_sleep_mode_alerts.2565807312 |
|
|
Aug 17 07:36:40 PM PDT 24 |
Aug 17 07:42:56 PM PDT 24 |
3720230280 ps |
| T146 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_status.728386995 |
|
|
Aug 17 07:28:59 PM PDT 24 |
Aug 17 07:35:21 PM PDT 24 |
2269553989 ps |
| T1026 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_test_unlocked0.1533016521 |
|
|
Aug 17 07:12:12 PM PDT 24 |
Aug 17 07:56:31 PM PDT 24 |
11411560888 ps |
| T1027 |
/workspace/coverage/default/2.chip_sw_clkmgr_jitter.3607265924 |
|
|
Aug 17 07:26:13 PM PDT 24 |
Aug 17 07:30:01 PM PDT 24 |
2349644872 ps |
| T1028 |
/workspace/coverage/default/4.chip_tap_straps_prod.3896673193 |
|
|
Aug 17 07:28:57 PM PDT 24 |
Aug 17 07:48:27 PM PDT 24 |
11553236428 ps |
| T1029 |
/workspace/coverage/default/1.chip_sw_uart_tx_rx_alt_clk_freq.2114639299 |
|
|
Aug 17 07:10:17 PM PDT 24 |
Aug 17 07:40:53 PM PDT 24 |
8585237977 ps |
| T678 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sleep_disabled.1600058061 |
|
|
Aug 17 07:11:26 PM PDT 24 |
Aug 17 07:15:45 PM PDT 24 |
3465566200 ps |
| T1030 |
/workspace/coverage/default/0.rom_e2e_static_critical.423971642 |
|
|
Aug 17 07:14:33 PM PDT 24 |
Aug 17 08:27:36 PM PDT 24 |
16874771012 ps |
| T1031 |
/workspace/coverage/default/0.rom_keymgr_functest.2993147171 |
|
|
Aug 17 07:13:02 PM PDT 24 |
Aug 17 07:23:09 PM PDT 24 |
4446326540 ps |
| T1032 |
/workspace/coverage/default/2.chip_sw_entropy_src_smoketest.1568124043 |
|
|
Aug 17 07:27:55 PM PDT 24 |
Aug 17 07:35:50 PM PDT 24 |
3141831720 ps |
| T759 |
/workspace/coverage/default/91.chip_sw_all_escalation_resets.1236574172 |
|
|
Aug 17 07:37:36 PM PDT 24 |
Aug 17 07:44:52 PM PDT 24 |
4217809128 ps |
| T1033 |
/workspace/coverage/default/41.chip_sw_all_escalation_resets.959974388 |
|
|
Aug 17 07:34:28 PM PDT 24 |
Aug 17 07:45:54 PM PDT 24 |
6425937960 ps |
| T717 |
/workspace/coverage/default/96.chip_sw_all_escalation_resets.254271973 |
|
|
Aug 17 07:38:08 PM PDT 24 |
Aug 17 07:46:18 PM PDT 24 |
5556940748 ps |