| T804 |
/workspace/coverage/default/19.chip_sw_all_escalation_resets.3332377427 |
|
|
Aug 17 07:34:04 PM PDT 24 |
Aug 17 07:45:08 PM PDT 24 |
5467480012 ps |
| T245 |
/workspace/coverage/default/59.chip_sw_all_escalation_resets.3818538073 |
|
|
Aug 17 07:36:21 PM PDT 24 |
Aug 17 07:44:59 PM PDT 24 |
5136133120 ps |
| T789 |
/workspace/coverage/default/67.chip_sw_alert_handler_lpg_sleep_mode_alerts.896653488 |
|
|
Aug 17 07:36:14 PM PDT 24 |
Aug 17 07:41:31 PM PDT 24 |
3310646712 ps |
| T1034 |
/workspace/coverage/default/0.chip_sw_clkmgr_jitter_reduced_freq.3013269725 |
|
|
Aug 17 07:08:15 PM PDT 24 |
Aug 17 07:11:13 PM PDT 24 |
2278305227 ps |
| T230 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_otbn.2774480180 |
|
|
Aug 17 07:07:11 PM PDT 24 |
Aug 17 08:32:04 PM PDT 24 |
14334758760 ps |
| T1035 |
/workspace/coverage/default/2.chip_sw_rstmgr_sw_rst.81102534 |
|
|
Aug 17 07:21:19 PM PDT 24 |
Aug 17 07:25:27 PM PDT 24 |
2429098040 ps |
| T1036 |
/workspace/coverage/default/0.chip_sw_example_concurrency.2259347229 |
|
|
Aug 17 07:05:14 PM PDT 24 |
Aug 17 07:08:42 PM PDT 24 |
2176423560 ps |
| T1037 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.353130374 |
|
|
Aug 17 07:26:11 PM PDT 24 |
Aug 17 07:31:00 PM PDT 24 |
2688888561 ps |
| T228 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_aes.2631444313 |
|
|
Aug 17 07:24:18 PM PDT 24 |
Aug 17 07:48:58 PM PDT 24 |
9249236312 ps |
| T1038 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_rma.1925046904 |
|
|
Aug 17 07:20:58 PM PDT 24 |
Aug 17 07:41:08 PM PDT 24 |
7856303144 ps |
| T731 |
/workspace/coverage/default/62.chip_sw_all_escalation_resets.3820406273 |
|
|
Aug 17 07:36:40 PM PDT 24 |
Aug 17 07:47:42 PM PDT 24 |
5972857846 ps |
| T255 |
/workspace/coverage/default/2.chip_sw_rv_timer_irq.1969855328 |
|
|
Aug 17 07:21:53 PM PDT 24 |
Aug 17 07:28:01 PM PDT 24 |
2672027522 ps |
| T347 |
/workspace/coverage/default/2.chip_sw_i2c_device_tx_rx.1663438445 |
|
|
Aug 17 07:20:35 PM PDT 24 |
Aug 17 07:29:09 PM PDT 24 |
3639046144 ps |
| T1039 |
/workspace/coverage/default/2.chip_sw_aes_idle.2378655858 |
|
|
Aug 17 07:25:15 PM PDT 24 |
Aug 17 07:28:43 PM PDT 24 |
3137144532 ps |
| T1040 |
/workspace/coverage/default/0.chip_sival_flash_info_access.2083275595 |
|
|
Aug 17 07:06:21 PM PDT 24 |
Aug 17 07:11:32 PM PDT 24 |
3034946194 ps |
| T307 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_execution_main.3522428420 |
|
|
Aug 17 07:25:00 PM PDT 24 |
Aug 17 07:41:05 PM PDT 24 |
8472665753 ps |
| T786 |
/workspace/coverage/default/43.chip_sw_alert_handler_lpg_sleep_mode_alerts.1059559738 |
|
|
Aug 17 07:34:30 PM PDT 24 |
Aug 17 07:40:03 PM PDT 24 |
3995198530 ps |
| T231 |
/workspace/coverage/default/1.chip_sw_keymgr_sideload_otbn.3100559166 |
|
|
Aug 17 07:12:40 PM PDT 24 |
Aug 17 08:19:06 PM PDT 24 |
16886037800 ps |
| T656 |
/workspace/coverage/default/1.chip_sw_csrng_edn_concurrency_reduced_freq.4249608191 |
|
|
Aug 17 07:17:57 PM PDT 24 |
Aug 17 10:58:33 PM PDT 24 |
93266633627 ps |
| T35 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ulp_z3_wakeup.3102126199 |
|
|
Aug 17 07:24:39 PM PDT 24 |
Aug 17 07:33:35 PM PDT 24 |
5602436260 ps |
| T1041 |
/workspace/coverage/default/1.chip_sw_clkmgr_off_peri.1844789114 |
|
|
Aug 17 07:14:32 PM PDT 24 |
Aug 17 07:38:42 PM PDT 24 |
11474835500 ps |
| T1042 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_kmac.1925834227 |
|
|
Aug 17 07:09:22 PM PDT 24 |
Aug 17 07:39:41 PM PDT 24 |
9438370104 ps |
| T1043 |
/workspace/coverage/default/1.chip_sw_hmac_smoketest.3335132513 |
|
|
Aug 17 07:17:50 PM PDT 24 |
Aug 17 07:23:14 PM PDT 24 |
2485176126 ps |
| T1044 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_smoketest.3963352465 |
|
|
Aug 17 07:27:01 PM PDT 24 |
Aug 17 07:31:54 PM PDT 24 |
3051994256 ps |
| T349 |
/workspace/coverage/default/0.chip_sw_pwrmgr_lowpower_cancel.2327846070 |
|
|
Aug 17 07:10:07 PM PDT 24 |
Aug 17 07:17:59 PM PDT 24 |
3853369320 ps |
| T1045 |
/workspace/coverage/default/2.chip_sw_clkmgr_off_otbn_trans.881397831 |
|
|
Aug 17 07:24:48 PM PDT 24 |
Aug 17 07:33:20 PM PDT 24 |
4660639244 ps |
| T725 |
/workspace/coverage/default/59.chip_sw_alert_handler_lpg_sleep_mode_alerts.162290383 |
|
|
Aug 17 07:36:20 PM PDT 24 |
Aug 17 07:42:13 PM PDT 24 |
3925016096 ps |
| T1046 |
/workspace/coverage/default/1.chip_sw_aes_entropy.1243909275 |
|
|
Aug 17 07:15:20 PM PDT 24 |
Aug 17 07:18:24 PM PDT 24 |
3081236090 ps |
| T1047 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation_jitter_en_reduced_freq.86339426 |
|
|
Aug 17 07:17:35 PM PDT 24 |
Aug 17 07:43:47 PM PDT 24 |
10261700542 ps |
| T1048 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_slow_dev.2155337920 |
|
|
Aug 17 07:16:04 PM PDT 24 |
Aug 17 07:27:39 PM PDT 24 |
5375134500 ps |
| T1049 |
/workspace/coverage/default/8.chip_sw_uart_rand_baudrate.1023427780 |
|
|
Aug 17 07:30:18 PM PDT 24 |
Aug 17 08:06:15 PM PDT 24 |
13077624320 ps |
| T679 |
/workspace/coverage/default/1.chip_sw_pwrmgr_sleep_disabled.479634105 |
|
|
Aug 17 07:19:54 PM PDT 24 |
Aug 17 07:24:35 PM PDT 24 |
2975196216 ps |
| T133 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_sensor_ctrl_alert_wakeup.317846819 |
|
|
Aug 17 07:25:14 PM PDT 24 |
Aug 17 07:32:50 PM PDT 24 |
5396774158 ps |
| T1050 |
/workspace/coverage/default/2.chip_sw_clkmgr_reset_frequency.567451952 |
|
|
Aug 17 07:24:59 PM PDT 24 |
Aug 17 07:31:31 PM PDT 24 |
3370672952 ps |
| T1051 |
/workspace/coverage/default/1.chip_sw_example_rom.1723209843 |
|
|
Aug 17 07:07:36 PM PDT 24 |
Aug 17 07:09:27 PM PDT 24 |
1787613448 ps |
| T1052 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_clock_freqs.91390380 |
|
|
Aug 17 07:10:58 PM PDT 24 |
Aug 17 07:28:57 PM PDT 24 |
6243444456 ps |
| T1053 |
/workspace/coverage/default/0.rom_e2e_smoke.2045883272 |
|
|
Aug 17 07:18:00 PM PDT 24 |
Aug 17 08:25:40 PM PDT 24 |
14779689120 ps |
| T1054 |
/workspace/coverage/default/16.chip_sw_uart_rand_baudrate.2852024287 |
|
|
Aug 17 07:34:05 PM PDT 24 |
Aug 17 07:41:06 PM PDT 24 |
3597246560 ps |
| T1055 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_volatile_raw_unlock.440397689 |
|
|
Aug 17 07:21:03 PM PDT 24 |
Aug 17 07:23:04 PM PDT 24 |
2063896994 ps |
| T1056 |
/workspace/coverage/default/2.chip_sw_otbn_smoketest.2956209143 |
|
|
Aug 17 07:28:20 PM PDT 24 |
Aug 17 07:54:26 PM PDT 24 |
8456264850 ps |
| T1057 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency.653039616 |
|
|
Aug 17 07:24:02 PM PDT 24 |
Aug 17 08:30:15 PM PDT 24 |
17433900680 ps |
| T659 |
/workspace/coverage/default/1.chip_sw_rv_dm_access_after_escalation_reset.1004240486 |
|
|
Aug 17 07:16:20 PM PDT 24 |
Aug 17 07:25:56 PM PDT 24 |
5490061146 ps |
| T1058 |
/workspace/coverage/default/1.rom_e2e_keymgr_init_rom_ext_meas.320338378 |
|
|
Aug 17 07:21:22 PM PDT 24 |
Aug 17 08:21:14 PM PDT 24 |
14851871184 ps |
| T1059 |
/workspace/coverage/default/1.chip_sw_example_concurrency.1981927589 |
|
|
Aug 17 07:10:05 PM PDT 24 |
Aug 17 07:13:49 PM PDT 24 |
2625197476 ps |
| T692 |
/workspace/coverage/default/2.chip_sw_alert_handler_lpg_clkoff.558382328 |
|
|
Aug 17 07:24:09 PM PDT 24 |
Aug 17 07:51:48 PM PDT 24 |
8534775016 ps |
| T719 |
/workspace/coverage/default/54.chip_sw_all_escalation_resets.2680359605 |
|
|
Aug 17 07:36:44 PM PDT 24 |
Aug 17 07:46:56 PM PDT 24 |
6096357412 ps |
| T1060 |
/workspace/coverage/default/0.chip_sw_lc_ctrl_rand_to_scrap.1493318078 |
|
|
Aug 17 07:09:15 PM PDT 24 |
Aug 17 07:11:51 PM PDT 24 |
3148724468 ps |
| T1061 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx2.1468595578 |
|
|
Aug 17 07:35:35 PM PDT 24 |
Aug 17 07:44:10 PM PDT 24 |
3745691840 ps |
| T279 |
/workspace/coverage/default/1.chip_sw_data_integrity_escalation.926362558 |
|
|
Aug 17 07:10:38 PM PDT 24 |
Aug 17 07:24:18 PM PDT 24 |
5500395648 ps |
| T280 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx1.2631236836 |
|
|
Aug 17 07:20:57 PM PDT 24 |
Aug 17 07:33:03 PM PDT 24 |
4570954828 ps |
| T281 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_rand_to_scrap.2692007621 |
|
|
Aug 17 07:23:19 PM PDT 24 |
Aug 17 07:27:41 PM PDT 24 |
3273180369 ps |
| T282 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sysrst_ctrl_reset.4055576206 |
|
|
Aug 17 07:07:29 PM PDT 24 |
Aug 17 07:24:15 PM PDT 24 |
6670216708 ps |
| T82 |
/workspace/coverage/default/0.chip_sw_alert_handler_lpg_sleep_mode_pings.2898580645 |
|
|
Aug 17 07:13:47 PM PDT 24 |
Aug 17 07:35:10 PM PDT 24 |
10994461934 ps |
| T283 |
/workspace/coverage/default/2.rom_e2e_asm_init_prod.2301085945 |
|
|
Aug 17 07:31:24 PM PDT 24 |
Aug 17 08:29:15 PM PDT 24 |
15120046537 ps |
| T284 |
/workspace/coverage/default/1.chip_sw_otbn_smoketest.2653903385 |
|
|
Aug 17 07:19:32 PM PDT 24 |
Aug 17 07:33:40 PM PDT 24 |
5686251012 ps |
| T285 |
/workspace/coverage/default/2.chip_sw_otp_ctrl_lc_signals_prod.1299720098 |
|
|
Aug 17 07:20:27 PM PDT 24 |
Aug 17 07:42:07 PM PDT 24 |
8328354600 ps |
| T286 |
/workspace/coverage/default/78.chip_sw_alert_handler_lpg_sleep_mode_alerts.2131854595 |
|
|
Aug 17 07:37:34 PM PDT 24 |
Aug 17 07:44:04 PM PDT 24 |
3943574740 ps |
| T287 |
/workspace/coverage/default/2.chip_sw_csrng_edn_concurrency_reduced_freq.2978470962 |
|
|
Aug 17 07:27:53 PM PDT 24 |
Aug 18 12:23:05 AM PDT 24 |
132465682167 ps |
| T184 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_address_translation.3664703407 |
|
|
Aug 17 07:23:22 PM PDT 24 |
Aug 17 07:28:35 PM PDT 24 |
2968404184 ps |
| T166 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_vendor_test_csr_access.3375884628 |
|
|
Aug 17 07:18:15 PM PDT 24 |
Aug 17 07:20:20 PM PDT 24 |
2377848400 ps |
| T1062 |
/workspace/coverage/default/2.rom_e2e_asm_init_dev.3630728860 |
|
|
Aug 17 07:32:03 PM PDT 24 |
Aug 17 08:49:23 PM PDT 24 |
15699500011 ps |
| T1063 |
/workspace/coverage/default/2.chip_sw_clkmgr_smoketest.3214772063 |
|
|
Aug 17 07:30:32 PM PDT 24 |
Aug 17 07:33:54 PM PDT 24 |
2792037176 ps |
| T1064 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_write_clear.282533933 |
|
|
Aug 17 07:14:34 PM PDT 24 |
Aug 17 07:19:42 PM PDT 24 |
3452584498 ps |
| T1065 |
/workspace/coverage/default/0.chip_sw_kmac_mode_kmac_jitter_en_reduced_freq.508412077 |
|
|
Aug 17 07:08:22 PM PDT 24 |
Aug 17 07:13:03 PM PDT 24 |
2795062879 ps |
| T1066 |
/workspace/coverage/default/1.chip_sw_rv_timer_smoketest.716766648 |
|
|
Aug 17 07:19:33 PM PDT 24 |
Aug 17 07:24:28 PM PDT 24 |
3235588344 ps |
| T1067 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_dev.3520628387 |
|
|
Aug 17 07:11:02 PM PDT 24 |
Aug 17 07:36:45 PM PDT 24 |
8403627338 ps |
| T57 |
/workspace/coverage/default/2.chip_sw_sleep_pin_wake.3776108894 |
|
|
Aug 17 07:19:37 PM PDT 24 |
Aug 17 07:28:57 PM PDT 24 |
6120984122 ps |
| T421 |
/workspace/coverage/default/1.chip_tap_straps_testunlock0.1244908063 |
|
|
Aug 17 07:17:05 PM PDT 24 |
Aug 17 07:26:05 PM PDT 24 |
5447105497 ps |
| T264 |
/workspace/coverage/default/0.chip_sw_rstmgr_cpu_info.3827109122 |
|
|
Aug 17 07:05:54 PM PDT 24 |
Aug 17 07:12:51 PM PDT 24 |
5210276652 ps |
| T422 |
/workspace/coverage/default/1.chip_sw_sleep_sram_ret_contents_scramble.1842159980 |
|
|
Aug 17 07:13:38 PM PDT 24 |
Aug 17 07:25:11 PM PDT 24 |
8948502696 ps |
| T365 |
/workspace/coverage/default/1.chip_sw_pattgen_ios.418664139 |
|
|
Aug 17 07:13:40 PM PDT 24 |
Aug 17 07:17:36 PM PDT 24 |
2799524262 ps |
| T423 |
/workspace/coverage/default/1.rom_e2e_asm_init_dev.325997045 |
|
|
Aug 17 07:21:56 PM PDT 24 |
Aug 17 08:16:02 PM PDT 24 |
15332679205 ps |
| T160 |
/workspace/coverage/default/1.chip_plic_all_irqs_10.4150621040 |
|
|
Aug 17 07:15:03 PM PDT 24 |
Aug 17 07:26:36 PM PDT 24 |
3671378560 ps |
| T139 |
/workspace/coverage/default/3.chip_sw_sensor_ctrl_alert.824479562 |
|
|
Aug 17 07:27:31 PM PDT 24 |
Aug 17 07:34:37 PM PDT 24 |
4562452028 ps |
| T381 |
/workspace/coverage/default/0.chip_sw_pwrmgr_sensor_ctrl_deep_sleep_wake_up.2621897566 |
|
|
Aug 17 07:06:14 PM PDT 24 |
Aug 17 07:12:35 PM PDT 24 |
6092978040 ps |
| T424 |
/workspace/coverage/default/2.chip_sw_pwrmgr_sleep_disabled.203054037 |
|
|
Aug 17 07:24:30 PM PDT 24 |
Aug 17 07:28:18 PM PDT 24 |
2649556326 ps |
| T1068 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_outputs.2525281725 |
|
|
Aug 17 07:07:47 PM PDT 24 |
Aug 17 07:13:40 PM PDT 24 |
4093608264 ps |
| T235 |
/workspace/coverage/default/2.chip_sw_lc_walkthrough_dev.3311511043 |
|
|
Aug 17 07:21:51 PM PDT 24 |
Aug 17 08:45:21 PM PDT 24 |
51399505289 ps |
| T109 |
/workspace/coverage/default/1.chip_sw_pwrmgr_random_sleep_all_wake_ups.154252079 |
|
|
Aug 17 07:15:59 PM PDT 24 |
Aug 17 07:40:30 PM PDT 24 |
22843793290 ps |
| T173 |
/workspace/coverage/default/1.chip_sw_lc_ctrl_program_error.2308897839 |
|
|
Aug 17 07:16:08 PM PDT 24 |
Aug 17 07:24:05 PM PDT 24 |
4702187780 ps |
| T763 |
/workspace/coverage/default/22.chip_sw_alert_handler_lpg_sleep_mode_alerts.1208462223 |
|
|
Aug 17 07:31:27 PM PDT 24 |
Aug 17 07:37:01 PM PDT 24 |
3623605200 ps |
| T1069 |
/workspace/coverage/default/3.chip_tap_straps_testunlock0.325335170 |
|
|
Aug 17 07:28:33 PM PDT 24 |
Aug 17 07:38:51 PM PDT 24 |
6758667057 ps |
| T1070 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.3635495688 |
|
|
Aug 17 07:16:50 PM PDT 24 |
Aug 17 07:36:16 PM PDT 24 |
7083978625 ps |
| T1071 |
/workspace/coverage/default/15.chip_sw_uart_rand_baudrate.699329039 |
|
|
Aug 17 07:32:42 PM PDT 24 |
Aug 17 07:42:23 PM PDT 24 |
3786488872 ps |
| T1072 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation_jitter_en.2025481763 |
|
|
Aug 17 07:24:11 PM PDT 24 |
Aug 17 07:49:15 PM PDT 24 |
8030608293 ps |
| T1073 |
/workspace/coverage/default/0.chip_sw_pwrmgr_b2b_sleep_reset_req.4102897443 |
|
|
Aug 17 07:08:15 PM PDT 24 |
Aug 17 07:42:14 PM PDT 24 |
22366106154 ps |
| T1074 |
/workspace/coverage/default/2.chip_sw_lc_ctrl_transition.471945527 |
|
|
Aug 17 07:20:27 PM PDT 24 |
Aug 17 07:39:44 PM PDT 24 |
13152840229 ps |
| T237 |
/workspace/coverage/default/1.chip_sw_lc_walkthrough_dev.2417468183 |
|
|
Aug 17 07:12:50 PM PDT 24 |
Aug 17 08:47:15 PM PDT 24 |
48184645083 ps |
| T730 |
/workspace/coverage/default/37.chip_sw_alert_handler_lpg_sleep_mode_alerts.3681299786 |
|
|
Aug 17 07:34:14 PM PDT 24 |
Aug 17 07:41:34 PM PDT 24 |
4328824660 ps |
| T753 |
/workspace/coverage/default/76.chip_sw_alert_handler_lpg_sleep_mode_alerts.1742317120 |
|
|
Aug 17 07:39:39 PM PDT 24 |
Aug 17 07:44:44 PM PDT 24 |
3790968848 ps |
| T788 |
/workspace/coverage/default/86.chip_sw_alert_handler_lpg_sleep_mode_alerts.765763457 |
|
|
Aug 17 07:39:58 PM PDT 24 |
Aug 17 07:45:09 PM PDT 24 |
4579548300 ps |
| T1075 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_idx3.634883058 |
|
|
Aug 17 07:30:54 PM PDT 24 |
Aug 17 07:40:17 PM PDT 24 |
4335429944 ps |
| T723 |
/workspace/coverage/default/39.chip_sw_alert_handler_lpg_sleep_mode_alerts.1101931075 |
|
|
Aug 17 07:34:16 PM PDT 24 |
Aug 17 07:40:47 PM PDT 24 |
4281210746 ps |
| T1076 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_rnd.2438733108 |
|
|
Aug 17 07:12:14 PM PDT 24 |
Aug 17 07:31:33 PM PDT 24 |
5669977284 ps |
| T1077 |
/workspace/coverage/default/1.chip_sw_kmac_idle.1364354371 |
|
|
Aug 17 07:13:41 PM PDT 24 |
Aug 17 07:17:43 PM PDT 24 |
3355381156 ps |
| T1078 |
/workspace/coverage/default/0.chip_sw_hmac_enc_idle.214899429 |
|
|
Aug 17 07:08:41 PM PDT 24 |
Aug 17 07:12:43 PM PDT 24 |
3268007390 ps |
| T800 |
/workspace/coverage/default/24.chip_sw_alert_handler_lpg_sleep_mode_alerts.206100810 |
|
|
Aug 17 07:34:40 PM PDT 24 |
Aug 17 07:40:36 PM PDT 24 |
3511991096 ps |
| T1079 |
/workspace/coverage/default/2.chip_sw_csrng_smoketest.2104633025 |
|
|
Aug 17 07:27:39 PM PDT 24 |
Aug 17 07:32:40 PM PDT 24 |
2467779952 ps |
| T239 |
/workspace/coverage/default/0.chip_sw_flash_init.3757853948 |
|
|
Aug 17 07:06:16 PM PDT 24 |
Aug 17 07:39:04 PM PDT 24 |
22077307058 ps |
| T188 |
/workspace/coverage/default/2.chip_sw_csrng_fuse_en_sw_app_read_test.1979406636 |
|
|
Aug 17 07:24:22 PM PDT 24 |
Aug 17 07:36:09 PM PDT 24 |
4539987156 ps |
| T1080 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_dev.411179770 |
|
|
Aug 17 07:15:29 PM PDT 24 |
Aug 17 08:41:12 PM PDT 24 |
23410067372 ps |
| T1081 |
/workspace/coverage/default/2.chip_sw_keymgr_key_derivation.2144328009 |
|
|
Aug 17 07:29:14 PM PDT 24 |
Aug 17 07:56:19 PM PDT 24 |
8505386342 ps |
| T390 |
/workspace/coverage/default/2.chip_sw_alert_handler_reverse_ping_in_deep_sleep.3341078018 |
|
|
Aug 17 07:23:56 PM PDT 24 |
Aug 17 10:51:13 PM PDT 24 |
255408159112 ps |
| T1082 |
/workspace/coverage/default/74.chip_sw_alert_handler_lpg_sleep_mode_alerts.2405786697 |
|
|
Aug 17 07:36:10 PM PDT 24 |
Aug 17 07:41:35 PM PDT 24 |
3866108944 ps |
| T1083 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en.2723273800 |
|
|
Aug 17 07:07:56 PM PDT 24 |
Aug 17 07:11:32 PM PDT 24 |
2296727947 ps |
| T1084 |
/workspace/coverage/default/3.chip_sw_data_integrity_escalation.2554844198 |
|
|
Aug 17 07:32:16 PM PDT 24 |
Aug 17 07:43:24 PM PDT 24 |
5571334090 ps |
| T1085 |
/workspace/coverage/default/0.chip_tap_straps_rma.4289156776 |
|
|
Aug 17 07:06:30 PM PDT 24 |
Aug 17 07:13:49 PM PDT 24 |
5493922620 ps |
| T395 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_dev.1874760926 |
|
|
Aug 17 07:14:46 PM PDT 24 |
Aug 17 08:48:39 PM PDT 24 |
23743228816 ps |
| T1086 |
/workspace/coverage/default/6.chip_sw_csrng_edn_concurrency.2860454729 |
|
|
Aug 17 07:34:51 PM PDT 24 |
Aug 17 08:52:57 PM PDT 24 |
24435061400 ps |
| T373 |
/workspace/coverage/default/0.chip_sw_hmac_enc_jitter_en_reduced_freq.3800360393 |
|
|
Aug 17 07:10:26 PM PDT 24 |
Aug 17 07:15:40 PM PDT 24 |
3255922618 ps |
| T229 |
/workspace/coverage/default/0.chip_sw_keymgr_sideload_aes.1677448864 |
|
|
Aug 17 07:09:28 PM PDT 24 |
Aug 17 07:51:07 PM PDT 24 |
10861264908 ps |
| T1087 |
/workspace/coverage/default/2.chip_sw_pwrmgr_main_power_glitch_reset.1475103371 |
|
|
Aug 17 07:22:20 PM PDT 24 |
Aug 17 07:32:16 PM PDT 24 |
4559480698 ps |
| T777 |
/workspace/coverage/default/4.chip_sw_all_escalation_resets.2367365457 |
|
|
Aug 17 07:28:12 PM PDT 24 |
Aug 17 07:38:34 PM PDT 24 |
3936180914 ps |
| T1088 |
/workspace/coverage/default/1.chip_sw_rv_timer_irq.3520370386 |
|
|
Aug 17 07:10:08 PM PDT 24 |
Aug 17 07:14:04 PM PDT 24 |
2808716348 ps |
| T517 |
/workspace/coverage/default/1.chip_sw_rv_core_ibex_nmi_irq.2485438127 |
|
|
Aug 17 07:12:08 PM PDT 24 |
Aug 17 07:25:16 PM PDT 24 |
5016733452 ps |
| T1089 |
/workspace/coverage/default/2.chip_sw_uart_smoketest.4222428178 |
|
|
Aug 17 07:27:15 PM PDT 24 |
Aug 17 07:32:23 PM PDT 24 |
3233843640 ps |
| T750 |
/workspace/coverage/default/32.chip_sw_alert_handler_lpg_sleep_mode_alerts.1068801409 |
|
|
Aug 17 07:33:18 PM PDT 24 |
Aug 17 07:41:04 PM PDT 24 |
4069603750 ps |
| T1090 |
/workspace/coverage/default/0.chip_sw_example_rom.2569377462 |
|
|
Aug 17 07:05:02 PM PDT 24 |
Aug 17 07:07:34 PM PDT 24 |
3048218128 ps |
| T298 |
/workspace/coverage/default/0.chip_sw_rv_core_ibex_icache_invalidate.3883972988 |
|
|
Aug 17 07:10:07 PM PDT 24 |
Aug 17 07:14:28 PM PDT 24 |
2809921800 ps |
| T1091 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_mem_protection.1810234960 |
|
|
Aug 17 07:16:26 PM PDT 24 |
Aug 17 07:36:14 PM PDT 24 |
5856997896 ps |
| T1092 |
/workspace/coverage/default/2.chip_sw_uart_tx_rx.398952619 |
|
|
Aug 17 07:20:19 PM PDT 24 |
Aug 17 07:31:16 PM PDT 24 |
3872621640 ps |
| T1093 |
/workspace/coverage/default/2.rom_volatile_raw_unlock.3781039692 |
|
|
Aug 17 07:27:46 PM PDT 24 |
Aug 17 07:29:43 PM PDT 24 |
2571020122 ps |
| T1094 |
/workspace/coverage/default/2.chip_sw_kmac_entropy.514877210 |
|
|
Aug 17 07:21:09 PM PDT 24 |
Aug 17 07:24:58 PM PDT 24 |
2708876210 ps |
| T1095 |
/workspace/coverage/default/2.chip_sw_sleep_sram_ret_contents_scramble.2478885188 |
|
|
Aug 17 07:24:39 PM PDT 24 |
Aug 17 07:37:49 PM PDT 24 |
8810531524 ps |
| T1096 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_ecc_error_vendor_test.3422616670 |
|
|
Aug 17 07:11:09 PM PDT 24 |
Aug 17 07:15:05 PM PDT 24 |
2464823899 ps |
| T156 |
/workspace/coverage/default/2.chip_sw_exit_test_unlocked_bootstrap.3025667323 |
|
|
Aug 17 07:19:52 PM PDT 24 |
Aug 17 10:18:56 PM PDT 24 |
57263753415 ps |
| T761 |
/workspace/coverage/default/56.chip_sw_alert_handler_lpg_sleep_mode_alerts.2314219517 |
|
|
Aug 17 07:34:16 PM PDT 24 |
Aug 17 07:41:19 PM PDT 24 |
3807542488 ps |
| T195 |
/workspace/coverage/default/2.chip_sw_spi_device_pass_through.376878694 |
|
|
Aug 17 07:21:04 PM PDT 24 |
Aug 17 07:37:50 PM PDT 24 |
7034160593 ps |
| T1097 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_write_clear.141659130 |
|
|
Aug 17 07:09:47 PM PDT 24 |
Aug 17 07:16:01 PM PDT 24 |
2831239688 ps |
| T1098 |
/workspace/coverage/default/2.chip_sw_sysrst_ctrl_ec_rst_l.1641951978 |
|
|
Aug 17 07:23:37 PM PDT 24 |
Aug 17 08:17:18 PM PDT 24 |
21035643772 ps |
| T1099 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_good_b_bad_prod_end.2404695176 |
|
|
Aug 17 07:13:16 PM PDT 24 |
Aug 17 08:15:01 PM PDT 24 |
15049220860 ps |
| T1100 |
/workspace/coverage/default/1.chip_sw_otbn_ecdsa_op_irq.3848849500 |
|
|
Aug 17 07:14:52 PM PDT 24 |
Aug 17 08:08:27 PM PDT 24 |
17055551512 ps |
| T1101 |
/workspace/coverage/default/0.chip_sw_coremark.2026568844 |
|
|
Aug 17 07:09:23 PM PDT 24 |
Aug 17 10:50:46 PM PDT 24 |
71383400136 ps |
| T1102 |
/workspace/coverage/default/0.chip_sw_clkmgr_smoketest.4041798382 |
|
|
Aug 17 07:11:00 PM PDT 24 |
Aug 17 07:17:38 PM PDT 24 |
3099378224 ps |
| T1103 |
/workspace/coverage/default/7.chip_sw_csrng_edn_concurrency.4170186769 |
|
|
Aug 17 07:31:40 PM PDT 24 |
Aug 17 08:39:19 PM PDT 24 |
18552922980 ps |
| T346 |
/workspace/coverage/default/1.chip_sw_i2c_device_tx_rx.596598447 |
|
|
Aug 17 07:16:12 PM PDT 24 |
Aug 17 07:26:50 PM PDT 24 |
3732974010 ps |
| T351 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.4044016452 |
|
|
Aug 17 07:17:07 PM PDT 24 |
Aug 17 07:28:14 PM PDT 24 |
4595022175 ps |
| T1104 |
/workspace/coverage/default/8.chip_sw_csrng_edn_concurrency.1629449026 |
|
|
Aug 17 07:30:23 PM PDT 24 |
Aug 17 08:28:00 PM PDT 24 |
17989304920 ps |
| T1105 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_prod.3714505473 |
|
|
Aug 17 07:09:28 PM PDT 24 |
Aug 17 07:35:33 PM PDT 24 |
7763061304 ps |
| T1106 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_nothing_b_bad_prod_end.2974762696 |
|
|
Aug 17 07:13:17 PM PDT 24 |
Aug 17 08:11:42 PM PDT 24 |
14316308202 ps |
| T1107 |
/workspace/coverage/default/2.chip_sw_keymgr_sideload_kmac.4282527605 |
|
|
Aug 17 07:24:15 PM PDT 24 |
Aug 17 07:53:53 PM PDT 24 |
10568061202 ps |
| T1108 |
/workspace/coverage/default/1.chip_sw_sleep_pwm_pulses.4116598872 |
|
|
Aug 17 07:09:40 PM PDT 24 |
Aug 17 07:31:41 PM PDT 24 |
9216899200 ps |
| T1109 |
/workspace/coverage/default/1.chip_sw_pwrmgr_all_reset_reqs.1161164228 |
|
|
Aug 17 07:12:14 PM PDT 24 |
Aug 17 07:41:42 PM PDT 24 |
10753048171 ps |
| T724 |
/workspace/coverage/default/45.chip_sw_alert_handler_lpg_sleep_mode_alerts.1901745940 |
|
|
Aug 17 07:34:05 PM PDT 24 |
Aug 17 07:40:16 PM PDT 24 |
3284096560 ps |
| T354 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops_jitter_en.1098405337 |
|
|
Aug 17 07:20:56 PM PDT 24 |
Aug 17 07:34:23 PM PDT 24 |
4315214758 ps |
| T331 |
/workspace/coverage/default/0.chip_sw_rstmgr_alert_info.3007173809 |
|
|
Aug 17 07:08:05 PM PDT 24 |
Aug 17 07:39:27 PM PDT 24 |
13922412200 ps |
| T1110 |
/workspace/coverage/default/2.chip_sw_sram_ctrl_scrambled_access_jitter_en_reduced_freq.2968572950 |
|
|
Aug 17 07:27:20 PM PDT 24 |
Aug 17 07:37:03 PM PDT 24 |
3997312286 ps |
| T767 |
/workspace/coverage/default/29.chip_sw_all_escalation_resets.3528051264 |
|
|
Aug 17 07:32:58 PM PDT 24 |
Aug 17 07:42:07 PM PDT 24 |
5448600640 ps |
| T1111 |
/workspace/coverage/default/0.chip_sw_rstmgr_smoketest.2366182290 |
|
|
Aug 17 07:09:01 PM PDT 24 |
Aug 17 07:13:05 PM PDT 24 |
2569732140 ps |
| T758 |
/workspace/coverage/default/81.chip_sw_all_escalation_resets.3957882414 |
|
|
Aug 17 07:37:57 PM PDT 24 |
Aug 17 07:45:59 PM PDT 24 |
5200255712 ps |
| T1112 |
/workspace/coverage/default/3.chip_sw_csrng_edn_concurrency.400859935 |
|
|
Aug 17 07:30:07 PM PDT 24 |
Aug 17 08:46:37 PM PDT 24 |
19716825572 ps |
| T1113 |
/workspace/coverage/default/0.rom_e2e_boot_policy_valid_a_bad_b_good_test_unlocked0.1676679314 |
|
|
Aug 17 07:14:46 PM PDT 24 |
Aug 17 08:31:42 PM PDT 24 |
18238164190 ps |
| T238 |
/workspace/coverage/default/0.chip_sw_lc_walkthrough_prod.130459292 |
|
|
Aug 17 07:07:53 PM PDT 24 |
Aug 17 08:48:54 PM PDT 24 |
47566300960 ps |
| T1114 |
/workspace/coverage/default/1.chip_sw_clkmgr_jitter_reduced_freq.2173445948 |
|
|
Aug 17 07:17:17 PM PDT 24 |
Aug 17 07:21:28 PM PDT 24 |
3405337977 ps |
| T1115 |
/workspace/coverage/default/0.chip_sw_entropy_src_smoketest.3986913368 |
|
|
Aug 17 07:11:12 PM PDT 24 |
Aug 17 07:19:15 PM PDT 24 |
3110659630 ps |
| T1116 |
/workspace/coverage/default/1.chip_sival_flash_info_access.637758522 |
|
|
Aug 17 07:12:44 PM PDT 24 |
Aug 17 07:17:25 PM PDT 24 |
3321807412 ps |
| T344 |
/workspace/coverage/default/1.chip_sw_i2c_host_tx_rx.1432029753 |
|
|
Aug 17 07:09:05 PM PDT 24 |
Aug 17 07:24:45 PM PDT 24 |
5748079354 ps |
| T1117 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_test_unlocked0.273765273 |
|
|
Aug 17 07:14:02 PM PDT 24 |
Aug 17 07:26:12 PM PDT 24 |
4346380040 ps |
| T805 |
/workspace/coverage/default/28.chip_sw_all_escalation_resets.4133112104 |
|
|
Aug 17 07:34:07 PM PDT 24 |
Aug 17 07:43:00 PM PDT 24 |
5687739240 ps |
| T1118 |
/workspace/coverage/default/41.chip_sw_alert_handler_lpg_sleep_mode_alerts.2060137780 |
|
|
Aug 17 07:34:26 PM PDT 24 |
Aug 17 07:42:01 PM PDT 24 |
3635633096 ps |
| T1119 |
/workspace/coverage/default/1.chip_sw_alert_handler_ping_timeout.574721203 |
|
|
Aug 17 07:11:11 PM PDT 24 |
Aug 17 07:16:47 PM PDT 24 |
3614918380 ps |
| T32 |
/workspace/coverage/default/0.chip_sw_spi_host_tx_rx.2257414984 |
|
|
Aug 17 07:05:24 PM PDT 24 |
Aug 17 07:09:51 PM PDT 24 |
3096859104 ps |
| T1120 |
/workspace/coverage/default/4.chip_sw_uart_tx_rx_alt_clk_freq_low_speed.2752958100 |
|
|
Aug 17 07:30:14 PM PDT 24 |
Aug 17 07:50:22 PM PDT 24 |
8487551891 ps |
| T1121 |
/workspace/coverage/default/1.chip_sw_otp_ctrl_lc_signals_rma.4024699425 |
|
|
Aug 17 07:11:07 PM PDT 24 |
Aug 17 07:33:46 PM PDT 24 |
9000241982 ps |
| T756 |
/workspace/coverage/default/20.chip_sw_all_escalation_resets.175063776 |
|
|
Aug 17 07:33:03 PM PDT 24 |
Aug 17 07:44:58 PM PDT 24 |
6088491776 ps |
| T1122 |
/workspace/coverage/default/10.chip_sw_uart_rand_baudrate.2293731582 |
|
|
Aug 17 07:30:22 PM PDT 24 |
Aug 17 07:39:53 PM PDT 24 |
4188605674 ps |
| T254 |
/workspace/coverage/default/0.chip_sw_plic_sw_irq.978939230 |
|
|
Aug 17 07:10:49 PM PDT 24 |
Aug 17 07:15:51 PM PDT 24 |
2852870142 ps |
| T1123 |
/workspace/coverage/default/0.chip_sw_pwrmgr_wdog_reset.3784926122 |
|
|
Aug 17 07:08:16 PM PDT 24 |
Aug 17 07:15:03 PM PDT 24 |
3570915762 ps |
| T1124 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_ok.3713317585 |
|
|
Aug 17 07:08:29 PM PDT 24 |
Aug 17 07:33:40 PM PDT 24 |
7517091524 ps |
| T1125 |
/workspace/coverage/default/2.chip_sw_pwrmgr_normal_sleep_all_reset_reqs.600123585 |
|
|
Aug 17 07:22:35 PM PDT 24 |
Aug 17 07:49:37 PM PDT 24 |
10631741726 ps |
| T136 |
/workspace/coverage/default/2.chip_sw_sensor_ctrl_alert.3162456755 |
|
|
Aug 17 07:24:16 PM PDT 24 |
Aug 17 07:36:32 PM PDT 24 |
7769211672 ps |
| T1126 |
/workspace/coverage/default/90.chip_sw_all_escalation_resets.3609410081 |
|
|
Aug 17 07:38:03 PM PDT 24 |
Aug 17 07:47:00 PM PDT 24 |
5064731920 ps |
| T299 |
/workspace/coverage/default/2.chip_sw_rv_core_ibex_address_translation.507017413 |
|
|
Aug 17 07:28:33 PM PDT 24 |
Aug 17 07:32:59 PM PDT 24 |
2630291784 ps |
| T1127 |
/workspace/coverage/default/85.chip_sw_alert_handler_lpg_sleep_mode_alerts.2596404573 |
|
|
Aug 17 07:37:24 PM PDT 24 |
Aug 17 07:41:59 PM PDT 24 |
4134342246 ps |
| T76 |
/workspace/coverage/default/0.chip_jtag_mem_access.1915274973 |
|
|
Aug 17 06:59:30 PM PDT 24 |
Aug 17 07:29:11 PM PDT 24 |
13555891005 ps |
| T773 |
/workspace/coverage/default/15.chip_sw_alert_handler_lpg_sleep_mode_alerts.4208189543 |
|
|
Aug 17 07:31:33 PM PDT 24 |
Aug 17 07:37:17 PM PDT 24 |
4311765008 ps |
| T1128 |
/workspace/coverage/default/1.chip_sw_clkmgr_sleep_frequency.4121571521 |
|
|
Aug 17 07:15:04 PM PDT 24 |
Aug 17 07:28:00 PM PDT 24 |
4582115776 ps |
| T1129 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_lc_rw_en.420063057 |
|
|
Aug 17 07:04:54 PM PDT 24 |
Aug 17 07:10:40 PM PDT 24 |
5226887967 ps |
| T372 |
/workspace/coverage/default/0.chip_sw_flash_ctrl_ops_jitter_en_reduced_freq.1148723972 |
|
|
Aug 17 07:08:21 PM PDT 24 |
Aug 17 07:19:12 PM PDT 24 |
4519276119 ps |
| T1130 |
/workspace/coverage/default/1.chip_sw_keymgr_key_derivation.820568283 |
|
|
Aug 17 07:13:22 PM PDT 24 |
Aug 17 07:36:25 PM PDT 24 |
6744558494 ps |
| T1131 |
/workspace/coverage/default/0.chip_sw_pwrmgr_usb_clk_disabled_when_active.1444223684 |
|
|
Aug 17 07:05:28 PM PDT 24 |
Aug 17 07:15:41 PM PDT 24 |
4368265776 ps |
| T1132 |
/workspace/coverage/default/1.chip_sw_aon_timer_wdog_bite_reset.1936578928 |
|
|
Aug 17 07:14:29 PM PDT 24 |
Aug 17 07:26:07 PM PDT 24 |
8557439072 ps |
| T1133 |
/workspace/coverage/default/2.chip_sw_kmac_mode_kmac_jitter_en.1605776481 |
|
|
Aug 17 07:25:21 PM PDT 24 |
Aug 17 07:31:34 PM PDT 24 |
3562751678 ps |
| T1134 |
/workspace/coverage/default/0.chip_sw_edn_entropy_reqs.1190058806 |
|
|
Aug 17 07:07:14 PM PDT 24 |
Aug 17 07:25:44 PM PDT 24 |
5796556118 ps |
| T1135 |
/workspace/coverage/default/7.chip_sw_alert_handler_lpg_sleep_mode_alerts.215216836 |
|
|
Aug 17 07:31:48 PM PDT 24 |
Aug 17 07:37:56 PM PDT 24 |
2922379524 ps |
| T722 |
/workspace/coverage/default/8.chip_sw_all_escalation_resets.1668936399 |
|
|
Aug 17 07:30:16 PM PDT 24 |
Aug 17 07:40:00 PM PDT 24 |
4669174268 ps |
| T1136 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_rma.2195135630 |
|
|
Aug 17 07:14:38 PM PDT 24 |
Aug 17 08:58:37 PM PDT 24 |
22867138598 ps |
| T1137 |
/workspace/coverage/default/0.chip_sw_aes_entropy.556331288 |
|
|
Aug 17 07:14:26 PM PDT 24 |
Aug 17 07:18:53 PM PDT 24 |
2235786336 ps |
| T1138 |
/workspace/coverage/default/86.chip_sw_all_escalation_resets.2954833359 |
|
|
Aug 17 07:37:02 PM PDT 24 |
Aug 17 07:48:41 PM PDT 24 |
4529170680 ps |
| T806 |
/workspace/coverage/default/11.chip_sw_alert_handler_lpg_sleep_mode_alerts.2135906242 |
|
|
Aug 17 07:32:33 PM PDT 24 |
Aug 17 07:38:49 PM PDT 24 |
3816064856 ps |
| T1139 |
/workspace/coverage/default/0.chip_sw_clkmgr_reset_frequency.2694074176 |
|
|
Aug 17 07:07:45 PM PDT 24 |
Aug 17 07:14:35 PM PDT 24 |
3474505377 ps |
| T345 |
/workspace/coverage/default/0.chip_sw_i2c_device_tx_rx.1531044265 |
|
|
Aug 17 07:09:23 PM PDT 24 |
Aug 17 07:19:40 PM PDT 24 |
4580253072 ps |
| T341 |
/workspace/coverage/default/2.chip_sw_i2c_host_tx_rx_idx2.3626942737 |
|
|
Aug 17 07:21:19 PM PDT 24 |
Aug 17 07:36:00 PM PDT 24 |
5305762602 ps |
| T1140 |
/workspace/coverage/default/1.chip_sw_csrng_kat_test.2857032609 |
|
|
Aug 17 07:13:10 PM PDT 24 |
Aug 17 07:17:13 PM PDT 24 |
2846401000 ps |
| T108 |
/workspace/coverage/default/1.chip_rv_dm_ndm_reset_req.2682410623 |
|
|
Aug 17 07:19:37 PM PDT 24 |
Aug 17 07:24:58 PM PDT 24 |
4515879508 ps |
| T308 |
/workspace/coverage/default/1.chip_sw_sram_ctrl_execution_main.765692246 |
|
|
Aug 17 07:14:46 PM PDT 24 |
Aug 17 07:28:41 PM PDT 24 |
6729900588 ps |
| T1141 |
/workspace/coverage/default/1.chip_sw_kmac_mode_kmac.572406822 |
|
|
Aug 17 07:14:03 PM PDT 24 |
Aug 17 07:19:59 PM PDT 24 |
3876703500 ps |
| T1142 |
/workspace/coverage/default/1.rom_e2e_shutdown_exception_c.1255379780 |
|
|
Aug 17 07:22:42 PM PDT 24 |
Aug 17 08:13:58 PM PDT 24 |
14647183800 ps |
| T734 |
/workspace/coverage/default/2.chip_sw_rstmgr_rst_cnsty_escalation.2371904475 |
|
|
Aug 17 07:19:16 PM PDT 24 |
Aug 17 07:32:19 PM PDT 24 |
6215295450 ps |
| T1143 |
/workspace/coverage/default/2.chip_sw_sleep_pwm_pulses.3596462063 |
|
|
Aug 17 07:19:33 PM PDT 24 |
Aug 17 07:46:45 PM PDT 24 |
8715723608 ps |
| T1144 |
/workspace/coverage/default/1.chip_sw_edn_sw_mode.1585793564 |
|
|
Aug 17 07:13:42 PM PDT 24 |
Aug 17 07:47:05 PM PDT 24 |
8780850200 ps |
| T1145 |
/workspace/coverage/default/0.chip_sw_flash_init_reduced_freq.852785824 |
|
|
Aug 17 07:11:17 PM PDT 24 |
Aug 17 07:49:32 PM PDT 24 |
19741711301 ps |
| T1146 |
/workspace/coverage/default/1.chip_sw_adc_ctrl_sleep_debug_cable_wakeup.2747765438 |
|
|
Aug 17 07:10:35 PM PDT 24 |
Aug 17 07:19:25 PM PDT 24 |
19451512332 ps |
| T1147 |
/workspace/coverage/default/0.chip_sw_example_manufacturer.2400540495 |
|
|
Aug 17 07:05:43 PM PDT 24 |
Aug 17 07:09:09 PM PDT 24 |
2360542000 ps |
| T1148 |
/workspace/coverage/default/0.chip_sw_gpio_smoketest.3466289460 |
|
|
Aug 17 07:09:19 PM PDT 24 |
Aug 17 07:14:27 PM PDT 24 |
2914146216 ps |
| T415 |
/workspace/coverage/default/49.chip_sw_all_escalation_resets.2598349751 |
|
|
Aug 17 07:33:26 PM PDT 24 |
Aug 17 07:44:30 PM PDT 24 |
5893030698 ps |
| T774 |
/workspace/coverage/default/13.chip_sw_all_escalation_resets.893793121 |
|
|
Aug 17 07:30:36 PM PDT 24 |
Aug 17 07:45:40 PM PDT 24 |
6055015336 ps |
| T360 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_ops.2620930163 |
|
|
Aug 17 07:20:06 PM PDT 24 |
Aug 17 07:32:10 PM PDT 24 |
4928763776 ps |
| T328 |
/workspace/coverage/default/0.chip_plic_all_irqs_0.3349809230 |
|
|
Aug 17 07:07:59 PM PDT 24 |
Aug 17 07:31:03 PM PDT 24 |
5846233312 ps |
| T807 |
/workspace/coverage/default/68.chip_sw_alert_handler_lpg_sleep_mode_alerts.1975495072 |
|
|
Aug 17 07:37:30 PM PDT 24 |
Aug 17 07:43:15 PM PDT 24 |
3269895100 ps |
| T1149 |
/workspace/coverage/default/1.chip_sw_csrng_lc_hw_debug_en_test.3731735025 |
|
|
Aug 17 07:16:38 PM PDT 24 |
Aug 17 07:26:44 PM PDT 24 |
6790113932 ps |
| T327 |
/workspace/coverage/default/1.chip_plic_all_irqs_20.2947213377 |
|
|
Aug 17 07:14:30 PM PDT 24 |
Aug 17 07:28:12 PM PDT 24 |
4622912880 ps |
| T1150 |
/workspace/coverage/default/0.chip_sw_uart_rand_baudrate.856141720 |
|
|
Aug 17 07:05:44 PM PDT 24 |
Aug 17 07:15:24 PM PDT 24 |
4176204816 ps |
| T1151 |
/workspace/coverage/default/1.chip_sw_flash_scrambling_smoketest.923820435 |
|
|
Aug 17 07:20:39 PM PDT 24 |
Aug 17 07:24:10 PM PDT 24 |
2454084152 ps |
| T1152 |
/workspace/coverage/default/0.chip_sw_aon_timer_wdog_bite_reset.4028533004 |
|
|
Aug 17 07:14:52 PM PDT 24 |
Aug 17 07:30:28 PM PDT 24 |
8257919960 ps |
| T1153 |
/workspace/coverage/default/0.chip_sw_rv_timer_smoketest.1129773387 |
|
|
Aug 17 07:10:02 PM PDT 24 |
Aug 17 07:14:24 PM PDT 24 |
3001944756 ps |
| T1154 |
/workspace/coverage/default/1.chip_sw_clkmgr_external_clk_src_for_sw_fast_test_unlocked0.851395232 |
|
|
Aug 17 07:14:49 PM PDT 24 |
Aug 17 07:28:32 PM PDT 24 |
3566796804 ps |
| T26 |
/workspace/coverage/default/2.chip_sw_gpio.876671518 |
|
|
Aug 17 07:20:48 PM PDT 24 |
Aug 17 07:30:17 PM PDT 24 |
4306705640 ps |
| T1155 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_access_jitter_en_reduced_freq.1339716477 |
|
|
Aug 17 07:26:17 PM PDT 24 |
Aug 17 07:45:10 PM PDT 24 |
7743525336 ps |
| T1156 |
/workspace/coverage/default/52.chip_sw_alert_handler_lpg_sleep_mode_alerts.2903891214 |
|
|
Aug 17 07:35:26 PM PDT 24 |
Aug 17 07:40:40 PM PDT 24 |
4051982770 ps |
| T714 |
/workspace/coverage/default/0.chip_sw_sysrst_ctrl_in_irq.3112099979 |
|
|
Aug 17 07:08:12 PM PDT 24 |
Aug 17 07:22:00 PM PDT 24 |
4979266738 ps |
| T1157 |
/workspace/coverage/default/9.chip_sw_uart_rand_baudrate.3806739727 |
|
|
Aug 17 07:30:34 PM PDT 24 |
Aug 17 07:40:19 PM PDT 24 |
3859292200 ps |
| T1158 |
/workspace/coverage/default/0.chip_sw_i2c_host_tx_rx_idx1.4118173703 |
|
|
Aug 17 07:05:50 PM PDT 24 |
Aug 17 07:19:17 PM PDT 24 |
4750678064 ps |
| T1159 |
/workspace/coverage/default/13.chip_sw_uart_rand_baudrate.3105597426 |
|
|
Aug 17 07:32:23 PM PDT 24 |
Aug 17 07:40:27 PM PDT 24 |
3421457800 ps |
| T1160 |
/workspace/coverage/default/0.chip_sw_edn_kat.1911956246 |
|
|
Aug 17 07:05:42 PM PDT 24 |
Aug 17 07:15:17 PM PDT 24 |
3636201584 ps |
| T749 |
/workspace/coverage/default/89.chip_sw_all_escalation_resets.587755240 |
|
|
Aug 17 07:39:09 PM PDT 24 |
Aug 17 07:47:53 PM PDT 24 |
5105412336 ps |
| T1161 |
/workspace/coverage/default/2.chip_sw_rv_plic_smoketest.827880762 |
|
|
Aug 17 07:27:34 PM PDT 24 |
Aug 17 07:32:00 PM PDT 24 |
3071670688 ps |
| T1162 |
/workspace/coverage/default/0.chip_sw_alert_handler_ping_timeout.2017957905 |
|
|
Aug 17 07:09:06 PM PDT 24 |
Aug 17 07:16:47 PM PDT 24 |
4839446392 ps |
| T157 |
/workspace/coverage/default/1.chip_sw_exit_test_unlocked_bootstrap.4281221064 |
|
|
Aug 17 07:09:58 PM PDT 24 |
Aug 17 10:02:46 PM PDT 24 |
58661451960 ps |
| T1163 |
/workspace/coverage/default/0.chip_sw_keymgr_key_derivation_jitter_en.714018103 |
|
|
Aug 17 07:07:10 PM PDT 24 |
Aug 17 07:33:23 PM PDT 24 |
8146502217 ps |
| T1164 |
/workspace/coverage/default/0.rom_e2e_sigverify_always_a_bad_b_bad_prod_end.2300614141 |
|
|
Aug 17 07:23:16 PM PDT 24 |
Aug 17 08:50:59 PM PDT 24 |
23682524372 ps |
| T416 |
/workspace/coverage/default/0.chip_sw_pwrmgr_normal_sleep_all_wake_ups.2455432242 |
|
|
Aug 17 07:07:25 PM PDT 24 |
Aug 17 07:14:11 PM PDT 24 |
6719872466 ps |
| T1165 |
/workspace/coverage/default/2.chip_sw_flash_ctrl_mem_protection.2537807672 |
|
|
Aug 17 07:27:48 PM PDT 24 |
Aug 17 07:45:18 PM PDT 24 |
5890502704 ps |
| T89 |
/workspace/coverage/default/84.chip_sw_alert_handler_lpg_sleep_mode_alerts.2972438027 |
|
|
Aug 17 07:37:55 PM PDT 24 |
Aug 17 07:43:56 PM PDT 24 |
3898427060 ps |
| T309 |
/workspace/coverage/default/2.chip_sw_rv_dm_ndm_reset_req_when_cpu_halted.3975229532 |
|
|
Aug 17 07:25:31 PM PDT 24 |
Aug 17 07:35:16 PM PDT 24 |
4336278568 ps |
| T803 |
/workspace/coverage/default/36.chip_sw_all_escalation_resets.2289522778 |
|
|
Aug 17 07:33:14 PM PDT 24 |
Aug 17 07:41:32 PM PDT 24 |
4199503456 ps |
| T660 |
/workspace/coverage/default/2.chip_sw_rv_dm_access_after_escalation_reset.2736270129 |
|
|
Aug 17 07:26:33 PM PDT 24 |
Aug 17 07:35:07 PM PDT 24 |
4777756389 ps |
| T325 |
/workspace/coverage/default/0.chip_plic_all_irqs_20.1419942717 |
|
|
Aug 17 07:10:38 PM PDT 24 |
Aug 17 07:25:53 PM PDT 24 |
5443212140 ps |
| T1166 |
/workspace/coverage/default/0.rom_e2e_keymgr_init_rom_ext_invalid_meas.2792783028 |
|
|
Aug 17 07:13:24 PM PDT 24 |
Aug 17 08:13:31 PM PDT 24 |
15212047084 ps |
| T361 |
/workspace/coverage/default/1.chip_sw_flash_ctrl_ops.3595989887 |
|
|
Aug 17 07:10:34 PM PDT 24 |
Aug 17 07:21:56 PM PDT 24 |
4281258050 ps |
| T56 |
/workspace/coverage/default/1.chip_sw_spi_device_pinmux_sleep_retention.3477520651 |
|
|
Aug 17 07:10:03 PM PDT 24 |
Aug 17 07:13:35 PM PDT 24 |
2959287464 ps |
| T1167 |
/workspace/coverage/default/46.chip_sw_alert_handler_lpg_sleep_mode_alerts.89302239 |
|
|
Aug 17 07:33:56 PM PDT 24 |
Aug 17 07:40:30 PM PDT 24 |
4029497648 ps |
| T444 |
/workspace/coverage/default/0.rom_e2e_jtag_inject_test_unlocked0.1041470633 |
|
|
Aug 17 07:16:48 PM PDT 24 |
Aug 17 07:46:49 PM PDT 24 |
25059274988 ps |
| T673 |
/workspace/coverage/default/92.chip_sw_all_escalation_resets.1380068960 |
|
|
Aug 17 07:36:59 PM PDT 24 |
Aug 17 07:45:17 PM PDT 24 |
5770075632 ps |
| T1168 |
/workspace/coverage/default/1.chip_sw_sysrst_ctrl_in_irq.2730909685 |
|
|
Aug 17 07:12:58 PM PDT 24 |
Aug 17 07:23:25 PM PDT 24 |
3879414442 ps |
| T1169 |
/workspace/coverage/default/0.chip_sw_hmac_oneshot.3077434283 |
|
|
Aug 17 07:10:43 PM PDT 24 |
Aug 17 07:16:08 PM PDT 24 |
3159681240 ps |
| T1170 |
/workspace/coverage/default/0.chip_sw_rstmgr_rst_cnsty_escalation.501186935 |
|
|
Aug 17 07:06:54 PM PDT 24 |
Aug 17 07:18:02 PM PDT 24 |
5296726508 ps |
| T414 |
/workspace/coverage/default/0.chip_sw_rom_ctrl_integrity_check.3861847310 |
|
|
Aug 17 07:07:18 PM PDT 24 |
Aug 17 07:17:30 PM PDT 24 |
8978731499 ps |
| T762 |
/workspace/coverage/default/37.chip_sw_all_escalation_resets.390945012 |
|
|
Aug 17 07:35:59 PM PDT 24 |
Aug 17 07:45:09 PM PDT 24 |
6126036824 ps |
| T1171 |
/workspace/coverage/default/22.chip_sw_all_escalation_resets.2051194470 |
|
|
Aug 17 07:32:43 PM PDT 24 |
Aug 17 07:41:57 PM PDT 24 |
4948993800 ps |