SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.54 | 84.54 |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
tb.dut.top_earlgrey.u_otp_ctrl![]() |
84.74 | 84.74 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.74 | 84.74 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
84.74 | 84.74 |
SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT | NAME |
93.94 | 92.47 | 89.34 | 100.00 | top_earlgrey![]() |
NAME | SCORE | LINE | COND | TOGGLE | FSM | BRANCH | ASSERT |
no children |
Total | Covered | Percent | |
---|---|---|---|
Totals | 164 | 142 | 86.59 |
Total Bits | 11012 | 9310 | 84.54 |
Total Bits 0->1 | 5506 | 4669 | 84.80 |
Total Bits 1->0 | 5506 | 4641 | 84.29 |
Ports | 164 | 142 | 86.59 |
Port Bits | 11012 | 9310 | 84.54 |
Port Bits 0->1 | 5506 | 4669 | 84.80 |
Port Bits 1->0 | 5506 | 4641 | 84.29 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_ni | Yes | Yes | T46,T53,T47 | Yes | T1,T2,T3 | INPUT |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
rst_edn_ni | Yes | Yes | T46,T53,T47 | Yes | T1,T2,T3 | INPUT |
edn_o.edn_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT |
edn_i.edn_bus[31:0] | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
edn_i.edn_fips | No | No | Yes | T144,T180,T181 | INPUT | |
edn_i.edn_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[11:0] | Yes | Yes | *T98,*T99,*T100 | Yes | T98,T99,T100 | INPUT |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_source[5:0] | Yes | Yes | *T94,*T30,*T45 | Yes | T94,T30,T45 | INPUT |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_size[1:0] | Yes | Yes | T98,T99,T100 | Yes | T98,T99,T100 | INPUT |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
core_tl_i.a_opcode[2:0] | Yes | Yes | T30,T45,T101 | Yes | T30,T45,T101 | INPUT |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_error | Yes | Yes | T98,T99,T100 | Yes | T98,T99,T100 | OUTPUT |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
core_tl_o.d_sink | Yes | Yes | T98,T99,T100 | Yes | T98,T99,T100 | OUTPUT |
core_tl_o.d_source[5:0] | Yes | Yes | *T182,*T183,*T74 | Yes | T182,T183,T74 | OUTPUT |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_size[1:0] | Yes | Yes | T98,T99,T100 | Yes | T98,T99,T100 | OUTPUT |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_opcode[0] | Yes | Yes | *T122,*T44,*T184 | Yes | T122,T184,T46 | OUTPUT |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T74,T98,T99 | Yes | T74,T98,T99 | INPUT |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_data[31:0] | Yes | Yes | T74,T98,T99 | Yes | T74,T98,T99 | INPUT |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[4:0] | Yes | Yes | *T98,*T99,*T100 | Yes | T98,T99,T100 | INPUT |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[17:15] | Yes | Yes | *T74,*T98,*T99 | Yes | T74,T98,T99 | INPUT |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_source[5:0] | Yes | Yes | *T94,*T30,*T45 | Yes | T94,T30,T45 | INPUT |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_size[1:0] | Yes | Yes | T98,T99,T100 | Yes | T98,T99,T100 | INPUT |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T30,T45,T101 | Yes | T30,T45,T101 | INPUT |
prim_tl_i.a_valid | Yes | Yes | T74,T98,T99 | Yes | T74,T98,T99 | INPUT |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T53,T47,T88 | OUTPUT |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T74,T98,T99 | Yes | T74,T98,T99 | OUTPUT |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T74,T98,T99 | Yes | T74,T98,T99 | OUTPUT |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T53,T47,T88 | OUTPUT |
prim_tl_o.d_sink | Yes | Yes | T98,T99,T100 | Yes | T98,T99,T100 | OUTPUT |
prim_tl_o.d_source[5:0] | Yes | Yes | *T74,T100,T185 | Yes | T74,T98,T99 | OUTPUT |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_size[1:0] | Yes | Yes | T98,T99,T100 | Yes | T98,T99,T100 | OUTPUT |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T53,T47,T88 | OUTPUT |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
prim_tl_o.d_valid | Yes | Yes | T74,T98,T99 | Yes | T74,T98,T99 | OUTPUT |
intr_otp_operation_done_o | Yes | Yes | T128,T186,T187 | Yes | T128,T186,T187 | OUTPUT |
intr_otp_error_o | Yes | Yes | T128,T186,T187 | Yes | T128,T186,T187 | OUTPUT |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[0].ack_p | Yes | Yes | T188,T83,T102 | Yes | T188,T83,T102 | INPUT |
alert_rx_i[0].ping_n | Yes | Yes | T102,T103,T105 | Yes | T102,T103,T105 | INPUT |
alert_rx_i[0].ping_p | Yes | Yes | T102,T103,T105 | Yes | T102,T103,T105 | INPUT |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[1].ack_p | Yes | Yes | T53,T47,T88 | Yes | T53,T47,T88 | INPUT |
alert_rx_i[1].ping_n | Yes | Yes | T102,T103,T112 | Yes | T102,T103,T112 | INPUT |
alert_rx_i[1].ping_p | Yes | Yes | T102,T103,T112 | Yes | T102,T103,T112 | INPUT |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[2].ack_p | Yes | Yes | T83,T102,T189 | Yes | T83,T102,T189 | INPUT |
alert_rx_i[2].ping_n | Yes | Yes | T102,T103,T105 | Yes | T102,T103,T105 | INPUT |
alert_rx_i[2].ping_p | Yes | Yes | T102,T103,T105 | Yes | T102,T103,T105 | INPUT |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[3].ack_p | Yes | Yes | T83,T102,T84 | Yes | T83,T102,T84 | INPUT |
alert_rx_i[3].ping_n | Yes | Yes | T102,T103,T105 | Yes | T103,T105 | INPUT |
alert_rx_i[3].ping_p | Yes | Yes | T103,T105 | Yes | T102,T103,T105 | INPUT |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
alert_rx_i[4].ack_p | Yes | Yes | T83,T102,T84 | Yes | T83,T102,T84 | INPUT |
alert_rx_i[4].ping_n | Yes | Yes | T102,T103,T105 | Yes | T102,T103,T105 | INPUT |
alert_rx_i[4].ping_p | Yes | Yes | T102,T103,T105 | Yes | T102,T103,T105 | INPUT |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[0].alert_p | Yes | Yes | T188,T83,T102 | Yes | T188,T83,T102 | OUTPUT |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[1].alert_p | Yes | Yes | T53,T47,T88 | Yes | T53,T47,T88 | OUTPUT |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[2].alert_p | Yes | Yes | T83,T102,T189 | Yes | T83,T102,T189 | OUTPUT |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[3].alert_p | Yes | Yes | T83,T102,T84 | Yes | T83,T102,T84 | OUTPUT |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT |
alert_tx_o[4].alert_p | Yes | Yes | T83,T102,T84 | Yes | T83,T102,T84 | OUTPUT |
obs_ctrl_i.obmen[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obmsl[3:0] | No | No | No | INPUT | ||
obs_ctrl_i.obgsl[3:0] | No | No | No | INPUT | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | ||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | ||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T138,T154,T43 | INPUT |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT |
pwr_otp_o.otp_idle | Yes | Yes | T46,T36,T53 | Yes | T1,T2,T3 | OUTPUT |
pwr_otp_o.otp_done | Yes | Yes | T46,T53,T47 | Yes | T1,T2,T3 | OUTPUT |
lc_otp_vendor_test_i.ctrl[20:0] | No | No | Yes | T190,T44,T191 | INPUT | |
lc_otp_vendor_test_i.ctrl[21] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[22] | No | No | Yes | T191 | INPUT | |
lc_otp_vendor_test_i.ctrl[25:23] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[27:26] | No | No | Yes | T191,T44,T190 | INPUT | |
lc_otp_vendor_test_i.ctrl[29:28] | No | No | No | INPUT | ||
lc_otp_vendor_test_i.ctrl[31:30] | No | No | Yes | T44,T191 | INPUT | |
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | ||
lc_otp_program_i.count[12:0] | Yes | Yes | *T36,*T192,*T193 | Yes | T36,T192,T193 | INPUT |
lc_otp_program_i.count[13] | No | No | No | INPUT | ||
lc_otp_program_i.count[16:14] | Yes | Yes | T36,T192,T193 | Yes | T36,T192,T193 | INPUT |
lc_otp_program_i.count[17] | No | No | No | INPUT | ||
lc_otp_program_i.count[24:18] | Yes | Yes | T36,T192,T193 | Yes | T36,T192,T193 | INPUT |
lc_otp_program_i.count[25] | No | No | No | INPUT | ||
lc_otp_program_i.count[30:26] | Yes | Yes | *T188,*T194,*T121 | Yes | T188,T194,T193 | INPUT |
lc_otp_program_i.count[31] | No | No | No | INPUT | ||
lc_otp_program_i.count[33:32] | Yes | Yes | T36,T192,T193 | Yes | T36,T192,T193 | INPUT |
lc_otp_program_i.count[34] | No | No | No | INPUT | ||
lc_otp_program_i.count[43:35] | Yes | Yes | *T121,*T36,*T192 | Yes | T188,T193,T156 | INPUT |
lc_otp_program_i.count[44] | No | No | No | INPUT | ||
lc_otp_program_i.count[51:45] | Yes | Yes | *T121,*T36,*T192 | Yes | T193,T156,T195 | INPUT |
lc_otp_program_i.count[52] | No | No | No | INPUT | ||
lc_otp_program_i.count[59:53] | Yes | Yes | *T121,*T36,*T192 | Yes | T193,T156,T195 | INPUT |
lc_otp_program_i.count[60] | No | No | No | INPUT | ||
lc_otp_program_i.count[64:61] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT |
lc_otp_program_i.count[65] | No | No | No | INPUT | ||
lc_otp_program_i.count[67:66] | Yes | Yes | T121,T36,T192 | Yes | T188,T193,T156 | INPUT |
lc_otp_program_i.count[68] | No | No | No | INPUT | ||
lc_otp_program_i.count[71:69] | Yes | Yes | *T36,*T192,*T193 | Yes | T36,T192,T193 | INPUT |
lc_otp_program_i.count[72] | No | No | No | INPUT | ||
lc_otp_program_i.count[73] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT |
lc_otp_program_i.count[74] | No | No | No | INPUT | ||
lc_otp_program_i.count[86:75] | Yes | Yes | *T121,*T36,*T192 | Yes | T193,T156,T195 | INPUT |
lc_otp_program_i.count[87] | No | No | No | INPUT | ||
lc_otp_program_i.count[89:88] | Yes | Yes | *T188,*T194,*T5 | Yes | T188,T194,T196 | INPUT |
lc_otp_program_i.count[90] | No | No | No | INPUT | ||
lc_otp_program_i.count[97:91] | Yes | Yes | T36,T192,*T188 | Yes | T36,T192,T188 | INPUT |
lc_otp_program_i.count[98] | No | No | No | INPUT | ||
lc_otp_program_i.count[109:99] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT |
lc_otp_program_i.count[110] | No | No | No | INPUT | ||
lc_otp_program_i.count[112:111] | Yes | Yes | T5,T121,T36 | Yes | T196,T197,T193 | INPUT |
lc_otp_program_i.count[113] | No | No | No | INPUT | ||
lc_otp_program_i.count[118:114] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT |
lc_otp_program_i.count[119] | No | No | No | INPUT | ||
lc_otp_program_i.count[123:120] | Yes | Yes | *T5,*T121,T36 | Yes | T196,T197,T193 | INPUT |
lc_otp_program_i.count[125:124] | No | No | No | INPUT | ||
lc_otp_program_i.count[127:126] | Yes | Yes | *T5,*T121,T36 | Yes | T188,T196,T197 | INPUT |
lc_otp_program_i.count[128] | No | No | No | INPUT | ||
lc_otp_program_i.count[131:129] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT |
lc_otp_program_i.count[132] | No | No | No | INPUT | ||
lc_otp_program_i.count[134:133] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT |
lc_otp_program_i.count[136:135] | No | No | No | INPUT | ||
lc_otp_program_i.count[138:137] | Yes | Yes | T36,T192,*T188 | Yes | T36,T192,T188 | INPUT |
lc_otp_program_i.count[139] | No | No | No | INPUT | ||
lc_otp_program_i.count[140] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT |
lc_otp_program_i.count[141] | No | No | No | INPUT | ||
lc_otp_program_i.count[149:142] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT |
lc_otp_program_i.count[150] | No | No | No | INPUT | ||
lc_otp_program_i.count[158:151] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT |
lc_otp_program_i.count[160:159] | No | No | No | INPUT | ||
lc_otp_program_i.count[167:161] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT |
lc_otp_program_i.count[168] | No | No | No | INPUT | ||
lc_otp_program_i.count[171:169] | Yes | Yes | *T36,*T192,*T193 | Yes | T36,T192,T193 | INPUT |
lc_otp_program_i.count[172] | No | No | No | INPUT | ||
lc_otp_program_i.count[174:173] | Yes | Yes | T1,T2,T3 | Yes | T46,T53,T47 | INPUT |
lc_otp_program_i.count[175] | No | No | No | INPUT | ||
lc_otp_program_i.count[180:176] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT |
lc_otp_program_i.count[181] | No | No | No | INPUT | ||
lc_otp_program_i.count[183:182] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT |
lc_otp_program_i.count[184] | No | No | No | INPUT | ||
lc_otp_program_i.count[190:185] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT |
lc_otp_program_i.count[191] | No | No | No | INPUT | ||
lc_otp_program_i.count[197:192] | Yes | Yes | *T188,*T194,*T1 | Yes | T188,T194,T46 | INPUT |
lc_otp_program_i.count[198] | No | No | No | INPUT | ||
lc_otp_program_i.count[207:199] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT |
lc_otp_program_i.count[208] | No | No | No | INPUT | ||
lc_otp_program_i.count[216:209] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT |
lc_otp_program_i.count[217] | No | No | No | INPUT | ||
lc_otp_program_i.count[225:218] | Yes | Yes | *T36,*T192,*T193 | Yes | T36,T192,T193 | INPUT |
lc_otp_program_i.count[226] | No | No | No | INPUT | ||
lc_otp_program_i.count[227] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT |
lc_otp_program_i.count[228] | No | No | No | INPUT | ||
lc_otp_program_i.count[230:229] | Yes | Yes | T36,T192,*T188 | Yes | T36,T192,T188 | INPUT |
lc_otp_program_i.count[231] | No | No | No | INPUT | ||
lc_otp_program_i.count[237:232] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT |
lc_otp_program_i.count[238] | No | No | No | INPUT | ||
lc_otp_program_i.count[257:239] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT |
lc_otp_program_i.count[258] | No | No | No | INPUT | ||
lc_otp_program_i.count[261:259] | Yes | Yes | *T36,*T192,*T193 | Yes | T36,T192,T193 | INPUT |
lc_otp_program_i.count[263:262] | No | No | No | INPUT | ||
lc_otp_program_i.count[264] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT |
lc_otp_program_i.count[265] | No | No | No | INPUT | ||
lc_otp_program_i.count[280:266] | Yes | Yes | *T36,*T192,*T193 | Yes | T36,T192,T193 | INPUT |
lc_otp_program_i.count[281] | No | No | No | INPUT | ||
lc_otp_program_i.count[286:282] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT |
lc_otp_program_i.count[287] | No | No | No | INPUT | ||
lc_otp_program_i.count[301:288] | Yes | Yes | *T36,*T192,*T193 | Yes | T36,T192,T193 | INPUT |
lc_otp_program_i.count[302] | No | No | No | INPUT | ||
lc_otp_program_i.count[304:303] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT |
lc_otp_program_i.count[305] | No | No | No | INPUT | ||
lc_otp_program_i.count[308:306] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT |
lc_otp_program_i.count[309] | No | No | No | INPUT | ||
lc_otp_program_i.count[317:310] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT |
lc_otp_program_i.count[318] | No | No | No | INPUT | ||
lc_otp_program_i.count[330:319] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT |
lc_otp_program_i.count[332:331] | No | No | No | INPUT | ||
lc_otp_program_i.count[335:333] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT |
lc_otp_program_i.count[336] | No | No | No | INPUT | ||
lc_otp_program_i.count[347:337] | Yes | Yes | *T36,*T192,*T193 | Yes | T36,T192,T193 | INPUT |
lc_otp_program_i.count[348] | No | No | No | INPUT | ||
lc_otp_program_i.count[350:349] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT |
lc_otp_program_i.count[351] | No | No | No | INPUT | ||
lc_otp_program_i.count[354:352] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT |
lc_otp_program_i.count[355] | No | No | No | INPUT | ||
lc_otp_program_i.count[359:356] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT |
lc_otp_program_i.count[360] | No | No | No | INPUT | ||
lc_otp_program_i.count[372:361] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT |
lc_otp_program_i.count[373] | No | No | No | INPUT | ||
lc_otp_program_i.count[374] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT |
lc_otp_program_i.count[376:375] | No | No | No | INPUT | ||
lc_otp_program_i.count[383:377] | Yes | Yes | T36,T192,T193 | Yes | T36,T192,T193 | INPUT |
lc_otp_program_i.state[5:0] | Yes | Yes | T36,T48,T192 | Yes | T36,T48,T192 | INPUT |
lc_otp_program_i.state[6] | No | No | No | INPUT | ||
lc_otp_program_i.state[17:7] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT |
lc_otp_program_i.state[18] | No | No | No | INPUT | ||
lc_otp_program_i.state[36:19] | Yes | Yes | *T121,*T36,*T48 | Yes | T48,T188,T193 | INPUT |
lc_otp_program_i.state[38:37] | No | No | No | INPUT | ||
lc_otp_program_i.state[54:39] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT |
lc_otp_program_i.state[55] | No | No | No | INPUT | ||
lc_otp_program_i.state[68:56] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT |
lc_otp_program_i.state[69] | No | No | No | INPUT | ||
lc_otp_program_i.state[91:70] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT |
lc_otp_program_i.state[92] | No | No | No | INPUT | ||
lc_otp_program_i.state[94:93] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT |
lc_otp_program_i.state[95] | No | No | No | INPUT | ||
lc_otp_program_i.state[96] | Yes | Yes | *T188,*T194 | Yes | T188,T194 | INPUT |
lc_otp_program_i.state[97] | No | No | No | INPUT | ||
lc_otp_program_i.state[108:98] | Yes | Yes | *T188,*T194,*T121 | Yes | T188,T194,T48 | INPUT |
lc_otp_program_i.state[109] | No | No | No | INPUT | ||
lc_otp_program_i.state[117:110] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT |
lc_otp_program_i.state[118] | No | No | No | INPUT | ||
lc_otp_program_i.state[119] | Yes | Yes | *T188,*T194 | Yes | T188,T194 | INPUT |
lc_otp_program_i.state[121:120] | No | No | No | INPUT | ||
lc_otp_program_i.state[127:122] | Yes | Yes | *T121,*T44,*T36 | Yes | T48,T66,T150 | INPUT |
lc_otp_program_i.state[128] | No | No | No | INPUT | ||
lc_otp_program_i.state[134:129] | Yes | Yes | T121,T44,T36 | Yes | T48,T66,T150 | INPUT |
lc_otp_program_i.state[135] | No | No | No | INPUT | ||
lc_otp_program_i.state[140:136] | Yes | Yes | *T121,*T44,T36 | Yes | T48,T66,T150 | INPUT |
lc_otp_program_i.state[142:141] | No | No | No | INPUT | ||
lc_otp_program_i.state[146:143] | Yes | Yes | *T121,*T44,*T36 | Yes | T48,T66,T150 | INPUT |
lc_otp_program_i.state[147] | No | No | No | INPUT | ||
lc_otp_program_i.state[148] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT |
lc_otp_program_i.state[149] | No | No | No | INPUT | ||
lc_otp_program_i.state[150] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT |
lc_otp_program_i.state[151] | No | No | No | INPUT | ||
lc_otp_program_i.state[152] | Yes | Yes | *T188,*T194 | Yes | T188,T194 | INPUT |
lc_otp_program_i.state[153] | No | No | No | INPUT | ||
lc_otp_program_i.state[159:154] | Yes | Yes | *T121,*T44,T36 | Yes | T48,T66,T150 | INPUT |
lc_otp_program_i.state[160] | No | No | No | INPUT | ||
lc_otp_program_i.state[171:161] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT |
lc_otp_program_i.state[172] | No | No | No | INPUT | ||
lc_otp_program_i.state[180:173] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT |
lc_otp_program_i.state[181] | No | No | No | INPUT | ||
lc_otp_program_i.state[185:182] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT |
lc_otp_program_i.state[186] | No | No | No | INPUT | ||
lc_otp_program_i.state[187] | Yes | Yes | *T188,*T194 | Yes | T188,T194 | INPUT |
lc_otp_program_i.state[188] | No | No | No | INPUT | ||
lc_otp_program_i.state[191:189] | Yes | Yes | *T121,*T44,*T36 | Yes | T48,T66,T150 | INPUT |
lc_otp_program_i.state[192] | No | No | No | INPUT | ||
lc_otp_program_i.state[193] | Yes | Yes | *T121,*T44,*T36 | Yes | T48,T66,T150 | INPUT |
lc_otp_program_i.state[195:194] | No | No | No | INPUT | ||
lc_otp_program_i.state[208:196] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT |
lc_otp_program_i.state[209] | No | No | No | INPUT | ||
lc_otp_program_i.state[214:210] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT |
lc_otp_program_i.state[215] | No | No | No | INPUT | ||
lc_otp_program_i.state[225:216] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT |
lc_otp_program_i.state[226] | No | No | No | INPUT | ||
lc_otp_program_i.state[227] | Yes | Yes | *T188,*T194 | Yes | T188,T194 | INPUT |
lc_otp_program_i.state[228] | No | No | No | INPUT | ||
lc_otp_program_i.state[242:229] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT |
lc_otp_program_i.state[243] | No | No | No | INPUT | ||
lc_otp_program_i.state[252:244] | Yes | Yes | *T5,*T121,*T44 | Yes | T46,T48,T66 | INPUT |
lc_otp_program_i.state[254:253] | No | No | No | INPUT | ||
lc_otp_program_i.state[259:255] | Yes | Yes | T36,T48,T192 | Yes | T36,T48,T192 | INPUT |
lc_otp_program_i.state[260] | No | No | No | INPUT | ||
lc_otp_program_i.state[269:261] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT |
lc_otp_program_i.state[270] | No | No | No | INPUT | ||
lc_otp_program_i.state[271] | Yes | Yes | *T121,*T44,*T46 | Yes | T46,T48,T66 | INPUT |
lc_otp_program_i.state[272] | No | No | No | INPUT | ||
lc_otp_program_i.state[285:273] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT |
lc_otp_program_i.state[286] | No | No | No | INPUT | ||
lc_otp_program_i.state[289:287] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT |
lc_otp_program_i.state[290] | No | No | No | INPUT | ||
lc_otp_program_i.state[296:291] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT |
lc_otp_program_i.state[297] | No | No | No | INPUT | ||
lc_otp_program_i.state[310:298] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT |
lc_otp_program_i.state[311] | No | No | No | INPUT | ||
lc_otp_program_i.state[319:312] | Yes | Yes | T188,T194,T36 | Yes | T188,T194,T36 | INPUT |
lc_otp_program_i.req | Yes | Yes | T36,T47,T48 | Yes | T36,T47,T48 | INPUT |
lc_otp_program_o.ack | Yes | Yes | T36,T47,T48 | Yes | T36,T47,T48 | OUTPUT |
lc_otp_program_o.err | Yes | Yes | T198,T199,T200 | Yes | T198,T199,T200 | OUTPUT |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T46,T53,T47 | Yes | T1,T2,T3 | INPUT |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T46,T53,T47 | Yes | T1,T2,T3 | INPUT |
lc_dft_en_i[3:0] | Yes | Yes | T53,T47,T88 | Yes | T1,T2,T3 | INPUT |
lc_escalate_en_i[3:0] | Yes | Yes | T53,T88,T89 | Yes | T53,T47,T88 | INPUT |
lc_check_byp_en_i[3:0] | Yes | Yes | T47,T48,T66 | Yes | T36,T47,T48 | INPUT |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T53,T47,T48 | Yes | T1,T2,T4 | OUTPUT |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T46,T201,T202 | Yes | T46,T196,T197 | OUTPUT |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T53,T48,T66 | Yes | T2,T4,T38 | OUTPUT |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T4,T106,T7 | Yes | T53,T66,T188 | OUTPUT |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T46,T53,T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T46,T201,T202 | Yes | T46,T196,T197 | OUTPUT |
otp_lc_data_o.count[12:0] | Yes | Yes | *T36,*T192,*T193 | Yes | T193,T195,T182 | OUTPUT |
otp_lc_data_o.count[13] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[16:14] | Yes | Yes | T36,T192,T193 | Yes | T193,T195,T182 | OUTPUT |
otp_lc_data_o.count[17] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[24:18] | Yes | Yes | *T36,*T192,*T193 | Yes | T193,T195,T182 | OUTPUT |
otp_lc_data_o.count[25] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[30:26] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.count[31] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[33:32] | Yes | Yes | T36,T192,T193 | Yes | T193,T195,T182 | OUTPUT |
otp_lc_data_o.count[34] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[43:35] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[44] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[51:45] | Yes | Yes | *T121,*T36,*T192 | Yes | T193,T156,T195 | OUTPUT |
otp_lc_data_o.count[52] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[59:53] | Yes | Yes | *T121,*T36,*T192 | Yes | T193,T156,T195 | OUTPUT |
otp_lc_data_o.count[60] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[64:61] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[65] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[67:66] | Yes | Yes | T46,T53,T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[68] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[71:69] | Yes | Yes | *T36,*T192,*T193 | Yes | T193,T195,T182 | OUTPUT |
otp_lc_data_o.count[72] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[73] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[74] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[86:75] | Yes | Yes | *T121,*T36,*T192 | Yes | T193,T156,T195 | OUTPUT |
otp_lc_data_o.count[87] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[89:88] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.count[90] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[97:91] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[98] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[109:99] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.count[110] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[112:111] | Yes | Yes | T5,T121,T36 | Yes | T196,T197,T193 | OUTPUT |
otp_lc_data_o.count[113] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[118:114] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[119] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[123:120] | Yes | Yes | *T5,*T121,*T36 | Yes | T196,T197,T193 | OUTPUT |
otp_lc_data_o.count[125:124] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[127:126] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[128] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[131:129] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT |
otp_lc_data_o.count[132] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[134:133] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.count[136:135] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[138:137] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[139] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[140] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT |
otp_lc_data_o.count[141] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[149:142] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.count[150] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[158:151] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.count[160:159] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[167:161] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT |
otp_lc_data_o.count[168] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[171:169] | Yes | Yes | *T36,*T192,*T193 | Yes | T193,T195,T182 | OUTPUT |
otp_lc_data_o.count[172] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[174:173] | Yes | Yes | T47,T48,T66 | Yes | T47,T48,T66 | OUTPUT |
otp_lc_data_o.count[175] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[180:176] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[181] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[183:182] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[184] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[190:185] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT |
otp_lc_data_o.count[191] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[197:192] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.count[198] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[207:199] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT |
otp_lc_data_o.count[208] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[216:209] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[217] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[225:218] | Yes | Yes | *T36,*T192,*T193 | Yes | T193,T195,T182 | OUTPUT |
otp_lc_data_o.count[226] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[227] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[228] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[230:229] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[231] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[237:232] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[238] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[257:239] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.count[258] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[261:259] | Yes | Yes | *T36,*T192,*T193 | Yes | T193,T195,T182 | OUTPUT |
otp_lc_data_o.count[263:262] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[264] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.count[265] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[280:266] | Yes | Yes | *T36,*T192,*T193 | Yes | T193,T195,T182 | OUTPUT |
otp_lc_data_o.count[281] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[286:282] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT |
otp_lc_data_o.count[287] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[301:288] | Yes | Yes | *T36,*T192,*T193 | Yes | T193,T195,T182 | OUTPUT |
otp_lc_data_o.count[302] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[304:303] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT |
otp_lc_data_o.count[305] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[308:306] | Yes | Yes | *T46,*T53,T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[309] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[317:310] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.count[318] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[330:319] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[332:331] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[335:333] | Yes | Yes | *T46,*T53,T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[336] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[347:337] | Yes | Yes | *T36,*T192,*T193 | Yes | T193,T195,T182 | OUTPUT |
otp_lc_data_o.count[348] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[350:349] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT |
otp_lc_data_o.count[351] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[354:352] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.count[355] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[359:356] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.count[360] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[372:361] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT |
otp_lc_data_o.count[373] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[374] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT |
otp_lc_data_o.count[376:375] | No | No | No | OUTPUT | ||
otp_lc_data_o.count[383:377] | Yes | Yes | T36,T192,T193 | Yes | T193,T195,T182 | OUTPUT |
otp_lc_data_o.state[5:0] | Yes | Yes | *T36,T48,*T192 | Yes | T48,T193,T195 | OUTPUT |
otp_lc_data_o.state[6] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[17:7] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.state[18] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[36:19] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[38:37] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[54:39] | Yes | Yes | *T36,*T48,*T192 | Yes | T48,T193,T195 | OUTPUT |
otp_lc_data_o.state[55] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[68:56] | Yes | Yes | *T36,*T48,*T192 | Yes | T48,T193,T195 | OUTPUT |
otp_lc_data_o.state[69] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[91:70] | Yes | Yes | *T36,*T48,*T192 | Yes | T48,T193,T195 | OUTPUT |
otp_lc_data_o.state[92] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[94:93] | Yes | Yes | *T36,*T48,*T192 | Yes | T48,T193,T195 | OUTPUT |
otp_lc_data_o.state[95] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[96] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.state[97] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[108:98] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.state[109] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[117:110] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.state[118] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[119] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.state[121:120] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[127:122] | Yes | Yes | *T121,*T44,*T36 | Yes | T48,T66,T150 | OUTPUT |
otp_lc_data_o.state[128] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[134:129] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[135] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[140:136] | Yes | Yes | *T121,*T44,*T36 | Yes | T48,T66,T150 | OUTPUT |
otp_lc_data_o.state[142:141] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[146:143] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[147] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[148] | Yes | Yes | *T36,*T48,*T192 | Yes | T48,T193,T195 | OUTPUT |
otp_lc_data_o.state[149] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[150] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[151] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[152] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.state[153] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[159:154] | Yes | Yes | *T121,*T44,*T36 | Yes | T48,T66,T150 | OUTPUT |
otp_lc_data_o.state[160] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[171:161] | Yes | Yes | *T36,*T48,*T192 | Yes | T48,T193,T195 | OUTPUT |
otp_lc_data_o.state[172] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[180:173] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[181] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[185:182] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.state[186] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[187] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.state[188] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[191:189] | Yes | Yes | *T121,*T44,*T36 | Yes | T48,T66,T150 | OUTPUT |
otp_lc_data_o.state[192] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[193] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[195:194] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[208:196] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.state[209] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[214:210] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.state[215] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[225:216] | Yes | Yes | *T36,*T48,*T192 | Yes | T48,T193,T195 | OUTPUT |
otp_lc_data_o.state[226] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[227] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.state[228] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[242:229] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.state[243] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[252:244] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[254:253] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[259:255] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[260] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[269:261] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[270] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[271] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[272] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[285:273] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT |
otp_lc_data_o.state[286] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[289:287] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT |
otp_lc_data_o.state[290] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[296:291] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.state[297] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[310:298] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.state[311] | No | No | No | OUTPUT | ||
otp_lc_data_o.state[319:312] | Yes | Yes | T1,T2,T3 | Yes | T46,T53,T47 | OUTPUT |
otp_lc_data_o.error | Yes | Yes | T53,T88,T89 | Yes | T53,T47,T88 | OUTPUT |
otp_lc_data_o.valid | Yes | Yes | T46,T53,T47 | Yes | T1,T2,T3 | OUTPUT |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | ||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T46,T201,T202 | Yes | T46,T196,T197 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T1,T2,T4 | Yes | T53,T47,T88 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T46,T201,T202 | Yes | T46,T196,T197 | OUTPUT |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T3,T4,T38 | Yes | T46,T53,T47 | OUTPUT |
flash_otp_key_i.addr_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
flash_otp_key_i.data_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT |
flash_otp_key_o.seed_valid | Yes | Yes | T46,T53,T47 | Yes | T2,T3,T4 | OUTPUT |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T7,T8,T10 | Yes | T2,T3,T5 | OUTPUT |
flash_otp_key_o.key[127:0] | Yes | Yes | T3,T4,T38 | Yes | T106,T39,T121 | OUTPUT |
flash_otp_key_o.addr_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT |
flash_otp_key_o.data_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_i[0].req | Yes | Yes | T203,T148,T149 | Yes | T203,T148,T149 | INPUT |
sram_otp_key_i[1].req | Yes | Yes | T203,T148,T204 | Yes | T203,T148,T204 | INPUT |
sram_otp_key_i[2].req | Yes | Yes | T205,T206,T207 | Yes | T205,T206,T207 | INPUT |
sram_otp_key_i[3].req | No | No | No | INPUT | ||
sram_otp_key_o[0].seed_valid | Yes | Yes | T46,T53,T47 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T7,T8,T10 | Yes | T2,T3,T5 | OUTPUT |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T3,T4,T38 | Yes | T106,T39,T121 | OUTPUT |
sram_otp_key_o[0].ack | Yes | Yes | T203,T148,T149 | Yes | T203,T148,T149 | OUTPUT |
sram_otp_key_o[1].seed_valid | Yes | Yes | T46,T53,T47 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T7,T8,T10 | Yes | T2,T3,T5 | OUTPUT |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T3,T4,T38 | Yes | T106,T39,T121 | OUTPUT |
sram_otp_key_o[1].ack | Yes | Yes | T203,T148,T204 | Yes | T203,T148,T204 | OUTPUT |
sram_otp_key_o[2].seed_valid | Yes | Yes | T46,T53,T47 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T7,T8,T10 | Yes | T2,T3,T5 | OUTPUT |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T3,T4,T38 | Yes | T106,T39,T121 | OUTPUT |
sram_otp_key_o[2].ack | Yes | Yes | T206,T207,T208 | Yes | T206,T207,T208 | OUTPUT |
sram_otp_key_o[3].seed_valid | Yes | Yes | T46,T53,T47 | Yes | T2,T3,T4 | OUTPUT |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T7,T8,T10 | Yes | T2,T3,T5 | OUTPUT |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T3,T4,T38 | Yes | T106,T39,T121 | OUTPUT |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | ||
otbn_otp_key_i.req | Yes | Yes | T209,T144,T180 | Yes | T209,T144,T180 | INPUT |
otbn_otp_key_o.seed_valid | Yes | Yes | T46,T53,T47 | Yes | T2,T3,T4 | OUTPUT |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T7,T8,T10 | Yes | T2,T3,T5 | OUTPUT |
otbn_otp_key_o.key[127:0] | Yes | Yes | T3,T4,T38 | Yes | T106,T39,T121 | OUTPUT |
otbn_otp_key_o.ack | Yes | Yes | T209,T144,T180 | Yes | T209,T144,T180 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T2,T4,T5 | Yes | T46,T53,T47 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[22:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[23] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[36:24] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[37] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[57:38] | Yes | Yes | *T210,*T211,*T1 | Yes | T210,T211,T46 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[58] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[93:59] | Yes | Yes | *T210,*T211,*T212 | Yes | T210,T211,T212 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[94] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[126:95] | Yes | Yes | *T213,*T1,*T2 | Yes | T213,T46,T53 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[127] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[131:128] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[132] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[161:133] | Yes | Yes | *T212,*T156,*T205 | Yes | T212,T156,T205 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[162] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[172:163] | Yes | Yes | *T213,*T210,*T211 | Yes | T213,T210,T211 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[173] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[188:174] | Yes | Yes | *T212,*T156,*T205 | Yes | T212,T156,T205 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[189] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[246:190] | Yes | Yes | *T213,*T211,*T1 | Yes | T213,T211,T46 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.manuf_state[247] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:248] | Yes | Yes | T212,T156,T205 | Yes | T212,T156,T205 | OUTPUT |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T53,T66,T188 | Yes | T1,T3,T4 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T46,T53,T47 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T46,T53,T47 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T46,T53,T47 | OUTPUT |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | ||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T1,T2,T3 | Yes | T46,T53,T47 | OUTPUT |
otp_broadcast_o.valid[3:0] | Yes | Yes | T46,T53,T47 | Yes | T1,T2,T3 | OUTPUT |
otp_ext_voltage_h_io | No | No | Yes | T21,T49 | INOUT | |
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | ||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | ||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | ||
cio_test_o[7:0] | No | No | No | OUTPUT | ||
cio_test_en_o[7:0] | Yes | Yes | T53,T47,T88 | Yes | T1,T2,T3 | OUTPUT |
Total | Covered | Percent | |
---|---|---|---|
Totals | 160 | 142 | 88.75 |
Total Bits | 10986 | 9309 | 84.74 |
Total Bits 0->1 | 5493 | 4668 | 84.98 |
Total Bits 1->0 | 5493 | 4641 | 84.49 |
Ports | 160 | 142 | 88.75 |
Port Bits | 10986 | 9309 | 84.74 |
Port Bits 0->1 | 5493 | 4668 | 84.98 |
Port Bits 1->0 | 5493 | 4641 | 84.49 |
Name | Toggle | Toggle 1->0 | Tests | Toggle 0->1 | Tests | Direction | Exclude Annotation |
clk_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_ni | Yes | Yes | T46,T53,T47 | Yes | T1,T2,T3 | INPUT | |
clk_edn_i | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
rst_edn_ni | Yes | Yes | T46,T53,T47 | Yes | T1,T2,T3 | INPUT | |
edn_o.edn_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT | |
edn_i.edn_bus[31:0] | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
edn_i.edn_fips | No | No | Yes | T144,T180,T181 | INPUT | ||
edn_i.edn_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
core_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[11:0] | Yes | Yes | *T98,*T99,*T100 | Yes | T98,T99,T100 | INPUT | |
core_tl_i.a_address[15:12] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[17:16] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_source[5:0] | Yes | Yes | *T94,*T30,*T45 | Yes | T94,T30,T45 | INPUT | |
core_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_size[1:0] | Yes | Yes | T98,T99,T100 | Yes | T98,T99,T100 | INPUT | |
core_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
core_tl_i.a_opcode[2:0] | Yes | Yes | T30,T45,T101 | Yes | T30,T45,T101 | INPUT | |
core_tl_i.a_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
core_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_error | Yes | Yes | T98,T99,T100 | Yes | T98,T99,T100 | OUTPUT | |
core_tl_o.d_user.data_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
core_tl_o.d_sink | Yes | Yes | T98,T99,T100 | Yes | T98,T99,T100 | OUTPUT | |
core_tl_o.d_source[5:0] | Yes | Yes | *T182,*T183,*T74 | Yes | T182,T183,T74 | OUTPUT | |
core_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_size[1:0] | Yes | Yes | T98,T99,T100 | Yes | T98,T99,T100 | OUTPUT | |
core_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_opcode[0] | Yes | Yes | *T122,*T44,*T184 | Yes | T122,T184,T46 | OUTPUT | |
core_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
core_tl_o.d_valid | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_i.d_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.data_intg[6:0] | Yes | Yes | T74,T98,T99 | Yes | T74,T98,T99 | INPUT | |
prim_tl_i.a_user.cmd_intg[6:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.instr_type[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_user.rsvd[4:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_data[31:0] | Yes | Yes | T74,T98,T99 | Yes | T74,T98,T99 | INPUT | |
prim_tl_i.a_mask[3:0] | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[4:0] | Yes | Yes | *T98,*T99,*T100 | Yes | T98,T99,T100 | INPUT | |
prim_tl_i.a_address[14:5] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[17:15] | Yes | Yes | *T74,*T98,*T99 | Yes | T74,T98,T99 | INPUT | |
prim_tl_i.a_address[19:18] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[20] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[29:21] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_address[30] | Yes | Yes | *T1,*T2,*T3 | Yes | T1,T2,T3 | INPUT | |
prim_tl_i.a_address[31] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_source[5:0] | Yes | Yes | *T94,*T30,*T45 | Yes | T94,T30,T45 | INPUT | |
prim_tl_i.a_source[7:6] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_size[1:0] | Yes | Yes | T98,T99,T100 | Yes | T98,T99,T100 | INPUT | |
prim_tl_i.a_param[2:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
prim_tl_i.a_opcode[2:0] | Yes | Yes | T30,T45,T101 | Yes | T30,T45,T101 | INPUT | |
prim_tl_i.a_valid | Yes | Yes | T74,T98,T99 | Yes | T74,T98,T99 | INPUT | |
prim_tl_o.a_ready | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
prim_tl_o.d_error | Yes | Yes | T1,T2,T3 | Yes | T53,T47,T88 | OUTPUT | |
prim_tl_o.d_user.data_intg[6:0] | Yes | Yes | T74,T98,T99 | Yes | T74,T98,T99 | OUTPUT | |
prim_tl_o.d_user.rsp_intg[6:0] | Yes | Yes | T74,T98,T99 | Yes | T74,T98,T99 | OUTPUT | |
prim_tl_o.d_data[31:0] | Yes | Yes | T1,T2,T3 | Yes | T53,T47,T88 | OUTPUT | |
prim_tl_o.d_sink | Yes | Yes | T98,T99,T100 | Yes | T98,T99,T100 | OUTPUT | |
prim_tl_o.d_source[5:0] | Yes | Yes | *T74,T100,T185 | Yes | T74,T98,T99 | OUTPUT | |
prim_tl_o.d_source[7:6] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_size[1:0] | Yes | Yes | T98,T99,T100 | Yes | T98,T99,T100 | OUTPUT | |
prim_tl_o.d_param[2:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_opcode[0] | Yes | Yes | *T1,*T2,*T3 | Yes | T53,T47,T88 | OUTPUT | |
prim_tl_o.d_opcode[2:1] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
prim_tl_o.d_valid | Yes | Yes | T74,T98,T99 | Yes | T74,T98,T99 | OUTPUT | |
intr_otp_operation_done_o | Yes | Yes | T128,T186,T187 | Yes | T128,T186,T187 | OUTPUT | |
intr_otp_error_o | Yes | Yes | T128,T186,T187 | Yes | T128,T186,T187 | OUTPUT | |
alert_rx_i[0].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[0].ack_p | Yes | Yes | T188,T83,T102 | Yes | T188,T83,T102 | INPUT | |
alert_rx_i[0].ping_n | Yes | Yes | T102,T103,T105 | Yes | T102,T103,T105 | INPUT | |
alert_rx_i[0].ping_p | Yes | Yes | T102,T103,T105 | Yes | T102,T103,T105 | INPUT | |
alert_rx_i[1].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[1].ack_p | Yes | Yes | T53,T47,T88 | Yes | T53,T47,T88 | INPUT | |
alert_rx_i[1].ping_n | Yes | Yes | T102,T103,T112 | Yes | T102,T103,T112 | INPUT | |
alert_rx_i[1].ping_p | Yes | Yes | T102,T103,T112 | Yes | T102,T103,T112 | INPUT | |
alert_rx_i[2].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[2].ack_p | Yes | Yes | T83,T102,T189 | Yes | T83,T102,T189 | INPUT | |
alert_rx_i[2].ping_n | Yes | Yes | T102,T103,T105 | Yes | T102,T103,T105 | INPUT | |
alert_rx_i[2].ping_p | Yes | Yes | T102,T103,T105 | Yes | T102,T103,T105 | INPUT | |
alert_rx_i[3].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[3].ack_p | Yes | Yes | T83,T102,T84 | Yes | T83,T102,T84 | INPUT | |
alert_rx_i[3].ping_n | Yes | Yes | T102,T103,T105 | Yes | T103,T105 | INPUT | |
alert_rx_i[3].ping_p | Yes | Yes | T103,T105 | Yes | T102,T103,T105 | INPUT | |
alert_rx_i[4].ack_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
alert_rx_i[4].ack_p | Yes | Yes | T83,T102,T84 | Yes | T83,T102,T84 | INPUT | |
alert_rx_i[4].ping_n | Yes | Yes | T102,T103,T105 | Yes | T102,T103,T105 | INPUT | |
alert_rx_i[4].ping_p | Yes | Yes | T102,T103,T105 | Yes | T102,T103,T105 | INPUT | |
alert_tx_o[0].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[0].alert_p | Yes | Yes | T188,T83,T102 | Yes | T188,T83,T102 | OUTPUT | |
alert_tx_o[1].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[1].alert_p | Yes | Yes | T53,T47,T88 | Yes | T53,T47,T88 | OUTPUT | |
alert_tx_o[2].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[2].alert_p | Yes | Yes | T83,T102,T189 | Yes | T83,T102,T189 | OUTPUT | |
alert_tx_o[3].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[3].alert_p | Yes | Yes | T83,T102,T84 | Yes | T83,T102,T84 | OUTPUT | |
alert_tx_o[4].alert_n | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | OUTPUT | |
alert_tx_o[4].alert_p | Yes | Yes | T83,T102,T84 | Yes | T83,T102,T84 | OUTPUT | |
obs_ctrl_i.obmen[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obmsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
obs_ctrl_i.obgsl[3:0] | Excluded | Excluded | Excluded | INPUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
otp_obs_o[7:0] | Unreachable | Unreachable | Unreachable | OUTPUT | |||
otp_ast_pwr_seq_o.pwr_seq[1:0] | No | No | No | OUTPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[0] | No | No | No | INPUT | |||
otp_ast_pwr_seq_h_i.pwr_seq_h[1] | Yes | Yes | T1,T2,T3 | Yes | T138,T154,T43 | INPUT | |
pwr_otp_i.otp_init | Yes | Yes | T1,T2,T3 | Yes | T1,T2,T3 | INPUT | |
pwr_otp_o.otp_idle | Yes | Yes | T46,T36,T53 | Yes | T1,T2,T3 | OUTPUT | |
pwr_otp_o.otp_done | Yes | Yes | T46,T53,T47 | Yes | T1,T2,T3 | OUTPUT | |
lc_otp_vendor_test_i.ctrl[20:0] | No | No | Yes | T190,T44,T191 | INPUT | ||
lc_otp_vendor_test_i.ctrl[21] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[22] | No | No | Yes | T191 | INPUT | ||
lc_otp_vendor_test_i.ctrl[25:23] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[27:26] | No | No | Yes | T191,T44,T190 | INPUT | ||
lc_otp_vendor_test_i.ctrl[29:28] | No | No | No | INPUT | |||
lc_otp_vendor_test_i.ctrl[31:30] | No | No | Yes | T44,T191 | INPUT | ||
lc_otp_vendor_test_o.status[31:0] | No | No | No | OUTPUT | |||
lc_otp_program_i.count[12:0] | Yes | Yes | *T36,*T192,*T193 | Yes | T36,T192,T193 | INPUT | |
lc_otp_program_i.count[13] | No | No | No | INPUT | |||
lc_otp_program_i.count[16:14] | Yes | Yes | T36,T192,T193 | Yes | T36,T192,T193 | INPUT | |
lc_otp_program_i.count[17] | No | No | No | INPUT | |||
lc_otp_program_i.count[24:18] | Yes | Yes | T36,T192,T193 | Yes | T36,T192,T193 | INPUT | |
lc_otp_program_i.count[25] | No | No | No | INPUT | |||
lc_otp_program_i.count[30:26] | Yes | Yes | *T188,*T194,*T121 | Yes | T188,T194,T193 | INPUT | |
lc_otp_program_i.count[31] | No | No | No | INPUT | |||
lc_otp_program_i.count[33:32] | Yes | Yes | T36,T192,T193 | Yes | T36,T192,T193 | INPUT | |
lc_otp_program_i.count[34] | No | No | No | INPUT | |||
lc_otp_program_i.count[43:35] | Yes | Yes | *T121,*T36,*T192 | Yes | T188,T193,T156 | INPUT | |
lc_otp_program_i.count[44] | No | No | No | INPUT | |||
lc_otp_program_i.count[51:45] | Yes | Yes | *T121,*T36,*T192 | Yes | T193,T156,T195 | INPUT | |
lc_otp_program_i.count[52] | No | No | No | INPUT | |||
lc_otp_program_i.count[59:53] | Yes | Yes | *T121,*T36,*T192 | Yes | T193,T156,T195 | INPUT | |
lc_otp_program_i.count[60] | No | No | No | INPUT | |||
lc_otp_program_i.count[64:61] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT | |
lc_otp_program_i.count[65] | No | No | No | INPUT | |||
lc_otp_program_i.count[67:66] | Yes | Yes | T121,T36,T192 | Yes | T188,T193,T156 | INPUT | |
lc_otp_program_i.count[68] | No | No | No | INPUT | |||
lc_otp_program_i.count[71:69] | Yes | Yes | *T36,*T192,*T193 | Yes | T36,T192,T193 | INPUT | |
lc_otp_program_i.count[72] | No | No | No | INPUT | |||
lc_otp_program_i.count[73] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT | |
lc_otp_program_i.count[74] | No | No | No | INPUT | |||
lc_otp_program_i.count[86:75] | Yes | Yes | *T121,*T36,*T192 | Yes | T193,T156,T195 | INPUT | |
lc_otp_program_i.count[87] | No | No | No | INPUT | |||
lc_otp_program_i.count[89:88] | Yes | Yes | *T188,*T194,*T5 | Yes | T188,T194,T196 | INPUT | |
lc_otp_program_i.count[90] | No | No | No | INPUT | |||
lc_otp_program_i.count[97:91] | Yes | Yes | T36,T192,*T188 | Yes | T36,T192,T188 | INPUT | |
lc_otp_program_i.count[98] | No | No | No | INPUT | |||
lc_otp_program_i.count[109:99] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT | |
lc_otp_program_i.count[110] | No | No | No | INPUT | |||
lc_otp_program_i.count[112:111] | Yes | Yes | T5,T121,T36 | Yes | T196,T197,T193 | INPUT | |
lc_otp_program_i.count[113] | No | No | No | INPUT | |||
lc_otp_program_i.count[118:114] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT | |
lc_otp_program_i.count[119] | No | No | No | INPUT | |||
lc_otp_program_i.count[123:120] | Yes | Yes | *T5,*T121,T36 | Yes | T196,T197,T193 | INPUT | |
lc_otp_program_i.count[125:124] | No | No | No | INPUT | |||
lc_otp_program_i.count[127:126] | Yes | Yes | *T5,*T121,T36 | Yes | T188,T196,T197 | INPUT | |
lc_otp_program_i.count[128] | No | No | No | INPUT | |||
lc_otp_program_i.count[131:129] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT | |
lc_otp_program_i.count[132] | No | No | No | INPUT | |||
lc_otp_program_i.count[134:133] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT | |
lc_otp_program_i.count[136:135] | No | No | No | INPUT | |||
lc_otp_program_i.count[138:137] | Yes | Yes | T36,T192,*T188 | Yes | T36,T192,T188 | INPUT | |
lc_otp_program_i.count[139] | No | No | No | INPUT | |||
lc_otp_program_i.count[140] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT | |
lc_otp_program_i.count[141] | No | No | No | INPUT | |||
lc_otp_program_i.count[149:142] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT | |
lc_otp_program_i.count[150] | No | No | No | INPUT | |||
lc_otp_program_i.count[158:151] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT | |
lc_otp_program_i.count[160:159] | No | No | No | INPUT | |||
lc_otp_program_i.count[167:161] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT | |
lc_otp_program_i.count[168] | No | No | No | INPUT | |||
lc_otp_program_i.count[171:169] | Yes | Yes | *T36,*T192,*T193 | Yes | T36,T192,T193 | INPUT | |
lc_otp_program_i.count[172] | No | No | No | INPUT | |||
lc_otp_program_i.count[174:173] | Yes | Yes | T1,T2,T3 | Yes | T46,T53,T47 | INPUT | |
lc_otp_program_i.count[175] | No | No | No | INPUT | |||
lc_otp_program_i.count[180:176] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT | |
lc_otp_program_i.count[181] | No | No | No | INPUT | |||
lc_otp_program_i.count[183:182] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT | |
lc_otp_program_i.count[184] | No | No | No | INPUT | |||
lc_otp_program_i.count[190:185] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT | |
lc_otp_program_i.count[191] | No | No | No | INPUT | |||
lc_otp_program_i.count[197:192] | Yes | Yes | *T188,*T194,*T1 | Yes | T188,T194,T46 | INPUT | |
lc_otp_program_i.count[198] | No | No | No | INPUT | |||
lc_otp_program_i.count[207:199] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT | |
lc_otp_program_i.count[208] | No | No | No | INPUT | |||
lc_otp_program_i.count[216:209] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT | |
lc_otp_program_i.count[217] | No | No | No | INPUT | |||
lc_otp_program_i.count[225:218] | Yes | Yes | *T36,*T192,*T193 | Yes | T36,T192,T193 | INPUT | |
lc_otp_program_i.count[226] | No | No | No | INPUT | |||
lc_otp_program_i.count[227] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT | |
lc_otp_program_i.count[228] | No | No | No | INPUT | |||
lc_otp_program_i.count[230:229] | Yes | Yes | T36,T192,*T188 | Yes | T36,T192,T188 | INPUT | |
lc_otp_program_i.count[231] | No | No | No | INPUT | |||
lc_otp_program_i.count[237:232] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT | |
lc_otp_program_i.count[238] | No | No | No | INPUT | |||
lc_otp_program_i.count[257:239] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT | |
lc_otp_program_i.count[258] | No | No | No | INPUT | |||
lc_otp_program_i.count[261:259] | Yes | Yes | *T36,*T192,*T193 | Yes | T36,T192,T193 | INPUT | |
lc_otp_program_i.count[263:262] | No | No | No | INPUT | |||
lc_otp_program_i.count[264] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT | |
lc_otp_program_i.count[265] | No | No | No | INPUT | |||
lc_otp_program_i.count[280:266] | Yes | Yes | *T36,*T192,*T193 | Yes | T36,T192,T193 | INPUT | |
lc_otp_program_i.count[281] | No | No | No | INPUT | |||
lc_otp_program_i.count[286:282] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT | |
lc_otp_program_i.count[287] | No | No | No | INPUT | |||
lc_otp_program_i.count[301:288] | Yes | Yes | *T36,*T192,*T193 | Yes | T36,T192,T193 | INPUT | |
lc_otp_program_i.count[302] | No | No | No | INPUT | |||
lc_otp_program_i.count[304:303] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT | |
lc_otp_program_i.count[305] | No | No | No | INPUT | |||
lc_otp_program_i.count[308:306] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT | |
lc_otp_program_i.count[309] | No | No | No | INPUT | |||
lc_otp_program_i.count[317:310] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT | |
lc_otp_program_i.count[318] | No | No | No | INPUT | |||
lc_otp_program_i.count[330:319] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT | |
lc_otp_program_i.count[332:331] | No | No | No | INPUT | |||
lc_otp_program_i.count[335:333] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT | |
lc_otp_program_i.count[336] | No | No | No | INPUT | |||
lc_otp_program_i.count[347:337] | Yes | Yes | *T36,*T192,*T193 | Yes | T36,T192,T193 | INPUT | |
lc_otp_program_i.count[348] | No | No | No | INPUT | |||
lc_otp_program_i.count[350:349] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT | |
lc_otp_program_i.count[351] | No | No | No | INPUT | |||
lc_otp_program_i.count[354:352] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT | |
lc_otp_program_i.count[355] | No | No | No | INPUT | |||
lc_otp_program_i.count[359:356] | Yes | Yes | *T36,*T192,*T188 | Yes | T36,T192,T188 | INPUT | |
lc_otp_program_i.count[360] | No | No | No | INPUT | |||
lc_otp_program_i.count[372:361] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT | |
lc_otp_program_i.count[373] | No | No | No | INPUT | |||
lc_otp_program_i.count[374] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT | |
lc_otp_program_i.count[376:375] | No | No | No | INPUT | |||
lc_otp_program_i.count[383:377] | Yes | Yes | T36,T192,T193 | Yes | T36,T192,T193 | INPUT | |
lc_otp_program_i.state[5:0] | Yes | Yes | T36,T48,T192 | Yes | T36,T48,T192 | INPUT | |
lc_otp_program_i.state[6] | No | No | No | INPUT | |||
lc_otp_program_i.state[17:7] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT | |
lc_otp_program_i.state[18] | No | No | No | INPUT | |||
lc_otp_program_i.state[36:19] | Yes | Yes | *T121,*T36,*T48 | Yes | T48,T188,T193 | INPUT | |
lc_otp_program_i.state[38:37] | No | No | No | INPUT | |||
lc_otp_program_i.state[54:39] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT | |
lc_otp_program_i.state[55] | No | No | No | INPUT | |||
lc_otp_program_i.state[68:56] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT | |
lc_otp_program_i.state[69] | No | No | No | INPUT | |||
lc_otp_program_i.state[91:70] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT | |
lc_otp_program_i.state[92] | No | No | No | INPUT | |||
lc_otp_program_i.state[94:93] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT | |
lc_otp_program_i.state[95] | No | No | No | INPUT | |||
lc_otp_program_i.state[96] | Yes | Yes | *T188,*T194 | Yes | T188,T194 | INPUT | |
lc_otp_program_i.state[97] | No | No | No | INPUT | |||
lc_otp_program_i.state[108:98] | Yes | Yes | *T188,*T194,*T121 | Yes | T188,T194,T48 | INPUT | |
lc_otp_program_i.state[109] | No | No | No | INPUT | |||
lc_otp_program_i.state[117:110] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT | |
lc_otp_program_i.state[118] | No | No | No | INPUT | |||
lc_otp_program_i.state[119] | Yes | Yes | *T188,*T194 | Yes | T188,T194 | INPUT | |
lc_otp_program_i.state[121:120] | No | No | No | INPUT | |||
lc_otp_program_i.state[127:122] | Yes | Yes | *T121,*T44,*T36 | Yes | T48,T66,T150 | INPUT | |
lc_otp_program_i.state[128] | No | No | No | INPUT | |||
lc_otp_program_i.state[134:129] | Yes | Yes | T121,T44,T36 | Yes | T48,T66,T150 | INPUT | |
lc_otp_program_i.state[135] | No | No | No | INPUT | |||
lc_otp_program_i.state[140:136] | Yes | Yes | *T121,*T44,T36 | Yes | T48,T66,T150 | INPUT | |
lc_otp_program_i.state[142:141] | No | No | No | INPUT | |||
lc_otp_program_i.state[146:143] | Yes | Yes | *T121,*T44,*T36 | Yes | T48,T66,T150 | INPUT | |
lc_otp_program_i.state[147] | No | No | No | INPUT | |||
lc_otp_program_i.state[148] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT | |
lc_otp_program_i.state[149] | No | No | No | INPUT | |||
lc_otp_program_i.state[150] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT | |
lc_otp_program_i.state[151] | No | No | No | INPUT | |||
lc_otp_program_i.state[152] | Yes | Yes | *T188,*T194 | Yes | T188,T194 | INPUT | |
lc_otp_program_i.state[153] | No | No | No | INPUT | |||
lc_otp_program_i.state[159:154] | Yes | Yes | *T121,*T44,T36 | Yes | T48,T66,T150 | INPUT | |
lc_otp_program_i.state[160] | No | No | No | INPUT | |||
lc_otp_program_i.state[171:161] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT | |
lc_otp_program_i.state[172] | No | No | No | INPUT | |||
lc_otp_program_i.state[180:173] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT | |
lc_otp_program_i.state[181] | No | No | No | INPUT | |||
lc_otp_program_i.state[185:182] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT | |
lc_otp_program_i.state[186] | No | No | No | INPUT | |||
lc_otp_program_i.state[187] | Yes | Yes | *T188,*T194 | Yes | T188,T194 | INPUT | |
lc_otp_program_i.state[188] | No | No | No | INPUT | |||
lc_otp_program_i.state[191:189] | Yes | Yes | *T121,*T44,*T36 | Yes | T48,T66,T150 | INPUT | |
lc_otp_program_i.state[192] | No | No | No | INPUT | |||
lc_otp_program_i.state[193] | Yes | Yes | *T121,*T44,*T36 | Yes | T48,T66,T150 | INPUT | |
lc_otp_program_i.state[195:194] | No | No | No | INPUT | |||
lc_otp_program_i.state[208:196] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT | |
lc_otp_program_i.state[209] | No | No | No | INPUT | |||
lc_otp_program_i.state[214:210] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT | |
lc_otp_program_i.state[215] | No | No | No | INPUT | |||
lc_otp_program_i.state[225:216] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT | |
lc_otp_program_i.state[226] | No | No | No | INPUT | |||
lc_otp_program_i.state[227] | Yes | Yes | *T188,*T194 | Yes | T188,T194 | INPUT | |
lc_otp_program_i.state[228] | No | No | No | INPUT | |||
lc_otp_program_i.state[242:229] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT | |
lc_otp_program_i.state[243] | No | No | No | INPUT | |||
lc_otp_program_i.state[252:244] | Yes | Yes | *T5,*T121,*T44 | Yes | T46,T48,T66 | INPUT | |
lc_otp_program_i.state[254:253] | No | No | No | INPUT | |||
lc_otp_program_i.state[259:255] | Yes | Yes | T36,T48,T192 | Yes | T36,T48,T192 | INPUT | |
lc_otp_program_i.state[260] | No | No | No | INPUT | |||
lc_otp_program_i.state[269:261] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT | |
lc_otp_program_i.state[270] | No | No | No | INPUT | |||
lc_otp_program_i.state[271] | Yes | Yes | *T121,*T44,*T46 | Yes | T46,T48,T66 | INPUT | |
lc_otp_program_i.state[272] | No | No | No | INPUT | |||
lc_otp_program_i.state[285:273] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | INPUT | |
lc_otp_program_i.state[286] | No | No | No | INPUT | |||
lc_otp_program_i.state[289:287] | Yes | Yes | *T36,*T48,*T192 | Yes | T36,T48,T192 | INPUT | |
lc_otp_program_i.state[290] | No | No | No | INPUT | |||
lc_otp_program_i.state[296:291] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT | |
lc_otp_program_i.state[297] | No | No | No | INPUT | |||
lc_otp_program_i.state[310:298] | Yes | Yes | *T188,*T194,*T36 | Yes | T188,T194,T36 | INPUT | |
lc_otp_program_i.state[311] | No | No | No | INPUT | |||
lc_otp_program_i.state[319:312] | Yes | Yes | T188,T194,T36 | Yes | T188,T194,T36 | INPUT | |
lc_otp_program_i.req | Yes | Yes | T36,T47,T48 | Yes | T36,T47,T48 | INPUT | |
lc_otp_program_o.ack | Yes | Yes | T36,T47,T48 | Yes | T36,T47,T48 | OUTPUT | |
lc_otp_program_o.err | Yes | Yes | T198,T199,T200 | Yes | T198,T199,T200 | OUTPUT | |
lc_creator_seed_sw_rw_en_i[3:0] | Yes | Yes | T46,T53,T47 | Yes | T1,T2,T3 | INPUT | |
lc_owner_seed_sw_rw_en_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
lc_seed_hw_rd_en_i[3:0] | Yes | Yes | T46,T53,T47 | Yes | T1,T2,T3 | INPUT | |
lc_dft_en_i[3:0] | Yes | Yes | T53,T47,T88 | Yes | T1,T2,T3 | INPUT | |
lc_escalate_en_i[3:0] | Yes | Yes | T53,T88,T89 | Yes | T53,T47,T88 | INPUT | |
lc_check_byp_en_i[3:0] | Yes | Yes | T47,T48,T66 | Yes | T36,T47,T48 | INPUT | |
otp_lc_data_o.rma_token[127:0] | Yes | Yes | T53,T47,T48 | Yes | T1,T2,T4 | OUTPUT | |
otp_lc_data_o.rma_token_valid[3:0] | Yes | Yes | T46,T201,T202 | Yes | T46,T196,T197 | OUTPUT | |
otp_lc_data_o.test_exit_token[127:0] | Yes | Yes | T53,T48,T66 | Yes | T2,T4,T38 | OUTPUT | |
otp_lc_data_o.test_unlock_token[127:0] | Yes | Yes | T4,T106,T7 | Yes | T53,T66,T188 | OUTPUT | |
otp_lc_data_o.test_tokens_valid[3:0] | Yes | Yes | T46,T53,T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.secrets_valid[3:0] | Yes | Yes | T46,T201,T202 | Yes | T46,T196,T197 | OUTPUT | |
otp_lc_data_o.count[12:0] | Yes | Yes | *T36,*T192,*T193 | Yes | T193,T195,T182 | OUTPUT | |
otp_lc_data_o.count[13] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[16:14] | Yes | Yes | T36,T192,T193 | Yes | T193,T195,T182 | OUTPUT | |
otp_lc_data_o.count[17] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[24:18] | Yes | Yes | *T36,*T192,*T193 | Yes | T193,T195,T182 | OUTPUT | |
otp_lc_data_o.count[25] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[30:26] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.count[31] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[33:32] | Yes | Yes | T36,T192,T193 | Yes | T193,T195,T182 | OUTPUT | |
otp_lc_data_o.count[34] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[43:35] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[44] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[51:45] | Yes | Yes | *T121,*T36,*T192 | Yes | T193,T156,T195 | OUTPUT | |
otp_lc_data_o.count[52] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[59:53] | Yes | Yes | *T121,*T36,*T192 | Yes | T193,T156,T195 | OUTPUT | |
otp_lc_data_o.count[60] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[64:61] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[65] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[67:66] | Yes | Yes | T46,T53,T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[68] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[71:69] | Yes | Yes | *T36,*T192,*T193 | Yes | T193,T195,T182 | OUTPUT | |
otp_lc_data_o.count[72] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[73] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[74] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[86:75] | Yes | Yes | *T121,*T36,*T192 | Yes | T193,T156,T195 | OUTPUT | |
otp_lc_data_o.count[87] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[89:88] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.count[90] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[97:91] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[98] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[109:99] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.count[110] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[112:111] | Yes | Yes | T5,T121,T36 | Yes | T196,T197,T193 | OUTPUT | |
otp_lc_data_o.count[113] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[118:114] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[119] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[123:120] | Yes | Yes | *T5,*T121,*T36 | Yes | T196,T197,T193 | OUTPUT | |
otp_lc_data_o.count[125:124] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[127:126] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[128] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[131:129] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT | |
otp_lc_data_o.count[132] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[134:133] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.count[136:135] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[138:137] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[139] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[140] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT | |
otp_lc_data_o.count[141] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[149:142] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.count[150] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[158:151] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.count[160:159] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[167:161] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT | |
otp_lc_data_o.count[168] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[171:169] | Yes | Yes | *T36,*T192,*T193 | Yes | T193,T195,T182 | OUTPUT | |
otp_lc_data_o.count[172] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[174:173] | Yes | Yes | T47,T48,T66 | Yes | T47,T48,T66 | OUTPUT | |
otp_lc_data_o.count[175] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[180:176] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[181] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[183:182] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[184] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[190:185] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT | |
otp_lc_data_o.count[191] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[197:192] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.count[198] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[207:199] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT | |
otp_lc_data_o.count[208] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[216:209] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[217] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[225:218] | Yes | Yes | *T36,*T192,*T193 | Yes | T193,T195,T182 | OUTPUT | |
otp_lc_data_o.count[226] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[227] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[228] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[230:229] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[231] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[237:232] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[238] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[257:239] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.count[258] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[261:259] | Yes | Yes | *T36,*T192,*T193 | Yes | T193,T195,T182 | OUTPUT | |
otp_lc_data_o.count[263:262] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[264] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.count[265] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[280:266] | Yes | Yes | *T36,*T192,*T193 | Yes | T193,T195,T182 | OUTPUT | |
otp_lc_data_o.count[281] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[286:282] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT | |
otp_lc_data_o.count[287] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[301:288] | Yes | Yes | *T36,*T192,*T193 | Yes | T193,T195,T182 | OUTPUT | |
otp_lc_data_o.count[302] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[304:303] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT | |
otp_lc_data_o.count[305] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[308:306] | Yes | Yes | *T46,*T53,T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[309] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[317:310] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.count[318] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[330:319] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[332:331] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[335:333] | Yes | Yes | *T46,*T53,T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[336] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[347:337] | Yes | Yes | *T36,*T192,*T193 | Yes | T193,T195,T182 | OUTPUT | |
otp_lc_data_o.count[348] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[350:349] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT | |
otp_lc_data_o.count[351] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[354:352] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.count[355] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[359:356] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.count[360] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[372:361] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT | |
otp_lc_data_o.count[373] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[374] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT | |
otp_lc_data_o.count[376:375] | No | No | No | OUTPUT | |||
otp_lc_data_o.count[383:377] | Yes | Yes | T36,T192,T193 | Yes | T193,T195,T182 | OUTPUT | |
otp_lc_data_o.state[5:0] | Yes | Yes | *T36,T48,*T192 | Yes | T48,T193,T195 | OUTPUT | |
otp_lc_data_o.state[6] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[17:7] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.state[18] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[36:19] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[38:37] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[54:39] | Yes | Yes | *T36,*T48,*T192 | Yes | T48,T193,T195 | OUTPUT | |
otp_lc_data_o.state[55] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[68:56] | Yes | Yes | *T36,*T48,*T192 | Yes | T48,T193,T195 | OUTPUT | |
otp_lc_data_o.state[69] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[91:70] | Yes | Yes | *T36,*T48,*T192 | Yes | T48,T193,T195 | OUTPUT | |
otp_lc_data_o.state[92] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[94:93] | Yes | Yes | *T36,*T48,*T192 | Yes | T48,T193,T195 | OUTPUT | |
otp_lc_data_o.state[95] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[96] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.state[97] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[108:98] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.state[109] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[117:110] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.state[118] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[119] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.state[121:120] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[127:122] | Yes | Yes | *T121,*T44,*T36 | Yes | T48,T66,T150 | OUTPUT | |
otp_lc_data_o.state[128] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[134:129] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[135] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[140:136] | Yes | Yes | *T121,*T44,*T36 | Yes | T48,T66,T150 | OUTPUT | |
otp_lc_data_o.state[142:141] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[146:143] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[147] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[148] | Yes | Yes | *T36,*T48,*T192 | Yes | T48,T193,T195 | OUTPUT | |
otp_lc_data_o.state[149] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[150] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[151] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[152] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.state[153] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[159:154] | Yes | Yes | *T121,*T44,*T36 | Yes | T48,T66,T150 | OUTPUT | |
otp_lc_data_o.state[160] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[171:161] | Yes | Yes | *T36,*T48,*T192 | Yes | T48,T193,T195 | OUTPUT | |
otp_lc_data_o.state[172] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[180:173] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[181] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[185:182] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.state[186] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[187] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.state[188] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[191:189] | Yes | Yes | *T121,*T44,*T36 | Yes | T48,T66,T150 | OUTPUT | |
otp_lc_data_o.state[192] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[193] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[195:194] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[208:196] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.state[209] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[214:210] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.state[215] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[225:216] | Yes | Yes | *T36,*T48,*T192 | Yes | T48,T193,T195 | OUTPUT | |
otp_lc_data_o.state[226] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[227] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.state[228] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[242:229] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.state[243] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[252:244] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[254:253] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[259:255] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[260] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[269:261] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[270] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[271] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[272] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[285:273] | Yes | Yes | *T47,*T48,*T66 | Yes | T47,T48,T66 | OUTPUT | |
otp_lc_data_o.state[286] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[289:287] | Yes | Yes | *T46,*T53,*T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_lc_data_o.state[290] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[296:291] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.state[297] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[310:298] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.state[311] | No | No | No | OUTPUT | |||
otp_lc_data_o.state[319:312] | Yes | Yes | T1,T2,T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_lc_data_o.error | Yes | Yes | T53,T88,T89 | Yes | T53,T47,T88 | OUTPUT | |
otp_lc_data_o.valid | Yes | Yes | T46,T53,T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_keymgr_key_o.owner_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.owner_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed_valid | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_seed[255:0] | No | No | No | OUTPUT | |||
otp_keymgr_key_o.creator_root_key_share1_valid | Yes | Yes | T46,T201,T202 | Yes | T46,T196,T197 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share1[255:0] | Yes | Yes | T1,T2,T4 | Yes | T53,T47,T88 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0_valid | Yes | Yes | T46,T201,T202 | Yes | T46,T196,T197 | OUTPUT | |
otp_keymgr_key_o.creator_root_key_share0[255:0] | Yes | Yes | T3,T4,T38 | Yes | T46,T53,T47 | OUTPUT | |
flash_otp_key_i.addr_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
flash_otp_key_i.data_req | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | INPUT | |
flash_otp_key_o.seed_valid | Yes | Yes | T46,T53,T47 | Yes | T2,T3,T4 | OUTPUT | |
flash_otp_key_o.rand_key[127:0] | Yes | Yes | T7,T8,T10 | Yes | T2,T3,T5 | OUTPUT | |
flash_otp_key_o.key[127:0] | Yes | Yes | T3,T4,T38 | Yes | T106,T39,T121 | OUTPUT | |
flash_otp_key_o.addr_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT | |
flash_otp_key_o.data_ack | Yes | Yes | T2,T3,T4 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_i[0].req | Yes | Yes | T203,T148,T149 | Yes | T203,T148,T149 | INPUT | |
sram_otp_key_i[1].req | Yes | Yes | T203,T148,T204 | Yes | T203,T148,T204 | INPUT | |
sram_otp_key_i[2].req | Yes | Yes | T205,T206,T207 | Yes | T205,T206,T207 | INPUT | |
sram_otp_key_i[3].req | No | No | No | INPUT | |||
sram_otp_key_o[0].seed_valid | Yes | Yes | T46,T53,T47 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[0].nonce[127:0] | Yes | Yes | T7,T8,T10 | Yes | T2,T3,T5 | OUTPUT | |
sram_otp_key_o[0].key[127:0] | Yes | Yes | T3,T4,T38 | Yes | T106,T39,T121 | OUTPUT | |
sram_otp_key_o[0].ack | Yes | Yes | T203,T148,T149 | Yes | T203,T148,T149 | OUTPUT | |
sram_otp_key_o[1].seed_valid | Yes | Yes | T46,T53,T47 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[1].nonce[127:0] | Yes | Yes | T7,T8,T10 | Yes | T2,T3,T5 | OUTPUT | |
sram_otp_key_o[1].key[127:0] | Yes | Yes | T3,T4,T38 | Yes | T106,T39,T121 | OUTPUT | |
sram_otp_key_o[1].ack | Yes | Yes | T203,T148,T204 | Yes | T203,T148,T204 | OUTPUT | |
sram_otp_key_o[2].seed_valid | Yes | Yes | T46,T53,T47 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[2].nonce[127:0] | Yes | Yes | T7,T8,T10 | Yes | T2,T3,T5 | OUTPUT | |
sram_otp_key_o[2].key[127:0] | Yes | Yes | T3,T4,T38 | Yes | T106,T39,T121 | OUTPUT | |
sram_otp_key_o[2].ack | Yes | Yes | T206,T207,T208 | Yes | T206,T207,T208 | OUTPUT | |
sram_otp_key_o[3].seed_valid | Yes | Yes | T46,T53,T47 | Yes | T2,T3,T4 | OUTPUT | |
sram_otp_key_o[3].nonce[127:0] | Yes | Yes | T7,T8,T10 | Yes | T2,T3,T5 | OUTPUT | |
sram_otp_key_o[3].key[127:0] | Yes | Yes | T3,T4,T38 | Yes | T106,T39,T121 | OUTPUT | |
sram_otp_key_o[3].ack | No | No | No | OUTPUT | |||
otbn_otp_key_i.req | Yes | Yes | T209,T144,T180 | Yes | T209,T144,T180 | INPUT | |
otbn_otp_key_o.seed_valid | Yes | Yes | T46,T53,T47 | Yes | T2,T3,T4 | OUTPUT | |
otbn_otp_key_o.nonce[63:0] | Yes | Yes | T7,T8,T10 | Yes | T2,T3,T5 | OUTPUT | |
otbn_otp_key_o.key[127:0] | Yes | Yes | T3,T4,T38 | Yes | T106,T39,T121 | OUTPUT | |
otbn_otp_key_o.ack | Yes | Yes | T209,T144,T180 | Yes | T209,T144,T180 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.device_id[255:0] | Yes | Yes | T2,T4,T5 | Yes | T46,T53,T47 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[22:0] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[23] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[36:24] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[37] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[57:38] | Yes | Yes | *T210,*T211,*T1 | Yes | T210,T211,T46 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[58] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[93:59] | Yes | Yes | *T210,*T211,*T212 | Yes | T210,T211,T212 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[94] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[126:95] | Yes | Yes | *T213,*T1,*T2 | Yes | T213,T46,T53 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[127] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[131:128] | Yes | Yes | *T1,*T2,*T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[132] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[161:133] | Yes | Yes | *T212,*T156,*T205 | Yes | T212,T156,T205 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[162] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[172:163] | Yes | Yes | *T213,*T210,*T211 | Yes | T213,T210,T211 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[173] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[188:174] | Yes | Yes | *T212,*T156,*T205 | Yes | T212,T156,T205 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[189] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[246:190] | Yes | Yes | *T213,*T211,*T1 | Yes | T213,T211,T46 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.manuf_state[247] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg0_data.manuf_state[255:248] | Yes | Yes | T212,T156,T205 | Yes | T212,T156,T205 | OUTPUT | |
otp_broadcast_o.hw_cfg0_data.hw_cfg0_digest[63:0] | Yes | Yes | T53,T66,T188 | Yes | T1,T3,T4 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_sram_ifetch[7:0] | Yes | Yes | T1,T2,T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.en_csrng_sw_app_read[7:0] | Yes | Yes | T1,T2,T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.dis_rv_dm_late_debug[7:0] | Yes | Yes | T1,T2,T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_broadcast_o.hw_cfg1_data.unallocated[39:0] | No | No | No | OUTPUT | |||
otp_broadcast_o.hw_cfg1_data.hw_cfg1_digest[63:0] | Yes | Yes | T1,T2,T3 | Yes | T46,T53,T47 | OUTPUT | |
otp_broadcast_o.valid[3:0] | Yes | Yes | T46,T53,T47 | Yes | T1,T2,T3 | OUTPUT | |
otp_ext_voltage_h_io[0:0] | Excluded | Excluded | Excluded | INOUT | [LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV. | ||
scan_en_i | Unreachable | Unreachable | Unreachable | INPUT | |||
scan_rst_ni | Unreachable | Unreachable | Unreachable | INPUT | |||
scanmode_i[3:0] | Unreachable | Unreachable | Unreachable | INPUT | |||
cio_test_o[7:0] | No | No | No | OUTPUT | |||
cio_test_en_o[7:0] | Yes | Yes | T53,T47,T88 | Yes | T1,T2,T3 | OUTPUT |
0% | 10% | 20% | 30% | 40% | 50% | 60% | 70% | 80% | 90% | 100% |