Unified Coverage Report :: Module :: top_earlgrey

Module : top_earlgrey

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
84.10	92.47		59.83			100.00

Source File(s) :
/workspaces/repo/scratch/os_regression_2024_10_14/chip_earlgrey_asic-sim-vcs/default/sim-vcs/../src/lowrisc_systems_top_earlgrey_0.1/rtl/autogen/top_earlgrey.sv

Module self-instances :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
tb.dut.top_earlgrey	93.94	92.47		89.34			100.00

---

Module Instance : tb.dut.top_earlgrey

Instance :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
93.94	92.47		89.34			100.00

Instance's subtree :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
94.97	95.44	92.98	95.41		93.95	97.08

Parent :

SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT	NAME
92.83	80.00	100.00	98.48				dut

Subtrees :

NAME	SCORE	LINE	COND	TOGGLE	FSM	BRANCH	ASSERT
clk_ctrl_and_main_pd_sva_if	100.00			100.00
u_adc_ctrl_aon	100.00			100.00
u_aes	100.00			100.00
u_alert_handler	100.00			100.00
u_aon_timer_aon	100.00			100.00
u_clkmgr_aon	100.00			100.00
u_csrng	99.27			99.27
u_dft_tap_breakout	100.00	100.00		100.00
u_edn0	99.25			99.25
u_edn1	99.02			99.02
u_entropy_src	99.18			99.18
u_flash_ctrl	99.96			99.96
u_gpio	100.00			100.00
u_hmac	100.00			100.00
u_i2c0	93.10			93.10
u_i2c1	93.14			93.14
u_i2c2	93.14			93.14
u_keymgr	89.72			89.72
u_kmac	99.94			99.94
u_lc_ctrl	92.74			92.74
u_otbn	99.84			99.84
u_otp_ctrl	84.89			84.89
u_pattgen	100.00			100.00
u_pinmux_aon	96.62	96.14	94.30	98.85		94.53	99.30
u_pwm_aon	100.00			100.00
u_pwrmgr_aon	100.00			100.00
u_rom_ctrl	99.89			99.89
u_rstmgr_aon	100.00			100.00
u_rv_core_ibex	96.53	97.42	95.86	98.06		98.66	92.67
u_rv_dm	100.00			100.00
u_rv_plic	94.86	94.01	91.13	100.00		92.73	96.43
u_rv_timer	100.00			100.00
u_sensor_ctrl_aon	91.37	94.27	86.47	79.93		96.17	100.00
u_spi_device	96.39			96.39
u_spi_host0	96.59			96.59
u_spi_host1	98.77			98.77
u_sram_ctrl_main	99.65			99.65
u_sram_ctrl_ret_aon	99.64			99.64
u_sysrst_ctrl_aon	100.00			100.00
u_uart0	100.00			100.00
u_uart1	100.00			100.00
u_uart2	100.00			100.00
u_uart3	100.00			100.00
u_usbdev	94.12			94.12
u_xbar_main	100.00			100.00
u_xbar_peri	100.00			100.00

Line Coverage for Module : top_earlgrey

	Line No.	Total	Covered	Percent
TOTAL		279	258	92.47
CONT_ASSIGN	760	1	1	100.00
CONT_ASSIGN	761	1	1	100.00
CONT_ASSIGN	762	1	1	100.00
CONT_ASSIGN	763	1	0	0.00
CONT_ASSIGN	764	1	0	0.00
CONT_ASSIGN	765	1	0	0.00
CONT_ASSIGN	766	1	0	0.00
CONT_ASSIGN	767	1	0	0.00
CONT_ASSIGN	780	1	1	100.00
CONT_ASSIGN	781	1	0	0.00
CONT_ASSIGN	782	1	0	0.00
CONT_ASSIGN	783	1	0	0.00
CONT_ASSIGN	784	1	0	0.00
CONT_ASSIGN	785	1	0	0.00
CONT_ASSIGN	786	1	0	0.00
CONT_ASSIGN	787	1	0	0.00
CONT_ASSIGN	801	1	1	100.00
CONT_ASSIGN	803	1	1	100.00
CONT_ASSIGN	805	1	1	100.00
CONT_ASSIGN	807	1	1	100.00
CONT_ASSIGN	809	1	1	100.00
CONT_ASSIGN	811	1	1	100.00
CONT_ASSIGN	815	1	1	100.00
CONT_ASSIGN	825	1	1	100.00
CONT_ASSIGN	826	1	1	100.00
CONT_ASSIGN	830	1	1	100.00
CONT_ASSIGN	854	1	1	100.00
CONT_ASSIGN	855	1	1	100.00
CONT_ASSIGN	857	1	1	100.00
CONT_ASSIGN	858	1	1	100.00
CONT_ASSIGN	860	1	1	100.00
CONT_ASSIGN	861	1	1	100.00
CONT_ASSIGN	863	1	1	100.00
CONT_ASSIGN	864	1	1	100.00
CONT_ASSIGN	866	1	1	100.00
CONT_ASSIGN	867	1	1	100.00
CONT_ASSIGN	869	1	1	100.00
CONT_ASSIGN	870	1	1	100.00
CONT_ASSIGN	872	1	1	100.00
CONT_ASSIGN	873	1	1	100.00
CONT_ASSIGN	875	1	1	100.00
CONT_ASSIGN	876	1	1	100.00
CONT_ASSIGN	878	1	1	100.00
CONT_ASSIGN	879	1	1	100.00
CONT_ASSIGN	881	1	1	100.00
CONT_ASSIGN	882	1	1	100.00
CONT_ASSIGN	884	1	0	0.00
CONT_ASSIGN	885	1	1	100.00
CONT_ASSIGN	887	1	0	0.00
CONT_ASSIGN	888	1	1	100.00
CONT_ASSIGN	890	1	1	100.00
CONT_ASSIGN	891	1	1	100.00
CONT_ASSIGN	893	1	1	100.00
CONT_ASSIGN	894	1	1	100.00
CONT_ASSIGN	896	1	1	100.00
CONT_ASSIGN	897	1	1	100.00
CONT_ASSIGN	899	1	1	100.00
CONT_ASSIGN	900	1	1	100.00
CONT_ASSIGN	902	1	1	100.00
CONT_ASSIGN	903	1	1	100.00
CONT_ASSIGN	905	1	1	100.00
CONT_ASSIGN	906	1	1	100.00
CONT_ASSIGN	908	1	1	100.00
CONT_ASSIGN	909	1	1	100.00
CONT_ASSIGN	911	1	1	100.00
CONT_ASSIGN	912	1	1	100.00
CONT_ASSIGN	914	1	1	100.00
CONT_ASSIGN	915	1	1	100.00
CONT_ASSIGN	917	1	1	100.00
CONT_ASSIGN	918	1	1	100.00
CONT_ASSIGN	920	1	1	100.00
CONT_ASSIGN	921	1	1	100.00
CONT_ASSIGN	923	1	1	100.00
CONT_ASSIGN	924	1	1	100.00
CONT_ASSIGN	930	0	0
CONT_ASSIGN	932	0	0
CONT_ASSIGN	934	0	0
CONT_ASSIGN	936	0	0
CONT_ASSIGN	938	0	0
CONT_ASSIGN	940	0	0
CONT_ASSIGN	942	0	0
CONT_ASSIGN	944	0	0
CONT_ASSIGN	946	0	0
CONT_ASSIGN	948	0	0
CONT_ASSIGN	950	0	0
CONT_ASSIGN	952	0	0
CONT_ASSIGN	954	0	0
CONT_ASSIGN	956	0	0
CONT_ASSIGN	958	0	0
CONT_ASSIGN	960	0	0
CONT_ASSIGN	962	0	0
CONT_ASSIGN	964	0	0
CONT_ASSIGN	966	0	0
CONT_ASSIGN	968	0	0
CONT_ASSIGN	970	0	0
CONT_ASSIGN	972	0	0
CONT_ASSIGN	974	0	0
CONT_ASSIGN	976	0	0
CONT_ASSIGN	978	0	0
CONT_ASSIGN	980	0	0
CONT_ASSIGN	982	0	0
CONT_ASSIGN	984	0	0
CONT_ASSIGN	986	0	0
CONT_ASSIGN	988	0	0
CONT_ASSIGN	990	0	0
CONT_ASSIGN	992	0	0
CONT_ASSIGN	994	0	0
CONT_ASSIGN	996	0	0
CONT_ASSIGN	998	0	0
CONT_ASSIGN	1000	0	0
CONT_ASSIGN	1002	0	0
CONT_ASSIGN	1004	0	0
CONT_ASSIGN	1006	0	0
CONT_ASSIGN	1008	0	0
CONT_ASSIGN	1010	0	0
CONT_ASSIGN	1012	0	0
CONT_ASSIGN	1014	0	0
CONT_ASSIGN	1016	0	0
CONT_ASSIGN	1018	0	0
CONT_ASSIGN	1020	0	0
CONT_ASSIGN	1022	0	0
CONT_ASSIGN	2668	1	1	100.00
CONT_ASSIGN	3072	1	1	100.00
CONT_ASSIGN	3073	1	1	100.00
CONT_ASSIGN	3074	1	1	100.00
CONT_ASSIGN	3075	1	1	100.00
CONT_ASSIGN	3076	1	1	100.00
CONT_ASSIGN	3077	1	1	100.00
CONT_ASSIGN	3078	1	1	100.00
CONT_ASSIGN	3079	1	1	100.00
CONT_ASSIGN	3080	1	1	100.00
CONT_ASSIGN	3081	1	1	100.00
CONT_ASSIGN	3082	1	1	100.00
CONT_ASSIGN	3083	1	1	100.00
CONT_ASSIGN	3084	1	1	100.00
CONT_ASSIGN	3085	1	1	100.00
CONT_ASSIGN	3086	1	1	100.00
CONT_ASSIGN	3087	1	1	100.00
CONT_ASSIGN	3088	1	1	100.00
CONT_ASSIGN	3089	1	1	100.00
CONT_ASSIGN	3090	1	1	100.00
CONT_ASSIGN	3091	1	1	100.00
CONT_ASSIGN	3092	1	1	100.00
CONT_ASSIGN	3093	1	1	100.00
CONT_ASSIGN	3094	1	1	100.00
CONT_ASSIGN	3095	1	1	100.00
CONT_ASSIGN	3096	1	1	100.00
CONT_ASSIGN	3097	1	1	100.00
CONT_ASSIGN	3098	1	1	100.00
CONT_ASSIGN	3099	1	1	100.00
CONT_ASSIGN	3100	1	1	100.00
CONT_ASSIGN	3101	1	1	100.00
CONT_ASSIGN	3102	1	1	100.00
CONT_ASSIGN	3103	1	1	100.00
CONT_ASSIGN	3104	1	1	100.00
CONT_ASSIGN	3105	1	1	100.00
CONT_ASSIGN	3106	1	1	100.00
CONT_ASSIGN	3107	1	1	100.00
CONT_ASSIGN	3108	1	1	100.00
CONT_ASSIGN	3109	1	1	100.00
CONT_ASSIGN	3110	1	1	100.00
CONT_ASSIGN	3111	1	1	100.00
CONT_ASSIGN	3112	1	1	100.00
CONT_ASSIGN	3113	1	1	100.00
CONT_ASSIGN	3114	1	1	100.00
CONT_ASSIGN	3115	1	1	100.00
CONT_ASSIGN	3116	1	1	100.00
CONT_ASSIGN	3117	1	1	100.00
CONT_ASSIGN	3118	1	1	100.00
CONT_ASSIGN	3119	1	1	100.00
CONT_ASSIGN	3120	1	1	100.00
CONT_ASSIGN	3121	1	1	100.00
CONT_ASSIGN	3122	1	1	100.00
CONT_ASSIGN	3123	1	1	100.00
CONT_ASSIGN	3124	1	1	100.00
CONT_ASSIGN	3125	1	1	100.00
CONT_ASSIGN	3126	1	1	100.00
CONT_ASSIGN	3127	1	1	100.00
CONT_ASSIGN	3128	1	1	100.00
CONT_ASSIGN	3131	1	1	100.00
CONT_ASSIGN	3132	1	1	100.00
CONT_ASSIGN	3133	1	1	100.00
CONT_ASSIGN	3134	1	1	100.00
CONT_ASSIGN	3135	1	1	100.00
CONT_ASSIGN	3136	1	1	100.00
CONT_ASSIGN	3137	1	1	100.00
CONT_ASSIGN	3138	1	1	100.00
CONT_ASSIGN	3139	1	1	100.00
CONT_ASSIGN	3140	1	1	100.00
CONT_ASSIGN	3141	1	1	100.00
CONT_ASSIGN	3142	1	1	100.00
CONT_ASSIGN	3143	1	1	100.00
CONT_ASSIGN	3144	1	1	100.00
CONT_ASSIGN	3145	1	1	100.00
CONT_ASSIGN	3146	1	1	100.00
CONT_ASSIGN	3147	1	1	100.00
CONT_ASSIGN	3148	1	1	100.00
CONT_ASSIGN	3149	1	1	100.00
CONT_ASSIGN	3150	1	1	100.00
CONT_ASSIGN	3151	1	1	100.00
CONT_ASSIGN	3152	1	1	100.00
CONT_ASSIGN	3153	1	1	100.00
CONT_ASSIGN	3154	1	1	100.00
CONT_ASSIGN	3155	1	1	100.00
CONT_ASSIGN	3156	1	1	100.00
CONT_ASSIGN	3157	1	1	100.00
CONT_ASSIGN	3158	1	1	100.00
CONT_ASSIGN	3159	1	1	100.00
CONT_ASSIGN	3160	1	1	100.00
CONT_ASSIGN	3161	1	1	100.00
CONT_ASSIGN	3162	1	1	100.00
CONT_ASSIGN	3163	0	0
CONT_ASSIGN	3164	0	0
CONT_ASSIGN	3165	0	0
CONT_ASSIGN	3166	0	0
CONT_ASSIGN	3167	0	0
CONT_ASSIGN	3168	0	0
CONT_ASSIGN	3169	1	1	100.00
CONT_ASSIGN	3170	1	1	100.00
CONT_ASSIGN	3171	1	0	0.00
CONT_ASSIGN	3172	1	1	100.00
CONT_ASSIGN	3173	1	1	100.00
CONT_ASSIGN	3174	1	1	100.00
CONT_ASSIGN	3175	1	1	100.00
CONT_ASSIGN	3176	1	1	100.00
CONT_ASSIGN	3177	1	1	100.00
CONT_ASSIGN	3178	1	1	100.00
CONT_ASSIGN	3179	1	1	100.00
CONT_ASSIGN	3180	1	1	100.00
CONT_ASSIGN	3181	1	1	100.00
CONT_ASSIGN	3182	1	1	100.00
CONT_ASSIGN	3183	1	0	0.00
CONT_ASSIGN	3184	0	0
CONT_ASSIGN	3185	0	0
CONT_ASSIGN	3186	0	0
CONT_ASSIGN	3187	0	0
CONT_ASSIGN	3188	0	0
CONT_ASSIGN	3189	0	0
CONT_ASSIGN	3190	0	0
CONT_ASSIGN	3191	0	0
CONT_ASSIGN	3192	0	0
CONT_ASSIGN	3193	1	1	100.00
CONT_ASSIGN	3194	1	1	100.00
CONT_ASSIGN	3195	1	1	100.00
CONT_ASSIGN	3196	1	1	100.00
CONT_ASSIGN	3197	1	1	100.00
CONT_ASSIGN	3198	1	1	100.00
CONT_ASSIGN	3199	1	0	0.00
CONT_ASSIGN	3200	1	1	100.00
CONT_ASSIGN	3201	1	1	100.00
CONT_ASSIGN	3202	1	1	100.00
CONT_ASSIGN	3203	1	1	100.00
CONT_ASSIGN	3204	1	1	100.00
CONT_ASSIGN	3205	1	1	100.00
CONT_ASSIGN	3208	1	1	100.00
CONT_ASSIGN	3209	1	1	100.00
CONT_ASSIGN	3210	1	1	100.00
CONT_ASSIGN	3211	1	1	100.00
CONT_ASSIGN	3212	1	1	100.00
CONT_ASSIGN	3213	1	1	100.00
CONT_ASSIGN	3214	1	1	100.00
CONT_ASSIGN	3215	1	1	100.00
CONT_ASSIGN	3216	1	1	100.00
CONT_ASSIGN	3217	1	1	100.00
CONT_ASSIGN	3218	1	1	100.00
CONT_ASSIGN	3219	1	1	100.00
CONT_ASSIGN	3220	1	1	100.00
CONT_ASSIGN	3221	1	1	100.00
CONT_ASSIGN	3222	1	1	100.00
CONT_ASSIGN	3223	1	1	100.00
CONT_ASSIGN	3224	1	1	100.00
CONT_ASSIGN	3225	1	1	100.00
CONT_ASSIGN	3226	1	1	100.00
CONT_ASSIGN	3227	1	1	100.00
CONT_ASSIGN	3228	1	1	100.00
CONT_ASSIGN	3229	1	1	100.00
CONT_ASSIGN	3230	1	1	100.00
CONT_ASSIGN	3231	1	1	100.00
CONT_ASSIGN	3232	1	1	100.00
CONT_ASSIGN	3233	1	1	100.00
CONT_ASSIGN	3234	1	1	100.00
CONT_ASSIGN	3235	1	1	100.00
CONT_ASSIGN	3236	1	1	100.00
CONT_ASSIGN	3237	1	1	100.00
CONT_ASSIGN	3238	1	1	100.00
CONT_ASSIGN	3239	1	1	100.00
CONT_ASSIGN	3240	1	1	100.00
CONT_ASSIGN	3241	1	1	100.00
CONT_ASSIGN	3242	1	1	100.00
CONT_ASSIGN	3243	1	1	100.00
CONT_ASSIGN	3244	1	1	100.00
CONT_ASSIGN	3245	1	1	100.00
CONT_ASSIGN	3246	1	1	100.00
CONT_ASSIGN	3247	1	1	100.00
CONT_ASSIGN	3248	1	1	100.00
CONT_ASSIGN	3249	1	1	100.00
CONT_ASSIGN	3250	0	0
CONT_ASSIGN	3251	0	0
CONT_ASSIGN	3252	0	0
CONT_ASSIGN	3253	0	0
CONT_ASSIGN	3254	0	0
CONT_ASSIGN	3255	0	0
CONT_ASSIGN	3256	0	0
CONT_ASSIGN	3257	0	0
CONT_ASSIGN	3258	1	1	100.00
CONT_ASSIGN	3259	1	1	100.00
CONT_ASSIGN	3260	1	0	0.00
CONT_ASSIGN	3261	0	0
CONT_ASSIGN	3262	0	0
CONT_ASSIGN	3263	0	0
CONT_ASSIGN	3264	0	0
CONT_ASSIGN	3265	0	0
CONT_ASSIGN	3266	0	0
CONT_ASSIGN	3267	0	0
CONT_ASSIGN	3268	0	0
CONT_ASSIGN	3269	0	0
CONT_ASSIGN	3270	0	0
CONT_ASSIGN	3271	0	0
CONT_ASSIGN	3272	0	0
CONT_ASSIGN	3273	0	0
CONT_ASSIGN	3274	0	0
CONT_ASSIGN	3275	0	0
CONT_ASSIGN	3276	1	1	100.00
CONT_ASSIGN	3277	0	0
CONT_ASSIGN	3278	0	0
CONT_ASSIGN	3279	0	0
CONT_ASSIGN	3280	0	0
CONT_ASSIGN	3281	0	0
CONT_ASSIGN	3282	0	0
CONT_ASSIGN	3286	1	1	100.00
CONT_ASSIGN	3287	1	1	100.00
CONT_ASSIGN	3288	1	1	100.00
CONT_ASSIGN	3289	1	1	100.00
CONT_ASSIGN	3290	1	1	100.00
CONT_ASSIGN	3291	1	1	100.00
CONT_ASSIGN	3292	1	1	100.00
CONT_ASSIGN	3293	1	1	100.00
CONT_ASSIGN	3294	1	1	100.00
CONT_ASSIGN	3295	1	1	100.00
CONT_ASSIGN	3296	1	1	100.00
CONT_ASSIGN	3297	1	1	100.00
CONT_ASSIGN	3298	1	1	100.00
CONT_ASSIGN	3299	1	1	100.00
CONT_ASSIGN	3300	1	1	100.00
CONT_ASSIGN	3303	1	1	100.00
CONT_ASSIGN	3304	1	1	100.00
CONT_ASSIGN	3305	1	1	100.00
CONT_ASSIGN	3306	1	1	100.00
CONT_ASSIGN	3307	1	1	100.00
CONT_ASSIGN	3308	1	1	100.00
CONT_ASSIGN	3309	1	1	100.00
CONT_ASSIGN	3310	1	1	100.00
CONT_ASSIGN	3311	1	1	100.00
CONT_ASSIGN	3312	1	1	100.00
CONT_ASSIGN	3313	1	1	100.00
CONT_ASSIGN	3314	1	1	100.00
CONT_ASSIGN	3317	1	1	100.00
CONT_ASSIGN	3318	1	1	100.00
CONT_ASSIGN	3321	1	1	100.00
CONT_ASSIGN	3322	1	1	100.00
CONT_ASSIGN	3323	1	1	100.00
CONT_ASSIGN	3324	1	0	0.00
CONT_ASSIGN	3325	1	0	0.00
CONT_ASSIGN	3326	1	0	0.00
CONT_ASSIGN	3327	1	1	100.00
CONT_ASSIGN	3328	1	1	100.00
CONT_ASSIGN	3329	1	1	100.00
CONT_ASSIGN	3330	1	1	100.00
CONT_ASSIGN	3331	0	0
CONT_ASSIGN	3332	0	0
CONT_ASSIGN	3335	1	1	100.00
CONT_ASSIGN	3336	1	1	100.00

Click here to see the source line report.

---

Toggle Coverage for Module : top_earlgrey

	Total	Covered	Percent
Totals	900	502	55.78
Total Bits	3194	1911	59.83
Total Bits 0->1	1597	959	60.05
Total Bits 1->0	1597	952	59.61

Ports	900	502	55.78
Port Bits	3194	1911	59.83
Port Bits 0->1	1597	959	60.05
Port Bits 1->0	1597	952	59.61

Port Details

Name	Toggle	Toggle 1->0	Tests	Toggle 0->1	Tests	Direction
mio_in_i[46:0]	Yes	Yes	T26,T27,T38	Yes	T26,T27,T38	INPUT
mio_out_o[46:0]	Yes	Yes	T26,T27,T39	Yes	T6,T26,T27	OUTPUT
mio_oe_o[46:0]	Yes	Yes	T27,T40,T41	Yes	T6,T26,T27	OUTPUT
dio_in_i[15:0]	Yes	Yes	T4,T30,T6	Yes	T4,T6,T7	INPUT
dio_out_o[11:0]	Yes	Yes	*T4,*T6,*T7	Yes	T16,T17,T18	OUTPUT
dio_out_o[13:12]	No	No		No		OUTPUT
dio_out_o[15:14]	Yes	Yes	T8,T9,T10	Yes	T8,T9,T10	OUTPUT
dio_oe_o[15:0]	Yes	Yes	T16,T17,T18	Yes	T16,T17,T18	OUTPUT
mio_attr_o[0].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[0].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[0].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[0].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[0].keep_en	No	No		No		OUTPUT
mio_attr_o[0].schmitt_en	No	No		No		OUTPUT
mio_attr_o[0].od_en	No	No		No		OUTPUT
mio_attr_o[0].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[0].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[0].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[0].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[1].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[1].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[1].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[1].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[1].keep_en	No	No		No		OUTPUT
mio_attr_o[1].schmitt_en	No	No		No		OUTPUT
mio_attr_o[1].od_en	No	No		No		OUTPUT
mio_attr_o[1].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[1].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[1].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[1].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[2].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[2].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[2].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[2].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[2].keep_en	No	No		No		OUTPUT
mio_attr_o[2].schmitt_en	No	No		No		OUTPUT
mio_attr_o[2].od_en	No	No		No		OUTPUT
mio_attr_o[2].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[2].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[2].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[2].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[3].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[3].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[3].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[3].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[3].keep_en	No	No		No		OUTPUT
mio_attr_o[3].schmitt_en	No	No		No		OUTPUT
mio_attr_o[3].od_en	No	No		No		OUTPUT
mio_attr_o[3].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[3].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[3].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[3].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[4].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[4].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[4].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[4].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[4].keep_en	No	No		No		OUTPUT
mio_attr_o[4].schmitt_en	No	No		No		OUTPUT
mio_attr_o[4].od_en	No	No		No		OUTPUT
mio_attr_o[4].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[4].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[4].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[4].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[5].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[5].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[5].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[5].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[5].keep_en	No	No		No		OUTPUT
mio_attr_o[5].schmitt_en	No	No		No		OUTPUT
mio_attr_o[5].od_en	No	No		No		OUTPUT
mio_attr_o[5].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[5].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[5].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[5].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[6].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[6].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[6].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[6].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[6].keep_en	No	No		No		OUTPUT
mio_attr_o[6].schmitt_en	No	No		No		OUTPUT
mio_attr_o[6].od_en	No	No		No		OUTPUT
mio_attr_o[6].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[6].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[6].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[6].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[7].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[7].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[7].pull_en	Yes	Yes	T20,T21,T22	Yes	T11,T49,T50	OUTPUT
mio_attr_o[7].pull_select	Yes	Yes	T20,T21,T22	Yes	T11,T49,T50	OUTPUT
mio_attr_o[7].keep_en	No	No		No		OUTPUT
mio_attr_o[7].schmitt_en	No	No		No		OUTPUT
mio_attr_o[7].od_en	No	No		No		OUTPUT
mio_attr_o[7].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[7].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[7].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[7].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[8].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[8].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[8].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[8].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[8].keep_en	No	No		No		OUTPUT
mio_attr_o[8].schmitt_en	No	No		No		OUTPUT
mio_attr_o[8].od_en	No	No		No		OUTPUT
mio_attr_o[8].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[8].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[8].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[8].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[9].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[9].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[9].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[9].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[9].keep_en	No	No		No		OUTPUT
mio_attr_o[9].schmitt_en	No	No		No		OUTPUT
mio_attr_o[9].od_en	No	No		No		OUTPUT
mio_attr_o[9].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[9].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[9].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[9].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[10].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[10].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[10].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
mio_attr_o[10].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
mio_attr_o[10].keep_en	No	No		No		OUTPUT
mio_attr_o[10].schmitt_en	No	No		No		OUTPUT
mio_attr_o[10].od_en	No	No		No		OUTPUT
mio_attr_o[10].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[10].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[10].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[10].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[11].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[11].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[11].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[11].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[11].keep_en	No	No		No		OUTPUT
mio_attr_o[11].schmitt_en	No	No		No		OUTPUT
mio_attr_o[11].od_en	No	No		No		OUTPUT
mio_attr_o[11].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[11].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[11].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[11].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[12].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[12].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[12].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
mio_attr_o[12].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
mio_attr_o[12].keep_en	No	No		No		OUTPUT
mio_attr_o[12].schmitt_en	No	No		No		OUTPUT
mio_attr_o[12].od_en	No	No		No		OUTPUT
mio_attr_o[12].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[12].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[12].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[12].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[13].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[13].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[13].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T10,T47	OUTPUT
mio_attr_o[13].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T10,T47	OUTPUT
mio_attr_o[13].keep_en	No	No		No		OUTPUT
mio_attr_o[13].schmitt_en	No	No		No		OUTPUT
mio_attr_o[13].od_en	No	No		No		OUTPUT
mio_attr_o[13].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[13].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[13].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[13].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[14].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[14].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[14].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T10,T47	OUTPUT
mio_attr_o[14].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T10,T47	OUTPUT
mio_attr_o[14].keep_en	No	No		No		OUTPUT
mio_attr_o[14].schmitt_en	No	No		No		OUTPUT
mio_attr_o[14].od_en	No	No		No		OUTPUT
mio_attr_o[14].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[14].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[14].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[14].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[15].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[15].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[15].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T10,T47	OUTPUT
mio_attr_o[15].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T10,T47	OUTPUT
mio_attr_o[15].keep_en	No	No		No		OUTPUT
mio_attr_o[15].schmitt_en	No	No		No		OUTPUT
mio_attr_o[15].od_en	No	No		No		OUTPUT
mio_attr_o[15].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[15].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[15].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[15].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[16].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[16].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[16].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[16].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[16].keep_en	No	No		No		OUTPUT
mio_attr_o[16].schmitt_en	No	No		No		OUTPUT
mio_attr_o[16].od_en	No	No		No		OUTPUT
mio_attr_o[16].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[16].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[16].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[16].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[17].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[17].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[17].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[17].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[17].keep_en	No	No		No		OUTPUT
mio_attr_o[17].schmitt_en	No	No		No		OUTPUT
mio_attr_o[17].od_en	No	No		No		OUTPUT
mio_attr_o[17].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[17].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[17].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[17].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[18].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[18].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[18].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[18].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[18].keep_en	No	No		No		OUTPUT
mio_attr_o[18].schmitt_en	No	No		No		OUTPUT
mio_attr_o[18].od_en	No	No		No		OUTPUT
mio_attr_o[18].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[18].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[18].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[18].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[19].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[19].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[19].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[19].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[19].keep_en	No	No		No		OUTPUT
mio_attr_o[19].schmitt_en	No	No		No		OUTPUT
mio_attr_o[19].od_en	No	No		No		OUTPUT
mio_attr_o[19].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[19].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[19].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[19].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[20].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[20].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[20].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[20].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[20].keep_en	No	No		No		OUTPUT
mio_attr_o[20].schmitt_en	No	No		No		OUTPUT
mio_attr_o[20].od_en	No	No		No		OUTPUT
mio_attr_o[20].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[20].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[20].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[20].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[21].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[21].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[21].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[21].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[21].keep_en	No	No		No		OUTPUT
mio_attr_o[21].schmitt_en	No	No		No		OUTPUT
mio_attr_o[21].od_en	No	No		No		OUTPUT
mio_attr_o[21].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[21].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[21].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[21].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[22].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[22].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[22].pull_en	Yes	Yes	T51,T52,T53	Yes	T54,T55,T56	OUTPUT
mio_attr_o[22].pull_select	Yes	Yes	T54,T55,T56	Yes	T54,T55,T56	OUTPUT
mio_attr_o[22].keep_en	No	No		No		OUTPUT
mio_attr_o[22].schmitt_en	No	No		No		OUTPUT
mio_attr_o[22].od_en	No	No		No		OUTPUT
mio_attr_o[22].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[22].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[22].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[22].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[23].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[23].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[23].pull_en	Yes	Yes	T51,T52,T53	Yes	T54,T55,T56	OUTPUT
mio_attr_o[23].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[23].keep_en	No	No		No		OUTPUT
mio_attr_o[23].schmitt_en	No	No		No		OUTPUT
mio_attr_o[23].od_en	No	No		No		OUTPUT
mio_attr_o[23].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[23].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[23].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[23].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[24].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[24].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[24].pull_en	Yes	Yes	T51,T52,T53	Yes	T54,T55,T56	OUTPUT
mio_attr_o[24].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[24].keep_en	No	No		No		OUTPUT
mio_attr_o[24].schmitt_en	No	No		No		OUTPUT
mio_attr_o[24].od_en	No	No		No		OUTPUT
mio_attr_o[24].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[24].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[24].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[24].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[25].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[25].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[25].pull_en	Yes	Yes	T6,T23,T36	Yes	T1,T2,T3	OUTPUT
mio_attr_o[25].pull_select	Yes	Yes	T6,T23,T36	Yes	T1,T2,T3	OUTPUT
mio_attr_o[25].keep_en	No	No		No		OUTPUT
mio_attr_o[25].schmitt_en	No	No		No		OUTPUT
mio_attr_o[25].od_en	No	No		No		OUTPUT
mio_attr_o[25].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[25].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[25].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[25].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[26].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[26].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[26].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[26].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[26].keep_en	No	No		No		OUTPUT
mio_attr_o[26].schmitt_en	No	No		No		OUTPUT
mio_attr_o[26].od_en	No	No		No		OUTPUT
mio_attr_o[26].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[26].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[26].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[26].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[27].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[27].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[27].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[27].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[27].keep_en	No	No		No		OUTPUT
mio_attr_o[27].schmitt_en	No	No		No		OUTPUT
mio_attr_o[27].od_en	No	No		No		OUTPUT
mio_attr_o[27].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[27].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[27].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[27].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[28].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[28].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[28].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[28].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[28].keep_en	No	No		No		OUTPUT
mio_attr_o[28].schmitt_en	No	No		No		OUTPUT
mio_attr_o[28].od_en	No	No		No		OUTPUT
mio_attr_o[28].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[28].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[28].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[28].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[29].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[29].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[29].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[29].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[29].keep_en	No	No		No		OUTPUT
mio_attr_o[29].schmitt_en	No	No		No		OUTPUT
mio_attr_o[29].od_en	No	No		No		OUTPUT
mio_attr_o[29].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[29].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[29].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[29].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[30].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[30].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[30].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[30].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[30].keep_en	No	No		No		OUTPUT
mio_attr_o[30].schmitt_en	No	No		No		OUTPUT
mio_attr_o[30].od_en	No	No		No		OUTPUT
mio_attr_o[30].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[30].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[30].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[30].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[31].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[31].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[31].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[31].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[31].keep_en	No	No		No		OUTPUT
mio_attr_o[31].schmitt_en	No	No		No		OUTPUT
mio_attr_o[31].od_en	No	No		No		OUTPUT
mio_attr_o[31].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[31].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[31].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[31].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[32].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[32].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[32].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[32].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[32].keep_en	No	No		No		OUTPUT
mio_attr_o[32].schmitt_en	No	No		No		OUTPUT
mio_attr_o[32].od_en	No	No		No		OUTPUT
mio_attr_o[32].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[32].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[32].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[32].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[33].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[33].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[33].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[33].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[33].keep_en	No	No		No		OUTPUT
mio_attr_o[33].schmitt_en	No	No		No		OUTPUT
mio_attr_o[33].od_en	No	No		No		OUTPUT
mio_attr_o[33].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[33].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[33].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[33].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[34].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[34].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[34].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[34].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[34].keep_en	No	No		No		OUTPUT
mio_attr_o[34].schmitt_en	No	No		No		OUTPUT
mio_attr_o[34].od_en	No	No		No		OUTPUT
mio_attr_o[34].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[34].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[34].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[34].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[35].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[35].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[35].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[35].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[35].keep_en	No	No		No		OUTPUT
mio_attr_o[35].schmitt_en	No	No		No		OUTPUT
mio_attr_o[35].od_en	No	No		No		OUTPUT
mio_attr_o[35].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[35].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[35].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[35].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[36].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[36].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[36].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[36].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[36].keep_en	No	No		No		OUTPUT
mio_attr_o[36].schmitt_en	No	No		No		OUTPUT
mio_attr_o[36].od_en	No	No		No		OUTPUT
mio_attr_o[36].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[36].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[36].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[36].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[37].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[37].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[37].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[37].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[37].keep_en	No	No		No		OUTPUT
mio_attr_o[37].schmitt_en	No	No		No		OUTPUT
mio_attr_o[37].od_en	No	No		No		OUTPUT
mio_attr_o[37].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[37].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[37].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[37].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[38].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[38].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[38].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[38].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[38].keep_en	No	No		No		OUTPUT
mio_attr_o[38].schmitt_en	Yes	Yes	T29,T36,T37	Yes	T34,T29,T57	OUTPUT
mio_attr_o[38].od_en	No	No		No		OUTPUT
mio_attr_o[38].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[38].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[38].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[38].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[39].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[39].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[39].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[39].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[39].keep_en	No	No		No		OUTPUT
mio_attr_o[39].schmitt_en	Yes	Yes	T29,T36,T37	Yes	T34,T29,T57	OUTPUT
mio_attr_o[39].od_en	No	No		No		OUTPUT
mio_attr_o[39].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[39].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[39].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[39].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[40].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[40].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[40].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[40].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[40].keep_en	No	No		No		OUTPUT
mio_attr_o[40].schmitt_en	No	No		No		OUTPUT
mio_attr_o[40].od_en	No	No		No		OUTPUT
mio_attr_o[40].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[40].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[40].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[40].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[41].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[41].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[41].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[41].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[41].keep_en	No	No		No		OUTPUT
mio_attr_o[41].schmitt_en	No	No		No		OUTPUT
mio_attr_o[41].od_en	No	No		No		OUTPUT
mio_attr_o[41].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[41].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[41].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[41].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[42].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[42].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[42].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[42].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[42].keep_en	No	No		No		OUTPUT
mio_attr_o[42].schmitt_en	No	No		No		OUTPUT
mio_attr_o[42].od_en	No	No		No		OUTPUT
mio_attr_o[42].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[42].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[42].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[42].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[43].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[43].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[43].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[43].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[43].keep_en	No	No		No		OUTPUT
mio_attr_o[43].schmitt_en	No	No		No		OUTPUT
mio_attr_o[43].od_en	No	No		No		OUTPUT
mio_attr_o[43].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[43].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[43].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[43].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[44].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[44].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[44].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[44].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[44].keep_en	No	No		No		OUTPUT
mio_attr_o[44].schmitt_en	No	No		No		OUTPUT
mio_attr_o[44].od_en	No	No		No		OUTPUT
mio_attr_o[44].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[44].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[44].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[44].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[45].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[45].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[45].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[45].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[45].keep_en	No	No		No		OUTPUT
mio_attr_o[45].schmitt_en	No	No		No		OUTPUT
mio_attr_o[45].od_en	No	No		No		OUTPUT
mio_attr_o[45].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[45].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[45].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[45].drive_strength[3:1]	No	No		No		OUTPUT
mio_attr_o[46].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[46].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[46].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[46].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[46].keep_en	No	No		No		OUTPUT
mio_attr_o[46].schmitt_en	No	No		No		OUTPUT
mio_attr_o[46].od_en	No	No		No		OUTPUT
mio_attr_o[46].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[46].slew_rate[1:0]	No	No		No		OUTPUT
mio_attr_o[46].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[46].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[0].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[0].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[0].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[0].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[0].keep_en	No	No		No		OUTPUT
dio_attr_o[0].schmitt_en	No	No		No		OUTPUT
dio_attr_o[0].od_en	No	No		No		OUTPUT
dio_attr_o[0].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[0].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[0].drive_strength[0]	Yes	Yes	*T36,*T42,*T43	Yes	T1,T2,T3	OUTPUT
dio_attr_o[0].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[1].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[1].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[1].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[1].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[1].keep_en	No	No		No		OUTPUT
dio_attr_o[1].schmitt_en	No	No		No		OUTPUT
dio_attr_o[1].od_en	No	No		No		OUTPUT
dio_attr_o[1].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[1].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[1].drive_strength[0]	Yes	Yes	*T36,*T42,*T43	Yes	T1,T2,T3	OUTPUT
dio_attr_o[1].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[2].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[2].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[2].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[2].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[2].keep_en	No	No		No		OUTPUT
dio_attr_o[2].schmitt_en	No	No		No		OUTPUT
dio_attr_o[2].od_en	No	No		No		OUTPUT
dio_attr_o[2].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[2].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[2].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[2].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[3].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[3].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[3].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[3].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[3].keep_en	No	No		No		OUTPUT
dio_attr_o[3].schmitt_en	No	No		No		OUTPUT
dio_attr_o[3].od_en	No	No		No		OUTPUT
dio_attr_o[3].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[3].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[3].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[3].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[4].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[4].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[4].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[4].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[4].keep_en	No	No		No		OUTPUT
dio_attr_o[4].schmitt_en	No	No		No		OUTPUT
dio_attr_o[4].od_en	No	No		No		OUTPUT
dio_attr_o[4].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[4].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[4].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[4].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[5].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[5].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[5].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[5].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[5].keep_en	No	No		No		OUTPUT
dio_attr_o[5].schmitt_en	No	No		No		OUTPUT
dio_attr_o[5].od_en	No	No		No		OUTPUT
dio_attr_o[5].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[5].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[5].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[5].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[6].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[6].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[6].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[6].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[6].keep_en	No	No		No		OUTPUT
dio_attr_o[6].schmitt_en	No	No		No		OUTPUT
dio_attr_o[6].od_en	No	No		No		OUTPUT
dio_attr_o[6].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[6].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[6].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T8,T9,T10	OUTPUT
dio_attr_o[6].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[7].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[7].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[7].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[7].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[7].keep_en	No	No		No		OUTPUT
dio_attr_o[7].schmitt_en	No	No		No		OUTPUT
dio_attr_o[7].od_en	No	No		No		OUTPUT
dio_attr_o[7].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[7].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[7].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T8,T9,T10	OUTPUT
dio_attr_o[7].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[8].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[8].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[8].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[8].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[8].keep_en	No	No		No		OUTPUT
dio_attr_o[8].schmitt_en	No	No		No		OUTPUT
dio_attr_o[8].od_en	No	No		No		OUTPUT
dio_attr_o[8].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[8].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[8].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T8,T9,T10	OUTPUT
dio_attr_o[8].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[9].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[9].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[9].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[9].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[9].keep_en	No	No		No		OUTPUT
dio_attr_o[9].schmitt_en	No	No		No		OUTPUT
dio_attr_o[9].od_en	No	No		No		OUTPUT
dio_attr_o[9].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[9].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[9].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T8,T9,T10	OUTPUT
dio_attr_o[9].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[10].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[10].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T15,T45,T46	OUTPUT
dio_attr_o[10].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[10].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[10].keep_en	No	No		No		OUTPUT
dio_attr_o[10].schmitt_en	No	No		No		OUTPUT
dio_attr_o[10].od_en	No	No		No		OUTPUT
dio_attr_o[10].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[10].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[10].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[10].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[11].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[11].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T15,T45,T46	OUTPUT
dio_attr_o[11].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[11].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[11].keep_en	No	No		No		OUTPUT
dio_attr_o[11].schmitt_en	No	No		No		OUTPUT
dio_attr_o[11].od_en	No	No		No		OUTPUT
dio_attr_o[11].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[11].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[11].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[11].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[12].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[12].virt_od_en	No	No		No		OUTPUT
dio_attr_o[12].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[12].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[12].keep_en	No	No		No		OUTPUT
dio_attr_o[12].schmitt_en	No	No		No		OUTPUT
dio_attr_o[12].od_en	No	No		No		OUTPUT
dio_attr_o[12].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[12].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[12].drive_strength[3:0]	No	No		No		OUTPUT
dio_attr_o[13].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[13].virt_od_en	No	No		No		OUTPUT
dio_attr_o[13].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[13].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[13].keep_en	No	No		No		OUTPUT
dio_attr_o[13].schmitt_en	No	No		No		OUTPUT
dio_attr_o[13].od_en	No	No		No		OUTPUT
dio_attr_o[13].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[13].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[13].drive_strength[3:0]	No	No		No		OUTPUT
dio_attr_o[14].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[14].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[14].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[14].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[14].keep_en	No	No		No		OUTPUT
dio_attr_o[14].schmitt_en	No	No		No		OUTPUT
dio_attr_o[14].od_en	No	No		No		OUTPUT
dio_attr_o[14].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[14].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[14].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[14].drive_strength[3:1]	No	No		No		OUTPUT
dio_attr_o[15].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[15].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[15].pull_en	Yes	Yes	T21,T22,T44	Yes	T25,T8,T9	OUTPUT
dio_attr_o[15].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[15].keep_en	No	No		No		OUTPUT
dio_attr_o[15].schmitt_en	No	No		No		OUTPUT
dio_attr_o[15].od_en	No	No		No		OUTPUT
dio_attr_o[15].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[15].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[15].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[15].drive_strength[3:1]	No	No		No		OUTPUT
adc_req_o.pd	Yes	Yes	T142,T143,T72	Yes	T142,T143,T72	OUTPUT
adc_req_o.channel_sel[1:0]	Yes	Yes	T142,T143,T72	Yes	T142,T143,T72	OUTPUT
adc_rsp_i.data_valid	Yes	Yes	T142,T143,T72	Yes	T142,T143,T72	INPUT
adc_rsp_i.data[9:0]	Yes	Yes	T142,T143,T72	Yes	T142,T143,T72	INPUT
ast_edn_req_i.edn_req	Yes	Yes	T2,T3,T4	Yes	T1,T2,T3	INPUT
ast_edn_rsp_o.edn_bus[31:0]	Yes	Yes	T3,T5,T30	Yes	T3,T4,T5	OUTPUT
ast_edn_rsp_o.edn_fips	Yes	Yes	T143,T144,T145	Yes	T146,T143,T147	OUTPUT
ast_edn_rsp_o.edn_ack	Yes	Yes	T2,T3,T4	Yes	T2,T3,T4	OUTPUT
ast_lc_dft_en_o[3:0]	Yes	Yes	T36,T43,T81	Yes	T1,T2,T3	OUTPUT
obs_ctrl_i.obmen[3:0]	No	No		No		INPUT
obs_ctrl_i.obmsl[3:0]	No	No		No		INPUT
obs_ctrl_i.obgsl[3:0]	No	No		No		INPUT
ram_1p_cfg_i.rf_cfg.cfg[3:0]	No	No		No		INPUT
ram_1p_cfg_i.rf_cfg.cfg_en	No	No		No		INPUT
ram_1p_cfg_i.rf_cfg.test	No	No		No		INPUT
ram_1p_cfg_i.ram_cfg.cfg[3:0]	No	No		No		INPUT
ram_1p_cfg_i.ram_cfg.cfg_en	No	No		No		INPUT
ram_1p_cfg_i.ram_cfg.test	No	No		No		INPUT
spi_ram_2p_cfg_i.b_ram_lcfg.cfg[3:0]	No	No		No		INPUT
spi_ram_2p_cfg_i.b_ram_lcfg.cfg_en	No	No		No		INPUT
spi_ram_2p_cfg_i.b_ram_lcfg.test	No	No		No		INPUT
spi_ram_2p_cfg_i.a_ram_lcfg.cfg[3:0]	No	No		No		INPUT
spi_ram_2p_cfg_i.a_ram_lcfg.cfg_en	No	No		No		INPUT
spi_ram_2p_cfg_i.a_ram_lcfg.test	No	No		No		INPUT
spi_ram_2p_cfg_i.b_ram_fcfg.cfg[3:0]	No	No		No		INPUT
spi_ram_2p_cfg_i.b_ram_fcfg.cfg_en	No	No		No		INPUT
spi_ram_2p_cfg_i.b_ram_fcfg.test	No	No		No		INPUT
spi_ram_2p_cfg_i.a_ram_fcfg.cfg[3:0]	No	No		No		INPUT
spi_ram_2p_cfg_i.a_ram_fcfg.cfg_en	No	No		No		INPUT
spi_ram_2p_cfg_i.a_ram_fcfg.test	No	No		No		INPUT
usb_ram_1p_cfg_i.rf_cfg.cfg[3:0]	No	No		No		INPUT
usb_ram_1p_cfg_i.rf_cfg.cfg_en	No	No		No		INPUT
usb_ram_1p_cfg_i.rf_cfg.test	No	No		No		INPUT
usb_ram_1p_cfg_i.ram_cfg.cfg[3:0]	No	No		No		INPUT
usb_ram_1p_cfg_i.ram_cfg.cfg_en	No	No		No		INPUT
usb_ram_1p_cfg_i.ram_cfg.test	No	No		No		INPUT
rom_cfg_i.cfg[3:0]	No	No		No		INPUT
rom_cfg_i.cfg_en	No	No		No		INPUT
rom_cfg_i.test	No	No		No		INPUT
clk_main_jitter_en_o[3:0]	Yes	Yes	T148,T149,T150	Yes	T151,T146,T143	OUTPUT
io_clk_byp_req_o[3:0]	Yes	Yes	T29,T57,T36	Yes	T29,T36,T37	OUTPUT
io_clk_byp_ack_i[3:0]	Yes	Yes	T29,T57,T36	Yes	T29,T36,T37	INPUT
all_clk_byp_req_o[3:0]	Yes	Yes	T28,T64,T152	Yes	T152,T153,T154	OUTPUT
all_clk_byp_ack_i[3:0]	Yes	Yes	T28,T64,T152	Yes	T152,T153,T154	INPUT
hi_speed_sel_o[3:0]	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	OUTPUT
div_step_down_req_i[3:0]	Yes	Yes	T28,T29,T57	Yes	T29,T36,T37	INPUT
calib_rdy_i[3:0]	Yes	Yes	T1,T2,T3	Yes	T6,T36,T42	INPUT
flash_bist_enable_i[3:0]	Unreachable	Unreachable		Unreachable		INPUT
flash_power_down_h_i	Yes	Yes	T1,T2,T3	Yes	T155,T15,T156	INPUT
flash_power_ready_h_i	No	No		Yes	T1,T2,T3	INPUT
flash_test_mode_a_io[1:0]	No	No		Yes	T6,T19,T20	INOUT
flash_test_voltage_h_io	No	No		Yes	T6,T19	INOUT
flash_obs_o[7:0]	Unreachable	Unreachable		Unreachable		OUTPUT
es_rng_req_o.rng_enable	Yes	Yes	T6,T36,T42	Yes	T1,T2,T3	OUTPUT
es_rng_rsp_i.rng_b[3:0]	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
es_rng_rsp_i.rng_valid	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
es_rng_fips_o	Yes	Yes	T157,T158,T159	Yes	T160,T161,T162	OUTPUT
ast_tl_req_o.d_ready	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
ast_tl_req_o.a_user.data_intg[6:0]	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
ast_tl_req_o.a_user.cmd_intg[6:0]	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
ast_tl_req_o.a_user.instr_type[3:0]	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
ast_tl_req_o.a_user.rsvd[4:0]	Unreachable	Unreachable		Unreachable		OUTPUT
ast_tl_req_o.a_data[31:0]	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
ast_tl_req_o.a_mask[3:0]	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
ast_tl_req_o.a_address[31:0]	Unreachable	Unreachable		Unreachable		OUTPUT
ast_tl_req_o.a_source[5:0]	Yes	Yes	*T88,*T35,*T97	Yes	T88,T35,T97	OUTPUT
ast_tl_req_o.a_source[7:6]	Unreachable	Unreachable		Unreachable		OUTPUT
ast_tl_req_o.a_size[1:0]	Yes	Yes	T94,T95,T96	Yes	T94,T95,T96	OUTPUT
ast_tl_req_o.a_param[2:0]	Unreachable	Unreachable		Unreachable		OUTPUT
ast_tl_req_o.a_opcode[2:0]	Yes	Yes	T35,T97,T98	Yes	T35,T97,T98	OUTPUT
ast_tl_req_o.a_valid	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
ast_tl_rsp_i.a_ready	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
ast_tl_rsp_i.d_error	Yes	Yes	T94,T95,T96	Yes	T94,T95,T96	INPUT
ast_tl_rsp_i.d_user.data_intg[6:0]	Yes	Yes	T94,T95,T96	Yes	T94,T95,T96	INPUT
ast_tl_rsp_i.d_user.rsp_intg[6:0]	Yes	Yes	T6,T36,T42	Yes	T1,T2,T3	INPUT
ast_tl_rsp_i.d_data[31:0]	Yes	Yes	T6,T36,T42	Yes	T1,T2,T3	INPUT
ast_tl_rsp_i.d_sink	Yes	Yes	T94,T95,T96	Yes	T94,T95,T96	INPUT
ast_tl_rsp_i.d_source[5:0]	Yes	Yes	*T94,*T96,*T99	Yes	T94,T95,T96	INPUT
ast_tl_rsp_i.d_source[7:6]	Unreachable	Unreachable		Unreachable		INPUT
ast_tl_rsp_i.d_size[1:0]	Yes	Yes	T94,T95,T96	Yes	T94,T95,T96	INPUT
ast_tl_rsp_i.d_param[2:0]	Unreachable	Unreachable		Unreachable		INPUT
ast_tl_rsp_i.d_opcode[0]	Yes	Yes	*T94,*T95,*T96	Yes	T94,T95,T96	INPUT
ast_tl_rsp_i.d_opcode[2:1]	Unreachable	Unreachable		Unreachable		INPUT
ast_tl_rsp_i.d_valid	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
dft_strap_test_o.straps[1:0]	No	No		Yes	T84,T85,T86	OUTPUT
dft_strap_test_o.valid	Yes	Yes	T36,T43,T81	Yes	T1,T2,T3	OUTPUT
dft_hold_tap_sel_i	Unreachable	Unreachable		Unreachable		INPUT
usb_dp_pullup_en_o	Yes	Yes	T4,T7,T16	Yes	T4,T7,T16	OUTPUT
usb_dn_pullup_en_o	Yes	Yes	T4,T7,T93	Yes	T4,T7,T93	OUTPUT
pwrmgr_ast_req_o.usb_clk_en	Yes	Yes	T5,T6,T23	Yes	T1,T2,T3	OUTPUT
pwrmgr_ast_req_o.io_clk_en	Yes	Yes	T6,T23,T26	Yes	T1,T2,T3	OUTPUT
pwrmgr_ast_req_o.core_clk_en	Yes	Yes	T5,T6,T23	Yes	T1,T2,T3	OUTPUT
pwrmgr_ast_req_o.slow_clk_en	No	No		No		OUTPUT
pwrmgr_ast_req_o.pwr_clamp	Yes	Yes	T1,T2,T3	Yes	T29,T36,T37	OUTPUT
pwrmgr_ast_req_o.pwr_clamp_env	Yes	Yes	T1,T2,T3	Yes	T29,T36,T37	OUTPUT
pwrmgr_ast_req_o.main_pd_n	Yes	Yes	T155,T15,T156	Yes	T155,T15,T156	OUTPUT
pwrmgr_ast_rsp_i.main_pok	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	INPUT
pwrmgr_ast_rsp_i.usb_clk_val	Yes	Yes	T5,T6,T23	Yes	T1,T2,T3	INPUT
pwrmgr_ast_rsp_i.io_clk_val	Yes	Yes	T6,T23,T28	Yes	T1,T2,T3	INPUT
pwrmgr_ast_rsp_i.core_clk_val	Yes	Yes	T5,T6,T23	Yes	T1,T2,T3	INPUT
pwrmgr_ast_rsp_i.slow_clk_val	Yes	Yes	T28,T64,T163	Yes	T1,T2,T3	INPUT
otp_ctrl_otp_ast_pwr_seq_o.pwr_seq[1:0]	No	No		No		OUTPUT
otp_ctrl_otp_ast_pwr_seq_h_i.pwr_seq_h[0]	No	No		No		INPUT
otp_ctrl_otp_ast_pwr_seq_h_i.pwr_seq_h[1]	Yes	Yes	T1,T2,T3	Yes	T155,T15,T156	INPUT
otp_ext_voltage_h_io	No	No		Yes	T6,T19	INOUT
otp_obs_o[7:0]	Unreachable	Unreachable		Unreachable		OUTPUT
por_n_i[1:0]	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	INPUT
fpga_info_i[31:0]	Unreachable	Unreachable		Unreachable		INPUT
sensor_ctrl_ast_alert_req_i.alerts[0].n	Yes	Yes	T164,T165,T72	Yes	T165,T72,T166	INPUT
sensor_ctrl_ast_alert_req_i.alerts[0].p	Yes	Yes	T165,T72,T166	Yes	T164,T165,T72	INPUT
sensor_ctrl_ast_alert_req_i.alerts[1].n	Yes	Yes	T164,T167,T168	Yes	T169,T170,T171	INPUT
sensor_ctrl_ast_alert_req_i.alerts[1].p	Yes	Yes	T169,T170,T171	Yes	T164,T167,T168	INPUT
sensor_ctrl_ast_alert_req_i.alerts[2].n	Yes	Yes	T164,T165,T167	Yes	T165,T172,T173	INPUT
sensor_ctrl_ast_alert_req_i.alerts[2].p	Yes	Yes	T165,T172,T173	Yes	T164,T165,T167	INPUT
sensor_ctrl_ast_alert_req_i.alerts[3].n	Yes	Yes	T164,T167,T168	Yes	T170,T174,T175	INPUT
sensor_ctrl_ast_alert_req_i.alerts[3].p	Yes	Yes	T170,T174,T175	Yes	T164,T167,T168	INPUT
sensor_ctrl_ast_alert_req_i.alerts[4].n	Yes	Yes	T164,T165,T167	Yes	T165,T172,T176	INPUT
sensor_ctrl_ast_alert_req_i.alerts[4].p	Yes	Yes	T165,T172,T176	Yes	T164,T165,T167	INPUT
sensor_ctrl_ast_alert_req_i.alerts[5].n	Yes	Yes	T164,T167,T168	Yes	T170,T174,T175	INPUT
sensor_ctrl_ast_alert_req_i.alerts[5].p	Yes	Yes	T170,T174,T175	Yes	T164,T167,T168	INPUT
sensor_ctrl_ast_alert_req_i.alerts[6].n	Yes	Yes	T164,T167,T168	Yes	T173,T170,T175	INPUT
sensor_ctrl_ast_alert_req_i.alerts[6].p	Yes	Yes	T173,T170,T175	Yes	T164,T167,T168	INPUT
sensor_ctrl_ast_alert_req_i.alerts[7].n	Yes	Yes	T164,T143,T167	Yes	T143,T177,T175	INPUT
sensor_ctrl_ast_alert_req_i.alerts[7].p	Yes	Yes	T143,T177,T175	Yes	T164,T143,T167	INPUT
sensor_ctrl_ast_alert_req_i.alerts[8].n	Yes	Yes	T164,T143,T167	Yes	T143,T177,T170	INPUT
sensor_ctrl_ast_alert_req_i.alerts[8].p	Yes	Yes	T143,T177,T170	Yes	T164,T143,T167	INPUT
sensor_ctrl_ast_alert_req_i.alerts[9].n	Yes	Yes	T164,T167,T168	Yes	T170,T174,T171	INPUT
sensor_ctrl_ast_alert_req_i.alerts[9].p	Yes	Yes	T170,T174,T171	Yes	T164,T167,T168	INPUT
sensor_ctrl_ast_alert_req_i.alerts[10].n	Yes	Yes	T164,T167,T168	Yes	T178,T170,T175	INPUT
sensor_ctrl_ast_alert_req_i.alerts[10].p	Yes	Yes	T178,T170,T175	Yes	T164,T167,T168	INPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[0].n	Yes	Yes	T164,T165,T72	Yes	T164,T165,T72	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[0].p	Yes	Yes	T164,T165,T72	Yes	T164,T165,T72	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[1].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[1].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[2].n	Yes	Yes	T164,T165,T167	Yes	T164,T165,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[2].p	Yes	Yes	T164,T165,T167	Yes	T164,T165,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[3].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[3].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[4].n	Yes	Yes	T164,T165,T167	Yes	T164,T165,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[4].p	Yes	Yes	T164,T165,T167	Yes	T164,T165,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[5].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[5].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[6].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[6].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[7].n	Yes	Yes	T164,T143,T167	Yes	T164,T143,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[7].p	Yes	Yes	T164,T143,T167	Yes	T164,T143,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[8].n	Yes	Yes	T164,T143,T167	Yes	T164,T143,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[8].p	Yes	Yes	T164,T143,T167	Yes	T164,T143,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[9].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[9].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[10].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[10].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[0].n	Yes	Yes	T164,T165,T72	Yes	T164,T165,T72	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[0].p	Yes	Yes	T164,T165,T72	Yes	T164,T165,T72	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[1].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[1].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[2].n	Yes	Yes	T164,T165,T167	Yes	T164,T165,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[2].p	Yes	Yes	T164,T165,T167	Yes	T164,T165,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[3].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[3].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[4].n	Yes	Yes	T164,T165,T167	Yes	T164,T165,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[4].p	Yes	Yes	T164,T165,T167	Yes	T164,T165,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[5].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[5].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[6].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[6].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[7].n	Yes	Yes	T164,T143,T167	Yes	T164,T143,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[7].p	Yes	Yes	T164,T143,T167	Yes	T164,T143,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[8].n	Yes	Yes	T164,T143,T167	Yes	T164,T143,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[8].p	Yes	Yes	T164,T143,T167	Yes	T164,T143,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[9].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[9].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[10].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[10].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_status_i.io_pok[1:0]	Yes	Yes	T163,T179,T180	Yes	T1,T2,T3	INPUT
ast2pinmux_i[8:0]	Unreachable	Unreachable		Unreachable		INPUT
ast_init_done_i[3:0]	Yes	Yes	T1,T2,T3	Yes	T6,T36,T42	INPUT
sensor_ctrl_manual_pad_attr_o[0].invert	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[0].virt_od_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[0].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[0].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[0].keep_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[0].schmitt_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[0].od_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[0].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[0].slew_rate[1:0]	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[0].drive_strength[3:0]	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[1].invert	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[1].virt_od_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[1].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[1].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[1].keep_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[1].schmitt_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[1].od_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[1].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[1].slew_rate[1:0]	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[1].drive_strength[3:0]	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[2].invert	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[2].virt_od_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[2].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[2].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[2].keep_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[2].schmitt_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[2].od_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[2].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[2].slew_rate[1:0]	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[2].drive_strength[3:0]	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[3].invert	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[3].virt_od_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[3].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[3].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[3].keep_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[3].schmitt_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[3].od_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[3].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[3].slew_rate[1:0]	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[3].drive_strength[3:0]	No	No		No		OUTPUT
sck_monitor_o	Yes	Yes	T5,T11,T8	Yes	T5,T6,T11	OUTPUT
usbdev_usb_rx_d_i	Yes	Yes	T4,T7,T16	Yes	T4,T7,T16	INPUT
usbdev_usb_tx_d_o	Yes	Yes	T4,T7,T16	Yes	T16,T17,T18	OUTPUT
usbdev_usb_tx_se0_o	Yes	Yes	T16,T17,T18	Yes	T16,T17,T18	OUTPUT
usbdev_usb_tx_use_d_se0_o	Yes	Yes	T181,T182,T183	Yes	T181,T182,T183	OUTPUT
usbdev_usb_rx_enable_o	Yes	Yes	T93,T170,T174	Yes	T4,T7,T16	OUTPUT
usbdev_usb_ref_val_o	Yes	Yes	T16,T17,T18	Yes	T16,T17,T18	OUTPUT
usbdev_usb_ref_pulse_o	Yes	Yes	T16,T17,T18	Yes	T16,T17,T18	OUTPUT
clk_main_i	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
clk_io_i	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
clk_usb_i	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
clk_aon_i	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
clks_ast_o.clk_usb_peri	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_peri	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_div2_peri	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_div4_peri	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_div4_timers	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_main_secure	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_div4_secure	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_div2_infra	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_infra	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_usb_infra	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_main_infra	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_div4_infra	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_main_otbn	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_main_kmac	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_main_hmac	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_main_aes	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_aon_timers	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_aon_peri	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_aon_secure	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_div2_powerup	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_usb_powerup	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_powerup	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_main_powerup	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_aon_powerup	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_div4_powerup	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_i2c2_n[0]	No	No		No		OUTPUT
rsts_ast_o.rst_i2c2_n[1]	Yes	Yes	T6,T29,T36	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_i2c1_n[0]	No	No		No		OUTPUT
rsts_ast_o.rst_i2c1_n[1]	Yes	Yes	T6,T29,T36	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_i2c0_n[0]	No	No		No		OUTPUT
rsts_ast_o.rst_i2c0_n[1]	Yes	Yes	T6,T29,T36	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_usb_aon_n[0]	No	No		No		OUTPUT
rsts_ast_o.rst_usb_aon_n[1]	Yes	Yes	T6,T29,T36	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_usb_n[0]	No	No		No		OUTPUT
rsts_ast_o.rst_usb_n[1]	Yes	Yes	T6,T29,T36	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_spi_host1_n[0]	No	No		No		OUTPUT
rsts_ast_o.rst_spi_host1_n[1]	Yes	Yes	T6,T29,T36	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_spi_host0_n[0]	No	No		No		OUTPUT
rsts_ast_o.rst_spi_host0_n[1]	Yes	Yes	T6,T29,T36	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_spi_device_n[0]	No	No		No		OUTPUT
rsts_ast_o.rst_spi_device_n[1]	Yes	Yes	T6,T29,T36	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_sys_io_div4_n[0]	Yes	Yes	*T29,*T36,*T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_sys_io_div4_n[1]	No	No		No		OUTPUT
rsts_ast_o.rst_sys_n[0]	No	No		No		OUTPUT
rsts_ast_o.rst_sys_n[1]	Yes	Yes	T6,T29,T36	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_lc_usb_n[1:0]	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_lc_io_div4_n[1:0]	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_lc_io_div4_shadowed_n[1:0]	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_lc_io_div2_n[1:0]	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_lc_io_n[1:0]	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_lc_aon_n[0]	Yes	Yes	*T29,*T36,*T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_lc_aon_n[1]	No	No		No		OUTPUT
rsts_ast_o.rst_lc_n[1:0]	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_lc_shadowed_n[1:0]	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_por_usb_n[0]	Yes	Yes	*T29,*T36,*T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_por_usb_n[1]	No	No		No		OUTPUT
rsts_ast_o.rst_por_io_div4_n[0]	Yes	Yes	*T29,*T36,*T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_por_io_div4_n[1]	No	No		No		OUTPUT
rsts_ast_o.rst_por_io_div2_n[0]	Yes	Yes	*T29,*T36,*T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_por_io_div2_n[1]	No	No		No		OUTPUT
rsts_ast_o.rst_por_io_n[0]	Yes	Yes	*T29,*T36,*T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_por_io_n[1]	No	No		No		OUTPUT
rsts_ast_o.rst_por_n[0]	Yes	Yes	*T29,*T36,*T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_por_n[1]	No	No		No		OUTPUT
rsts_ast_o.rst_por_aon_n[1:0]	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	OUTPUT
scan_rst_ni	Unreachable	Unreachable		Unreachable		INPUT
scan_en_i	Unreachable	Unreachable		Unreachable		INPUT
scanmode_i[3:0]	Unreachable	Unreachable		Unreachable		INPUT

*Tests covering at least one bit in the range

---

Assert Coverage for Module : top_earlgrey

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	1	1	100.00	1	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	1	1	100.00	1	100.00

---

Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
scanmodeKnown	497807442	497807442	0	0

scanmodeKnown

Name	Attempts	Real Successes	Failures	Incomplete
Total	497807442	497807442	0	0
T1	44330	44330	0	0
T2	92439	92439	0	0
T3	116775	116775	0	0
T4	114709	114709	0	0
T5	108493	108493	0	0
T6	119097	119097	0	0
T30	95379	95379	0	0
T68	220854	220854	0	0
T104	101636	101636	0	0
T105	69285	69285	0	0

Line Coverage for Instance : tb.dut.top_earlgrey

	Line No.	Total	Covered	Percent
TOTAL		279	258	92.47
CONT_ASSIGN	760	1	1	100.00
CONT_ASSIGN	761	1	1	100.00
CONT_ASSIGN	762	1	1	100.00
CONT_ASSIGN	763	1	0	0.00
CONT_ASSIGN	764	1	0	0.00
CONT_ASSIGN	765	1	0	0.00
CONT_ASSIGN	766	1	0	0.00
CONT_ASSIGN	767	1	0	0.00
CONT_ASSIGN	780	1	1	100.00
CONT_ASSIGN	781	1	0	0.00
CONT_ASSIGN	782	1	0	0.00
CONT_ASSIGN	783	1	0	0.00
CONT_ASSIGN	784	1	0	0.00
CONT_ASSIGN	785	1	0	0.00
CONT_ASSIGN	786	1	0	0.00
CONT_ASSIGN	787	1	0	0.00
CONT_ASSIGN	801	1	1	100.00
CONT_ASSIGN	803	1	1	100.00
CONT_ASSIGN	805	1	1	100.00
CONT_ASSIGN	807	1	1	100.00
CONT_ASSIGN	809	1	1	100.00
CONT_ASSIGN	811	1	1	100.00
CONT_ASSIGN	815	1	1	100.00
CONT_ASSIGN	825	1	1	100.00
CONT_ASSIGN	826	1	1	100.00
CONT_ASSIGN	830	1	1	100.00
CONT_ASSIGN	854	1	1	100.00
CONT_ASSIGN	855	1	1	100.00
CONT_ASSIGN	857	1	1	100.00
CONT_ASSIGN	858	1	1	100.00
CONT_ASSIGN	860	1	1	100.00
CONT_ASSIGN	861	1	1	100.00
CONT_ASSIGN	863	1	1	100.00
CONT_ASSIGN	864	1	1	100.00
CONT_ASSIGN	866	1	1	100.00
CONT_ASSIGN	867	1	1	100.00
CONT_ASSIGN	869	1	1	100.00
CONT_ASSIGN	870	1	1	100.00
CONT_ASSIGN	872	1	1	100.00
CONT_ASSIGN	873	1	1	100.00
CONT_ASSIGN	875	1	1	100.00
CONT_ASSIGN	876	1	1	100.00
CONT_ASSIGN	878	1	1	100.00
CONT_ASSIGN	879	1	1	100.00
CONT_ASSIGN	881	1	1	100.00
CONT_ASSIGN	882	1	1	100.00
CONT_ASSIGN	884	1	0	0.00
CONT_ASSIGN	885	1	1	100.00
CONT_ASSIGN	887	1	0	0.00
CONT_ASSIGN	888	1	1	100.00
CONT_ASSIGN	890	1	1	100.00
CONT_ASSIGN	891	1	1	100.00
CONT_ASSIGN	893	1	1	100.00
CONT_ASSIGN	894	1	1	100.00
CONT_ASSIGN	896	1	1	100.00
CONT_ASSIGN	897	1	1	100.00
CONT_ASSIGN	899	1	1	100.00
CONT_ASSIGN	900	1	1	100.00
CONT_ASSIGN	902	1	1	100.00
CONT_ASSIGN	903	1	1	100.00
CONT_ASSIGN	905	1	1	100.00
CONT_ASSIGN	906	1	1	100.00
CONT_ASSIGN	908	1	1	100.00
CONT_ASSIGN	909	1	1	100.00
CONT_ASSIGN	911	1	1	100.00
CONT_ASSIGN	912	1	1	100.00
CONT_ASSIGN	914	1	1	100.00
CONT_ASSIGN	915	1	1	100.00
CONT_ASSIGN	917	1	1	100.00
CONT_ASSIGN	918	1	1	100.00
CONT_ASSIGN	920	1	1	100.00
CONT_ASSIGN	921	1	1	100.00
CONT_ASSIGN	923	1	1	100.00
CONT_ASSIGN	924	1	1	100.00
CONT_ASSIGN	930	0	0
CONT_ASSIGN	932	0	0
CONT_ASSIGN	934	0	0
CONT_ASSIGN	936	0	0
CONT_ASSIGN	938	0	0
CONT_ASSIGN	940	0	0
CONT_ASSIGN	942	0	0
CONT_ASSIGN	944	0	0
CONT_ASSIGN	946	0	0
CONT_ASSIGN	948	0	0
CONT_ASSIGN	950	0	0
CONT_ASSIGN	952	0	0
CONT_ASSIGN	954	0	0
CONT_ASSIGN	956	0	0
CONT_ASSIGN	958	0	0
CONT_ASSIGN	960	0	0
CONT_ASSIGN	962	0	0
CONT_ASSIGN	964	0	0
CONT_ASSIGN	966	0	0
CONT_ASSIGN	968	0	0
CONT_ASSIGN	970	0	0
CONT_ASSIGN	972	0	0
CONT_ASSIGN	974	0	0
CONT_ASSIGN	976	0	0
CONT_ASSIGN	978	0	0
CONT_ASSIGN	980	0	0
CONT_ASSIGN	982	0	0
CONT_ASSIGN	984	0	0
CONT_ASSIGN	986	0	0
CONT_ASSIGN	988	0	0
CONT_ASSIGN	990	0	0
CONT_ASSIGN	992	0	0
CONT_ASSIGN	994	0	0
CONT_ASSIGN	996	0	0
CONT_ASSIGN	998	0	0
CONT_ASSIGN	1000	0	0
CONT_ASSIGN	1002	0	0
CONT_ASSIGN	1004	0	0
CONT_ASSIGN	1006	0	0
CONT_ASSIGN	1008	0	0
CONT_ASSIGN	1010	0	0
CONT_ASSIGN	1012	0	0
CONT_ASSIGN	1014	0	0
CONT_ASSIGN	1016	0	0
CONT_ASSIGN	1018	0	0
CONT_ASSIGN	1020	0	0
CONT_ASSIGN	1022	0	0
CONT_ASSIGN	2668	1	1	100.00
CONT_ASSIGN	3072	1	1	100.00
CONT_ASSIGN	3073	1	1	100.00
CONT_ASSIGN	3074	1	1	100.00
CONT_ASSIGN	3075	1	1	100.00
CONT_ASSIGN	3076	1	1	100.00
CONT_ASSIGN	3077	1	1	100.00
CONT_ASSIGN	3078	1	1	100.00
CONT_ASSIGN	3079	1	1	100.00
CONT_ASSIGN	3080	1	1	100.00
CONT_ASSIGN	3081	1	1	100.00
CONT_ASSIGN	3082	1	1	100.00
CONT_ASSIGN	3083	1	1	100.00
CONT_ASSIGN	3084	1	1	100.00
CONT_ASSIGN	3085	1	1	100.00
CONT_ASSIGN	3086	1	1	100.00
CONT_ASSIGN	3087	1	1	100.00
CONT_ASSIGN	3088	1	1	100.00
CONT_ASSIGN	3089	1	1	100.00
CONT_ASSIGN	3090	1	1	100.00
CONT_ASSIGN	3091	1	1	100.00
CONT_ASSIGN	3092	1	1	100.00
CONT_ASSIGN	3093	1	1	100.00
CONT_ASSIGN	3094	1	1	100.00
CONT_ASSIGN	3095	1	1	100.00
CONT_ASSIGN	3096	1	1	100.00
CONT_ASSIGN	3097	1	1	100.00
CONT_ASSIGN	3098	1	1	100.00
CONT_ASSIGN	3099	1	1	100.00
CONT_ASSIGN	3100	1	1	100.00
CONT_ASSIGN	3101	1	1	100.00
CONT_ASSIGN	3102	1	1	100.00
CONT_ASSIGN	3103	1	1	100.00
CONT_ASSIGN	3104	1	1	100.00
CONT_ASSIGN	3105	1	1	100.00
CONT_ASSIGN	3106	1	1	100.00
CONT_ASSIGN	3107	1	1	100.00
CONT_ASSIGN	3108	1	1	100.00
CONT_ASSIGN	3109	1	1	100.00
CONT_ASSIGN	3110	1	1	100.00
CONT_ASSIGN	3111	1	1	100.00
CONT_ASSIGN	3112	1	1	100.00
CONT_ASSIGN	3113	1	1	100.00
CONT_ASSIGN	3114	1	1	100.00
CONT_ASSIGN	3115	1	1	100.00
CONT_ASSIGN	3116	1	1	100.00
CONT_ASSIGN	3117	1	1	100.00
CONT_ASSIGN	3118	1	1	100.00
CONT_ASSIGN	3119	1	1	100.00
CONT_ASSIGN	3120	1	1	100.00
CONT_ASSIGN	3121	1	1	100.00
CONT_ASSIGN	3122	1	1	100.00
CONT_ASSIGN	3123	1	1	100.00
CONT_ASSIGN	3124	1	1	100.00
CONT_ASSIGN	3125	1	1	100.00
CONT_ASSIGN	3126	1	1	100.00
CONT_ASSIGN	3127	1	1	100.00
CONT_ASSIGN	3128	1	1	100.00
CONT_ASSIGN	3131	1	1	100.00
CONT_ASSIGN	3132	1	1	100.00
CONT_ASSIGN	3133	1	1	100.00
CONT_ASSIGN	3134	1	1	100.00
CONT_ASSIGN	3135	1	1	100.00
CONT_ASSIGN	3136	1	1	100.00
CONT_ASSIGN	3137	1	1	100.00
CONT_ASSIGN	3138	1	1	100.00
CONT_ASSIGN	3139	1	1	100.00
CONT_ASSIGN	3140	1	1	100.00
CONT_ASSIGN	3141	1	1	100.00
CONT_ASSIGN	3142	1	1	100.00
CONT_ASSIGN	3143	1	1	100.00
CONT_ASSIGN	3144	1	1	100.00
CONT_ASSIGN	3145	1	1	100.00
CONT_ASSIGN	3146	1	1	100.00
CONT_ASSIGN	3147	1	1	100.00
CONT_ASSIGN	3148	1	1	100.00
CONT_ASSIGN	3149	1	1	100.00
CONT_ASSIGN	3150	1	1	100.00
CONT_ASSIGN	3151	1	1	100.00
CONT_ASSIGN	3152	1	1	100.00
CONT_ASSIGN	3153	1	1	100.00
CONT_ASSIGN	3154	1	1	100.00
CONT_ASSIGN	3155	1	1	100.00
CONT_ASSIGN	3156	1	1	100.00
CONT_ASSIGN	3157	1	1	100.00
CONT_ASSIGN	3158	1	1	100.00
CONT_ASSIGN	3159	1	1	100.00
CONT_ASSIGN	3160	1	1	100.00
CONT_ASSIGN	3161	1	1	100.00
CONT_ASSIGN	3162	1	1	100.00
CONT_ASSIGN	3163	0	0
CONT_ASSIGN	3164	0	0
CONT_ASSIGN	3165	0	0
CONT_ASSIGN	3166	0	0
CONT_ASSIGN	3167	0	0
CONT_ASSIGN	3168	0	0
CONT_ASSIGN	3169	1	1	100.00
CONT_ASSIGN	3170	1	1	100.00
CONT_ASSIGN	3171	1	0	0.00
CONT_ASSIGN	3172	1	1	100.00
CONT_ASSIGN	3173	1	1	100.00
CONT_ASSIGN	3174	1	1	100.00
CONT_ASSIGN	3175	1	1	100.00
CONT_ASSIGN	3176	1	1	100.00
CONT_ASSIGN	3177	1	1	100.00
CONT_ASSIGN	3178	1	1	100.00
CONT_ASSIGN	3179	1	1	100.00
CONT_ASSIGN	3180	1	1	100.00
CONT_ASSIGN	3181	1	1	100.00
CONT_ASSIGN	3182	1	1	100.00
CONT_ASSIGN	3183	1	0	0.00
CONT_ASSIGN	3184	0	0
CONT_ASSIGN	3185	0	0
CONT_ASSIGN	3186	0	0
CONT_ASSIGN	3187	0	0
CONT_ASSIGN	3188	0	0
CONT_ASSIGN	3189	0	0
CONT_ASSIGN	3190	0	0
CONT_ASSIGN	3191	0	0
CONT_ASSIGN	3192	0	0
CONT_ASSIGN	3193	1	1	100.00
CONT_ASSIGN	3194	1	1	100.00
CONT_ASSIGN	3195	1	1	100.00
CONT_ASSIGN	3196	1	1	100.00
CONT_ASSIGN	3197	1	1	100.00
CONT_ASSIGN	3198	1	1	100.00
CONT_ASSIGN	3199	1	0	0.00
CONT_ASSIGN	3200	1	1	100.00
CONT_ASSIGN	3201	1	1	100.00
CONT_ASSIGN	3202	1	1	100.00
CONT_ASSIGN	3203	1	1	100.00
CONT_ASSIGN	3204	1	1	100.00
CONT_ASSIGN	3205	1	1	100.00
CONT_ASSIGN	3208	1	1	100.00
CONT_ASSIGN	3209	1	1	100.00
CONT_ASSIGN	3210	1	1	100.00
CONT_ASSIGN	3211	1	1	100.00
CONT_ASSIGN	3212	1	1	100.00
CONT_ASSIGN	3213	1	1	100.00
CONT_ASSIGN	3214	1	1	100.00
CONT_ASSIGN	3215	1	1	100.00
CONT_ASSIGN	3216	1	1	100.00
CONT_ASSIGN	3217	1	1	100.00
CONT_ASSIGN	3218	1	1	100.00
CONT_ASSIGN	3219	1	1	100.00
CONT_ASSIGN	3220	1	1	100.00
CONT_ASSIGN	3221	1	1	100.00
CONT_ASSIGN	3222	1	1	100.00
CONT_ASSIGN	3223	1	1	100.00
CONT_ASSIGN	3224	1	1	100.00
CONT_ASSIGN	3225	1	1	100.00
CONT_ASSIGN	3226	1	1	100.00
CONT_ASSIGN	3227	1	1	100.00
CONT_ASSIGN	3228	1	1	100.00
CONT_ASSIGN	3229	1	1	100.00
CONT_ASSIGN	3230	1	1	100.00
CONT_ASSIGN	3231	1	1	100.00
CONT_ASSIGN	3232	1	1	100.00
CONT_ASSIGN	3233	1	1	100.00
CONT_ASSIGN	3234	1	1	100.00
CONT_ASSIGN	3235	1	1	100.00
CONT_ASSIGN	3236	1	1	100.00
CONT_ASSIGN	3237	1	1	100.00
CONT_ASSIGN	3238	1	1	100.00
CONT_ASSIGN	3239	1	1	100.00
CONT_ASSIGN	3240	1	1	100.00
CONT_ASSIGN	3241	1	1	100.00
CONT_ASSIGN	3242	1	1	100.00
CONT_ASSIGN	3243	1	1	100.00
CONT_ASSIGN	3244	1	1	100.00
CONT_ASSIGN	3245	1	1	100.00
CONT_ASSIGN	3246	1	1	100.00
CONT_ASSIGN	3247	1	1	100.00
CONT_ASSIGN	3248	1	1	100.00
CONT_ASSIGN	3249	1	1	100.00
CONT_ASSIGN	3250	0	0
CONT_ASSIGN	3251	0	0
CONT_ASSIGN	3252	0	0
CONT_ASSIGN	3253	0	0
CONT_ASSIGN	3254	0	0
CONT_ASSIGN	3255	0	0
CONT_ASSIGN	3256	0	0
CONT_ASSIGN	3257	0	0
CONT_ASSIGN	3258	1	1	100.00
CONT_ASSIGN	3259	1	1	100.00
CONT_ASSIGN	3260	1	0	0.00
CONT_ASSIGN	3261	0	0
CONT_ASSIGN	3262	0	0
CONT_ASSIGN	3263	0	0
CONT_ASSIGN	3264	0	0
CONT_ASSIGN	3265	0	0
CONT_ASSIGN	3266	0	0
CONT_ASSIGN	3267	0	0
CONT_ASSIGN	3268	0	0
CONT_ASSIGN	3269	0	0
CONT_ASSIGN	3270	0	0
CONT_ASSIGN	3271	0	0
CONT_ASSIGN	3272	0	0
CONT_ASSIGN	3273	0	0
CONT_ASSIGN	3274	0	0
CONT_ASSIGN	3275	0	0
CONT_ASSIGN	3276	1	1	100.00
CONT_ASSIGN	3277	0	0
CONT_ASSIGN	3278	0	0
CONT_ASSIGN	3279	0	0
CONT_ASSIGN	3280	0	0
CONT_ASSIGN	3281	0	0
CONT_ASSIGN	3282	0	0
CONT_ASSIGN	3286	1	1	100.00
CONT_ASSIGN	3287	1	1	100.00
CONT_ASSIGN	3288	1	1	100.00
CONT_ASSIGN	3289	1	1	100.00
CONT_ASSIGN	3290	1	1	100.00
CONT_ASSIGN	3291	1	1	100.00
CONT_ASSIGN	3292	1	1	100.00
CONT_ASSIGN	3293	1	1	100.00
CONT_ASSIGN	3294	1	1	100.00
CONT_ASSIGN	3295	1	1	100.00
CONT_ASSIGN	3296	1	1	100.00
CONT_ASSIGN	3297	1	1	100.00
CONT_ASSIGN	3298	1	1	100.00
CONT_ASSIGN	3299	1	1	100.00
CONT_ASSIGN	3300	1	1	100.00
CONT_ASSIGN	3303	1	1	100.00
CONT_ASSIGN	3304	1	1	100.00
CONT_ASSIGN	3305	1	1	100.00
CONT_ASSIGN	3306	1	1	100.00
CONT_ASSIGN	3307	1	1	100.00
CONT_ASSIGN	3308	1	1	100.00
CONT_ASSIGN	3309	1	1	100.00
CONT_ASSIGN	3310	1	1	100.00
CONT_ASSIGN	3311	1	1	100.00
CONT_ASSIGN	3312	1	1	100.00
CONT_ASSIGN	3313	1	1	100.00
CONT_ASSIGN	3314	1	1	100.00
CONT_ASSIGN	3317	1	1	100.00
CONT_ASSIGN	3318	1	1	100.00
CONT_ASSIGN	3321	1	1	100.00
CONT_ASSIGN	3322	1	1	100.00
CONT_ASSIGN	3323	1	1	100.00
CONT_ASSIGN	3324	1	0	0.00
CONT_ASSIGN	3325	1	0	0.00
CONT_ASSIGN	3326	1	0	0.00
CONT_ASSIGN	3327	1	1	100.00
CONT_ASSIGN	3328	1	1	100.00
CONT_ASSIGN	3329	1	1	100.00
CONT_ASSIGN	3330	1	1	100.00
CONT_ASSIGN	3331	0	0
CONT_ASSIGN	3332	0	0
CONT_ASSIGN	3335	1	1	100.00
CONT_ASSIGN	3336	1	1	100.00

Click here to see the source line report.

---

Toggle Coverage for Instance : tb.dut.top_earlgrey

	Total	Covered	Percent
Totals	638	561	87.93
Total Bits	2130	1903	89.34
Total Bits 0->1	1065	953	89.48
Total Bits 1->0	1065	950	89.20

Ports	638	561	87.93
Port Bits	2130	1903	89.34
Port Bits 0->1	1065	953	89.48
Port Bits 1->0	1065	950	89.20

Port Details

Name	Toggle	Toggle 1->0	Tests	Toggle 0->1	Tests	Direction	Exclude Annotation
mio_in_i[46:0]	Yes	Yes	T26,T27,T38	Yes	T26,T27,T38	INPUT
mio_out_o[46:0]	Yes	Yes	T26,T27,T39	Yes	T6,T26,T27	OUTPUT
mio_oe_o[46:0]	Yes	Yes	T27,T40,T41	Yes	T6,T26,T27	OUTPUT
dio_in_i[15:0]	Yes	Yes	T4,T30,T6	Yes	T4,T6,T7	INPUT
dio_out_o[11:0]	Yes	Yes	*T4,*T6,*T7	Yes	T16,T17,T18	OUTPUT
dio_out_o[13:12]	No	No		No		OUTPUT
dio_out_o[15:14]	Yes	Yes	T8,T9,T10	Yes	T8,T9,T10	OUTPUT
dio_oe_o[15:0]	Yes	Yes	T16,T17,T18	Yes	T16,T17,T18	OUTPUT
mio_attr_o[0].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[0].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[0].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[0].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[0].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[0].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[0].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[0].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[0].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[0].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[0].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[1].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[1].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[1].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[1].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[1].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[1].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[1].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[1].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[1].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[1].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[1].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[2].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[2].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[2].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[2].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[2].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[2].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[2].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[2].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[2].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[2].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[2].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[3].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[3].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[3].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[3].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[3].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[3].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[3].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[3].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[3].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[3].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[3].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[4].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[4].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[4].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[4].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[4].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[4].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[4].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[4].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[4].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[4].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[4].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[5].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[5].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[5].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[5].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[5].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[5].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[5].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[5].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[5].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[5].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[5].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[6].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[6].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[6].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[6].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[6].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[6].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[6].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[6].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[6].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[6].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[6].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[7].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[7].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[7].pull_en	Yes	Yes	T20,T21,T22	Yes	T11,T49,T50	OUTPUT
mio_attr_o[7].pull_select	Yes	Yes	T20,T21,T22	Yes	T11,T49,T50	OUTPUT
mio_attr_o[7].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[7].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[7].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[7].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[7].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[7].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[7].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[8].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[8].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[8].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[8].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[8].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[8].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[8].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[8].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[8].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[8].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[8].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[9].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[9].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[9].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[9].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[9].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[9].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[9].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[9].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[9].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[9].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[9].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[10].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[10].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[10].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
mio_attr_o[10].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
mio_attr_o[10].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[10].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[10].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[10].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[10].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[10].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[10].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[11].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[11].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[11].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[11].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[11].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[11].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[11].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[11].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[11].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[11].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[11].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[12].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[12].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[12].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
mio_attr_o[12].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
mio_attr_o[12].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[12].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[12].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[12].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[12].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[12].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[12].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[13].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[13].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[13].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T10,T47	OUTPUT
mio_attr_o[13].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T10,T47	OUTPUT
mio_attr_o[13].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[13].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[13].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[13].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[13].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[13].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[13].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[14].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[14].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[14].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T10,T47	OUTPUT
mio_attr_o[14].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T10,T47	OUTPUT
mio_attr_o[14].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[14].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[14].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[14].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[14].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[14].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[14].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[15].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[15].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[15].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T10,T47	OUTPUT
mio_attr_o[15].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T10,T47	OUTPUT
mio_attr_o[15].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[15].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[15].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[15].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[15].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[15].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T47,T48	OUTPUT
mio_attr_o[15].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[16].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[16].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[16].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[16].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[16].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[16].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[16].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[16].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[16].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[16].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[16].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[17].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[17].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[17].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[17].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[17].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[17].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[17].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[17].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[17].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[17].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[17].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[18].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[18].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[18].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[18].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[18].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[18].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[18].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[18].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[18].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[18].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[18].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[19].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[19].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[19].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[19].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[19].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[19].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[19].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[19].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[19].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[19].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[19].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[20].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[20].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[20].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[20].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[20].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[20].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[20].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[20].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[20].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[20].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[20].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[21].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[21].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[21].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[21].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[21].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[21].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[21].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[21].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[21].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[21].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[21].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[22].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[22].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[22].pull_en	Yes	Yes	T51,T52,T53	Yes	T54,T55,T56	OUTPUT
mio_attr_o[22].pull_select	Yes	Yes	T54,T55,T56	Yes	T54,T55,T56	OUTPUT
mio_attr_o[22].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[22].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[22].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[22].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[22].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[22].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[22].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[23].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[23].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[23].pull_en	Yes	Yes	T51,T52,T53	Yes	T54,T55,T56	OUTPUT
mio_attr_o[23].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[23].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[23].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[23].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[23].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[23].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[23].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[23].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[24].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[24].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[24].pull_en	Yes	Yes	T51,T52,T53	Yes	T54,T55,T56	OUTPUT
mio_attr_o[24].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[24].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[24].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[24].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[24].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[24].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[24].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[24].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[25].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[25].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[25].pull_en	Yes	Yes	T6,T23,T36	Yes	T1,T2,T3	OUTPUT
mio_attr_o[25].pull_select	Yes	Yes	T6,T23,T36	Yes	T1,T2,T3	OUTPUT
mio_attr_o[25].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[25].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[25].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[25].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[25].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[25].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[25].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[26].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[26].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[26].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[26].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[26].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[26].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[26].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[26].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[26].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[26].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[26].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[27].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[27].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[27].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[27].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[27].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[27].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[27].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[27].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[27].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[27].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[27].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[28].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[28].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[28].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[28].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[28].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[28].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[28].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[28].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[28].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[28].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[28].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[29].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[29].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[29].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[29].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[29].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[29].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[29].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[29].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[29].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[29].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[29].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[30].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[30].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[30].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[30].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[30].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[30].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[30].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[30].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[30].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[30].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[30].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[31].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[31].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[31].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[31].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[31].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[31].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[31].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[31].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[31].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[31].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[31].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[32].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[32].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[32].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[32].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[32].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[32].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[32].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[32].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[32].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[32].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[32].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[33].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[33].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[33].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[33].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[33].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[33].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[33].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[33].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[33].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[33].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[33].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[34].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[34].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[34].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[34].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[34].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[34].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[34].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[34].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[34].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[34].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[34].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[35].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[35].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[35].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[35].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[35].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[35].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[35].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[35].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[35].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[35].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[35].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[36].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[36].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[36].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[36].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[36].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[36].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[36].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[36].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[36].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[36].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[36].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[37].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[37].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[37].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[37].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[37].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[37].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[37].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[37].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[37].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[37].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[37].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[38].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[38].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[38].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[38].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[38].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[38].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[38].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[38].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[38].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[38].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[38].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[39].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[39].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[39].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[39].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[39].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[39].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[39].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[39].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[39].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[39].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[39].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[40].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[40].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[40].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[40].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[40].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[40].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[40].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[40].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[40].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[40].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[40].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[41].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[41].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[41].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[41].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[41].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[41].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[41].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[41].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[41].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[41].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[41].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[42].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[42].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[42].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[42].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[42].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[42].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[42].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[42].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[42].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[42].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[42].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[43].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[43].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[43].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[43].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[43].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[43].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[43].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[43].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[43].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[43].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[43].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[44].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[44].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[44].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[44].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[44].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[44].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[44].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[44].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[44].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[44].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[44].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[45].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[45].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[45].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[45].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[45].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[45].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[45].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[45].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[45].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[45].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[45].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[46].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[46].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[46].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[46].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[46].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[46].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[46].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[46].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[46].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
mio_attr_o[46].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
mio_attr_o[46].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[0].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[0].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[0].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[0].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[0].keep_en	No	No		No		OUTPUT
dio_attr_o[0].schmitt_en	No	No		No		OUTPUT
dio_attr_o[0].od_en	No	No		No		OUTPUT
dio_attr_o[0].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[0].slew_rate[1:0]	No	No		No		OUTPUT
dio_attr_o[0].drive_strength[0]	Yes	Yes	*T36,*T42,*T43	Yes	T1,T2,T3	OUTPUT
dio_attr_o[0].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[1].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[1].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[1].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[1].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[1].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[1].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[1].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[1].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[1].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[1].drive_strength[0]	Yes	Yes	*T36,*T42,*T43	Yes	T1,T2,T3	OUTPUT
dio_attr_o[1].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[2].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[2].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[2].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[2].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[2].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[2].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[2].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[2].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[2].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[2].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[2].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[3].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[3].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[3].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[3].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[3].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[3].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[3].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[3].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[3].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[3].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[3].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[4].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[4].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[4].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[4].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[4].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[4].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[4].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[4].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[4].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[4].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[4].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[5].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[5].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[5].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[5].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[5].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[5].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[5].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[5].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[5].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[5].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[5].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[6].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[6].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[6].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[6].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[6].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[6].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[6].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[6].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[6].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[6].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T8,T9,T10	OUTPUT
dio_attr_o[6].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[7].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[7].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[7].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[7].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[7].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[7].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[7].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[7].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[7].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[7].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T8,T9,T10	OUTPUT
dio_attr_o[7].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[8].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[8].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[8].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[8].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[8].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[8].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[8].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[8].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[8].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[8].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T8,T9,T10	OUTPUT
dio_attr_o[8].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[9].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[9].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[9].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[9].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[9].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[9].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[9].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[9].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[9].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[9].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T8,T9,T10	OUTPUT
dio_attr_o[9].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[10].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[10].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T15,T45,T46	OUTPUT
dio_attr_o[10].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[10].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[10].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[10].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[10].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[10].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[10].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[10].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[10].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[11].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[11].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T15,T45,T46	OUTPUT
dio_attr_o[11].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[11].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[11].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[11].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[11].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[11].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[11].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[11].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[11].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[12].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[12].virt_od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[12].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[12].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[12].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[12].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[12].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[12].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[12].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[12].drive_strength[0]	No	No		No		OUTPUT
dio_attr_o[12].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[13].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[13].virt_od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[13].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[13].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[13].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[13].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[13].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[13].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[13].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[13].drive_strength[0]	No	No		No		OUTPUT
dio_attr_o[13].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[14].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[14].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[14].pull_en	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[14].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[14].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[14].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[14].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[14].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[14].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[14].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[14].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[15].invert	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[15].virt_od_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[15].pull_en	Yes	Yes	T21,T22,T44	Yes	T25,T8,T9	OUTPUT
dio_attr_o[15].pull_select	Yes	Yes	T20,T21,T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[15].keep_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[15].schmitt_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[15].od_en[0:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[15].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
dio_attr_o[15].slew_rate[1:0]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
dio_attr_o[15].drive_strength[0]	Yes	Yes	*T20,*T21,*T22	Yes	T25,T8,T9	OUTPUT
dio_attr_o[15].drive_strength[3:1]	Excluded	Excluded		Excluded		OUTPUT	[UNR] Tie offs.
adc_req_o.pd	Yes	Yes	T142,T143,T72	Yes	T142,T143,T72	OUTPUT
adc_req_o.channel_sel[1:0]	Yes	Yes	T142,T143,T72	Yes	T142,T143,T72	OUTPUT
adc_rsp_i.data_valid	Yes	Yes	T142,T143,T72	Yes	T142,T143,T72	INPUT
adc_rsp_i.data[9:0]	Yes	Yes	T142,T143,T72	Yes	T142,T143,T72	INPUT
ast_edn_req_i.edn_req	Yes	Yes	T2,T3,T4	Yes	T1,T2,T3	INPUT
ast_edn_rsp_o.edn_bus[31:0]	Yes	Yes	T3,T5,T30	Yes	T3,T4,T5	OUTPUT
ast_edn_rsp_o.edn_fips	Yes	Yes	T143,T144,T145	Yes	T146,T143,T147	OUTPUT
ast_edn_rsp_o.edn_ack	Yes	Yes	T2,T3,T4	Yes	T2,T3,T4	OUTPUT
ast_lc_dft_en_o[3:0]	Yes	Yes	T36,T43,T81	Yes	T1,T2,T3	OUTPUT
obs_ctrl_i.obmen[3:0]	Excluded	Excluded		Excluded		INPUT	[LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and flash. Must be covered in vendor closed source DV.
obs_ctrl_i.obmsl[3:0]	Excluded	Excluded		Excluded		INPUT	[LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and flash. Must be covered in vendor closed source DV.
obs_ctrl_i.obgsl[3:0]	Excluded	Excluded		Excluded		INPUT	[LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and flash. Must be covered in vendor closed source DV.
ram_1p_cfg_i.rf_cfg.cfg[3:0]	Excluded	Excluded		Excluded		INPUT	[LOW_RISK] Covered in formal conn: hw/top_earlgrey/formal/conn_csvs/ast_mem_cfg.csv
ram_1p_cfg_i.rf_cfg.cfg_en[0:0]	Excluded	Excluded		Excluded		INPUT	[LOW_RISK] Covered in formal conn: hw/top_earlgrey/formal/conn_csvs/ast_mem_cfg.csv
ram_1p_cfg_i.rf_cfg.test	No	No		No		INPUT
ram_1p_cfg_i.ram_cfg.cfg[3:0]	Excluded	Excluded		Excluded		INPUT	[LOW_RISK] Covered in formal conn: hw/top_earlgrey/formal/conn_csvs/ast_mem_cfg.csv
ram_1p_cfg_i.ram_cfg.cfg_en[0:0]	Excluded	Excluded		Excluded		INPUT	[LOW_RISK] Covered in formal conn: hw/top_earlgrey/formal/conn_csvs/ast_mem_cfg.csv
ram_1p_cfg_i.ram_cfg.test	No	No		No		INPUT
spi_ram_2p_cfg_i.b_ram_lcfg.cfg[3:0]	No	No		No		INPUT
spi_ram_2p_cfg_i.b_ram_lcfg.cfg_en	No	No		No		INPUT
spi_ram_2p_cfg_i.b_ram_lcfg.test	No	No		No		INPUT
spi_ram_2p_cfg_i.a_ram_lcfg.cfg[3:0]	No	No		No		INPUT
spi_ram_2p_cfg_i.a_ram_lcfg.cfg_en	No	No		No		INPUT
spi_ram_2p_cfg_i.a_ram_lcfg.test	No	No		No		INPUT
spi_ram_2p_cfg_i.b_ram_fcfg.cfg[3:0]	No	No		No		INPUT
spi_ram_2p_cfg_i.b_ram_fcfg.cfg_en	No	No		No		INPUT
spi_ram_2p_cfg_i.b_ram_fcfg.test	No	No		No		INPUT
spi_ram_2p_cfg_i.a_ram_fcfg.cfg[3:0]	No	No		No		INPUT
spi_ram_2p_cfg_i.a_ram_fcfg.cfg_en	No	No		No		INPUT
spi_ram_2p_cfg_i.a_ram_fcfg.test	No	No		No		INPUT
usb_ram_1p_cfg_i.rf_cfg.cfg[3:0]	No	No		No		INPUT
usb_ram_1p_cfg_i.rf_cfg.cfg_en	No	No		No		INPUT
usb_ram_1p_cfg_i.rf_cfg.test	No	No		No		INPUT
usb_ram_1p_cfg_i.ram_cfg.cfg[3:0]	No	No		No		INPUT
usb_ram_1p_cfg_i.ram_cfg.cfg_en	No	No		No		INPUT
usb_ram_1p_cfg_i.ram_cfg.test	No	No		No		INPUT
rom_cfg_i.cfg[3:0]	Excluded	Excluded		Excluded		INPUT	[LOW_RISK] Covered in formal conn: hw/top_earlgrey/formal/conn_csvs/ast_mem_cfg.csv
rom_cfg_i.cfg_en[0:0]	Excluded	Excluded		Excluded		INPUT	[LOW_RISK] Covered in formal conn: hw/top_earlgrey/formal/conn_csvs/ast_mem_cfg.csv
rom_cfg_i.test	No	No		No		INPUT
clk_main_jitter_en_o[3:0]	Yes	Yes	T148,T149,T150	Yes	T151,T146,T143	OUTPUT
io_clk_byp_req_o[3:0]	Yes	Yes	T29,T57,T36	Yes	T29,T36,T37	OUTPUT
io_clk_byp_ack_i[3:0]	Yes	Yes	T29,T57,T36	Yes	T29,T36,T37	INPUT
all_clk_byp_req_o[3:0]	Yes	Yes	T28,T64,T152	Yes	T152,T153,T154	OUTPUT
all_clk_byp_ack_i[3:0]	Yes	Yes	T28,T64,T152	Yes	T152,T153,T154	INPUT
hi_speed_sel_o[3:0]	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	OUTPUT
div_step_down_req_i[3:0]	Yes	Yes	T28,T29,T57	Yes	T29,T36,T37	INPUT
calib_rdy_i[3:0]	Yes	Yes	T1,T2,T3	Yes	T6,T36,T42	INPUT
flash_bist_enable_i[3:0]	Unreachable	Unreachable		Unreachable		INPUT
flash_power_down_h_i	Yes	Yes	T1,T2,T3	Yes	T155,T15,T156	INPUT
flash_power_ready_h_i	No	No		Yes	T1,T2,T3	INPUT
flash_test_mode_a_io[1:0]	Excluded	Excluded		Excluded		INOUT	[LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and flash. Must be covered in vendor closed source DV.
flash_test_voltage_h_io[0:0]	Excluded	Excluded		Excluded		INOUT	[LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and flash. Must be covered in vendor closed source DV.
flash_obs_o[7:0]	Unreachable	Unreachable		Unreachable		OUTPUT
es_rng_req_o.rng_enable	Yes	Yes	T6,T36,T42	Yes	T1,T2,T3	OUTPUT
es_rng_rsp_i.rng_b[3:0]	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
es_rng_rsp_i.rng_valid	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
es_rng_fips_o	Yes	Yes	T157,T158,T159	Yes	T160,T161,T162	OUTPUT
ast_tl_req_o.d_ready	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
ast_tl_req_o.a_user.data_intg[6:0]	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
ast_tl_req_o.a_user.cmd_intg[6:0]	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
ast_tl_req_o.a_user.instr_type[3:0]	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
ast_tl_req_o.a_user.rsvd[4:0]	Unreachable	Unreachable		Unreachable		OUTPUT
ast_tl_req_o.a_data[31:0]	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
ast_tl_req_o.a_mask[3:0]	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
ast_tl_req_o.a_address[31:0]	Unreachable	Unreachable		Unreachable		OUTPUT
ast_tl_req_o.a_source[5:0]	Yes	Yes	*T88,*T35,*T97	Yes	T88,T35,T97	OUTPUT
ast_tl_req_o.a_source[7:6]	Unreachable	Unreachable		Unreachable		OUTPUT
ast_tl_req_o.a_size[1:0]	Yes	Yes	T94,T95,T96	Yes	T94,T95,T96	OUTPUT
ast_tl_req_o.a_param[2:0]	Unreachable	Unreachable		Unreachable		OUTPUT
ast_tl_req_o.a_opcode[2:0]	Yes	Yes	T35,T97,T98	Yes	T35,T97,T98	OUTPUT
ast_tl_req_o.a_valid	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
ast_tl_rsp_i.a_ready	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
ast_tl_rsp_i.d_error	Yes	Yes	T94,T95,T96	Yes	T94,T95,T96	INPUT
ast_tl_rsp_i.d_user.data_intg[6:0]	Yes	Yes	T94,T95,T96	Yes	T94,T95,T96	INPUT
ast_tl_rsp_i.d_user.rsp_intg[6:0]	Yes	Yes	T6,T36,T42	Yes	T1,T2,T3	INPUT
ast_tl_rsp_i.d_data[31:0]	Yes	Yes	T6,T36,T42	Yes	T1,T2,T3	INPUT
ast_tl_rsp_i.d_sink	Yes	Yes	T94,T95,T96	Yes	T94,T95,T96	INPUT
ast_tl_rsp_i.d_source[5:0]	Yes	Yes	*T94,*T96,*T99	Yes	T94,T95,T96	INPUT
ast_tl_rsp_i.d_source[7:6]	Unreachable	Unreachable		Unreachable		INPUT
ast_tl_rsp_i.d_size[1:0]	Yes	Yes	T94,T95,T96	Yes	T94,T95,T96	INPUT
ast_tl_rsp_i.d_param[2:0]	Unreachable	Unreachable		Unreachable		INPUT
ast_tl_rsp_i.d_opcode[0]	Yes	Yes	*T94,*T95,*T96	Yes	T94,T95,T96	INPUT
ast_tl_rsp_i.d_opcode[2:1]	Unreachable	Unreachable		Unreachable		INPUT
ast_tl_rsp_i.d_valid	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
dft_strap_test_o.straps[1:0]	No	No		Yes	T84,T85,T86	OUTPUT
dft_strap_test_o.valid	Yes	Yes	T36,T43,T81	Yes	T1,T2,T3	OUTPUT
dft_hold_tap_sel_i	Unreachable	Unreachable		Unreachable		INPUT
usb_dp_pullup_en_o	Yes	Yes	T4,T7,T16	Yes	T4,T7,T16	OUTPUT
usb_dn_pullup_en_o	Yes	Yes	T4,T7,T93	Yes	T4,T7,T93	OUTPUT
pwrmgr_ast_req_o.usb_clk_en	Yes	Yes	T5,T6,T23	Yes	T1,T2,T3	OUTPUT
pwrmgr_ast_req_o.io_clk_en	Yes	Yes	T6,T23,T26	Yes	T1,T2,T3	OUTPUT
pwrmgr_ast_req_o.core_clk_en	Yes	Yes	T5,T6,T23	Yes	T1,T2,T3	OUTPUT
pwrmgr_ast_req_o.slow_clk_en	No	No		No		OUTPUT
pwrmgr_ast_req_o.pwr_clamp	Yes	Yes	T1,T2,T3	Yes	T29,T36,T37	OUTPUT
pwrmgr_ast_req_o.pwr_clamp_env	Yes	Yes	T1,T2,T3	Yes	T29,T36,T37	OUTPUT
pwrmgr_ast_req_o.main_pd_n	Yes	Yes	T155,T15,T156	Yes	T155,T15,T156	OUTPUT
pwrmgr_ast_rsp_i.main_pok	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	INPUT
pwrmgr_ast_rsp_i.usb_clk_val	Yes	Yes	T5,T6,T23	Yes	T1,T2,T3	INPUT
pwrmgr_ast_rsp_i.io_clk_val	Yes	Yes	T6,T23,T28	Yes	T1,T2,T3	INPUT
pwrmgr_ast_rsp_i.core_clk_val	Yes	Yes	T5,T6,T23	Yes	T1,T2,T3	INPUT
pwrmgr_ast_rsp_i.slow_clk_val	Yes	Yes	T28,T64,T163	Yes	T1,T2,T3	INPUT
otp_ctrl_otp_ast_pwr_seq_o.pwr_seq[1:0]	No	No		No		OUTPUT
otp_ctrl_otp_ast_pwr_seq_h_i.pwr_seq_h[0]	No	No		No		INPUT
otp_ctrl_otp_ast_pwr_seq_h_i.pwr_seq_h[1]	Yes	Yes	T1,T2,T3	Yes	T155,T15,T156	INPUT
otp_ext_voltage_h_io[0:0]	Excluded	Excluded		Excluded		INOUT	[LOW_RISK] Covered via connectivity. Cannot be covered in open source DV due to behavioral models of AST and OTP. Must be covered in vendor closed source DV.
otp_obs_o[7:0]	Unreachable	Unreachable		Unreachable		OUTPUT
por_n_i[1:0]	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	INPUT
fpga_info_i[31:0]	Unreachable	Unreachable		Unreachable		INPUT
sensor_ctrl_ast_alert_req_i.alerts[0].n	Yes	Yes	T164,T165,T72	Yes	T165,T72,T166	INPUT
sensor_ctrl_ast_alert_req_i.alerts[0].p	Yes	Yes	T165,T72,T166	Yes	T164,T165,T72	INPUT
sensor_ctrl_ast_alert_req_i.alerts[1].n	Yes	Yes	T164,T167,T168	Yes	T169,T170,T171	INPUT
sensor_ctrl_ast_alert_req_i.alerts[1].p	Yes	Yes	T169,T170,T171	Yes	T164,T167,T168	INPUT
sensor_ctrl_ast_alert_req_i.alerts[2].n	Yes	Yes	T164,T165,T167	Yes	T165,T172,T173	INPUT
sensor_ctrl_ast_alert_req_i.alerts[2].p	Yes	Yes	T165,T172,T173	Yes	T164,T165,T167	INPUT
sensor_ctrl_ast_alert_req_i.alerts[3].n	Yes	Yes	T164,T167,T168	Yes	T170,T174,T175	INPUT
sensor_ctrl_ast_alert_req_i.alerts[3].p	Yes	Yes	T170,T174,T175	Yes	T164,T167,T168	INPUT
sensor_ctrl_ast_alert_req_i.alerts[4].n	Yes	Yes	T164,T165,T167	Yes	T165,T172,T176	INPUT
sensor_ctrl_ast_alert_req_i.alerts[4].p	Yes	Yes	T165,T172,T176	Yes	T164,T165,T167	INPUT
sensor_ctrl_ast_alert_req_i.alerts[5].n	Yes	Yes	T164,T167,T168	Yes	T170,T174,T175	INPUT
sensor_ctrl_ast_alert_req_i.alerts[5].p	Yes	Yes	T170,T174,T175	Yes	T164,T167,T168	INPUT
sensor_ctrl_ast_alert_req_i.alerts[6].n	Yes	Yes	T164,T167,T168	Yes	T173,T170,T175	INPUT
sensor_ctrl_ast_alert_req_i.alerts[6].p	Yes	Yes	T173,T170,T175	Yes	T164,T167,T168	INPUT
sensor_ctrl_ast_alert_req_i.alerts[7].n	Yes	Yes	T164,T143,T167	Yes	T143,T177,T175	INPUT
sensor_ctrl_ast_alert_req_i.alerts[7].p	Yes	Yes	T143,T177,T175	Yes	T164,T143,T167	INPUT
sensor_ctrl_ast_alert_req_i.alerts[8].n	Yes	Yes	T164,T143,T167	Yes	T143,T177,T170	INPUT
sensor_ctrl_ast_alert_req_i.alerts[8].p	Yes	Yes	T143,T177,T170	Yes	T164,T143,T167	INPUT
sensor_ctrl_ast_alert_req_i.alerts[9].n	Yes	Yes	T164,T167,T168	Yes	T170,T174,T171	INPUT
sensor_ctrl_ast_alert_req_i.alerts[9].p	Yes	Yes	T170,T174,T171	Yes	T164,T167,T168	INPUT
sensor_ctrl_ast_alert_req_i.alerts[10].n	Yes	Yes	T164,T167,T168	Yes	T178,T170,T175	INPUT
sensor_ctrl_ast_alert_req_i.alerts[10].p	Yes	Yes	T178,T170,T175	Yes	T164,T167,T168	INPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[0].n	Yes	Yes	T164,T165,T72	Yes	T164,T165,T72	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[0].p	Yes	Yes	T164,T165,T72	Yes	T164,T165,T72	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[1].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[1].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[2].n	Yes	Yes	T164,T165,T167	Yes	T164,T165,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[2].p	Yes	Yes	T164,T165,T167	Yes	T164,T165,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[3].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[3].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[4].n	Yes	Yes	T164,T165,T167	Yes	T164,T165,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[4].p	Yes	Yes	T164,T165,T167	Yes	T164,T165,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[5].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[5].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[6].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[6].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[7].n	Yes	Yes	T164,T143,T167	Yes	T164,T143,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[7].p	Yes	Yes	T164,T143,T167	Yes	T164,T143,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[8].n	Yes	Yes	T164,T143,T167	Yes	T164,T143,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[8].p	Yes	Yes	T164,T143,T167	Yes	T164,T143,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[9].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[9].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[10].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_trig[10].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[0].n	Yes	Yes	T164,T165,T72	Yes	T164,T165,T72	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[0].p	Yes	Yes	T164,T165,T72	Yes	T164,T165,T72	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[1].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[1].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[2].n	Yes	Yes	T164,T165,T167	Yes	T164,T165,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[2].p	Yes	Yes	T164,T165,T167	Yes	T164,T165,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[3].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[3].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[4].n	Yes	Yes	T164,T165,T167	Yes	T164,T165,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[4].p	Yes	Yes	T164,T165,T167	Yes	T164,T165,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[5].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[5].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[6].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[6].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[7].n	Yes	Yes	T164,T143,T167	Yes	T164,T143,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[7].p	Yes	Yes	T164,T143,T167	Yes	T164,T143,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[8].n	Yes	Yes	T164,T143,T167	Yes	T164,T143,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[8].p	Yes	Yes	T164,T143,T167	Yes	T164,T143,T167	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[9].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[9].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[10].n	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_alert_rsp_o.alerts_ack[10].p	Yes	Yes	T164,T167,T168	Yes	T164,T167,T168	OUTPUT
sensor_ctrl_ast_status_i.io_pok[1:0]	Yes	Yes	T163,T179,T180	Yes	T1,T2,T3	INPUT
ast2pinmux_i[8:0]	Unreachable	Unreachable		Unreachable		INPUT
ast_init_done_i[3:0]	Yes	Yes	T1,T2,T3	Yes	T6,T36,T42	INPUT
sensor_ctrl_manual_pad_attr_o[0].invert	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[0].virt_od_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[0].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[0].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[0].keep_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[0].schmitt_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[0].od_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[0].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[0].slew_rate[1:0]	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[0].drive_strength[3:0]	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[1].invert	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[1].virt_od_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[1].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[1].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[1].keep_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[1].schmitt_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[1].od_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[1].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[1].slew_rate[1:0]	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[1].drive_strength[3:0]	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[2].invert	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[2].virt_od_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[2].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[2].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[2].keep_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[2].schmitt_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[2].od_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[2].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[2].slew_rate[1:0]	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[2].drive_strength[3:0]	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[3].invert	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[3].virt_od_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[3].pull_en	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[3].pull_select	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[3].keep_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[3].schmitt_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[3].od_en	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[3].input_disable	Yes	Yes	T20,T21,T22	Yes	T20,T21,T22	OUTPUT
sensor_ctrl_manual_pad_attr_o[3].slew_rate[1:0]	No	No		No		OUTPUT
sensor_ctrl_manual_pad_attr_o[3].drive_strength[3:0]	No	No		No		OUTPUT
sck_monitor_o	Yes	Yes	T5,T11,T8	Yes	T5,T6,T11	OUTPUT
usbdev_usb_rx_d_i	Yes	Yes	T4,T7,T16	Yes	T4,T7,T16	INPUT
usbdev_usb_tx_d_o	Yes	Yes	T4,T7,T16	Yes	T16,T17,T18	OUTPUT
usbdev_usb_tx_se0_o	Yes	Yes	T16,T17,T18	Yes	T16,T17,T18	OUTPUT
usbdev_usb_tx_use_d_se0_o	Yes	Yes	T181,T182,T183	Yes	T181,T182,T183	OUTPUT
usbdev_usb_rx_enable_o	Yes	Yes	T93,T170,T174	Yes	T4,T7,T16	OUTPUT
usbdev_usb_ref_val_o	Yes	Yes	T16,T17,T18	Yes	T16,T17,T18	OUTPUT
usbdev_usb_ref_pulse_o	Yes	Yes	T16,T17,T18	Yes	T16,T17,T18	OUTPUT
clk_main_i	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
clk_io_i	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
clk_usb_i	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
clk_aon_i	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	INPUT
clks_ast_o.clk_usb_peri	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_peri	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_div2_peri	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_div4_peri	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_div4_timers	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_main_secure	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_div4_secure	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_div2_infra	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_infra	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_usb_infra	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_main_infra	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_div4_infra	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_main_otbn	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_main_kmac	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_main_hmac	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_main_aes	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_aon_timers	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_aon_peri	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_aon_secure	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_div2_powerup	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_usb_powerup	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_powerup	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_main_powerup	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_aon_powerup	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
clks_ast_o.clk_io_div4_powerup	Yes	Yes	T1,T2,T3	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_i2c2_n[0]	No	No		No		OUTPUT
rsts_ast_o.rst_i2c2_n[1]	Yes	Yes	T6,T29,T36	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_i2c1_n[0]	No	No		No		OUTPUT
rsts_ast_o.rst_i2c1_n[1]	Yes	Yes	T6,T29,T36	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_i2c0_n[0]	No	No		No		OUTPUT
rsts_ast_o.rst_i2c0_n[1]	Yes	Yes	T6,T29,T36	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_usb_aon_n[0]	No	No		No		OUTPUT
rsts_ast_o.rst_usb_aon_n[1]	Yes	Yes	T6,T29,T36	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_usb_n[0]	No	No		No		OUTPUT
rsts_ast_o.rst_usb_n[1]	Yes	Yes	T6,T29,T36	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_spi_host1_n[0]	No	No		No		OUTPUT
rsts_ast_o.rst_spi_host1_n[1]	Yes	Yes	T6,T29,T36	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_spi_host0_n[0]	No	No		No		OUTPUT
rsts_ast_o.rst_spi_host0_n[1]	Yes	Yes	T6,T29,T36	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_spi_device_n[0]	No	No		No		OUTPUT
rsts_ast_o.rst_spi_device_n[1]	Yes	Yes	T6,T29,T36	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_sys_io_div4_n[0]	Yes	Yes	*T29,*T36,*T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_sys_io_div4_n[1]	No	No		No		OUTPUT
rsts_ast_o.rst_sys_n[0]	No	No		No		OUTPUT
rsts_ast_o.rst_sys_n[1]	Yes	Yes	T6,T29,T36	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_lc_usb_n[1:0]	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_lc_io_div4_n[1:0]	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_lc_io_div4_shadowed_n[1:0]	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_lc_io_div2_n[1:0]	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_lc_io_n[1:0]	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_lc_aon_n[0]	Yes	Yes	*T29,*T36,*T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_lc_aon_n[1]	No	No		No		OUTPUT
rsts_ast_o.rst_lc_n[1:0]	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_lc_shadowed_n[1:0]	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_por_usb_n[0]	Yes	Yes	*T29,*T36,*T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_por_usb_n[1]	No	No		No		OUTPUT
rsts_ast_o.rst_por_io_div4_n[0]	Yes	Yes	*T29,*T36,*T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_por_io_div4_n[1]	No	No		No		OUTPUT
rsts_ast_o.rst_por_io_div2_n[0]	Yes	Yes	*T29,*T36,*T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_por_io_div2_n[1]	No	No		No		OUTPUT
rsts_ast_o.rst_por_io_n[0]	Yes	Yes	*T29,*T36,*T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_por_io_n[1]	No	No		No		OUTPUT
rsts_ast_o.rst_por_n[0]	Yes	Yes	*T29,*T36,*T37	Yes	T1,T2,T3	OUTPUT
rsts_ast_o.rst_por_n[1]	No	No		No		OUTPUT
rsts_ast_o.rst_por_aon_n[1:0]	Yes	Yes	T29,T36,T37	Yes	T1,T2,T3	OUTPUT
scan_rst_ni	Unreachable	Unreachable		Unreachable		INPUT
scan_en_i	Unreachable	Unreachable		Unreachable		INPUT
scanmode_i[3:0]	Unreachable	Unreachable		Unreachable		INPUT

*Tests covering at least one bit in the range

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Assert Coverage for Instance : tb.dut.top_earlgrey

	Total	Attempted	Percent	Succeeded/Matched	Percent
Assertions	1	1	100.00	1	100.00
Cover properties	0	0		0
Cover sequences	0	0		0
Total	1	1	100.00	1	100.00

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Assertion Details

Name	Attempts	Real Successes	Failures	Incomplete
scanmodeKnown	497807442	497807442	0	0

scanmodeKnown

Name	Attempts	Real Successes	Failures	Incomplete
Total	497807442	497807442	0	0
T1	44330	44330	0	0
T2	92439	92439	0	0
T3	116775	116775	0	0
T4	114709	114709	0	0
T5	108493	108493	0	0
T6	119097	119097	0	0
T30	95379	95379	0	0
T68	220854	220854	0	0
T104	101636	101636	0	0
T105	69285	69285	0	0