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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.26 95.71 93.88 98.31 92.52 98.23 96.99 98.18


Total test records in report: 1257
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html

T383 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_sec_info_access.4243377651 Aug 23 11:44:02 AM UTC 24 Aug 23 11:45:08 AM UTC 24 5742257600 ps
T646 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_mp_regions.3670953067 Aug 23 11:41:35 AM UTC 24 Aug 23 11:45:09 AM UTC 24 21506175600 ps
T647 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_mp_regions.1457199902 Aug 23 11:39:04 AM UTC 24 Aug 23 11:45:27 AM UTC 24 6029349300 ps
T648 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rand_ops.1344120259 Aug 23 11:38:32 AM UTC 24 Aug 23 11:45:33 AM UTC 24 224809300 ps
T649 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_intr_rd_slow_flash.1491147472 Aug 23 11:42:49 AM UTC 24 Aug 23 11:45:52 AM UTC 24 17118220500 ps
T650 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_sec_otp.4128911278 Aug 23 11:44:35 AM UTC 24 Aug 23 11:46:01 AM UTC 24 2669658900 ps
T651 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_phy_arb.371459068 Aug 23 11:41:01 AM UTC 24 Aug 23 11:46:10 AM UTC 24 1406816900 ps
T652 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rw.998506754 Aug 23 11:39:41 AM UTC 24 Aug 23 11:46:13 AM UTC 24 5534180500 ps
T653 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_prog_rma_wipe_err.703615049 Aug 23 11:44:24 AM UTC 24 Aug 23 11:46:25 AM UTC 24 10012071600 ps
T398 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_invalid_op.3851233583 Aug 23 11:45:29 AM UTC 24 Aug 23 11:46:28 AM UTC 24 1670754600 ps
T654 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_rma_reset.2964337758 Aug 23 11:35:14 AM UTC 24 Aug 23 11:47:01 AM UTC 24 40126422300 ps
T410 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rw_evict.3790342604 Aug 23 11:46:29 AM UTC 24 Aug 23 11:47:04 AM UTC 24 140165300 ps
T655 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_ro.2930573677 Aug 23 11:45:53 AM UTC 24 Aug 23 11:47:07 AM UTC 24 1593801300 ps
T357 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_disable.1703019119 Aug 23 11:47:08 AM UTC 24 Aug 23 11:47:32 AM UTC 24 70444100 ps
T656 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rw_evict_all_en.2254886999 Aug 23 11:47:02 AM UTC 24 Aug 23 11:47:37 AM UTC 24 31661500 ps
T408 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_re_evict.1833885196 Aug 23 11:47:04 AM UTC 24 Aug 23 11:47:39 AM UTC 24 262479700 ps
T657 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_wo.2154978941 Aug 23 11:45:34 AM UTC 24 Aug 23 11:47:43 AM UTC 24 3777196000 ps
T186 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_otp_reset.2463934583 Aug 23 11:45:09 AM UTC 24 Aug 23 11:47:43 AM UTC 24 130524600 ps
T658 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_smoke.1678172663 Aug 23 11:44:24 AM UTC 24 Aug 23 11:47:47 AM UTC 24 37912500 ps
T659 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_lcmgr_intg.4211677587 Aug 23 11:47:40 AM UTC 24 Aug 23 11:47:55 AM UTC 24 132720500 ps
T660 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_connect.3406756712 Aug 23 11:47:38 AM UTC 24 Aug 23 11:47:56 AM UTC 24 22812400 ps
T661 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_read_seed_err.4057290818 Aug 23 11:47:44 AM UTC 24 Aug 23 11:48:00 AM UTC 24 25242700 ps
T662 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rand_ops.1399005679 Aug 23 11:44:27 AM UTC 24 Aug 23 11:48:00 AM UTC 24 45559800 ps
T663 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_alert_test.1469660017 Aug 23 11:47:48 AM UTC 24 Aug 23 11:48:04 AM UTC 24 82088000 ps
T664 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rw.4013453904 Aug 23 11:42:09 AM UTC 24 Aug 23 11:48:16 AM UTC 24 3838935700 ps
T665 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_mp_regions.1519419492 Aug 23 11:45:10 AM UTC 24 Aug 23 11:48:21 AM UTC 24 22630839800 ps
T379 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_sec_info_access.2689203325 Aug 23 11:47:33 AM UTC 24 Aug 23 11:48:45 AM UTC 24 13128168500 ps
T666 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_phy_arb.227694873 Aug 23 11:44:32 AM UTC 24 Aug 23 11:48:50 AM UTC 24 60067000 ps
T667 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_prog_reset.1178233823 Aug 23 11:46:26 AM UTC 24 Aug 23 11:48:53 AM UTC 24 2782597900 ps
T668 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_prog_rma_wipe_err.3439657031 Aug 23 11:47:44 AM UTC 24 Aug 23 11:49:04 AM UTC 24 10019211400 ps
T669 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd.3198943840 Aug 23 11:46:11 AM UTC 24 Aug 23 11:49:12 AM UTC 24 3206746400 ps
T670 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_phy_arb.1434663581 Aug 23 11:38:36 AM UTC 24 Aug 23 11:49:23 AM UTC 24 8490992900 ps
T671 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_invalid_op.2496767425 Aug 23 11:48:46 AM UTC 24 Aug 23 11:49:45 AM UTC 24 1630551600 ps
T672 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rand_ops.2931267655 Aug 23 11:47:57 AM UTC 24 Aug 23 11:49:51 AM UTC 24 150958800 ps
T673 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rand_ops.1639920741 Aug 23 11:29:14 AM UTC 24 Aug 23 11:49:57 AM UTC 24 1478752400 ps
T674 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_sec_otp.3947829537 Aug 23 11:48:00 AM UTC 24 Aug 23 11:49:58 AM UTC 24 2072437700 ps
T675 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_error_mp.911599915 Aug 23 11:10:20 AM UTC 24 Aug 23 11:49:59 AM UTC 24 10667412000 ps
T676 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd_slow_flash.319569957 Aug 23 11:46:14 AM UTC 24 Aug 23 11:50:00 AM UTC 24 24818902900 ps
T167 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_prog_reset.3463941222 Aug 23 11:49:46 AM UTC 24 Aug 23 11:50:02 AM UTC 24 62055200 ps
T677 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_ro.307859787 Aug 23 11:48:54 AM UTC 24 Aug 23 11:50:10 AM UTC 24 474232800 ps
T678 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_connect.989090405 Aug 23 11:50:03 AM UTC 24 Aug 23 11:50:21 AM UTC 24 27201500 ps
T679 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_disable.4018429579 Aug 23 11:50:00 AM UTC 24 Aug 23 11:50:23 AM UTC 24 15808100 ps
T680 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_lcmgr_intg.426959967 Aug 23 11:50:11 AM UTC 24 Aug 23 11:50:26 AM UTC 24 201938300 ps
T681 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_rma_reset.1314811120 Aug 23 11:38:51 AM UTC 24 Aug 23 11:50:28 AM UTC 24 40128235500 ps
T416 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw_evict_all_en.1064772267 Aug 23 11:49:59 AM UTC 24 Aug 23 11:50:33 AM UTC 24 47086100 ps
T682 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_re_evict.4271040713 Aug 23 11:49:59 AM UTC 24 Aug 23 11:50:35 AM UTC 24 209451100 ps
T683 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_read_seed_err.618924029 Aug 23 11:50:22 AM UTC 24 Aug 23 11:50:37 AM UTC 24 15669400 ps
T684 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_alert_test.552387692 Aug 23 11:50:27 AM UTC 24 Aug 23 11:50:43 AM UTC 24 62034300 ps
T183 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_otp_reset.1514166124 Aug 23 11:48:16 AM UTC 24 Aug 23 11:50:44 AM UTC 24 114062900 ps
T685 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_wo.2495461288 Aug 23 11:48:51 AM UTC 24 Aug 23 11:50:57 AM UTC 24 1859554400 ps
T686 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_smoke.3426910223 Aug 23 11:47:56 AM UTC 24 Aug 23 11:50:59 AM UTC 24 48777900 ps
T687 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_sec_info_access.3825637847 Aug 23 11:50:01 AM UTC 24 Aug 23 11:51:05 AM UTC 24 7101976000 ps
T688 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_error_prog_win.4152204372 Aug 23 11:30:17 AM UTC 24 Aug 23 11:51:17 AM UTC 24 922329500 ps
T689 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_rand_ops.2704291895 Aug 23 11:34:35 AM UTC 24 Aug 23 11:51:18 AM UTC 24 1474478400 ps
T332 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd.3396922808 Aug 23 11:49:13 AM UTC 24 Aug 23 11:51:22 AM UTC 24 4706669500 ps
T690 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd_slow_flash.1792145904 Aug 23 11:49:24 AM UTC 24 Aug 23 11:51:22 AM UTC 24 5671255500 ps
T691 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_smoke.2108933900 Aug 23 11:50:27 AM UTC 24 Aug 23 11:51:24 AM UTC 24 87636300 ps
T692 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_prog_reset.4133053701 Aug 23 11:51:23 AM UTC 24 Aug 23 11:51:39 AM UTC 24 84526000 ps
T693 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rand_ops.3376872291 Aug 23 11:40:59 AM UTC 24 Aug 23 11:51:43 AM UTC 24 4516761700 ps
T97 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rw.3926482766 Aug 23 11:46:02 AM UTC 24 Aug 23 11:51:46 AM UTC 24 3160762500 ps
T694 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_invalid_op.1825391663 Aug 23 11:50:58 AM UTC 24 Aug 23 11:51:56 AM UTC 24 1660796100 ps
T695 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw_evict.1983246702 Aug 23 11:51:24 AM UTC 24 Aug 23 11:51:57 AM UTC 24 134108400 ps
T356 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_disable.3180636434 Aug 23 11:51:47 AM UTC 24 Aug 23 11:52:12 AM UTC 24 42733600 ps
T696 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_connect.3449747638 Aug 23 11:51:58 AM UTC 24 Aug 23 11:52:13 AM UTC 24 14559500 ps
T697 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw_evict_all_en.3112560972 Aug 23 11:51:40 AM UTC 24 Aug 23 11:52:17 AM UTC 24 52455600 ps
T698 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_mp_regions.3262990885 Aug 23 11:48:23 AM UTC 24 Aug 23 11:52:19 AM UTC 24 11801723900 ps
T699 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_re_evict.2147409053 Aug 23 11:51:44 AM UTC 24 Aug 23 11:52:22 AM UTC 24 65260400 ps
T700 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_prog_rma_wipe_err.3664315595 Aug 23 11:50:24 AM UTC 24 Aug 23 11:52:22 AM UTC 24 10012619100 ps
T701 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_lcmgr_intg.3494236831 Aug 23 11:52:13 AM UTC 24 Aug 23 11:52:29 AM UTC 24 25945700 ps
T702 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_read_seed_err.2396900823 Aug 23 11:52:14 AM UTC 24 Aug 23 11:52:30 AM UTC 24 15516700 ps
T703 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_ro.3472296803 Aug 23 11:51:06 AM UTC 24 Aug 23 11:52:30 AM UTC 24 1034492700 ps
T704 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_phy_arb.779983509 Aug 23 11:50:33 AM UTC 24 Aug 23 11:52:31 AM UTC 24 74626600 ps
T705 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_wo.4040419953 Aug 23 11:51:00 AM UTC 24 Aug 23 11:52:34 AM UTC 24 7611777600 ps
T706 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_alert_test.3704589558 Aug 23 11:52:20 AM UTC 24 Aug 23 11:52:36 AM UTC 24 58149300 ps
T707 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_otp_reset.763770060 Aug 23 11:50:44 AM UTC 24 Aug 23 11:52:45 AM UTC 24 99736600 ps
T708 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_phy_arb.4216607563 Aug 23 11:48:00 AM UTC 24 Aug 23 11:53:05 AM UTC 24 737615600 ps
T377 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_sec_info_access.1205661514 Aug 23 11:51:58 AM UTC 24 Aug 23 11:53:05 AM UTC 24 4699398000 ps
T709 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_rma_reset.4230959588 Aug 23 11:41:13 AM UTC 24 Aug 23 11:53:14 AM UTC 24 80140505300 ps
T710 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_sec_otp.490641583 Aug 23 11:52:30 AM UTC 24 Aug 23 11:53:23 AM UTC 24 1580406300 ps
T711 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_sec_otp.416577547 Aug 23 11:50:36 AM UTC 24 Aug 23 11:53:32 AM UTC 24 14773262800 ps
T712 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_invalid_op.3466933443 Aug 23 11:52:37 AM UTC 24 Aug 23 11:53:36 AM UTC 24 1636316100 ps
T713 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw_evict.2697935413 Aug 23 11:53:37 AM UTC 24 Aug 23 11:54:12 AM UTC 24 28501700 ps
T714 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_prog_rma_wipe_err.3557863113 Aug 23 11:52:18 AM UTC 24 Aug 23 11:54:22 AM UTC 24 10012154200 ps
T715 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_smoke.1307363810 Aug 23 11:52:22 AM UTC 24 Aug 23 11:54:30 AM UTC 24 100541700 ps
T716 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_ro.2709520696 Aug 23 11:53:06 AM UTC 24 Aug 23 11:54:31 AM UTC 24 4178420000 ps
T717 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_phy_arb.630578102 Aug 23 11:52:30 AM UTC 24 Aug 23 11:54:32 AM UTC 24 105407000 ps
T322 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_intr_rd.1189963311 Aug 23 11:51:19 AM UTC 24 Aug 23 11:54:46 AM UTC 24 3330206500 ps
T718 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_connect.3063029039 Aug 23 11:54:33 AM UTC 24 Aug 23 11:54:51 AM UTC 24 15656700 ps
T719 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_disable.2350307241 Aug 23 11:54:31 AM UTC 24 Aug 23 11:54:55 AM UTC 24 47825900 ps
T720 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd.2509933475 Aug 23 11:53:15 AM UTC 24 Aug 23 11:54:57 AM UTC 24 637404500 ps
T721 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_re_evict.4271185458 Aug 23 11:54:23 AM UTC 24 Aug 23 11:54:58 AM UTC 24 107556100 ps
T722 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_error_mp.903653954 Aug 23 11:14:38 AM UTC 24 Aug 23 11:55:00 AM UTC 24 7825772200 ps
T723 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_otp_reset.3337224246 Aug 23 11:52:32 AM UTC 24 Aug 23 11:55:00 AM UTC 24 42047600 ps
T724 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_lcmgr_intg.3952276151 Aug 23 11:54:46 AM UTC 24 Aug 23 11:55:02 AM UTC 24 90841600 ps
T725 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_read_seed_err.3956802330 Aug 23 11:54:47 AM UTC 24 Aug 23 11:55:03 AM UTC 24 18635000 ps
T726 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_mp_regions.1756059990 Aug 23 11:50:45 AM UTC 24 Aug 23 11:55:07 AM UTC 24 22703722000 ps
T727 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_alert_test.4237526124 Aug 23 11:54:56 AM UTC 24 Aug 23 11:55:12 AM UTC 24 73422700 ps
T728 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd_slow_flash.3647581923 Aug 23 11:53:24 AM UTC 24 Aug 23 11:55:21 AM UTC 24 11872359400 ps
T729 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_intr_rd_slow_flash.161923456 Aug 23 11:51:23 AM UTC 24 Aug 23 11:55:26 AM UTC 24 12687510200 ps
T730 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_sec_info_access.218221950 Aug 23 11:54:32 AM UTC 24 Aug 23 11:55:30 AM UTC 24 2246705000 ps
T731 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_prog_rma_wipe_err.3570495605 Aug 23 11:54:52 AM UTC 24 Aug 23 11:55:36 AM UTC 24 10066608700 ps
T732 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_wo.3667672359 Aug 23 11:52:46 AM UTC 24 Aug 23 11:55:41 AM UTC 24 2962421700 ps
T733 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_smoke.686474032 Aug 23 11:54:57 AM UTC 24 Aug 23 11:55:54 AM UTC 24 20367400 ps
T734 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_prog_reset.189966361 Aug 23 11:53:33 AM UTC 24 Aug 23 11:55:58 AM UTC 24 8161490300 ps
T735 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw.3252018250 Aug 23 11:49:05 AM UTC 24 Aug 23 11:56:08 AM UTC 24 59002299600 ps
T16 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_sec_cm.49674309 Aug 23 10:24:57 AM UTC 24 Aug 23 11:56:11 AM UTC 24 7660527100 ps
T125 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_invalid_op.2696855406 Aug 23 11:55:13 AM UTC 24 Aug 23 11:56:13 AM UTC 24 13540334400 ps
T126 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_sec_otp.701771971 Aug 23 11:55:01 AM UTC 24 Aug 23 11:56:25 AM UTC 24 17075575100 ps
T127 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_disable.1947008998 Aug 23 11:56:14 AM UTC 24 Aug 23 11:56:38 AM UTC 24 17443000 ps
T128 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_rma_reset.1706835580 Aug 23 11:44:40 AM UTC 24 Aug 23 11:56:39 AM UTC 24 160184892400 ps
T129 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw_evict_all_en.2262733711 Aug 23 11:56:09 AM UTC 24 Aug 23 11:56:42 AM UTC 24 59794600 ps
T130 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_connect.4241235318 Aug 23 11:56:32 AM UTC 24 Aug 23 11:56:48 AM UTC 24 14672300 ps
T131 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_re_evict.1607376501 Aug 23 11:56:12 AM UTC 24 Aug 23 11:56:49 AM UTC 24 73614100 ps
T132 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rand_ops.4018963792 Aug 23 11:50:28 AM UTC 24 Aug 23 11:56:54 AM UTC 24 93874800 ps
T133 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_lcmgr_intg.1570090787 Aug 23 11:56:39 AM UTC 24 Aug 23 11:56:55 AM UTC 24 15067200 ps
T736 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_read_seed_err.1081483875 Aug 23 11:56:39 AM UTC 24 Aug 23 11:56:55 AM UTC 24 57975200 ps
T737 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_ro.1828462274 Aug 23 11:55:26 AM UTC 24 Aug 23 11:57:00 AM UTC 24 5680840100 ps
T738 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_alert_test.737131775 Aug 23 11:56:49 AM UTC 24 Aug 23 11:57:04 AM UTC 24 71708200 ps
T739 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_mp_regions.1615708332 Aug 23 11:55:08 AM UTC 24 Aug 23 11:57:08 AM UTC 24 3921916800 ps
T740 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_wo.1269393304 Aug 23 11:55:22 AM UTC 24 Aug 23 11:57:17 AM UTC 24 3924555600 ps
T741 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_prog_rma_wipe_err.2822779948 Aug 23 11:56:42 AM UTC 24 Aug 23 11:57:22 AM UTC 24 10088695200 ps
T742 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd_slow_flash.2593682748 Aug 23 11:55:42 AM UTC 24 Aug 23 11:57:31 AM UTC 24 5533062100 ps
T172 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_otp_reset.3764951234 Aug 23 11:55:03 AM UTC 24 Aug 23 11:57:33 AM UTC 24 67148100 ps
T393 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_sec_info_access.4248871306 Aug 23 11:56:26 AM UTC 24 Aug 23 11:57:33 AM UTC 24 1518376600 ps
T743 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd.1023836339 Aug 23 11:55:37 AM UTC 24 Aug 23 11:57:34 AM UTC 24 2625030800 ps
T744 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rand_ops.469906912 Aug 23 11:56:55 AM UTC 24 Aug 23 11:57:52 AM UTC 24 18001500 ps
T745 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_prog_reset.5748665 Aug 23 11:55:54 AM UTC 24 Aug 23 11:58:07 AM UTC 24 8700680100 ps
T746 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_prog_reset.2620532250 Aug 23 11:57:53 AM UTC 24 Aug 23 11:58:09 AM UTC 24 61663400 ps
T747 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw.1189553168 Aug 23 11:51:19 AM UTC 24 Aug 23 11:58:30 AM UTC 24 4179396600 ps
T748 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_invalid_op.1232202187 Aug 23 11:57:18 AM UTC 24 Aug 23 11:58:33 AM UTC 24 1978924400 ps
T749 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw_evict_all_en.746075991 Aug 23 11:58:09 AM UTC 24 Aug 23 11:58:43 AM UTC 24 172231800 ps
T750 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw_evict.3130536775 Aug 23 11:58:07 AM UTC 24 Aug 23 11:58:44 AM UTC 24 72353800 ps
T751 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_ro.1676972096 Aug 23 11:57:32 AM UTC 24 Aug 23 11:58:54 AM UTC 24 482761300 ps
T752 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_disable.2383637448 Aug 23 11:58:35 AM UTC 24 Aug 23 11:58:58 AM UTC 24 10475600 ps
T753 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_connect.1889333344 Aug 23 11:58:45 AM UTC 24 Aug 23 11:59:04 AM UTC 24 27215200 ps
T414 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_re_evict.1099303425 Aug 23 11:58:32 AM UTC 24 Aug 23 11:59:08 AM UTC 24 228286500 ps
T754 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_sec_otp.1004446306 Aug 23 11:56:56 AM UTC 24 Aug 23 11:59:09 AM UTC 24 7436552100 ps
T755 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_lcmgr_intg.835194647 Aug 23 11:58:54 AM UTC 24 Aug 23 11:59:10 AM UTC 24 46205100 ps
T756 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_read_seed_err.804755125 Aug 23 11:58:59 AM UTC 24 Aug 23 11:59:17 AM UTC 24 27066200 ps
T757 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw.2121183161 Aug 23 11:53:06 AM UTC 24 Aug 23 11:59:18 AM UTC 24 3911858600 ps
T758 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_alert_test.480529365 Aug 23 11:59:08 AM UTC 24 Aug 23 11:59:27 AM UTC 24 69432000 ps
T759 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_smoke.2518650796 Aug 23 11:56:50 AM UTC 24 Aug 23 11:59:28 AM UTC 24 46207400 ps
T760 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rand_ops.3947824129 Aug 23 11:54:58 AM UTC 24 Aug 23 11:59:28 AM UTC 24 80544600 ps
T761 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd.321669274 Aug 23 11:57:34 AM UTC 24 Aug 23 11:59:28 AM UTC 24 1164856800 ps
T190 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_otp_reset.1475699872 Aug 23 11:57:05 AM UTC 24 Aug 23 11:59:33 AM UTC 24 70771300 ps
T762 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd_slow_flash.3760402023 Aug 23 11:57:35 AM UTC 24 Aug 23 11:59:34 AM UTC 24 5973107000 ps
T763 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_error_mp.1669548416 Aug 23 11:19:54 AM UTC 24 Aug 23 11:59:38 AM UTC 24 25731753200 ps
T764 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_phy_arb.3206865342 Aug 23 11:56:56 AM UTC 24 Aug 23 11:59:43 AM UTC 24 573080900 ps
T765 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_disable.1260006002 Aug 23 12:05:03 PM UTC 24 Aug 23 12:05:28 PM UTC 24 15453100 ps
T389 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_sec_info_access.3172715420 Aug 23 11:58:44 AM UTC 24 Aug 23 11:59:50 AM UTC 24 3944808600 ps
T766 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_sec_otp.2910220517 Aug 23 11:59:19 AM UTC 24 Aug 23 12:00:00 PM UTC 24 2336484700 ps
T767 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_wo.1254406583 Aug 23 11:57:23 AM UTC 24 Aug 23 12:00:01 PM UTC 24 9592440200 ps
T768 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_prog_reset.4165154958 Aug 23 12:00:00 PM UTC 24 Aug 23 12:00:16 PM UTC 24 56275700 ps
T769 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_invalid_op.1381813317 Aug 23 11:59:29 AM UTC 24 Aug 23 12:00:27 PM UTC 24 6530135700 ps
T272 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_prog_rma_wipe_err.1218067798 Aug 23 11:59:04 AM UTC 24 Aug 23 12:00:42 PM UTC 24 10035258200 ps
T770 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw.688550336 Aug 23 11:55:31 AM UTC 24 Aug 23 12:00:47 PM UTC 24 3084353600 ps
T771 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_rma_reset.886666609 Aug 23 11:48:04 AM UTC 24 Aug 23 12:00:53 PM UTC 24 270248650700 ps
T772 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw_evict_all_en.2176739460 Aug 23 12:00:17 PM UTC 24 Aug 23 12:00:55 PM UTC 24 78695500 ps
T773 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_ro.348692972 Aug 23 11:59:36 AM UTC 24 Aug 23 12:00:59 PM UTC 24 9936769000 ps
T774 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_re_evict.3481814526 Aug 23 12:00:28 PM UTC 24 Aug 23 12:01:03 PM UTC 24 63951600 ps
T775 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_connect.1485776965 Aug 23 12:00:48 PM UTC 24 Aug 23 12:01:06 PM UTC 24 16768700 ps
T368 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_disable.4240497649 Aug 23 12:00:43 PM UTC 24 Aug 23 12:01:09 PM UTC 24 18788000 ps
T776 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_lcmgr_intg.2470295028 Aug 23 12:00:54 PM UTC 24 Aug 23 12:01:10 PM UTC 24 15388400 ps
T777 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_mp_regions.1747145009 Aug 23 11:57:10 AM UTC 24 Aug 23 12:01:10 PM UTC 24 40895890300 ps
T778 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_read_seed_err.3427271128 Aug 23 12:00:56 PM UTC 24 Aug 23 12:01:12 PM UTC 24 15664800 ps
T779 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_phy_arb.1212652146 Aug 23 11:59:18 AM UTC 24 Aug 23 12:01:18 PM UTC 24 27883700 ps
T780 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_wo.3733713523 Aug 23 11:59:34 AM UTC 24 Aug 23 12:01:19 PM UTC 24 6185274000 ps
T781 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_alert_test.492533581 Aug 23 12:01:04 PM UTC 24 Aug 23 12:01:20 PM UTC 24 27607700 ps
T782 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_mp_regions.298480738 Aug 23 11:59:29 AM UTC 24 Aug 23 12:01:40 PM UTC 24 8912228200 ps
T17 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_sec_cm.357124265 Aug 23 10:32:20 AM UTC 24 Aug 23 12:01:42 PM UTC 24 2743530800 ps
T783 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_prog_reset.3220330558 Aug 23 12:01:19 PM UTC 24 Aug 23 12:01:43 PM UTC 24 183460100 ps
T784 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_sec_info_access.4279146669 Aug 23 12:00:44 PM UTC 24 Aug 23 12:01:47 PM UTC 24 2098211700 ps
T785 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd_slow_flash.4268041529 Aug 23 11:59:51 AM UTC 24 Aug 23 12:01:48 PM UTC 24 12188311500 ps
T786 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_rma_reset.2085436745 Aug 23 11:50:38 AM UTC 24 Aug 23 12:01:53 PM UTC 24 40121918300 ps
T787 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict_all_en.736866928 Aug 23 12:01:21 PM UTC 24 Aug 23 12:01:53 PM UTC 24 27912900 ps
T788 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict.1952798973 Aug 23 12:01:20 PM UTC 24 Aug 23 12:01:54 PM UTC 24 68411300 ps
T789 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_smoke.1816679914 Aug 23 11:59:11 AM UTC 24 Aug 23 12:01:55 PM UTC 24 45498400 ps
T790 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_otp_reset.3115004820 Aug 23 11:59:28 AM UTC 24 Aug 23 12:01:59 PM UTC 24 292432300 ps
T791 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_alert_test.1754479354 Aug 23 12:01:48 PM UTC 24 Aug 23 12:02:04 PM UTC 24 210920500 ps
T792 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_connect.3479988233 Aug 23 12:01:44 PM UTC 24 Aug 23 12:02:05 PM UTC 24 46099700 ps
T793 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_disable.1221864102 Aug 23 12:01:42 PM UTC 24 Aug 23 12:02:11 PM UTC 24 70154800 ps
T794 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_hw_sec_otp.3532057034 Aug 23 12:01:09 PM UTC 24 Aug 23 12:02:16 PM UTC 24 2098647400 ps
T795 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd.2320111476 Aug 23 11:59:44 AM UTC 24 Aug 23 12:02:17 PM UTC 24 1443235300 ps
T796 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_prog_rma_wipe_err.2349607411 Aug 23 12:00:59 PM UTC 24 Aug 23 12:02:17 PM UTC 24 10018152800 ps
T797 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_mp_regions.4095989546 Aug 23 11:52:36 AM UTC 24 Aug 23 12:02:21 PM UTC 24 19945513800 ps
T798 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_alert_test.285296152 Aug 23 12:02:18 PM UTC 24 Aug 23 12:02:36 PM UTC 24 99049000 ps
T799 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_connect.988401690 Aug 23 12:02:18 PM UTC 24 Aug 23 12:02:38 PM UTC 24 17257300 ps
T800 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_disable.1974516086 Aug 23 12:02:12 PM UTC 24 Aug 23 12:02:39 PM UTC 24 14524800 ps
T801 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_rw_evict.469651525 Aug 23 12:02:05 PM UTC 24 Aug 23 12:02:43 PM UTC 24 44716800 ps
T802 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_rw_evict_all_en.1499028716 Aug 23 12:02:06 PM UTC 24 Aug 23 12:02:44 PM UTC 24 29727500 ps
T803 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_sec_info_access.3930815455 Aug 23 12:01:43 PM UTC 24 Aug 23 12:02:51 PM UTC 24 2744276400 ps
T804 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_prog_reset.337807974 Aug 23 12:02:45 PM UTC 24 Aug 23 12:03:00 PM UTC 24 81204000 ps
T805 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_intr_rd_slow_flash.1940425564 Aug 23 12:01:13 PM UTC 24 Aug 23 12:03:05 PM UTC 24 5972266800 ps
T806 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_smoke.2241438335 Aug 23 12:01:49 PM UTC 24 Aug 23 12:03:11 PM UTC 24 18460300 ps
T807 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_smoke.93793197 Aug 23 12:01:07 PM UTC 24 Aug 23 12:03:19 PM UTC 24 44030900 ps
T390 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_sec_info_access.4126155542 Aug 23 12:02:16 PM UTC 24 Aug 23 12:03:23 PM UTC 24 8325381800 ps
T404 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_rw_evict.823370790 Aug 23 12:02:52 PM UTC 24 Aug 23 12:03:27 PM UTC 24 34550100 ps
T355 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_disable.3815320349 Aug 23 12:03:05 PM UTC 24 Aug 23 12:03:31 PM UTC 24 20636400 ps
T808 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_connect.564911175 Aug 23 12:03:20 PM UTC 24 Aug 23 12:03:36 PM UTC 24 39093200 ps
T189 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_otp_reset.2164146299 Aug 23 12:01:10 PM UTC 24 Aug 23 12:03:38 PM UTC 24 69292000 ps
T809 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_alert_test.1750465701 Aug 23 12:03:25 PM UTC 24 Aug 23 12:03:40 PM UTC 24 150825800 ps
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T819 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_disable.1390788708 Aug 23 12:03:53 PM UTC 24 Aug 23 12:04:17 PM UTC 24 38982600 ps
T820 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_alert_test.1270494353 Aug 23 12:04:01 PM UTC 24 Aug 23 12:04:18 PM UTC 24 28036500 ps
T821 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_otp_reset.1965108010 Aug 23 12:01:54 PM UTC 24 Aug 23 12:04:24 PM UTC 24 43338200 ps
T822 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_rw_evict_all_en.3837251018 Aug 23 12:03:51 PM UTC 24 Aug 23 12:04:25 PM UTC 24 76926900 ps
T823 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_rw_evict.532266012 Aug 23 12:03:49 PM UTC 24 Aug 23 12:04:26 PM UTC 24 45244500 ps
T824 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_rma_reset.2121695800 Aug 23 11:52:31 AM UTC 24 Aug 23 12:04:33 PM UTC 24 50130130300 ps
T825 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_intr_rd.1644309588 Aug 23 12:01:56 PM UTC 24 Aug 23 12:04:40 PM UTC 24 14724780700 ps
T826 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_prog_reset.1105697078 Aug 23 12:04:25 PM UTC 24 Aug 23 12:04:42 PM UTC 24 19395600 ps
T827 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_hw_sec_otp.1902479216 Aug 23 12:03:32 PM UTC 24 Aug 23 12:04:43 PM UTC 24 4164938800 ps
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T829 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_sec_info_access.874303219 Aug 23 12:03:58 PM UTC 24 Aug 23 12:04:52 PM UTC 24 7682986700 ps
T830 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_hw_sec_otp.3172958043 Aug 23 12:04:11 PM UTC 24 Aug 23 12:04:53 PM UTC 24 1106103500 ps
T831 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_disable.512312108 Aug 23 12:04:33 PM UTC 24 Aug 23 12:04:58 PM UTC 24 10445600 ps
T832 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_connect.1379577696 Aug 23 12:04:44 PM UTC 24 Aug 23 12:04:59 PM UTC 24 15564700 ps
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T834 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_alert_test.3293406751 Aug 23 12:04:44 PM UTC 24 Aug 23 12:05:00 PM UTC 24 134813400 ps
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T836 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_otp_reset.287276050 Aug 23 12:02:39 PM UTC 24 Aug 23 12:05:10 PM UTC 24 38438300 ps
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T839 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_alert_test.1764060913 Aug 23 12:05:17 PM UTC 24 Aug 23 12:05:34 PM UTC 24 141709400 ps
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T411 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_rw_evict.4031243452 Aug 23 12:05:01 PM UTC 24 Aug 23 12:05:36 PM UTC 24 38195100 ps
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T846 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_error_mp.1700675437 Aug 23 11:24:59 AM UTC 24 Aug 23 12:05:45 PM UTC 24 23353762000 ps
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T173 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_otp_reset.3957503750 Aug 23 12:03:37 PM UTC 24 Aug 23 12:06:06 PM UTC 24 43986900 ps
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T851 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_rw_evict.1476189652 Aug 23 12:05:37 PM UTC 24 Aug 23 12:06:12 PM UTC 24 49641600 ps
T371 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_disable.1595240131 Aug 23 12:05:44 PM UTC 24 Aug 23 12:06:13 PM UTC 24 21469200 ps
T852 /workspaces/repo/scratch/os_regression_2024_08_22/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_alert_test.968573187 Aug 23 12:05:55 PM UTC 24 Aug 23 12:06:16 PM UTC 24 42119100 ps
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