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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.23 95.68 93.90 98.31 92.52 98.21 96.89 98.12


Total test records in report: 1272
tests.html | tests1.html | tests2.html | tests3.html | tests4.html | tests5.html | tests6.html | tests7.html | tests8.html | tests9.html | tests10.html | tests11.html | tests12.html | tests13.html | tests14.html | tests15.html | tests16.html | tests17.html | tests18.html | tests19.html | tests20.html | tests21.html | tests22.html | tests23.html | tests24.html | tests25.html | tests26.html

T661 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_intr_rd.2498380783 Aug 29 10:24:12 AM UTC 24 Aug 29 10:27:35 AM UTC 24 3128567400 ps
T662 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_ro.3581091684 Aug 29 10:25:32 AM UTC 24 Aug 29 10:27:37 AM UTC 24 1331945300 ps
T663 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_wo.3048481524 Aug 29 10:25:31 AM UTC 24 Aug 29 10:27:48 AM UTC 24 8063801400 ps
T664 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_smoke.4128531680 Aug 29 10:26:58 AM UTC 24 Aug 29 10:27:54 AM UTC 24 63175500 ps
T407 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_sec_info_access.2166698234 Aug 29 10:26:20 AM UTC 24 Aug 29 10:27:55 AM UTC 24 619146200 ps
T665 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_sec_otp.3073815684 Aug 29 10:27:05 AM UTC 24 Aug 29 10:28:03 AM UTC 24 2461669000 ps
T341 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd.2557777128 Aug 29 10:25:37 AM UTC 24 Aug 29 10:28:07 AM UTC 24 686135600 ps
T666 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_smoke.3225364487 Aug 29 10:25:17 AM UTC 24 Aug 29 10:28:18 AM UTC 24 23650200 ps
T421 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_otp_reset.3151865670 Aug 29 10:25:29 AM UTC 24 Aug 29 10:28:30 AM UTC 24 110683400 ps
T136 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_invalid_op.1877679954 Aug 29 10:27:09 AM UTC 24 Aug 29 10:28:32 AM UTC 24 1016719000 ps
T667 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw_evict.676443173 Aug 29 10:27:55 AM UTC 24 Aug 29 10:28:33 AM UTC 24 106406000 ps
T668 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_disable.1616882775 Aug 29 10:28:07 AM UTC 24 Aug 29 10:28:48 AM UTC 24 16149500 ps
T669 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw_evict_all_en.1522672661 Aug 29 10:27:56 AM UTC 24 Aug 29 10:28:49 AM UTC 24 43764500 ps
T670 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_connect.2356093738 Aug 29 10:28:30 AM UTC 24 Aug 29 10:28:57 AM UTC 24 13826800 ps
T671 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_ro.57745973 Aug 29 10:27:19 AM UTC 24 Aug 29 10:29:01 AM UTC 24 1845768000 ps
T672 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_re_evict.2658241009 Aug 29 10:28:04 AM UTC 24 Aug 29 10:29:02 AM UTC 24 204045400 ps
T673 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_lcmgr_intg.1356935243 Aug 29 10:28:34 AM UTC 24 Aug 29 10:29:02 AM UTC 24 21163400 ps
T674 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_read_seed_err.879033450 Aug 29 10:28:34 AM UTC 24 Aug 29 10:29:02 AM UTC 24 49972800 ps
T205 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_host_ctrl_arb.4262902875 Aug 29 09:46:45 AM UTC 24 Aug 29 10:29:05 AM UTC 24 585269199500 ps
T675 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_prog_rma_wipe_err.539264892 Aug 29 10:26:44 AM UTC 24 Aug 29 10:29:10 AM UTC 24 10012549200 ps
T676 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_alert_test.1111164383 Aug 29 10:28:50 AM UTC 24 Aug 29 10:29:12 AM UTC 24 125259100 ps
T677 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_rw.3849595554 Aug 29 10:20:09 AM UTC 24 Aug 29 10:29:16 AM UTC 24 29355707300 ps
T678 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_intr_rd_slow_flash.1196670095 Aug 29 10:24:15 AM UTC 24 Aug 29 10:29:19 AM UTC 24 24780779700 ps
T679 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_sec_info_access.4116975103 Aug 29 10:28:19 AM UTC 24 Aug 29 10:29:47 AM UTC 24 718884300 ps
T680 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_otp_reset.703750341 Aug 29 10:27:07 AM UTC 24 Aug 29 10:29:56 AM UTC 24 41567400 ps
T681 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rw.3857984162 Aug 29 10:21:35 AM UTC 24 Aug 29 10:30:10 AM UTC 24 6490083300 ps
T682 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_wo.60548639 Aug 29 10:27:10 AM UTC 24 Aug 29 10:30:14 AM UTC 24 4484419800 ps
T683 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd.553946338 Aug 29 10:27:36 AM UTC 24 Aug 29 10:30:24 AM UTC 24 1468712200 ps
T684 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_phy_arb.3996913631 Aug 29 10:25:22 AM UTC 24 Aug 29 10:30:26 AM UTC 24 852462700 ps
T685 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_phy_arb.3686280821 Aug 29 10:23:06 AM UTC 24 Aug 29 10:30:32 AM UTC 24 73748600 ps
T686 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_prog_reset.2742826335 Aug 29 10:30:14 AM UTC 24 Aug 29 10:30:33 AM UTC 24 22642600 ps
T328 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_sec_otp.3588258225 Aug 29 10:29:02 AM UTC 24 Aug 29 10:30:42 AM UTC 24 2548185400 ps
T687 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_stress_all.3993952030 Aug 29 09:50:04 AM UTC 24 Aug 29 10:30:47 AM UTC 24 1008791700 ps
T688 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_invalid_op.255285526 Aug 29 10:29:13 AM UTC 24 Aug 29 10:30:53 AM UTC 24 8326520500 ps
T689 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_intr_rd_slow_flash.2643348084 Aug 29 10:25:59 AM UTC 24 Aug 29 10:30:53 AM UTC 24 11687697600 ps
T690 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_mp_regions.2075863710 Aug 29 10:27:07 AM UTC 24 Aug 29 10:31:02 AM UTC 24 2275946600 ps
T357 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw_evict.3887682358 Aug 29 10:30:25 AM UTC 24 Aug 29 10:31:08 AM UTC 24 38704600 ps
T691 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_phy_arb.500829576 Aug 29 10:29:02 AM UTC 24 Aug 29 10:31:12 AM UTC 24 107180300 ps
T396 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_disable.172266097 Aug 29 10:30:34 AM UTC 24 Aug 29 10:31:12 AM UTC 24 17359600 ps
T692 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw_evict_all_en.2653487159 Aug 29 10:30:26 AM UTC 24 Aug 29 10:31:15 AM UTC 24 89252800 ps
T693 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_lcmgr_intg.1607024146 Aug 29 10:30:54 AM UTC 24 Aug 29 10:31:19 AM UTC 24 15371500 ps
T694 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_connect.283597150 Aug 29 10:30:48 AM UTC 24 Aug 29 10:31:21 AM UTC 24 14196100 ps
T695 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_ro.1411441464 Aug 29 10:29:20 AM UTC 24 Aug 29 10:31:21 AM UTC 24 983618300 ps
T696 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_prog_reset.875846189 Aug 29 10:27:49 AM UTC 24 Aug 29 10:31:22 AM UTC 24 7533416700 ps
T697 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_read_seed_err.1943698710 Aug 29 10:30:54 AM UTC 24 Aug 29 10:31:24 AM UTC 24 25152700 ps
T698 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_alert_test.3098194750 Aug 29 10:31:03 AM UTC 24 Aug 29 10:31:33 AM UTC 24 66323400 ps
T699 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_re_evict.388551163 Aug 29 10:30:32 AM UTC 24 Aug 29 10:31:35 AM UTC 24 257302100 ps
T700 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_wo.1752593686 Aug 29 10:29:17 AM UTC 24 Aug 29 10:31:50 AM UTC 24 1755546200 ps
T434 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_sec_info_access.1631560390 Aug 29 10:30:43 AM UTC 24 Aug 29 10:32:00 AM UTC 24 7061557700 ps
T701 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rand_ops.1832384671 Aug 29 10:16:38 AM UTC 24 Aug 29 10:32:07 AM UTC 24 303176200 ps
T702 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_prog_rma_wipe_err.1087431415 Aug 29 10:28:49 AM UTC 24 Aug 29 10:32:18 AM UTC 24 10012567100 ps
T703 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_intr_rd_slow_flash.1664368167 Aug 29 10:27:38 AM UTC 24 Aug 29 10:32:32 AM UTC 24 24207647000 ps
T704 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_prog_reset.455027261 Aug 29 10:32:08 AM UTC 24 Aug 29 10:32:34 AM UTC 24 55773300 ps
T705 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_smoke.2236694601 Aug 29 10:28:58 AM UTC 24 Aug 29 10:32:37 AM UTC 24 53541200 ps
T706 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_sec_otp.3006783782 Aug 29 10:31:16 AM UTC 24 Aug 29 10:32:44 AM UTC 24 5668838000 ps
T707 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_hw_prog_rma_wipe_err.996217036 Aug 29 10:30:58 AM UTC 24 Aug 29 10:32:48 AM UTC 24 10043042900 ps
T708 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_otp_reset.3982569291 Aug 29 10:29:06 AM UTC 24 Aug 29 10:32:49 AM UTC 24 43493700 ps
T709 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_error_prog_win.323051942 Aug 29 10:13:17 AM UTC 24 Aug 29 10:33:01 AM UTC 24 4554765500 ps
T137 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_invalid_op.321439074 Aug 29 10:31:23 AM UTC 24 Aug 29 10:33:05 AM UTC 24 3331165400 ps
T710 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_lcmgr_intg.2167160406 Aug 29 10:32:50 AM UTC 24 Aug 29 10:33:15 AM UTC 24 15085500 ps
T711 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_connect.1458745031 Aug 29 10:32:49 AM UTC 24 Aug 29 10:33:15 AM UTC 24 42454400 ps
T712 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_read_seed_err.3790038428 Aug 29 10:33:02 AM UTC 24 Aug 29 10:33:18 AM UTC 24 26149500 ps
T713 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_phy_arb.2426481780 Aug 29 10:21:09 AM UTC 24 Aug 29 10:33:19 AM UTC 24 1409550200 ps
T714 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw_evict.4033957984 Aug 29 10:32:18 AM UTC 24 Aug 29 10:33:22 AM UTC 24 29110800 ps
T715 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_disable.1119759813 Aug 29 10:32:37 AM UTC 24 Aug 29 10:33:23 AM UTC 24 19482300 ps
T716 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_intr_rd_slow_flash.3677113570 Aug 29 10:30:10 AM UTC 24 Aug 29 10:33:30 AM UTC 24 5760754700 ps
T717 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_error_prog_win.4210832747 Aug 29 10:06:35 AM UTC 24 Aug 29 10:33:31 AM UTC 24 4100761500 ps
T718 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_re_evict.277962048 Aug 29 10:32:35 AM UTC 24 Aug 29 10:33:31 AM UTC 24 216667100 ps
T359 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rw_evict_all_en.3416501406 Aug 29 10:32:32 AM UTC 24 Aug 29 10:33:33 AM UTC 24 181189400 ps
T719 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_smoke.3008814486 Aug 29 10:31:09 AM UTC 24 Aug 29 10:33:33 AM UTC 24 153387800 ps
T720 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_ro.3003368387 Aug 29 10:31:34 AM UTC 24 Aug 29 10:33:35 AM UTC 24 793852000 ps
T721 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_alert_test.3049654013 Aug 29 10:33:15 AM UTC 24 Aug 29 10:33:38 AM UTC 24 64176900 ps
T722 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rw.2603752262 Aug 29 10:25:35 AM UTC 24 Aug 29 10:33:44 AM UTC 24 17161180800 ps
T723 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_wo.3292209789 Aug 29 10:31:24 AM UTC 24 Aug 29 10:33:49 AM UTC 24 10066141100 ps
T724 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rw.430266099 Aug 29 10:23:58 AM UTC 24 Aug 29 10:34:07 AM UTC 24 18684934700 ps
T138 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_mp_regions.3006204789 Aug 29 10:21:17 AM UTC 24 Aug 29 10:34:13 AM UTC 24 36103180100 ps
T725 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_prog_reset.851312125 Aug 29 10:33:49 AM UTC 24 Aug 29 10:34:17 AM UTC 24 20920700 ps
T726 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_rma_reset.352786982 Aug 29 10:16:44 AM UTC 24 Aug 29 10:34:19 AM UTC 24 260233216900 ps
T727 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_error_prog_win.1243663903 Aug 29 10:16:59 AM UTC 24 Aug 29 10:34:22 AM UTC 24 2067593800 ps
T728 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_rw.2499824090 Aug 29 10:27:25 AM UTC 24 Aug 29 10:34:26 AM UTC 24 3511902400 ps
T346 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd.3216443301 Aug 29 10:31:51 AM UTC 24 Aug 29 10:34:31 AM UTC 24 3538198400 ps
T299 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_prog_rma_wipe_err.971038056 Aug 29 10:33:06 AM UTC 24 Aug 29 10:34:33 AM UTC 24 10020657400 ps
T435 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_sec_info_access.2210781307 Aug 29 10:32:46 AM UTC 24 Aug 29 10:34:34 AM UTC 24 33807547000 ps
T729 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_otp_reset.2029035188 Aug 29 10:31:21 AM UTC 24 Aug 29 10:34:47 AM UTC 24 79095100 ps
T730 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw_evict.2853184245 Aug 29 10:34:08 AM UTC 24 Aug 29 10:34:49 AM UTC 24 65494900 ps
T731 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_read_seed_err.813776637 Aug 29 10:34:34 AM UTC 24 Aug 29 10:34:50 AM UTC 24 89769000 ps
T732 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_connect.4023866302 Aug 29 10:34:26 AM UTC 24 Aug 29 10:34:53 AM UTC 24 48679300 ps
T418 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_disable.1396957458 Aug 29 10:34:20 AM UTC 24 Aug 29 10:34:56 AM UTC 24 39210600 ps
T733 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_re_evict.3209882876 Aug 29 10:34:18 AM UTC 24 Aug 29 10:35:01 AM UTC 24 235418500 ps
T734 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_lcmgr_intg.714530944 Aug 29 10:34:33 AM UTC 24 Aug 29 10:35:02 AM UTC 24 88604800 ps
T735 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_invalid_op.1706097255 Aug 29 10:33:32 AM UTC 24 Aug 29 10:35:05 AM UTC 24 3336772300 ps
T736 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw_evict_all_en.2027629315 Aug 29 10:34:14 AM UTC 24 Aug 29 10:35:07 AM UTC 24 28700400 ps
T304 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_error_mp.1930124054 Aug 29 09:42:35 AM UTC 24 Aug 29 10:35:10 AM UTC 24 10707705200 ps
T737 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_alert_test.1587727422 Aug 29 10:34:48 AM UTC 24 Aug 29 10:35:11 AM UTC 24 18087300 ps
T738 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_ro.1583985186 Aug 29 10:33:34 AM UTC 24 Aug 29 10:35:27 AM UTC 24 3163564300 ps
T739 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_intr_rd_slow_flash.3532468858 Aug 29 10:32:01 AM UTC 24 Aug 29 10:35:45 AM UTC 24 10692334400 ps
T740 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_sec_info_access.1952098265 Aug 29 10:34:23 AM UTC 24 Aug 29 10:35:56 AM UTC 24 4935463500 ps
T741 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_rand_ops.4101139484 Aug 29 10:31:13 AM UTC 24 Aug 29 10:35:58 AM UTC 24 131266400 ps
T139 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_mp_regions.1769826524 Aug 29 10:29:10 AM UTC 24 Aug 29 10:36:00 AM UTC 24 17211614600 ps
T742 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_wo.590745149 Aug 29 10:33:33 AM UTC 24 Aug 29 10:36:05 AM UTC 24 1606447800 ps
T323 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_sec_otp.945030163 Aug 29 10:33:23 AM UTC 24 Aug 29 10:36:13 AM UTC 24 5764315200 ps
T743 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_sec_otp.1163045389 Aug 29 10:34:57 AM UTC 24 Aug 29 10:36:17 AM UTC 24 2918519400 ps
T744 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_host_ctrl_arb.387649147 Aug 29 09:40:13 AM UTC 24 Aug 29 10:36:19 AM UTC 24 241779707000 ps
T745 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_prog_reset.4151449333 Aug 29 10:35:58 AM UTC 24 Aug 29 10:36:28 AM UTC 24 58077100 ps
T246 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_mp_regions.2313388700 Aug 29 10:25:30 AM UTC 24 Aug 29 10:36:34 AM UTC 24 33156661500 ps
T746 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd_slow_flash.959151428 Aug 29 10:33:45 AM UTC 24 Aug 29 10:36:43 AM UTC 24 39344081100 ps
T358 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw_evict.3578420336 Aug 29 10:36:01 AM UTC 24 Aug 29 10:36:45 AM UTC 24 77611700 ps
T747 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_invalid_op.2472208103 Aug 29 10:35:08 AM UTC 24 Aug 29 10:36:47 AM UTC 24 4328219800 ps
T425 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_disable.2546933647 Aug 29 10:36:17 AM UTC 24 Aug 29 10:36:49 AM UTC 24 114340400 ps
T748 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_connect.540816143 Aug 29 10:36:29 AM UTC 24 Aug 29 10:36:58 AM UTC 24 16128500 ps
T749 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_lcmgr_intg.2932412455 Aug 29 10:36:35 AM UTC 24 Aug 29 10:36:59 AM UTC 24 15997900 ps
T750 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw_evict_all_en.566887640 Aug 29 10:36:05 AM UTC 24 Aug 29 10:37:07 AM UTC 24 50037800 ps
T751 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_read_seed_err.619571203 Aug 29 10:36:43 AM UTC 24 Aug 29 10:37:11 AM UTC 24 45808200 ps
T752 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_alert_test.1344955121 Aug 29 10:36:48 AM UTC 24 Aug 29 10:37:13 AM UTC 24 82933400 ps
T753 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_re_evict.1791263776 Aug 29 10:36:14 AM UTC 24 Aug 29 10:37:14 AM UTC 24 240080400 ps
T186 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_otp_reset.3778545177 Aug 29 10:33:32 AM UTC 24 Aug 29 10:37:26 AM UTC 24 154240500 ps
T754 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_host_ctrl_arb.2540289148 Aug 29 09:42:15 AM UTC 24 Aug 29 10:37:30 AM UTC 24 297984146500 ps
T755 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_rand_ops.1968998365 Aug 29 10:18:58 AM UTC 24 Aug 29 10:37:33 AM UTC 24 980224700 ps
T756 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_ro.14221314 Aug 29 10:35:13 AM UTC 24 Aug 29 10:37:35 AM UTC 24 526690300 ps
T206 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_host_ctrl_arb.1700721772 Aug 29 09:58:04 AM UTC 24 Aug 29 10:37:44 AM UTC 24 567704751600 ps
T403 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_sec_info_access.3199630534 Aug 29 10:36:19 AM UTC 24 Aug 29 10:37:49 AM UTC 24 641152100 ps
T757 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_smoke.608191234 Aug 29 10:33:15 AM UTC 24 Aug 29 10:37:50 AM UTC 24 37956500 ps
T758 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_intr_rd.1882342622 Aug 29 10:33:39 AM UTC 24 Aug 29 10:38:00 AM UTC 24 1682625800 ps
T203 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_otp_reset.49421266 Aug 29 10:35:03 AM UTC 24 Aug 29 10:38:02 AM UTC 24 668780100 ps
T759 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd.2987810270 Aug 29 10:35:46 AM UTC 24 Aug 29 10:38:03 AM UTC 24 4466494900 ps
T227 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_host_ctrl_arb.2275094146 Aug 29 09:51:47 AM UTC 24 Aug 29 10:38:08 AM UTC 24 576932142700 ps
T760 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_prog_rma_wipe_err.11792850 Aug 29 10:36:45 AM UTC 24 Aug 29 10:38:10 AM UTC 24 10031804800 ps
T761 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_prog_reset.1712443679 Aug 29 10:37:51 AM UTC 24 Aug 29 10:38:16 AM UTC 24 80725600 ps
T88 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_error_prog_type.441353574 Aug 29 09:47:02 AM UTC 24 Aug 29 10:38:19 AM UTC 24 729549000 ps
T762 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_wo.2770363494 Aug 29 10:35:11 AM UTC 24 Aug 29 10:38:19 AM UTC 24 3910466600 ps
T763 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_prog_rma_wipe_err.3691515845 Aug 29 10:34:35 AM UTC 24 Aug 29 10:38:22 AM UTC 24 10020023200 ps
T199 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_rma_reset.442073973 Aug 29 10:19:09 AM UTC 24 Aug 29 10:38:26 AM UTC 24 320230996300 ps
T764 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_invalid_op.3805154207 Aug 29 10:37:27 AM UTC 24 Aug 29 10:38:30 AM UTC 24 1673217000 ps
T305 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_error_mp.4027110767 Aug 29 09:47:13 AM UTC 24 Aug 29 10:38:37 AM UTC 24 13345363100 ps
T765 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_smoke.2484010844 Aug 29 10:34:50 AM UTC 24 Aug 29 10:38:38 AM UTC 24 100668800 ps
T766 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw_evict_all_en.636520532 Aug 29 10:38:02 AM UTC 24 Aug 29 10:38:39 AM UTC 24 28316400 ps
T767 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rw.1103188980 Aug 29 10:29:48 AM UTC 24 Aug 29 10:38:41 AM UTC 24 3702043300 ps
T140 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_mp_regions.2084248934 Aug 29 10:31:22 AM UTC 24 Aug 29 10:38:42 AM UTC 24 6824740900 ps
T768 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_lcmgr_intg.3872110880 Aug 29 10:38:20 AM UTC 24 Aug 29 10:38:44 AM UTC 24 27068200 ps
T351 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_re_evict.3843681070 Aug 29 10:38:04 AM UTC 24 Aug 29 10:38:44 AM UTC 24 66754600 ps
T769 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_read_seed_err.2612379492 Aug 29 10:38:21 AM UTC 24 Aug 29 10:38:45 AM UTC 24 172493200 ps
T770 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_connect.4173424458 Aug 29 10:38:17 AM UTC 24 Aug 29 10:38:46 AM UTC 24 16498300 ps
T771 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_alert_test.1219223377 Aug 29 10:38:27 AM UTC 24 Aug 29 10:38:49 AM UTC 24 44760700 ps
T417 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_disable.1824452436 Aug 29 10:38:08 AM UTC 24 Aug 29 10:38:51 AM UTC 24 15698200 ps
T772 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_rw_evict.2368703416 Aug 29 10:38:00 AM UTC 24 Aug 29 10:38:54 AM UTC 24 42404500 ps
T773 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rand_ops.4245173163 Aug 29 10:25:20 AM UTC 24 Aug 29 10:38:56 AM UTC 24 99283000 ps
T774 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_sec_otp.4083336921 Aug 29 10:37:08 AM UTC 24 Aug 29 10:39:04 AM UTC 24 2074232000 ps
T89 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_error_prog_type.3922235829 Aug 29 09:40:13 AM UTC 24 Aug 29 10:39:06 AM UTC 24 3611182800 ps
T775 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_prog_reset.1523323409 Aug 29 10:38:43 AM UTC 24 Aug 29 10:39:16 AM UTC 24 92003900 ps
T776 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_connect.1121882019 Aug 29 10:38:50 AM UTC 24 Aug 29 10:39:18 AM UTC 24 14244100 ps
T777 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_alert_test.1689967639 Aug 29 10:38:53 AM UTC 24 Aug 29 10:39:18 AM UTC 24 121344400 ps
T778 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict_all_en.567187565 Aug 29 10:38:45 AM UTC 24 Aug 29 10:39:21 AM UTC 24 47805200 ps
T419 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_disable.2021621175 Aug 29 10:38:46 AM UTC 24 Aug 29 10:39:25 AM UTC 24 44596400 ps
T779 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_full_mem_access.3916721297 Aug 29 09:52:08 AM UTC 24 Aug 29 10:39:29 AM UTC 24 81038600200 ps
T780 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_phy_arb.999132847 Aug 29 10:33:19 AM UTC 24 Aug 29 10:39:33 AM UTC 24 1616706400 ps
T781 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_phy_arb.3818235731 Aug 29 10:27:03 AM UTC 24 Aug 29 10:39:34 AM UTC 24 3093508100 ps
T782 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_rw_evict.2769618241 Aug 29 10:38:45 AM UTC 24 Aug 29 10:39:45 AM UTC 24 223506300 ps
T783 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_prog_reset.4001772954 Aug 29 10:39:18 AM UTC 24 Aug 29 10:39:46 AM UTC 24 63721500 ps
T784 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_ro.1210179517 Aug 29 10:37:35 AM UTC 24 Aug 29 10:39:49 AM UTC 24 617163800 ps
T427 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_sec_info_access.268421040 Aug 29 10:38:10 AM UTC 24 Aug 29 10:39:55 AM UTC 24 11170137200 ps
T422 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_rma_reset.199068174 Aug 29 10:21:13 AM UTC 24 Aug 29 10:39:56 AM UTC 24 240212856600 ps
T785 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_rw_evict_all_en.2939432165 Aug 29 10:39:21 AM UTC 24 Aug 29 10:39:59 AM UTC 24 181121900 ps
T786 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_connect.1789196835 Aug 29 10:39:39 AM UTC 24 Aug 29 10:40:01 AM UTC 24 16750900 ps
T787 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_alert_test.2601705706 Aug 29 10:39:39 AM UTC 24 Aug 29 10:40:05 AM UTC 24 47134100 ps
T362 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_rw_evict.55645407 Aug 29 10:39:18 AM UTC 24 Aug 29 10:40:08 AM UTC 24 395729300 ps
T788 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rand_ops.1220072125 Aug 29 10:34:51 AM UTC 24 Aug 29 10:40:10 AM UTC 24 42450100 ps
T789 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_disable.1189140606 Aug 29 10:39:26 AM UTC 24 Aug 29 10:40:10 AM UTC 24 10633400 ps
T790 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_wo.2135490969 Aug 29 10:37:30 AM UTC 24 Aug 29 10:40:13 AM UTC 24 6261942000 ps
T791 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_prog_reset.985742632 Aug 29 10:39:59 AM UTC 24 Aug 29 10:40:29 AM UTC 24 39433200 ps
T792 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_phy_arb.3374900533 Aug 29 10:31:13 AM UTC 24 Aug 29 10:40:33 AM UTC 24 325989900 ps
T793 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_rw_evict.3540918621 Aug 29 10:40:02 AM UTC 24 Aug 29 10:40:36 AM UTC 24 74535600 ps
T794 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_connect.2716215104 Aug 29 10:40:11 AM UTC 24 Aug 29 10:40:38 AM UTC 24 14516200 ps
T795 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_alert_test.3975340384 Aug 29 10:40:14 AM UTC 24 Aug 29 10:40:39 AM UTC 24 115841100 ps
T428 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_sec_info_access.2724891318 Aug 29 10:38:46 AM UTC 24 Aug 29 10:40:39 AM UTC 24 4977590800 ps
T796 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_rw_evict_all_en.469866561 Aug 29 10:40:05 AM UTC 24 Aug 29 10:40:43 AM UTC 24 79604100 ps
T204 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_otp_reset.263517120 Aug 29 10:37:13 AM UTC 24 Aug 29 10:40:49 AM UTC 24 41778100 ps
T797 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd.476690863 Aug 29 10:37:45 AM UTC 24 Aug 29 10:40:49 AM UTC 24 1800820500 ps
T798 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_intr_rd_slow_flash.316016903 Aug 29 10:37:50 AM UTC 24 Aug 29 10:40:52 AM UTC 24 23529373300 ps
T420 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_disable.4291004467 Aug 29 10:40:08 AM UTC 24 Aug 29 10:40:54 AM UTC 24 15577600 ps
T799 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_smoke.1968427750 Aug 29 10:36:50 AM UTC 24 Aug 29 10:40:54 AM UTC 24 28205400 ps
T800 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_hw_sec_otp.1618886992 Aug 29 10:39:47 AM UTC 24 Aug 29 10:40:57 AM UTC 24 5807712100 ps
T801 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_sec_info_access.3896473321 Aug 29 10:39:38 AM UTC 24 Aug 29 10:41:00 AM UTC 24 2097476700 ps
T802 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_prog_rma_wipe_err.2969191942 Aug 29 10:38:23 AM UTC 24 Aug 29 10:41:01 AM UTC 24 10019977500 ps
T187 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_otp_reset.1330430601 Aug 29 10:38:38 AM UTC 24 Aug 29 10:41:03 AM UTC 24 36663600 ps
T803 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_full_mem_access.1746852419 Aug 29 09:47:01 AM UTC 24 Aug 29 10:41:05 AM UTC 24 305949500000 ps
T804 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_smoke.2364633403 Aug 29 10:38:31 AM UTC 24 Aug 29 10:41:10 AM UTC 24 39784500 ps
T805 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rw.3380083606 Aug 29 10:33:36 AM UTC 24 Aug 29 10:41:14 AM UTC 24 3715419400 ps
T806 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_disable.106941808 Aug 29 10:40:50 AM UTC 24 Aug 29 10:41:16 AM UTC 24 20867700 ps
T807 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_connect.4238571443 Aug 29 10:40:52 AM UTC 24 Aug 29 10:41:17 AM UTC 24 49237000 ps
T808 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_intr_rd_slow_flash.474256322 Aug 29 10:38:43 AM UTC 24 Aug 29 10:41:22 AM UTC 24 6003130700 ps
T809 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_alert_test.2095593195 Aug 29 10:40:55 AM UTC 24 Aug 29 10:41:23 AM UTC 24 90213500 ps
T369 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_rw_evict.2483627460 Aug 29 10:40:40 AM UTC 24 Aug 29 10:41:32 AM UTC 24 44180500 ps
T810 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_sec_info_access.4113100718 Aug 29 10:40:11 AM UTC 24 Aug 29 10:41:36 AM UTC 24 2050716100 ps
T811 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_prog_reset.708999879 Aug 29 10:41:13 AM UTC 24 Aug 29 10:41:40 AM UTC 24 51049400 ps
T363 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_rw_evict_all_en.3740490284 Aug 29 10:40:44 AM UTC 24 Aug 29 10:41:41 AM UTC 24 71494600 ps
T812 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_hw_sec_otp.3095401087 Aug 29 10:38:38 AM UTC 24 Aug 29 10:41:47 AM UTC 24 5346242400 ps
T813 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_alert_test.1507661591 Aug 29 10:41:23 AM UTC 24 Aug 29 10:41:49 AM UTC 24 27216100 ps
T814 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_smoke.2967258008 Aug 29 10:38:55 AM UTC 24 Aug 29 10:41:50 AM UTC 24 98168200 ps
T815 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_connect.347523124 Aug 29 10:41:23 AM UTC 24 Aug 29 10:41:52 AM UTC 24 27353200 ps
T816 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_rw_evict.681838288 Aug 29 10:41:14 AM UTC 24 Aug 29 10:42:01 AM UTC 24 31442900 ps
T817 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_disable.405504792 Aug 29 10:41:17 AM UTC 24 Aug 29 10:42:01 AM UTC 24 33972300 ps
T347 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/20.flash_ctrl_intr_rd.1987796632 Aug 29 10:38:39 AM UTC 24 Aug 29 10:42:08 AM UTC 24 10696200500 ps
T818 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_rw_evict_all_en.3140433602 Aug 29 10:41:15 AM UTC 24 Aug 29 10:42:09 AM UTC 24 40457300 ps
T819 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_prog_reset.2654114300 Aug 29 10:41:50 AM UTC 24 Aug 29 10:42:15 AM UTC 24 56617800 ps
T196 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_otp_reset.1345826218 Aug 29 10:39:05 AM UTC 24 Aug 29 10:42:17 AM UTC 24 36511700 ps
T820 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_sec_info_access.3511692376 Aug 29 10:40:50 AM UTC 24 Aug 29 10:42:17 AM UTC 24 4430033500 ps
T821 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_hw_sec_otp.1638132381 Aug 29 10:40:30 AM UTC 24 Aug 29 10:42:18 AM UTC 24 3537315300 ps
T822 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_disable.2434796136 Aug 29 10:42:02 AM UTC 24 Aug 29 10:42:29 AM UTC 24 16164000 ps
T823 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_rw_evict.2382199692 Aug 29 10:41:51 AM UTC 24 Aug 29 10:42:34 AM UTC 24 60242200 ps
T824 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_alert_test.291813261 Aug 29 10:42:10 AM UTC 24 Aug 29 10:42:34 AM UTC 24 150770500 ps
T825 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_connect.190802977 Aug 29 10:42:09 AM UTC 24 Aug 29 10:42:35 AM UTC 24 29301000 ps
T826 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_smoke.1264670591 Aug 29 10:40:14 AM UTC 24 Aug 29 10:42:38 AM UTC 24 678338600 ps
T827 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_rw_evict_all_en.171649348 Aug 29 10:41:52 AM UTC 24 Aug 29 10:42:48 AM UTC 24 75324200 ps
T828 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_intr_rd.4176313270 Aug 29 10:40:37 AM UTC 24 Aug 29 10:42:49 AM UTC 24 588820200 ps
T829 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_intr_rd_slow_flash.1116233288 Aug 29 10:35:56 AM UTC 24 Aug 29 10:42:54 AM UTC 24 48970640400 ps
T830 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_mp_regions.979407227 Aug 29 10:37:15 AM UTC 24 Aug 29 10:42:55 AM UTC 24 11437828600 ps
T831 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_mp_regions.4000281138 Aug 29 10:33:32 AM UTC 24 Aug 29 10:43:03 AM UTC 24 16025675000 ps
T832 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_otp_reset.2586616125 Aug 29 10:39:50 AM UTC 24 Aug 29 10:43:07 AM UTC 24 41208700 ps
T833 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_hw_sec_otp.1202968964 Aug 29 10:42:18 AM UTC 24 Aug 29 10:43:09 AM UTC 24 2299340200 ps
T834 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_hw_sec_otp.3573674012 Aug 29 10:43:05 AM UTC 24 Aug 29 10:46:31 AM UTC 24 2915389900 ps
T835 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_connect.3884145452 Aug 29 10:42:50 AM UTC 24 Aug 29 10:43:10 AM UTC 24 17188000 ps
T836 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_disable.1237815971 Aug 29 10:42:39 AM UTC 24 Aug 29 10:43:18 AM UTC 24 32627700 ps
T837 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_alert_test.4265702621 Aug 29 10:42:55 AM UTC 24 Aug 29 10:43:20 AM UTC 24 52944300 ps
T838 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_intr_rd_slow_flash.2668648566 Aug 29 10:41:04 AM UTC 24 Aug 29 10:43:22 AM UTC 24 5908043500 ps
T839 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_hw_sec_otp.1536444230 Aug 29 10:38:57 AM UTC 24 Aug 29 10:43:25 AM UTC 24 6430242400 ps
T840 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_phy_arb.3422739661 Aug 29 10:37:00 AM UTC 24 Aug 29 10:43:26 AM UTC 24 113698200 ps
T841 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_rw_evict.1813740263 Aug 29 10:42:36 AM UTC 24 Aug 29 10:43:27 AM UTC 24 48248100 ps
T842 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_hw_sec_otp.3760419418 Aug 29 10:40:58 AM UTC 24 Aug 29 10:43:31 AM UTC 24 7558216300 ps
T364 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_rw_evict_all_en.2592845785 Aug 29 10:42:36 AM UTC 24 Aug 29 10:43:34 AM UTC 24 211954700 ps
T843 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_smoke.2078977488 Aug 29 10:39:46 AM UTC 24 Aug 29 10:43:34 AM UTC 24 29484700 ps
T844 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_sec_info_access.365151950 Aug 29 10:41:17 AM UTC 24 Aug 29 10:43:37 AM UTC 24 15084240200 ps
T429 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_sec_info_access.1050947461 Aug 29 10:42:02 AM UTC 24 Aug 29 10:43:41 AM UTC 24 5424638900 ps
T845 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_prog_reset.1302115354 Aug 29 10:40:40 AM UTC 24 Aug 29 10:43:42 AM UTC 24 2579320200 ps
T846 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_rma_reset.3124080699 Aug 29 10:23:14 AM UTC 24 Aug 29 10:43:43 AM UTC 24 160168750000 ps
T847 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/14.flash_ctrl_hw_rma_reset.3603627359 Aug 29 10:27:06 AM UTC 24 Aug 29 10:43:45 AM UTC 24 80139098900 ps
T848 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_connect.78416618 Aug 29 10:43:28 AM UTC 24 Aug 29 10:43:51 AM UTC 24 37724000 ps
T849 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_rma_reset.1189302390 Aug 29 10:25:25 AM UTC 24 Aug 29 10:43:54 AM UTC 24 160189591100 ps
T850 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_intr_rd.1821375245 Aug 29 10:41:02 AM UTC 24 Aug 29 10:44:00 AM UTC 24 5302572500 ps
T851 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_phy_arb.3014499310 Aug 29 10:34:54 AM UTC 24 Aug 29 10:44:00 AM UTC 24 54439500 ps
T365 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_rw_evict.3889474702 Aug 29 10:43:21 AM UTC 24 Aug 29 10:44:01 AM UTC 24 27996000 ps
T852 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_alert_test.1946789132 Aug 29 10:43:32 AM UTC 24 Aug 29 10:44:01 AM UTC 24 60243000 ps
T853 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_smoke.115830705 Aug 29 10:40:55 AM UTC 24 Aug 29 10:44:02 AM UTC 24 48456400 ps
T337 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/21.flash_ctrl_intr_rd.775981748 Aug 29 10:39:07 AM UTC 24 Aug 29 10:44:03 AM UTC 24 27495177800 ps
T854 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw.1936695107 Aug 29 10:35:28 AM UTC 24 Aug 29 10:44:03 AM UTC 24 15542191900 ps
T855 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_otp_reset.1300319265 Aug 29 10:40:33 AM UTC 24 Aug 29 10:44:06 AM UTC 24 74703500 ps
T106 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_disable.487183980 Aug 29 10:43:25 AM UTC 24 Aug 29 10:44:06 AM UTC 24 13735300 ps
T856 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_rw_evict_all_en.491003285 Aug 29 10:43:23 AM UTC 24 Aug 29 10:44:13 AM UTC 24 31892300 ps
T857 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_intr_rd.4052326027 Aug 29 10:39:56 AM UTC 24 Aug 29 10:44:15 AM UTC 24 2517901200 ps
T858 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_sec_info_access.1647695607 Aug 29 10:43:28 AM UTC 24 Aug 29 10:44:17 AM UTC 24 516337000 ps
T859 /workspaces/repo/scratch/os_regression_2024_08_28/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rand_ops.2290569311 Aug 29 10:23:01 AM UTC 24 Aug 29 10:44:18 AM UTC 24 117560600 ps
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