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Total Coverage Summary 
SCORELINECONDTOGGLEFSMBRANCHASSERTGROUP
96.05 95.23 93.90 98.31 92.52 97.14 97.08 98.15


Total test records in report: 1262
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T858 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_rw_evict_all_en.1758362965 Sep 24 06:53:30 PM UTC 24 Sep 24 06:54:13 PM UTC 24 121939500 ps
T859 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/24.flash_ctrl_smoke.1761667702 Sep 24 06:50:55 PM UTC 24 Sep 24 06:54:14 PM UTC 24 28861100 ps
T860 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_smoke.3721553027 Sep 24 06:49:37 PM UTC 24 Sep 24 06:54:16 PM UTC 24 74447000 ps
T861 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_rw.2417773304 Sep 24 06:44:32 PM UTC 24 Sep 24 06:54:17 PM UTC 24 8600782100 ps
T862 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_prog_reset.1193360274 Sep 24 06:53:55 PM UTC 24 Sep 24 06:54:25 PM UTC 24 73843500 ps
T863 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_connect.4170046459 Sep 24 06:54:04 PM UTC 24 Sep 24 06:54:30 PM UTC 24 16524700 ps
T864 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_alert_test.2983450307 Sep 24 06:54:06 PM UTC 24 Sep 24 06:54:32 PM UTC 24 51930200 ps
T865 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_disable.826324770 Sep 24 06:54:03 PM UTC 24 Sep 24 06:54:38 PM UTC 24 34822500 ps
T866 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_rw_evict.1777474665 Sep 24 06:53:56 PM UTC 24 Sep 24 06:54:39 PM UTC 24 38756600 ps
T867 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_rw_evict_all_en.1928783011 Sep 24 06:54:00 PM UTC 24 Sep 24 06:54:40 PM UTC 24 31942000 ps
T868 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_intr_rd_slow_flash.654797298 Sep 24 06:50:38 PM UTC 24 Sep 24 06:54:43 PM UTC 24 12160824300 ps
T869 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_rand_ops.1294930055 Sep 24 06:27:00 PM UTC 24 Sep 24 06:54:44 PM UTC 24 486758700 ps
T870 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_intr_rd.2842869349 Sep 24 06:50:37 PM UTC 24 Sep 24 06:54:48 PM UTC 24 3014603500 ps
T871 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_otp_reset.853087852 Sep 24 06:51:34 PM UTC 24 Sep 24 06:54:52 PM UTC 24 69960100 ps
T872 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/23.flash_ctrl_smoke.312846276 Sep 24 06:50:17 PM UTC 24 Sep 24 06:54:55 PM UTC 24 2983546200 ps
T873 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_smoke.2870091455 Sep 24 06:52:00 PM UTC 24 Sep 24 06:54:55 PM UTC 24 52989300 ps
T874 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_hw_sec_otp.830003960 Sep 24 06:53:13 PM UTC 24 Sep 24 06:54:56 PM UTC 24 1980107800 ps
T875 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_smoke.2419209001 Sep 24 06:54:13 PM UTC 24 Sep 24 06:56:56 PM UTC 24 48093000 ps
T876 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_sec_info_access.2282385023 Sep 24 06:52:58 PM UTC 24 Sep 24 06:54:58 PM UTC 24 12210583000 ps
T877 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_alert_test.714926922 Sep 24 06:54:41 PM UTC 24 Sep 24 06:55:02 PM UTC 24 99645000 ps
T878 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_smoke.1698815866 Sep 24 06:53:42 PM UTC 24 Sep 24 06:55:05 PM UTC 24 49535400 ps
T879 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_disable.661004984 Sep 24 06:54:33 PM UTC 24 Sep 24 06:55:06 PM UTC 24 24819600 ps
T880 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_sec_info_access.1209175700 Sep 24 06:53:35 PM UTC 24 Sep 24 06:55:09 PM UTC 24 1777044900 ps
T881 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_connect.4262680126 Sep 24 06:54:40 PM UTC 24 Sep 24 06:55:13 PM UTC 24 49070000 ps
T882 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_sec_info_access.2866584452 Sep 24 06:54:03 PM UTC 24 Sep 24 06:55:16 PM UTC 24 1533961200 ps
T883 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_rw_evict_all_en.231224660 Sep 24 06:54:31 PM UTC 24 Sep 24 06:55:18 PM UTC 24 39738200 ps
T884 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_hw_sec_otp.2461602229 Sep 24 06:52:32 PM UTC 24 Sep 24 06:55:18 PM UTC 24 7144667000 ps
T885 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_hw_sec_otp.1872242060 Sep 24 06:53:44 PM UTC 24 Sep 24 06:55:18 PM UTC 24 8858748000 ps
T886 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_hw_sec_otp.1649467066 Sep 24 06:54:14 PM UTC 24 Sep 24 06:55:22 PM UTC 24 1081939500 ps
T887 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_intr_rd_slow_flash.3919414419 Sep 24 06:52:38 PM UTC 24 Sep 24 06:55:26 PM UTC 24 29571713500 ps
T888 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_rw_evict.260257056 Sep 24 06:54:26 PM UTC 24 Sep 24 06:55:27 PM UTC 24 38259300 ps
T889 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_intr_rd.133395724 Sep 24 06:52:36 PM UTC 24 Sep 24 06:55:31 PM UTC 24 2826932400 ps
T890 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_connect.3201025298 Sep 24 06:55:06 PM UTC 24 Sep 24 06:55:33 PM UTC 24 13664000 ps
T891 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_alert_test.4214982720 Sep 24 06:55:07 PM UTC 24 Sep 24 06:55:34 PM UTC 24 224078400 ps
T892 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_rw_evict.996930037 Sep 24 06:54:56 PM UTC 24 Sep 24 06:55:37 PM UTC 24 65881900 ps
T893 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_disable.1880979865 Sep 24 06:55:00 PM UTC 24 Sep 24 06:55:40 PM UTC 24 10235700 ps
T894 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_intr_rd.1601439736 Sep 24 06:53:19 PM UTC 24 Sep 24 06:55:43 PM UTC 24 2811952800 ps
T895 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_hw_sec_otp.2671193662 Sep 24 06:52:10 PM UTC 24 Sep 24 06:55:48 PM UTC 24 10018953900 ps
T896 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_prog_reset.2007015023 Sep 24 06:52:42 PM UTC 24 Sep 24 06:55:49 PM UTC 24 9525703000 ps
T897 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_connect.367447154 Sep 24 06:55:28 PM UTC 24 Sep 24 06:55:54 PM UTC 24 45865800 ps
T898 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_rw_evict_all_en.1881552359 Sep 24 06:54:58 PM UTC 24 Sep 24 06:55:56 PM UTC 24 30083900 ps
T899 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_alert_test.1883309964 Sep 24 06:55:32 PM UTC 24 Sep 24 06:55:59 PM UTC 24 61666100 ps
T367 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_rw_evict_all_en.316648426 Sep 24 06:55:19 PM UTC 24 Sep 24 06:56:00 PM UTC 24 118650700 ps
T411 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_sec_info_access.2547569117 Sep 24 06:55:03 PM UTC 24 Sep 24 06:56:05 PM UTC 24 1674580200 ps
T900 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_otp_reset.3756391464 Sep 24 06:53:14 PM UTC 24 Sep 24 06:56:07 PM UTC 24 40557100 ps
T901 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_disable.722649314 Sep 24 06:55:22 PM UTC 24 Sep 24 06:56:09 PM UTC 24 17203800 ps
T902 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_rw_evict.3095435095 Sep 24 06:55:19 PM UTC 24 Sep 24 06:56:12 PM UTC 24 53846400 ps
T903 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_smoke.448513810 Sep 24 06:55:09 PM UTC 24 Sep 24 06:56:14 PM UTC 24 219606000 ps
T904 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_otp_reset.1981868434 Sep 24 06:52:11 PM UTC 24 Sep 24 06:56:17 PM UTC 24 298287600 ps
T905 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_sec_info_access.1827834653 Sep 24 06:54:39 PM UTC 24 Sep 24 06:56:22 PM UTC 24 2681162900 ps
T906 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_phy_arb.3868203058 Sep 24 06:44:19 PM UTC 24 Sep 24 06:56:25 PM UTC 24 1432067200 ps
T907 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_connect.3257314139 Sep 24 06:56:00 PM UTC 24 Sep 24 06:56:26 PM UTC 24 14799900 ps
T170 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/27.flash_ctrl_otp_reset.995827747 Sep 24 06:52:32 PM UTC 24 Sep 24 06:56:26 PM UTC 24 38909000 ps
T908 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_alert_test.3734412398 Sep 24 06:56:01 PM UTC 24 Sep 24 06:56:34 PM UTC 24 42424900 ps
T909 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_disable.958787913 Sep 24 06:55:56 PM UTC 24 Sep 24 06:56:34 PM UTC 24 92755400 ps
T910 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_rw_evict.3324953307 Sep 24 06:55:50 PM UTC 24 Sep 24 06:56:36 PM UTC 24 28658500 ps
T911 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_hw_sec_otp.34661132 Sep 24 06:54:46 PM UTC 24 Sep 24 06:56:40 PM UTC 24 11410373000 ps
T912 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_sec_info_access.1088615097 Sep 24 06:55:26 PM UTC 24 Sep 24 06:56:42 PM UTC 24 2076152900 ps
T913 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_rw_evict_all_en.3470622730 Sep 24 06:55:51 PM UTC 24 Sep 24 06:56:48 PM UTC 24 73547800 ps
T914 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_smoke.172589018 Sep 24 06:54:43 PM UTC 24 Sep 24 06:56:54 PM UTC 24 30418900 ps
T915 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_connect.1158766057 Sep 24 06:56:27 PM UTC 24 Sep 24 06:56:56 PM UTC 24 18983300 ps
T916 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_rw_evict.3362216461 Sep 24 06:56:18 PM UTC 24 Sep 24 06:57:03 PM UTC 24 44447600 ps
T917 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_disable.1051400041 Sep 24 06:56:25 PM UTC 24 Sep 24 06:57:03 PM UTC 24 10848100 ps
T440 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_sec_info_access.1979547801 Sep 24 06:55:57 PM UTC 24 Sep 24 06:57:04 PM UTC 24 1265337200 ps
T918 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_otp_reset.646511150 Sep 24 06:53:46 PM UTC 24 Sep 24 06:57:09 PM UTC 24 147904100 ps
T919 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_rw_evict_all_en.4081466298 Sep 24 06:56:23 PM UTC 24 Sep 24 06:57:10 PM UTC 24 42363300 ps
T920 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_hw_rma_reset.1351781590 Sep 24 06:42:26 PM UTC 24 Sep 24 06:57:13 PM UTC 24 40120234300 ps
T921 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/22.flash_ctrl_intr_rd_slow_flash.1555907500 Sep 24 06:49:53 PM UTC 24 Sep 24 06:57:14 PM UTC 24 24202609800 ps
T922 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_smoke.3274515984 Sep 24 06:55:34 PM UTC 24 Sep 24 06:57:15 PM UTC 24 47171700 ps
T923 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_otp_reset.59102197 Sep 24 06:54:15 PM UTC 24 Sep 24 06:57:20 PM UTC 24 76840200 ps
T924 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/26.flash_ctrl_intr_rd_slow_flash.2095824045 Sep 24 06:52:13 PM UTC 24 Sep 24 06:57:21 PM UTC 24 11995506400 ps
T925 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_intr_rd_slow_flash.3278659604 Sep 24 06:54:18 PM UTC 24 Sep 24 06:57:23 PM UTC 24 17191822700 ps
T926 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_smoke.3993322197 Sep 24 06:56:06 PM UTC 24 Sep 24 06:57:23 PM UTC 24 27147000 ps
T927 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_sec_info_access.1221134343 Sep 24 06:56:26 PM UTC 24 Sep 24 06:57:25 PM UTC 24 410506500 ps
T928 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_alert_test.909638662 Sep 24 06:57:04 PM UTC 24 Sep 24 06:57:27 PM UTC 24 78405700 ps
T929 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_connect.3947479327 Sep 24 06:57:04 PM UTC 24 Sep 24 06:57:27 PM UTC 24 17317000 ps
T930 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_hw_sec_otp.683514454 Sep 24 06:55:12 PM UTC 24 Sep 24 06:57:29 PM UTC 24 2168640100 ps
T931 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_intr_rd.3526136884 Sep 24 06:53:52 PM UTC 24 Sep 24 06:57:32 PM UTC 24 1679366100 ps
T932 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_intr_rd.3764331340 Sep 24 06:55:17 PM UTC 24 Sep 24 06:57:35 PM UTC 24 1021280200 ps
T112 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/25.flash_ctrl_intr_rd_slow_flash.3860038174 Sep 24 06:51:40 PM UTC 24 Sep 24 06:57:37 PM UTC 24 12561764600 ps
T933 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_rw_evict_all_en.3236056629 Sep 24 06:56:56 PM UTC 24 Sep 24 06:57:40 PM UTC 24 100313600 ps
T934 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_disable.1477565311 Sep 24 06:56:57 PM UTC 24 Sep 24 06:57:40 PM UTC 24 20723400 ps
T935 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_otp_reset.4015237106 Sep 24 06:54:49 PM UTC 24 Sep 24 06:57:41 PM UTC 24 46609700 ps
T936 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_rw_evict.2930044409 Sep 24 06:56:55 PM UTC 24 Sep 24 06:57:42 PM UTC 24 128280400 ps
T937 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_alert_test.979660985 Sep 24 06:57:26 PM UTC 24 Sep 24 06:57:45 PM UTC 24 117709200 ps
T323 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_hw_sec_otp.3509863303 Sep 24 06:55:35 PM UTC 24 Sep 24 06:57:45 PM UTC 24 7281385700 ps
T938 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_disable.1401142525 Sep 24 06:57:22 PM UTC 24 Sep 24 06:57:56 PM UTC 24 10376700 ps
T939 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_connect.1878799300 Sep 24 06:57:24 PM UTC 24 Sep 24 06:57:58 PM UTC 24 49785000 ps
T940 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_rw_evict.1147479650 Sep 24 06:57:16 PM UTC 24 Sep 24 06:57:58 PM UTC 24 74079900 ps
T941 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_intr_rd_slow_flash.658211322 Sep 24 06:53:23 PM UTC 24 Sep 24 06:58:05 PM UTC 24 62940459900 ps
T942 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_rw_evict_all_en.4040963090 Sep 24 06:57:22 PM UTC 24 Sep 24 06:58:05 PM UTC 24 70483500 ps
T943 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_otp_reset.2168841102 Sep 24 06:55:14 PM UTC 24 Sep 24 06:58:06 PM UTC 24 215480900 ps
T944 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_alert_test.1483093059 Sep 24 06:57:46 PM UTC 24 Sep 24 06:58:09 PM UTC 24 53406700 ps
T945 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_connect.3923123737 Sep 24 06:57:42 PM UTC 24 Sep 24 06:58:11 PM UTC 24 103270200 ps
T441 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_sec_info_access.777652620 Sep 24 06:57:02 PM UTC 24 Sep 24 06:58:14 PM UTC 24 638562300 ps
T946 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_error_mp.1182445546 Sep 24 06:07:13 PM UTC 24 Sep 24 06:58:17 PM UTC 24 19208248800 ps
T947 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_disable.3530203699 Sep 24 06:57:41 PM UTC 24 Sep 24 06:58:21 PM UTC 24 25868800 ps
T948 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_rw_evict.1275877022 Sep 24 06:57:37 PM UTC 24 Sep 24 06:58:21 PM UTC 24 65511100 ps
T949 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_rw_evict_all_en.3195021478 Sep 24 06:57:41 PM UTC 24 Sep 24 06:58:23 PM UTC 24 29924600 ps
T950 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/28.flash_ctrl_smoke.2036469430 Sep 24 06:53:07 PM UTC 24 Sep 24 06:58:26 PM UTC 24 30787700 ps
T951 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_hw_sec_otp.4164300372 Sep 24 06:56:37 PM UTC 24 Sep 24 06:58:35 PM UTC 24 3953507200 ps
T952 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/16.flash_ctrl_hw_rma_reset.2177762612 Sep 24 06:40:18 PM UTC 24 Sep 24 06:58:36 PM UTC 24 350258716900 ps
T953 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_intr_rd.766045462 Sep 24 06:55:40 PM UTC 24 Sep 24 06:58:37 PM UTC 24 749670100 ps
T954 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_alert_test.3987456713 Sep 24 06:58:18 PM UTC 24 Sep 24 06:58:38 PM UTC 24 30122000 ps
T955 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_disable.3266376390 Sep 24 06:58:11 PM UTC 24 Sep 24 06:58:40 PM UTC 24 11189900 ps
T956 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_connect.2344401845 Sep 24 06:58:15 PM UTC 24 Sep 24 06:58:40 PM UTC 24 18627400 ps
T957 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/29.flash_ctrl_intr_rd_slow_flash.1367892513 Sep 24 06:53:52 PM UTC 24 Sep 24 06:58:42 PM UTC 24 22118289500 ps
T958 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/17.flash_ctrl_rand_ops.2031710751 Sep 24 06:42:18 PM UTC 24 Sep 24 06:58:45 PM UTC 24 2962243700 ps
T959 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_otp_reset.3955561713 Sep 24 06:55:38 PM UTC 24 Sep 24 06:58:45 PM UTC 24 37588800 ps
T960 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_sec_info_access.3795185658 Sep 24 06:57:24 PM UTC 24 Sep 24 06:58:46 PM UTC 24 4372375400 ps
T961 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_intr_rd.1673277717 Sep 24 06:54:53 PM UTC 24 Sep 24 06:58:47 PM UTC 24 7271959500 ps
T375 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_rw_evict.2796460068 Sep 24 06:58:06 PM UTC 24 Sep 24 06:58:48 PM UTC 24 261965400 ps
T962 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_smoke.1859094271 Sep 24 06:56:35 PM UTC 24 Sep 24 06:58:49 PM UTC 24 62924400 ps
T963 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_sec_info_access.4253834858 Sep 24 06:57:41 PM UTC 24 Sep 24 06:58:57 PM UTC 24 8705264600 ps
T964 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/31.flash_ctrl_intr_rd_slow_flash.45809494 Sep 24 06:54:56 PM UTC 24 Sep 24 06:58:59 PM UTC 24 64483093400 ps
T965 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_smoke.634856693 Sep 24 06:57:27 PM UTC 24 Sep 24 06:59:00 PM UTC 24 66582200 ps
T966 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_connect.3668371731 Sep 24 06:58:41 PM UTC 24 Sep 24 06:59:00 PM UTC 24 15701000 ps
T967 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_rw_evict_all_en.1570352668 Sep 24 06:58:07 PM UTC 24 Sep 24 06:59:05 PM UTC 24 288757900 ps
T968 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_disable.2104230465 Sep 24 06:58:39 PM UTC 24 Sep 24 06:59:08 PM UTC 24 25221200 ps
T969 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/30.flash_ctrl_intr_rd.1305529301 Sep 24 06:54:17 PM UTC 24 Sep 24 06:59:09 PM UTC 24 6002274900 ps
T970 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_intr_rd.2104609461 Sep 24 06:56:43 PM UTC 24 Sep 24 06:59:10 PM UTC 24 529747200 ps
T971 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/32.flash_ctrl_intr_rd_slow_flash.660774880 Sep 24 06:55:19 PM UTC 24 Sep 24 06:59:11 PM UTC 24 15719350600 ps
T972 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_hw_sec_otp.1982091259 Sep 24 06:56:08 PM UTC 24 Sep 24 06:59:11 PM UTC 24 17116437600 ps
T973 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_connect.2058446290 Sep 24 06:58:50 PM UTC 24 Sep 24 06:59:14 PM UTC 24 14242400 ps
T974 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_alert_test.717841978 Sep 24 06:58:43 PM UTC 24 Sep 24 06:59:15 PM UTC 24 550196300 ps
T975 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_rw_evict.2216164442 Sep 24 06:58:37 PM UTC 24 Sep 24 06:59:16 PM UTC 24 31287300 ps
T976 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_alert_test.3241387545 Sep 24 06:58:57 PM UTC 24 Sep 24 06:59:19 PM UTC 24 33933300 ps
T977 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_rw_evict_all_en.4093910431 Sep 24 06:58:39 PM UTC 24 Sep 24 06:59:19 PM UTC 24 26083300 ps
T978 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_intr_rd.1961923108 Sep 24 06:56:12 PM UTC 24 Sep 24 06:59:22 PM UTC 24 2728364000 ps
T979 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_disable.1610716031 Sep 24 06:58:48 PM UTC 24 Sep 24 06:59:26 PM UTC 24 29469400 ps
T324 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_hw_sec_otp.2231917615 Sep 24 06:57:27 PM UTC 24 Sep 24 06:59:30 PM UTC 24 13267943900 ps
T980 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_connect.2722473214 Sep 24 06:59:10 PM UTC 24 Sep 24 06:59:31 PM UTC 24 15832700 ps
T981 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_alert_test.3954306340 Sep 24 06:59:11 PM UTC 24 Sep 24 06:59:33 PM UTC 24 50097200 ps
T412 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_sec_info_access.3491298095 Sep 24 06:58:12 PM UTC 24 Sep 24 06:59:37 PM UTC 24 1993080300 ps
T982 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_hw_sec_otp.890629750 Sep 24 06:58:22 PM UTC 24 Sep 24 06:59:44 PM UTC 24 3349632000 ps
T983 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_otp_reset.231872980 Sep 24 06:56:41 PM UTC 24 Sep 24 06:59:45 PM UTC 24 38002000 ps
T984 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_otp_reset.3153567700 Sep 24 06:56:09 PM UTC 24 Sep 24 06:59:45 PM UTC 24 140974300 ps
T985 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_disable.3231205508 Sep 24 06:59:07 PM UTC 24 Sep 24 06:59:47 PM UTC 24 17787300 ps
T986 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_alert_test.2479839170 Sep 24 06:59:21 PM UTC 24 Sep 24 06:59:48 PM UTC 24 82264400 ps
T987 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_disable.327916154 Sep 24 06:59:16 PM UTC 24 Sep 24 06:59:48 PM UTC 24 10228000 ps
T988 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_connect.936558562 Sep 24 06:59:20 PM UTC 24 Sep 24 06:59:49 PM UTC 24 14156000 ps
T989 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_connect.493394563 Sep 24 06:59:38 PM UTC 24 Sep 24 06:59:56 PM UTC 24 29502800 ps
T990 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_smoke.1405113707 Sep 24 06:57:47 PM UTC 24 Sep 24 07:00:00 PM UTC 24 116637700 ps
T991 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_error_mp.4263405124 Sep 24 06:01:57 PM UTC 24 Sep 24 07:00:00 PM UTC 24 9331910000 ps
T992 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_sec_info_access.195371404 Sep 24 06:58:40 PM UTC 24 Sep 24 07:00:02 PM UTC 24 587437900 ps
T993 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/15.flash_ctrl_rand_ops.3827847602 Sep 24 06:38:09 PM UTC 24 Sep 24 07:00:04 PM UTC 24 8615493000 ps
T994 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_alert_test.996758903 Sep 24 06:59:45 PM UTC 24 Sep 24 07:00:04 PM UTC 24 43283900 ps
T995 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_sec_info_access.3280106968 Sep 24 06:58:49 PM UTC 24 Sep 24 07:00:06 PM UTC 24 3666369100 ps
T996 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_disable.565946348 Sep 24 06:59:32 PM UTC 24 Sep 24 07:00:07 PM UTC 24 28394700 ps
T997 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_intr_rd_slow_flash.205233468 Sep 24 06:57:15 PM UTC 24 Sep 24 07:00:15 PM UTC 24 22963083800 ps
T998 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/18.flash_ctrl_hw_rma_reset.2294259644 Sep 24 06:44:20 PM UTC 24 Sep 24 07:00:15 PM UTC 24 40122073600 ps
T999 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_connect.566899381 Sep 24 06:59:50 PM UTC 24 Sep 24 07:00:17 PM UTC 24 47265400 ps
T1000 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_otp_reset.243012523 Sep 24 06:57:11 PM UTC 24 Sep 24 07:00:19 PM UTC 24 137372700 ps
T1001 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_alert_test.1656303821 Sep 24 06:59:58 PM UTC 24 Sep 24 07:00:19 PM UTC 24 105122800 ps
T1002 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_intr_rd_slow_flash.1506351250 Sep 24 06:57:36 PM UTC 24 Sep 24 07:00:22 PM UTC 24 10276129600 ps
T1003 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_hw_sec_otp.289463906 Sep 24 06:59:02 PM UTC 24 Sep 24 07:00:24 PM UTC 24 3319354900 ps
T1004 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_hw_sec_otp.3287041163 Sep 24 06:59:12 PM UTC 24 Sep 24 07:00:24 PM UTC 24 3530683900 ps
T1005 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_disable.994987328 Sep 24 06:59:49 PM UTC 24 Sep 24 07:00:26 PM UTC 24 10006200 ps
T1006 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_alert_test.3057616966 Sep 24 07:00:08 PM UTC 24 Sep 24 07:00:34 PM UTC 24 88395400 ps
T1007 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_disable.2778067532 Sep 24 07:00:07 PM UTC 24 Sep 24 07:00:38 PM UTC 24 10656700 ps
T1008 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_connect.3089452147 Sep 24 07:00:07 PM UTC 24 Sep 24 07:00:40 PM UTC 24 27336800 ps
T1009 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_intr_rd.222901818 Sep 24 06:57:14 PM UTC 24 Sep 24 07:00:42 PM UTC 24 3456130600 ps
T1010 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_intr_rd.2308128283 Sep 24 06:57:33 PM UTC 24 Sep 24 07:00:44 PM UTC 24 1615505200 ps
T1011 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_intr_rd.1881547335 Sep 24 06:58:26 PM UTC 24 Sep 24 07:00:44 PM UTC 24 8263334300 ps
T1012 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_connect.4262678028 Sep 24 07:00:23 PM UTC 24 Sep 24 07:00:46 PM UTC 24 26942300 ps
T1013 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_sec_info_access.4018769974 Sep 24 06:59:18 PM UTC 24 Sep 24 07:00:47 PM UTC 24 1107315400 ps
T1014 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_sec_info_access.2887148871 Sep 24 06:59:09 PM UTC 24 Sep 24 07:00:49 PM UTC 24 1453356100 ps
T1015 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_alert_test.994280049 Sep 24 07:00:24 PM UTC 24 Sep 24 07:00:58 PM UTC 24 71332600 ps
T1016 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_sec_info_access.3767190859 Sep 24 06:59:49 PM UTC 24 Sep 24 07:00:59 PM UTC 24 420309500 ps
T1017 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_alert_test.2440546651 Sep 24 07:00:44 PM UTC 24 Sep 24 07:01:02 PM UTC 24 80630400 ps
T1018 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/37.flash_ctrl_otp_reset.898775598 Sep 24 06:57:31 PM UTC 24 Sep 24 07:01:03 PM UTC 24 34526300 ps
T1019 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_otp_reset.3151788804 Sep 24 06:57:58 PM UTC 24 Sep 24 07:01:03 PM UTC 24 71326600 ps
T406 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_disable.4175095031 Sep 24 07:00:19 PM UTC 24 Sep 24 07:01:04 PM UTC 24 37713100 ps
T1020 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/34.flash_ctrl_intr_rd_slow_flash.3925484425 Sep 24 06:56:15 PM UTC 24 Sep 24 07:01:07 PM UTC 24 24327910900 ps
T439 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_sec_info_access.2261601175 Sep 24 06:59:33 PM UTC 24 Sep 24 07:01:09 PM UTC 24 1573334600 ps
T1021 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_hw_sec_otp.772405313 Sep 24 06:57:10 PM UTC 24 Sep 24 07:01:14 PM UTC 24 3318040300 ps
T1022 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_connect.336374942 Sep 24 07:00:43 PM UTC 24 Sep 24 07:01:14 PM UTC 24 25194400 ps
T1023 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/33.flash_ctrl_intr_rd_slow_flash.4035250058 Sep 24 06:55:44 PM UTC 24 Sep 24 07:01:17 PM UTC 24 12178709500 ps
T1024 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_smoke.3152028261 Sep 24 06:59:00 PM UTC 24 Sep 24 07:01:17 PM UTC 24 29498900 ps
T407 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_disable.1255491603 Sep 24 07:00:39 PM UTC 24 Sep 24 07:01:17 PM UTC 24 14213800 ps
T1025 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_otp_reset.304745983 Sep 24 06:58:23 PM UTC 24 Sep 24 07:01:19 PM UTC 24 39017500 ps
T1026 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/39.flash_ctrl_smoke.1875082449 Sep 24 06:58:22 PM UTC 24 Sep 24 07:01:23 PM UTC 24 36134600 ps
T1027 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_connect.2924631276 Sep 24 07:00:59 PM UTC 24 Sep 24 07:01:23 PM UTC 24 111491000 ps
T321 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_hw_sec_otp.773878382 Sep 24 06:58:46 PM UTC 24 Sep 24 07:01:23 PM UTC 24 18285196700 ps
T1028 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_alert_test.2719142588 Sep 24 07:01:03 PM UTC 24 Sep 24 07:01:27 PM UTC 24 53675300 ps
T1029 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_disable.905337016 Sep 24 07:00:49 PM UTC 24 Sep 24 07:01:28 PM UTC 24 28049000 ps
T1030 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/40.flash_ctrl_otp_reset.3104945373 Sep 24 06:58:47 PM UTC 24 Sep 24 07:01:30 PM UTC 24 40215400 ps
T1031 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_hw_sec_otp.1764023711 Sep 24 06:57:57 PM UTC 24 Sep 24 07:01:31 PM UTC 24 4359089200 ps
T1032 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/36.flash_ctrl_smoke.2738340058 Sep 24 06:57:05 PM UTC 24 Sep 24 07:01:31 PM UTC 24 26578300 ps
T1033 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_sec_info_access.1664011036 Sep 24 07:00:07 PM UTC 24 Sep 24 07:01:34 PM UTC 24 6908479300 ps
T1034 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_connect.2963645229 Sep 24 07:01:14 PM UTC 24 Sep 24 07:01:35 PM UTC 24 54175700 ps
T1035 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_disable.1231252577 Sep 24 07:01:08 PM UTC 24 Sep 24 07:01:35 PM UTC 24 10274800 ps
T1036 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/19.flash_ctrl_hw_rma_reset.1246834912 Sep 24 06:46:15 PM UTC 24 Sep 24 07:01:35 PM UTC 24 160159277600 ps
T1037 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_intr_rd.2803291821 Sep 24 06:57:59 PM UTC 24 Sep 24 07:01:37 PM UTC 24 3217587300 ps
T1038 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_smoke.3597583454 Sep 24 06:59:11 PM UTC 24 Sep 24 07:01:40 PM UTC 24 258096100 ps
T1039 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_hw_sec_otp.300895887 Sep 24 06:59:27 PM UTC 24 Sep 24 07:01:40 PM UTC 24 14824502900 ps
T1040 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/50.flash_ctrl_connect.3204555323 Sep 24 07:01:17 PM UTC 24 Sep 24 07:01:41 PM UTC 24 17223000 ps
T1041 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_alert_test.1189946931 Sep 24 07:01:14 PM UTC 24 Sep 24 07:01:46 PM UTC 24 81858500 ps
T1042 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/52.flash_ctrl_connect.540378013 Sep 24 07:01:24 PM UTC 24 Sep 24 07:01:51 PM UTC 24 42463600 ps
T1043 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/51.flash_ctrl_connect.1848023778 Sep 24 07:01:20 PM UTC 24 Sep 24 07:01:51 PM UTC 24 89854400 ps
T1044 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_hw_sec_otp.93652602 Sep 24 07:00:17 PM UTC 24 Sep 24 07:01:52 PM UTC 24 2083445800 ps
T1045 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/57.flash_ctrl_connect.4093241776 Sep 24 07:01:36 PM UTC 24 Sep 24 07:01:56 PM UTC 24 28549000 ps
T1046 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_smoke.3571471505 Sep 24 07:00:25 PM UTC 24 Sep 24 07:01:59 PM UTC 24 28686300 ps
T1047 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/55.flash_ctrl_connect.1503063611 Sep 24 07:01:33 PM UTC 24 Sep 24 07:01:59 PM UTC 24 45153800 ps
T1048 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_sec_info_access.3473309855 Sep 24 07:00:41 PM UTC 24 Sep 24 07:02:00 PM UTC 24 1072066200 ps
T1049 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/54.flash_ctrl_connect.4167152714 Sep 24 07:01:32 PM UTC 24 Sep 24 07:02:00 PM UTC 24 14072800 ps
T1050 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/38.flash_ctrl_intr_rd_slow_flash.3002072207 Sep 24 06:58:05 PM UTC 24 Sep 24 07:02:01 PM UTC 24 41103576600 ps
T1051 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/53.flash_ctrl_connect.105342775 Sep 24 07:01:27 PM UTC 24 Sep 24 07:02:02 PM UTC 24 13682200 ps
T1052 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/41.flash_ctrl_otp_reset.909004056 Sep 24 06:59:02 PM UTC 24 Sep 24 07:02:04 PM UTC 24 150171600 ps
T1053 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/56.flash_ctrl_connect.2954357822 Sep 24 07:01:35 PM UTC 24 Sep 24 07:02:05 PM UTC 24 132743800 ps
T1054 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/60.flash_ctrl_connect.4062202241 Sep 24 07:01:47 PM UTC 24 Sep 24 07:02:06 PM UTC 24 14575800 ps
T1055 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/58.flash_ctrl_connect.3500377266 Sep 24 07:01:41 PM UTC 24 Sep 24 07:02:06 PM UTC 24 28164100 ps
T1056 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_otp_reset.1007481404 Sep 24 06:59:31 PM UTC 24 Sep 24 07:02:08 PM UTC 24 78275000 ps
T1057 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/59.flash_ctrl_connect.627631457 Sep 24 07:01:41 PM UTC 24 Sep 24 07:02:09 PM UTC 24 54134100 ps
T1058 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_hw_sec_otp.495849583 Sep 24 06:59:46 PM UTC 24 Sep 24 07:02:11 PM UTC 24 5156239000 ps
T1059 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/61.flash_ctrl_connect.2270366478 Sep 24 07:01:53 PM UTC 24 Sep 24 07:02:12 PM UTC 24 25416500 ps
T1060 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_sec_info_access.1103055959 Sep 24 07:00:19 PM UTC 24 Sep 24 07:02:13 PM UTC 24 36660348600 ps
T1061 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/43.flash_ctrl_smoke.465659695 Sep 24 06:59:23 PM UTC 24 Sep 24 07:02:13 PM UTC 24 19021400 ps
T1062 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/44.flash_ctrl_otp_reset.1711622783 Sep 24 06:59:48 PM UTC 24 Sep 24 07:02:18 PM UTC 24 84889700 ps
T1063 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/62.flash_ctrl_connect.1035728872 Sep 24 07:01:57 PM UTC 24 Sep 24 07:02:18 PM UTC 24 73679400 ps
T415 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_sec_info_access.2062643862 Sep 24 07:00:58 PM UTC 24 Sep 24 07:02:22 PM UTC 24 1694338700 ps
T1064 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/63.flash_ctrl_connect.4151512505 Sep 24 07:02:00 PM UTC 24 Sep 24 07:02:23 PM UTC 24 42078000 ps
T113 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/35.flash_ctrl_intr_rd_slow_flash.2480800308 Sep 24 06:56:49 PM UTC 24 Sep 24 07:02:24 PM UTC 24 12713068700 ps
T1065 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/64.flash_ctrl_connect.3621136048 Sep 24 07:02:01 PM UTC 24 Sep 24 07:02:25 PM UTC 24 38559900 ps
T1066 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_sec_info_access.120483876 Sep 24 07:01:10 PM UTC 24 Sep 24 07:02:27 PM UTC 24 596003900 ps
T1067 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/65.flash_ctrl_connect.4130126088 Sep 24 07:02:02 PM UTC 24 Sep 24 07:02:29 PM UTC 24 15022100 ps
T1068 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/66.flash_ctrl_connect.3930814269 Sep 24 07:02:05 PM UTC 24 Sep 24 07:02:29 PM UTC 24 47615200 ps
T1069 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/67.flash_ctrl_connect.3154148767 Sep 24 07:02:08 PM UTC 24 Sep 24 07:02:31 PM UTC 24 26222600 ps
T1070 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/68.flash_ctrl_connect.3439834233 Sep 24 07:02:10 PM UTC 24 Sep 24 07:02:32 PM UTC 24 42872600 ps
T1071 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/49.flash_ctrl_hw_sec_otp.1667313765 Sep 24 07:01:05 PM UTC 24 Sep 24 07:02:38 PM UTC 24 2413854900 ps
T1072 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/70.flash_ctrl_connect.768116736 Sep 24 07:02:15 PM UTC 24 Sep 24 07:02:39 PM UTC 24 14079200 ps
T1073 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/71.flash_ctrl_connect.3082515454 Sep 24 07:02:19 PM UTC 24 Sep 24 07:02:40 PM UTC 24 16062900 ps
T1074 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/42.flash_ctrl_otp_reset.2113424032 Sep 24 06:59:15 PM UTC 24 Sep 24 07:02:42 PM UTC 24 41392000 ps
T1075 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/69.flash_ctrl_connect.3865288557 Sep 24 07:02:13 PM UTC 24 Sep 24 07:02:43 PM UTC 24 15756900 ps
T1076 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/46.flash_ctrl_smoke.2505546041 Sep 24 07:00:16 PM UTC 24 Sep 24 07:02:45 PM UTC 24 47065800 ps
T1077 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_hw_sec_otp.2339065703 Sep 24 07:00:47 PM UTC 24 Sep 24 07:02:46 PM UTC 24 1361316300 ps
T1078 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/72.flash_ctrl_connect.869914228 Sep 24 07:02:24 PM UTC 24 Sep 24 07:02:49 PM UTC 24 47878700 ps
T1079 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/73.flash_ctrl_connect.750983626 Sep 24 07:02:26 PM UTC 24 Sep 24 07:02:50 PM UTC 24 28734000 ps
T1080 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/47.flash_ctrl_otp_reset.2753208820 Sep 24 07:00:35 PM UTC 24 Sep 24 07:02:50 PM UTC 24 70763300 ps
T1081 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/74.flash_ctrl_connect.784533504 Sep 24 07:02:30 PM UTC 24 Sep 24 07:02:55 PM UTC 24 41364100 ps
T1082 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/75.flash_ctrl_connect.95895117 Sep 24 07:02:32 PM UTC 24 Sep 24 07:03:01 PM UTC 24 45124600 ps
T1083 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_otp_reset.1830414456 Sep 24 07:00:07 PM UTC 24 Sep 24 07:03:05 PM UTC 24 36852500 ps
T1084 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/76.flash_ctrl_connect.2608411830 Sep 24 07:02:39 PM UTC 24 Sep 24 07:03:05 PM UTC 24 38279400 ps
T1085 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/45.flash_ctrl_smoke.1824909201 Sep 24 07:00:01 PM UTC 24 Sep 24 07:03:08 PM UTC 24 72452000 ps
T1086 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/79.flash_ctrl_connect.1949814904 Sep 24 07:02:47 PM UTC 24 Sep 24 07:03:08 PM UTC 24 54137600 ps
T1087 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/77.flash_ctrl_connect.365428682 Sep 24 07:02:41 PM UTC 24 Sep 24 07:03:08 PM UTC 24 25121000 ps
T1088 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/78.flash_ctrl_connect.439308444 Sep 24 07:02:44 PM UTC 24 Sep 24 07:03:10 PM UTC 24 14645700 ps
T216 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_full_mem_access.4259819609 Sep 24 05:55:12 PM UTC 24 Sep 24 07:03:23 PM UTC 24 48914286300 ps
T1089 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_full_mem_access.276085991 Sep 24 05:47:41 PM UTC 24 Sep 24 07:03:28 PM UTC 24 271945620400 ps
T1090 /workspaces/repo/scratch/os_regression_2024_09_23/flash_ctrl-sim-vcs/coverage/default/48.flash_ctrl_otp_reset.844155385 Sep 24 07:00:48 PM UTC 24 Sep 24 07:03:33 PM UTC 24 77764100 ps
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