| T482 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_rand_ops.941102080 |
|
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Oct 09 07:43:22 PM UTC 24 |
Oct 09 07:49:40 PM UTC 24 |
143213500 ps |
| T268 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_hw_prog_rma_wipe_err.1041880081 |
|
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Oct 09 07:48:20 PM UTC 24 |
Oct 09 07:49:51 PM UTC 24 |
10019636600 ps |
| T394 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_rw_serr.1034922622 |
|
|
Oct 09 07:45:12 PM UTC 24 |
Oct 09 07:49:54 PM UTC 24 |
1802125800 ps |
| T483 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_phy_arb.1510195469 |
|
|
Oct 09 07:39:41 PM UTC 24 |
Oct 09 07:50:13 PM UTC 24 |
2113225500 ps |
| T484 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_intr_wr_slow_flash.3033698285 |
|
|
Oct 09 07:46:33 PM UTC 24 |
Oct 09 07:50:15 PM UTC 24 |
74905866000 ps |
| T485 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_hw_sec_otp.1270510432 |
|
|
Oct 09 07:48:31 PM UTC 24 |
Oct 09 07:50:30 PM UTC 24 |
3621022700 ps |
| T486 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_invalid_op.782052137 |
|
|
Oct 09 07:49:06 PM UTC 24 |
Oct 09 07:50:47 PM UTC 24 |
3129648100 ps |
| T487 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_ro.3386728938 |
|
|
Oct 09 07:49:34 PM UTC 24 |
Oct 09 07:51:12 PM UTC 24 |
1906408000 ps |
| T307 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_intr_rd_slow_flash.1200652850 |
|
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Oct 09 07:46:29 PM UTC 24 |
Oct 09 07:51:22 PM UTC 24 |
36165713900 ps |
| T132 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_hw_rma.316576413 |
|
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Oct 09 07:17:17 PM UTC 24 |
Oct 09 07:51:27 PM UTC 24 |
104097729600 ps |
| T488 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_phy_arb.3115003328 |
|
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Oct 09 07:43:27 PM UTC 24 |
Oct 09 07:51:29 PM UTC 24 |
751832800 ps |
| T489 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_integrity.2463159229 |
|
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Oct 09 07:41:38 PM UTC 24 |
Oct 09 07:51:38 PM UTC 24 |
17250385500 ps |
| T490 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_smoke.975366025 |
|
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Oct 09 07:48:21 PM UTC 24 |
Oct 09 07:51:45 PM UTC 24 |
231986100 ps |
| T491 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_stress_all.486957075 |
|
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Oct 09 07:42:35 PM UTC 24 |
Oct 09 07:51:46 PM UTC 24 |
198805300 ps |
| T492 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_intr_wr.3778800448 |
|
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Oct 09 07:50:17 PM UTC 24 |
Oct 09 07:52:03 PM UTC 24 |
15388022900 ps |
| T493 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rw_evict_all_en.1178204484 |
|
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Oct 09 07:51:29 PM UTC 24 |
Oct 09 07:52:07 PM UTC 24 |
41579400 ps |
| T418 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rw_evict.1911680678 |
|
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Oct 09 07:51:22 PM UTC 24 |
Oct 09 07:52:07 PM UTC 24 |
52065100 ps |
| T494 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_ro_derr.318582564 |
|
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Oct 09 07:49:52 PM UTC 24 |
Oct 09 07:52:11 PM UTC 24 |
484793300 ps |
| T103 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_connect.1909072127 |
|
|
Oct 09 07:51:47 PM UTC 24 |
Oct 09 07:52:16 PM UTC 24 |
47386000 ps |
| T177 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_disable.2136538368 |
|
|
Oct 09 07:51:39 PM UTC 24 |
Oct 09 07:52:16 PM UTC 24 |
10568600 ps |
| T495 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_ro_serr.2271459623 |
|
|
Oct 09 07:49:38 PM UTC 24 |
Oct 09 07:52:24 PM UTC 24 |
9859724800 ps |
| T247 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_re_evict.3513370040 |
|
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Oct 09 07:51:30 PM UTC 24 |
Oct 09 07:52:24 PM UTC 24 |
83045400 ps |
| T496 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_lcmgr_intg.1818676499 |
|
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Oct 09 07:52:03 PM UTC 24 |
Oct 09 07:52:27 PM UTC 24 |
45295900 ps |
| T497 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_hw_read_seed_err.3949231268 |
|
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Oct 09 07:52:08 PM UTC 24 |
Oct 09 07:52:34 PM UTC 24 |
15328300 ps |
| T299 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_alert_test.2261397806 |
|
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Oct 09 07:52:12 PM UTC 24 |
Oct 09 07:52:39 PM UTC 24 |
133198900 ps |
| T161 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/1.flash_ctrl_rma_err.2182405373 |
|
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Oct 09 07:31:09 PM UTC 24 |
Oct 09 07:52:45 PM UTC 24 |
84816935700 ps |
| T498 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_wo.1914455909 |
|
|
Oct 09 07:49:25 PM UTC 24 |
Oct 09 07:52:52 PM UTC 24 |
2052047900 ps |
| T266 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_hw_prog_rma_wipe_err.1480281286 |
|
|
Oct 09 07:52:08 PM UTC 24 |
Oct 09 07:53:04 PM UTC 24 |
10040092800 ps |
| T376 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_sec_info_access.2812312002 |
|
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Oct 09 07:51:46 PM UTC 24 |
Oct 09 07:53:09 PM UTC 24 |
4534009900 ps |
| T174 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_otp_reset.63093161 |
|
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Oct 09 07:48:35 PM UTC 24 |
Oct 09 07:53:16 PM UTC 24 |
76313800 ps |
| T290 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_hw_sec_otp.1110894756 |
|
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Oct 09 07:52:25 PM UTC 24 |
Oct 09 07:53:18 PM UTC 24 |
984457600 ps |
| T329 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_intr_rd.1162733696 |
|
|
Oct 09 07:50:13 PM UTC 24 |
Oct 09 07:53:24 PM UTC 24 |
927649600 ps |
| T65 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_fetch_code.1959864729 |
|
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Oct 09 07:52:45 PM UTC 24 |
Oct 09 07:53:25 PM UTC 24 |
844599400 ps |
| T499 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_intr_rd_slow_flash.22605293 |
|
|
Oct 09 07:50:31 PM UTC 24 |
Oct 09 07:53:57 PM UTC 24 |
5479566800 ps |
| T87 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_mp_regions.195760451 |
|
|
Oct 09 07:48:36 PM UTC 24 |
Oct 09 07:54:10 PM UTC 24 |
89301411500 ps |
| T500 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_invalid_op.2680355980 |
|
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Oct 09 07:53:10 PM UTC 24 |
Oct 09 07:54:13 PM UTC 24 |
3603994700 ps |
| T501 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rw_derr.2445861321 |
|
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Oct 09 07:49:54 PM UTC 24 |
Oct 09 07:54:16 PM UTC 24 |
1838845300 ps |
| T395 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rw_serr.3078081344 |
|
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Oct 09 07:49:41 PM UTC 24 |
Oct 09 07:54:17 PM UTC 24 |
7972747900 ps |
| T502 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_smoke.2292251894 |
|
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Oct 09 07:52:18 PM UTC 24 |
Oct 09 07:54:45 PM UTC 24 |
25296100 ps |
| T503 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_prog_reset.1615322534 |
|
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Oct 09 07:51:12 PM UTC 24 |
Oct 09 07:54:50 PM UTC 24 |
2636236100 ps |
| T504 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_integrity.4195090745 |
|
|
Oct 09 07:45:57 PM UTC 24 |
Oct 09 07:54:58 PM UTC 24 |
56972849100 ps |
| T505 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_ro.2666708957 |
|
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Oct 09 07:53:19 PM UTC 24 |
Oct 09 07:55:16 PM UTC 24 |
3340814000 ps |
| T313 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_prog_reset.1543416806 |
|
|
Oct 09 07:54:59 PM UTC 24 |
Oct 09 07:55:27 PM UTC 24 |
34305000 ps |
| T175 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_otp_reset.941135569 |
|
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Oct 09 07:52:35 PM UTC 24 |
Oct 09 07:55:44 PM UTC 24 |
601089300 ps |
| T506 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_ro_derr.3938657093 |
|
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Oct 09 07:54:12 PM UTC 24 |
Oct 09 07:56:08 PM UTC 24 |
2457766800 ps |
| T163 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_hw_rma_reset.2597410211 |
|
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Oct 09 07:33:37 PM UTC 24 |
Oct 09 07:56:13 PM UTC 24 |
160176571200 ps |
| T507 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rw_evict.4116877581 |
|
|
Oct 09 07:55:17 PM UTC 24 |
Oct 09 07:56:14 PM UTC 24 |
44599100 ps |
| T508 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_ro_serr.1154948856 |
|
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Oct 09 07:53:26 PM UTC 24 |
Oct 09 07:56:20 PM UTC 24 |
1384479200 ps |
| T419 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rw_evict_all_en.3663185776 |
|
|
Oct 09 07:55:28 PM UTC 24 |
Oct 09 07:56:23 PM UTC 24 |
106813700 ps |
| T509 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_intr_wr.3380086465 |
|
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Oct 09 07:54:18 PM UTC 24 |
Oct 09 07:56:29 PM UTC 24 |
13134434600 ps |
| T401 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_re_evict.2746212022 |
|
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Oct 09 07:55:45 PM UTC 24 |
Oct 09 07:56:32 PM UTC 24 |
75415900 ps |
| T510 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_wo.4051738185 |
|
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Oct 09 07:53:18 PM UTC 24 |
Oct 09 07:56:34 PM UTC 24 |
8246364500 ps |
| T511 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_connect.3508828889 |
|
|
Oct 09 07:56:15 PM UTC 24 |
Oct 09 07:56:39 PM UTC 24 |
16464000 ps |
| T512 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_lcmgr_intg.3026054801 |
|
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Oct 09 07:56:22 PM UTC 24 |
Oct 09 07:56:47 PM UTC 24 |
20420500 ps |
| T178 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_disable.4097080617 |
|
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Oct 09 07:56:09 PM UTC 24 |
Oct 09 07:56:48 PM UTC 24 |
10957300 ps |
| T265 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_hw_read_seed_err.1058840257 |
|
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Oct 09 07:56:25 PM UTC 24 |
Oct 09 07:56:51 PM UTC 24 |
15902900 ps |
| T275 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_error_prog_win.3107638104 |
|
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Oct 09 07:36:26 PM UTC 24 |
Oct 09 07:56:52 PM UTC 24 |
2537463100 ps |
| T513 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rw_derr.811713435 |
|
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Oct 09 07:54:14 PM UTC 24 |
Oct 09 07:56:58 PM UTC 24 |
1137034000 ps |
| T514 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_alert_test.3328670595 |
|
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Oct 09 07:56:33 PM UTC 24 |
Oct 09 07:57:00 PM UTC 24 |
48500500 ps |
| T515 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rw.1477801494 |
|
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Oct 09 07:49:35 PM UTC 24 |
Oct 09 07:57:08 PM UTC 24 |
3323897100 ps |
| T179 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_hw_rma_reset.3240789297 |
|
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Oct 09 07:43:30 PM UTC 24 |
Oct 09 07:57:17 PM UTC 24 |
40125556500 ps |
| T516 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rw_serr.445817991 |
|
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Oct 09 07:53:58 PM UTC 24 |
Oct 09 07:57:19 PM UTC 24 |
4855608200 ps |
| T367 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_sec_info_access.836436902 |
|
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Oct 09 07:56:14 PM UTC 24 |
Oct 09 07:57:40 PM UTC 24 |
3629792300 ps |
| T312 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_fetch_code.2924581390 |
|
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Oct 09 07:57:01 PM UTC 24 |
Oct 09 07:57:43 PM UTC 24 |
142470200 ps |
| T517 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_hw_prog_rma_wipe_err.2588321948 |
|
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Oct 09 07:56:30 PM UTC 24 |
Oct 09 07:57:56 PM UTC 24 |
10018094800 ps |
| T518 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_smoke.4088420867 |
|
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Oct 09 07:56:35 PM UTC 24 |
Oct 09 07:58:02 PM UTC 24 |
24570000 ps |
| T162 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_rma_err.1476870872 |
|
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Oct 09 07:39:13 PM UTC 24 |
Oct 09 07:58:08 PM UTC 24 |
43436625600 ps |
| T180 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_hw_rma_reset.1325271600 |
|
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Oct 09 07:39:46 PM UTC 24 |
Oct 09 07:58:15 PM UTC 24 |
160158766300 ps |
| T519 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_phy_arb.3367780912 |
|
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Oct 09 07:48:27 PM UTC 24 |
Oct 09 07:58:26 PM UTC 24 |
75222300 ps |
| T44 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_intr_rd.3979296257 |
|
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Oct 09 07:54:17 PM UTC 24 |
Oct 09 07:58:30 PM UTC 24 |
1955518800 ps |
| T520 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_intr_wr_slow_flash.302442505 |
|
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Oct 09 07:54:51 PM UTC 24 |
Oct 09 07:58:31 PM UTC 24 |
44171815700 ps |
| T521 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_invalid_op.2414569744 |
|
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Oct 09 07:57:19 PM UTC 24 |
Oct 09 07:58:40 PM UTC 24 |
905508400 ps |
| T522 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_erase_suspend.1197263202 |
|
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Oct 09 07:43:29 PM UTC 24 |
Oct 09 07:58:40 PM UTC 24 |
4165977500 ps |
| T523 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_rand_ops.1768248752 |
|
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Oct 09 07:48:22 PM UTC 24 |
Oct 09 07:58:55 PM UTC 24 |
8269782400 ps |
| T133 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_host_ctrl_arb.1566856621 |
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Oct 09 07:05:19 PM UTC 24 |
Oct 09 07:59:03 PM UTC 24 |
269232861000 ps |
| T297 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_hw_sec_otp.1655039055 |
|
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Oct 09 07:56:49 PM UTC 24 |
Oct 09 07:59:22 PM UTC 24 |
7948560800 ps |
| T524 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_intr_rd_slow_flash.1616172760 |
|
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Oct 09 07:54:45 PM UTC 24 |
Oct 09 07:59:34 PM UTC 24 |
12352766500 ps |
| T409 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw_evict.1860179178 |
|
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Oct 09 07:59:05 PM UTC 24 |
Oct 09 07:59:41 PM UTC 24 |
93919800 ps |
| T525 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_ro.1450418470 |
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Oct 09 07:57:43 PM UTC 24 |
Oct 09 07:59:45 PM UTC 24 |
544370700 ps |
| T526 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_intr_wr.2551784919 |
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Oct 09 07:58:32 PM UTC 24 |
Oct 09 07:59:54 PM UTC 24 |
10064770600 ps |
| T88 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_mp_regions.4091097359 |
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Oct 09 07:43:34 PM UTC 24 |
Oct 09 07:59:57 PM UTC 24 |
49295307100 ps |
| T527 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_error_prog_win.392958890 |
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Oct 09 07:44:08 PM UTC 24 |
Oct 09 08:00:02 PM UTC 24 |
1364922900 ps |
| T528 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rw.1992754229 |
|
|
Oct 09 07:53:25 PM UTC 24 |
Oct 09 08:00:02 PM UTC 24 |
2970517900 ps |
| T413 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw_evict_all_en.999269436 |
|
|
Oct 09 07:59:23 PM UTC 24 |
Oct 09 08:00:10 PM UTC 24 |
71104900 ps |
| T529 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_wo.2232767379 |
|
|
Oct 09 07:57:40 PM UTC 24 |
Oct 09 08:00:12 PM UTC 24 |
2233245100 ps |
| T391 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_disable.575979880 |
|
|
Oct 09 07:59:41 PM UTC 24 |
Oct 09 08:00:14 PM UTC 24 |
15292100 ps |
| T530 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_connect.1884883743 |
|
|
Oct 09 07:59:56 PM UTC 24 |
Oct 09 08:00:23 PM UTC 24 |
16124600 ps |
| T531 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_lcmgr_intg.3483507498 |
|
|
Oct 09 07:59:58 PM UTC 24 |
Oct 09 08:00:26 PM UTC 24 |
58581300 ps |
| T532 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_ro_serr.1159122225 |
|
|
Oct 09 07:58:04 PM UTC 24 |
Oct 09 08:00:27 PM UTC 24 |
702730000 ps |
| T533 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_alert_test.745712114 |
|
|
Oct 09 08:00:11 PM UTC 24 |
Oct 09 08:00:28 PM UTC 24 |
30857600 ps |
| T402 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_re_evict.2338928117 |
|
|
Oct 09 07:59:35 PM UTC 24 |
Oct 09 08:00:29 PM UTC 24 |
231501100 ps |
| T534 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_intr_wr_slow_flash.572957771 |
|
|
Oct 09 07:50:48 PM UTC 24 |
Oct 09 08:00:31 PM UTC 24 |
423266468600 ps |
| T262 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_hw_read_seed_err.3331278156 |
|
|
Oct 09 08:00:09 PM UTC 24 |
Oct 09 08:00:34 PM UTC 24 |
15670600 ps |
| T92 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_otp_reset.105470467 |
|
|
Oct 09 07:56:53 PM UTC 24 |
Oct 09 08:00:36 PM UTC 24 |
52746400 ps |
| T535 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_ro_derr.2812884093 |
|
|
Oct 09 07:58:16 PM UTC 24 |
Oct 09 08:01:02 PM UTC 24 |
2715052300 ps |
| T363 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_sec_info_access.3599475581 |
|
|
Oct 09 07:59:45 PM UTC 24 |
Oct 09 08:01:11 PM UTC 24 |
4272278700 ps |
| T536 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_fetch_code.2838492739 |
|
|
Oct 09 08:00:32 PM UTC 24 |
Oct 09 08:01:12 PM UTC 24 |
1488319800 ps |
| T537 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_hw_prog_rma_wipe_err.2629093727 |
|
|
Oct 09 08:00:09 PM UTC 24 |
Oct 09 08:01:14 PM UTC 24 |
10041818000 ps |
| T136 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_mp_regions.3407610083 |
|
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Oct 09 07:52:40 PM UTC 24 |
Oct 09 08:01:16 PM UTC 24 |
54807077600 ps |
| T538 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_intr_rd.2308642739 |
|
|
Oct 09 07:58:31 PM UTC 24 |
Oct 09 08:01:55 PM UTC 24 |
3060418800 ps |
| T539 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw_derr.3705742609 |
|
|
Oct 09 07:58:27 PM UTC 24 |
Oct 09 08:02:06 PM UTC 24 |
4200098000 ps |
| T540 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_smoke.3429093692 |
|
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Oct 09 08:00:13 PM UTC 24 |
Oct 09 08:02:08 PM UTC 24 |
39810300 ps |
| T541 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/3.flash_ctrl_error_prog_win.1752886249 |
|
|
Oct 09 07:40:22 PM UTC 24 |
Oct 09 08:02:11 PM UTC 24 |
2524679900 ps |
| T542 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_prog_reset.4250981194 |
|
|
Oct 09 07:58:56 PM UTC 24 |
Oct 09 08:02:30 PM UTC 24 |
27077926300 ps |
| T543 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_invalid_op.3742377719 |
|
|
Oct 09 08:01:03 PM UTC 24 |
Oct 09 08:02:33 PM UTC 24 |
7026222600 ps |
| T544 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw_serr.4202161593 |
|
|
Oct 09 07:58:10 PM UTC 24 |
Oct 09 08:02:34 PM UTC 24 |
2192315600 ps |
| T545 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_sec_otp.348403257 |
|
|
Oct 09 08:00:27 PM UTC 24 |
Oct 09 08:02:49 PM UTC 24 |
2874371600 ps |
| T328 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_intr_rd_slow_flash.428230228 |
|
|
Oct 09 07:58:41 PM UTC 24 |
Oct 09 08:02:55 PM UTC 24 |
50109777300 ps |
| T546 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_ro.1062665062 |
|
|
Oct 09 08:01:13 PM UTC 24 |
Oct 09 08:03:03 PM UTC 24 |
1838081300 ps |
| T271 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_error_mp.3630346629 |
|
|
Oct 09 07:08:01 PM UTC 24 |
Oct 09 08:03:09 PM UTC 24 |
2471734800 ps |
| T164 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_hw_rma_reset.3729238281 |
|
|
Oct 09 07:48:35 PM UTC 24 |
Oct 09 08:03:40 PM UTC 24 |
60125602800 ps |
| T93 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_otp_reset.1936608728 |
|
|
Oct 09 08:00:28 PM UTC 24 |
Oct 09 08:03:43 PM UTC 24 |
39924300 ps |
| T315 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_intr_wr_slow_flash.1341152120 |
|
|
Oct 09 07:58:41 PM UTC 24 |
Oct 09 08:03:49 PM UTC 24 |
20723705000 ps |
| T405 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw_evict.2583204014 |
|
|
Oct 09 08:02:55 PM UTC 24 |
Oct 09 08:03:50 PM UTC 24 |
151140100 ps |
| T547 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_re_evict.2023256510 |
|
|
Oct 09 08:03:11 PM UTC 24 |
Oct 09 08:03:54 PM UTC 24 |
230352400 ps |
| T548 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_intr_wr.2766706690 |
|
|
Oct 09 08:02:31 PM UTC 24 |
Oct 09 08:03:57 PM UTC 24 |
4115413700 ps |
| T421 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw_evict_all_en.2409107139 |
|
|
Oct 09 08:03:03 PM UTC 24 |
Oct 09 08:04:05 PM UTC 24 |
50474600 ps |
| T309 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_lcmgr_intg.107594305 |
|
|
Oct 09 08:03:50 PM UTC 24 |
Oct 09 08:04:09 PM UTC 24 |
44470600 ps |
| T549 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_connect.2939780335 |
|
|
Oct 09 08:03:50 PM UTC 24 |
Oct 09 08:04:15 PM UTC 24 |
16060000 ps |
| T550 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_ro_serr.3001217126 |
|
|
Oct 09 08:01:18 PM UTC 24 |
Oct 09 08:04:19 PM UTC 24 |
1260449900 ps |
| T551 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_alert_test.3628916054 |
|
|
Oct 09 08:04:05 PM UTC 24 |
Oct 09 08:04:25 PM UTC 24 |
412052000 ps |
| T314 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_read_seed_err.875803868 |
|
|
Oct 09 08:03:55 PM UTC 24 |
Oct 09 08:04:26 PM UTC 24 |
19019900 ps |
| T118 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_disable.2210751719 |
|
|
Oct 09 08:03:41 PM UTC 24 |
Oct 09 08:04:28 PM UTC 24 |
10345300 ps |
| T552 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_phy_arb.3550078923 |
|
|
Oct 09 07:52:25 PM UTC 24 |
Oct 09 08:04:29 PM UTC 24 |
97374600 ps |
| T553 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_ro_derr.3738826080 |
|
|
Oct 09 08:02:07 PM UTC 24 |
Oct 09 08:04:46 PM UTC 24 |
770234300 ps |
| T364 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_sec_info_access.3052980630 |
|
|
Oct 09 08:03:44 PM UTC 24 |
Oct 09 08:05:13 PM UTC 24 |
1230486400 ps |
| T554 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_intr_wr_slow_flash.4026178498 |
|
|
Oct 09 08:02:35 PM UTC 24 |
Oct 09 08:05:16 PM UTC 24 |
35756993400 ps |
| T555 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_wo.3654217684 |
|
|
Oct 09 08:01:12 PM UTC 24 |
Oct 09 08:05:25 PM UTC 24 |
2540791700 ps |
| T251 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rw.261275736 |
|
|
Oct 09 07:57:57 PM UTC 24 |
Oct 09 08:05:28 PM UTC 24 |
3327948200 ps |
| T556 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_fetch_code.4267690134 |
|
|
Oct 09 08:04:47 PM UTC 24 |
Oct 09 08:05:29 PM UTC 24 |
159426500 ps |
| T334 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_intr_rd.1072674952 |
|
|
Oct 09 08:02:11 PM UTC 24 |
Oct 09 08:05:38 PM UTC 24 |
14711512000 ps |
| T557 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw_serr.3318436791 |
|
|
Oct 09 08:01:56 PM UTC 24 |
Oct 09 08:06:07 PM UTC 24 |
1295237100 ps |
| T558 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_prog_reset.2242418002 |
|
|
Oct 09 08:02:50 PM UTC 24 |
Oct 09 08:06:12 PM UTC 24 |
2139993700 ps |
| T137 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_mp_regions.452030574 |
|
|
Oct 09 08:00:30 PM UTC 24 |
Oct 09 08:06:24 PM UTC 24 |
10431639400 ps |
| T559 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_prog_rma_wipe_err.1241592492 |
|
|
Oct 09 08:03:58 PM UTC 24 |
Oct 09 08:06:26 PM UTC 24 |
10018732600 ps |
| T560 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw_derr.2911752073 |
|
|
Oct 09 08:02:08 PM UTC 24 |
Oct 09 08:06:44 PM UTC 24 |
9721945800 ps |
| T561 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_smoke.528535276 |
|
|
Oct 09 08:04:10 PM UTC 24 |
Oct 09 08:06:58 PM UTC 24 |
50268100 ps |
| T562 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_otp_reset.2209889689 |
|
|
Oct 09 08:04:28 PM UTC 24 |
Oct 09 08:06:59 PM UTC 24 |
78019200 ps |
| T300 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_sec_otp.230353016 |
|
|
Oct 09 08:04:26 PM UTC 24 |
Oct 09 08:07:05 PM UTC 24 |
17179880900 ps |
| T563 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_invalid_op.2567955910 |
|
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Oct 09 08:05:26 PM UTC 24 |
Oct 09 08:07:09 PM UTC 24 |
6342490700 ps |
| T564 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_mp_regions.1223656046 |
|
|
Oct 09 08:04:29 PM UTC 24 |
Oct 09 08:07:19 PM UTC 24 |
1924675100 ps |
| T565 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_prog_reset.1345726612 |
|
|
Oct 09 08:07:09 PM UTC 24 |
Oct 09 08:07:40 PM UTC 24 |
181986300 ps |
| T566 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_intr_rd_slow_flash.1969907351 |
|
|
Oct 09 08:02:34 PM UTC 24 |
Oct 09 08:07:59 PM UTC 24 |
24322148200 ps |
| T567 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_ro.3474006219 |
|
|
Oct 09 08:05:30 PM UTC 24 |
Oct 09 08:08:03 PM UTC 24 |
753575100 ps |
| T568 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_phy_arb.1349984305 |
|
|
Oct 09 07:56:48 PM UTC 24 |
Oct 09 08:08:09 PM UTC 24 |
726230900 ps |
| T569 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_wo.2933986256 |
|
|
Oct 09 08:05:29 PM UTC 24 |
Oct 09 08:08:13 PM UTC 24 |
8661625300 ps |
| T414 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw_evict.3277551485 |
|
|
Oct 09 08:07:11 PM UTC 24 |
Oct 09 08:08:13 PM UTC 24 |
44063600 ps |
| T570 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw_evict_all_en.169948172 |
|
|
Oct 09 08:07:20 PM UTC 24 |
Oct 09 08:08:20 PM UTC 24 |
30946300 ps |
| T571 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_connect.1872407074 |
|
|
Oct 09 08:08:10 PM UTC 24 |
Oct 09 08:08:30 PM UTC 24 |
14302700 ps |
| T572 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_lcmgr_intg.382235279 |
|
|
Oct 09 08:08:14 PM UTC 24 |
Oct 09 08:08:31 PM UTC 24 |
16168200 ps |
| T573 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_re_evict.2387144757 |
|
|
Oct 09 08:07:41 PM UTC 24 |
Oct 09 08:08:38 PM UTC 24 |
618694700 ps |
| T574 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_read_seed_err.3392979829 |
|
|
Oct 09 08:08:14 PM UTC 24 |
Oct 09 08:08:39 PM UTC 24 |
26504500 ps |
| T575 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_intr_wr.2353306074 |
|
|
Oct 09 08:06:59 PM UTC 24 |
Oct 09 08:08:40 PM UTC 24 |
9194852100 ps |
| T147 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_rand_ops.1477407951 |
|
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Oct 09 07:52:18 PM UTC 24 |
Oct 09 08:08:41 PM UTC 24 |
3213102700 ps |
| T119 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_disable.3718273554 |
|
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Oct 09 08:07:59 PM UTC 24 |
Oct 09 08:08:46 PM UTC 24 |
10293000 ps |
| T576 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_ro_serr.567978844 |
|
|
Oct 09 08:06:08 PM UTC 24 |
Oct 09 08:08:49 PM UTC 24 |
505561700 ps |
| T577 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_alert_test.1389959724 |
|
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Oct 09 08:08:31 PM UTC 24 |
Oct 09 08:09:02 PM UTC 24 |
108082700 ps |
| T578 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_ro_derr.2942641825 |
|
|
Oct 09 08:06:25 PM UTC 24 |
Oct 09 08:09:03 PM UTC 24 |
4918212000 ps |
| T368 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_sec_info_access.1285351161 |
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Oct 09 08:08:04 PM UTC 24 |
Oct 09 08:09:22 PM UTC 24 |
564380900 ps |
| T579 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw_serr.3125870857 |
|
|
Oct 09 08:06:13 PM UTC 24 |
Oct 09 08:09:27 PM UTC 24 |
8133193000 ps |
| T580 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_hw_prog_rma_wipe_err.2776866816 |
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|
Oct 09 08:08:21 PM UTC 24 |
Oct 09 08:09:33 PM UTC 24 |
10045026600 ps |
| T330 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_intr_rd.1021655207 |
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Oct 09 08:06:44 PM UTC 24 |
Oct 09 08:09:47 PM UTC 24 |
631363300 ps |
| T181 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_hw_rma.2376592962 |
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Oct 09 07:33:36 PM UTC 24 |
Oct 09 08:10:03 PM UTC 24 |
340531425600 ps |
| T387 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_hw_rma_reset.794298482 |
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Oct 09 07:52:28 PM UTC 24 |
Oct 09 08:10:15 PM UTC 24 |
110157152400 ps |
| T581 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw_derr.3303714356 |
|
|
Oct 09 08:06:26 PM UTC 24 |
Oct 09 08:10:22 PM UTC 24 |
6089494800 ps |
| T582 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_stress_all.1945396201 |
|
|
Oct 09 07:38:33 PM UTC 24 |
Oct 09 08:10:30 PM UTC 24 |
500770800 ps |
| T583 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_prog_reset.98964901 |
|
|
Oct 09 08:10:04 PM UTC 24 |
Oct 09 08:10:31 PM UTC 24 |
23815500 ps |
| T408 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_rw.529792672 |
|
|
Oct 09 08:01:14 PM UTC 24 |
Oct 09 08:10:38 PM UTC 24 |
14456429400 ps |
| T584 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_invalid_op.4198892393 |
|
|
Oct 09 08:09:02 PM UTC 24 |
Oct 09 08:10:39 PM UTC 24 |
2889548800 ps |
| T585 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_hw_rma_reset.204150996 |
|
|
Oct 09 07:56:51 PM UTC 24 |
Oct 09 08:10:50 PM UTC 24 |
160202125500 ps |
| T195 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/2.flash_ctrl_host_ctrl_arb.2966745914 |
|
|
Oct 09 07:34:06 PM UTC 24 |
Oct 09 08:10:53 PM UTC 24 |
528875090900 ps |
| T586 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_connect.1764821284 |
|
|
Oct 09 08:10:40 PM UTC 24 |
Oct 09 08:11:05 PM UTC 24 |
22435200 ps |
| T587 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_sec_otp.643133393 |
|
|
Oct 09 08:08:41 PM UTC 24 |
Oct 09 08:11:06 PM UTC 24 |
8985654300 ps |
| T120 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_disable.2771304498 |
|
|
Oct 09 08:10:31 PM UTC 24 |
Oct 09 08:11:11 PM UTC 24 |
27325500 ps |
| T588 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_rw_evict.4243441152 |
|
|
Oct 09 08:10:16 PM UTC 24 |
Oct 09 08:11:12 PM UTC 24 |
66081100 ps |
| T589 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_rw_evict_all_en.1709385085 |
|
|
Oct 09 08:10:23 PM UTC 24 |
Oct 09 08:11:14 PM UTC 24 |
43005600 ps |
| T263 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_read_seed_err.2815302385 |
|
|
Oct 09 08:10:54 PM UTC 24 |
Oct 09 08:11:16 PM UTC 24 |
15544000 ps |
| T590 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_re_evict.1529123063 |
|
|
Oct 09 08:10:30 PM UTC 24 |
Oct 09 08:11:17 PM UTC 24 |
99016000 ps |
| T591 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_lcmgr_intg.2414605451 |
|
|
Oct 09 08:10:51 PM UTC 24 |
Oct 09 08:11:19 PM UTC 24 |
38745900 ps |
| T592 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_intr_wr_slow_flash.3754162945 |
|
|
Oct 09 08:07:06 PM UTC 24 |
Oct 09 08:11:21 PM UTC 24 |
73515876100 ps |
| T593 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/6.flash_ctrl_error_prog_win.4021809088 |
|
|
Oct 09 07:52:53 PM UTC 24 |
Oct 09 08:11:30 PM UTC 24 |
1705418400 ps |
| T594 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_ro.1200499928 |
|
|
Oct 09 08:09:23 PM UTC 24 |
Oct 09 08:11:32 PM UTC 24 |
2197429800 ps |
| T595 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_alert_test.856496088 |
|
|
Oct 09 08:11:07 PM UTC 24 |
Oct 09 08:11:34 PM UTC 24 |
36800900 ps |
| T596 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_phy_arb.2798235166 |
|
|
Oct 09 08:00:24 PM UTC 24 |
Oct 09 08:11:50 PM UTC 24 |
775431500 ps |
| T310 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_mp_regions.3442756197 |
|
|
Oct 09 08:08:50 PM UTC 24 |
Oct 09 08:11:59 PM UTC 24 |
4553864100 ps |
| T597 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_sec_otp.3404758186 |
|
|
Oct 09 08:11:17 PM UTC 24 |
Oct 09 08:12:08 PM UTC 24 |
3544091100 ps |
| T598 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_wo.368489878 |
|
|
Oct 09 08:09:04 PM UTC 24 |
Oct 09 08:12:11 PM UTC 24 |
13192478800 ps |
| T599 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_smoke.3182406063 |
|
|
Oct 09 08:08:32 PM UTC 24 |
Oct 09 08:12:13 PM UTC 24 |
178508800 ps |
| T326 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_intr_rd_slow_flash.3368209701 |
|
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Oct 09 08:07:00 PM UTC 24 |
Oct 09 08:12:17 PM UTC 24 |
49104374300 ps |
| T369 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_sec_info_access.1370456723 |
|
|
Oct 09 08:10:39 PM UTC 24 |
Oct 09 08:12:21 PM UTC 24 |
1135014600 ps |
| T600 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_otp_reset.3205998891 |
|
|
Oct 09 08:08:47 PM UTC 24 |
Oct 09 08:12:25 PM UTC 24 |
42202600 ps |
| T601 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_hw_prog_rma_wipe_err.2817618528 |
|
|
Oct 09 08:11:06 PM UTC 24 |
Oct 09 08:12:25 PM UTC 24 |
10018569900 ps |
| T602 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_invalid_op.2391512639 |
|
|
Oct 09 08:11:31 PM UTC 24 |
Oct 09 08:12:55 PM UTC 24 |
1576711300 ps |
| T332 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_intr_rd.1571448734 |
|
|
Oct 09 08:09:34 PM UTC 24 |
Oct 09 08:12:56 PM UTC 24 |
4882003600 ps |
| T603 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rw_evict.1870979275 |
|
|
Oct 09 08:12:14 PM UTC 24 |
Oct 09 08:13:07 PM UTC 24 |
33380100 ps |
| T604 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rand_ops.745825049 |
|
|
Oct 09 08:04:16 PM UTC 24 |
Oct 09 08:13:09 PM UTC 24 |
253079300 ps |
| T605 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_rw_evict_all_en.1116056570 |
|
|
Oct 09 08:12:18 PM UTC 24 |
Oct 09 08:13:11 PM UTC 24 |
75705300 ps |
| T606 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/5.flash_ctrl_error_prog_win.2944497159 |
|
|
Oct 09 07:48:51 PM UTC 24 |
Oct 09 08:13:12 PM UTC 24 |
1345492100 ps |
| T607 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_disable.1759953475 |
|
|
Oct 09 08:12:26 PM UTC 24 |
Oct 09 08:13:14 PM UTC 24 |
10700400 ps |
| T608 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_connect.3073580552 |
|
|
Oct 09 08:12:56 PM UTC 24 |
Oct 09 08:13:20 PM UTC 24 |
26296900 ps |
| T609 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_lcmgr_intg.1337702563 |
|
|
Oct 09 08:12:57 PM UTC 24 |
Oct 09 08:13:23 PM UTC 24 |
79906600 ps |
| T610 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_rw.4000470521 |
|
|
Oct 09 08:05:38 PM UTC 24 |
Oct 09 08:13:25 PM UTC 24 |
2967731800 ps |
| T611 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_read_seed_err.3079738501 |
|
|
Oct 09 08:13:08 PM UTC 24 |
Oct 09 08:13:30 PM UTC 24 |
32966700 ps |
| T612 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_re_evict.172372959 |
|
|
Oct 09 08:12:22 PM UTC 24 |
Oct 09 08:13:34 PM UTC 24 |
103315100 ps |
| T613 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/4.flash_ctrl_stress_all.878260839 |
|
|
Oct 09 07:47:42 PM UTC 24 |
Oct 09 08:13:35 PM UTC 24 |
436005400 ps |
| T614 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_ro.2920208028 |
|
|
Oct 09 08:11:35 PM UTC 24 |
Oct 09 08:13:35 PM UTC 24 |
657275700 ps |
| T615 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_alert_test.1214718864 |
|
|
Oct 09 08:13:12 PM UTC 24 |
Oct 09 08:13:40 PM UTC 24 |
98200000 ps |
| T616 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_sec_info_access.845427211 |
|
|
Oct 09 08:12:26 PM UTC 24 |
Oct 09 08:14:08 PM UTC 24 |
16285410500 ps |
| T617 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_sec_otp.2318224720 |
|
|
Oct 09 08:13:24 PM UTC 24 |
Oct 09 08:14:09 PM UTC 24 |
1970160900 ps |
| T618 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_phy_arb.1909976795 |
|
|
Oct 09 08:11:15 PM UTC 24 |
Oct 09 08:14:18 PM UTC 24 |
3074209800 ps |
| T331 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_intr_rd.2884263245 |
|
|
Oct 09 08:12:00 PM UTC 24 |
Oct 09 08:14:20 PM UTC 24 |
782013400 ps |
| T619 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_prog_reset.668910917 |
|
|
Oct 09 08:12:12 PM UTC 24 |
Oct 09 08:14:27 PM UTC 24 |
16023283100 ps |
| T620 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_wo.3573517236 |
|
|
Oct 09 08:11:34 PM UTC 24 |
Oct 09 08:14:35 PM UTC 24 |
1813354200 ps |
| T621 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_intr_rd_slow_flash.679819275 |
|
|
Oct 09 08:09:48 PM UTC 24 |
Oct 09 08:14:37 PM UTC 24 |
25244861800 ps |
| T160 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_otp_reset.3763579450 |
|
|
Oct 09 08:11:19 PM UTC 24 |
Oct 09 08:14:52 PM UTC 24 |
143419900 ps |
| T622 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_phy_arb.481848008 |
|
|
Oct 09 08:13:22 PM UTC 24 |
Oct 09 08:15:07 PM UTC 24 |
46896900 ps |
| T623 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rw_evict.3998922544 |
|
|
Oct 09 08:14:28 PM UTC 24 |
Oct 09 08:15:11 PM UTC 24 |
28073200 ps |
| T624 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_invalid_op.2977226243 |
|
|
Oct 09 08:13:35 PM UTC 24 |
Oct 09 08:15:14 PM UTC 24 |
15216985200 ps |
| T625 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_intr_rd_slow_flash.1595737568 |
|
|
Oct 09 08:12:09 PM UTC 24 |
Oct 09 08:15:18 PM UTC 24 |
12829301800 ps |
| T406 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_rw_evict_all_en.2448742554 |
|
|
Oct 09 08:14:35 PM UTC 24 |
Oct 09 08:15:28 PM UTC 24 |
112912600 ps |
| T388 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/8.flash_ctrl_hw_rma_reset.3585446317 |
|
|
Oct 09 08:00:28 PM UTC 24 |
Oct 09 08:15:30 PM UTC 24 |
120148285200 ps |
| T626 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_ro.980934896 |
|
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Oct 09 08:13:41 PM UTC 24 |
Oct 09 08:15:34 PM UTC 24 |
462740200 ps |
| T627 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_re_evict.3903418357 |
|
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Oct 09 08:14:37 PM UTC 24 |
Oct 09 08:15:35 PM UTC 24 |
205467800 ps |
| T628 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_connect.1171533180 |
|
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Oct 09 08:15:12 PM UTC 24 |
Oct 09 08:15:36 PM UTC 24 |
17197900 ps |
| T121 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_disable.3625139749 |
|
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Oct 09 08:14:53 PM UTC 24 |
Oct 09 08:15:40 PM UTC 24 |
16253500 ps |
| T148 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_rand_ops.1557404835 |
|
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Oct 09 07:56:40 PM UTC 24 |
Oct 09 08:15:42 PM UTC 24 |
1454394000 ps |
| T629 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_lcmgr_intg.2058303248 |
|
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Oct 09 08:15:15 PM UTC 24 |
Oct 09 08:15:42 PM UTC 24 |
55695700 ps |
| T630 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_smoke.1941687191 |
|
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Oct 09 08:13:12 PM UTC 24 |
Oct 09 08:15:43 PM UTC 24 |
66779800 ps |
| T631 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_hw_read_seed_err.3162853846 |
|
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Oct 09 08:15:19 PM UTC 24 |
Oct 09 08:15:46 PM UTC 24 |
181079200 ps |
| T632 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_alert_test.1577578436 |
|
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Oct 09 08:15:30 PM UTC 24 |
Oct 09 08:15:56 PM UTC 24 |
37694400 ps |
| T633 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/9.flash_ctrl_phy_arb.3018812252 |
|
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Oct 09 08:04:20 PM UTC 24 |
Oct 09 08:16:07 PM UTC 24 |
5771380700 ps |
| T306 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_wo.2942176769 |
|
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Oct 09 08:13:36 PM UTC 24 |
Oct 09 08:16:10 PM UTC 24 |
3293324000 ps |
| T105 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_hw_prog_rma_wipe_err.3524004431 |
|
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Oct 09 08:13:09 PM UTC 24 |
Oct 09 08:16:12 PM UTC 24 |
10018990500 ps |
| T634 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/11.flash_ctrl_smoke.301601235 |
|
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Oct 09 08:11:13 PM UTC 24 |
Oct 09 08:16:22 PM UTC 24 |
93040000 ps |
| T336 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_intr_rd.2644550364 |
|
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Oct 09 08:14:10 PM UTC 24 |
Oct 09 08:16:33 PM UTC 24 |
1528302500 ps |
| T635 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_smoke.3182759413 |
|
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Oct 09 08:15:36 PM UTC 24 |
Oct 09 08:16:42 PM UTC 24 |
30124500 ps |
| T636 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/7.flash_ctrl_error_prog_win.1466486655 |
|
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Oct 09 07:57:09 PM UTC 24 |
Oct 09 08:16:43 PM UTC 24 |
893969900 ps |
| T176 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_otp_reset.592421334 |
|
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Oct 09 08:13:31 PM UTC 24 |
Oct 09 08:16:48 PM UTC 24 |
180351900 ps |
| T637 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_prog_reset.1285441383 |
|
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Oct 09 08:16:34 PM UTC 24 |
Oct 09 08:16:51 PM UTC 24 |
115568000 ps |
| T638 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_sec_info_access.1071007876 |
|
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Oct 09 08:15:08 PM UTC 24 |
Oct 09 08:16:57 PM UTC 24 |
6416878400 ps |
| T639 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/10.flash_ctrl_phy_arb.2991602665 |
|
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Oct 09 08:08:40 PM UTC 24 |
Oct 09 08:16:59 PM UTC 24 |
2897782600 ps |
| T640 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_hw_sec_otp.1248008357 |
|
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Oct 09 08:15:42 PM UTC 24 |
Oct 09 08:17:08 PM UTC 24 |
1987293600 ps |
| T423 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_rw_evict_all_en.2610065305 |
|
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Oct 09 08:16:44 PM UTC 24 |
Oct 09 08:17:20 PM UTC 24 |
66541500 ps |
| T641 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_connect.493503862 |
|
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Oct 09 08:17:00 PM UTC 24 |
Oct 09 08:17:23 PM UTC 24 |
63859400 ps |
| T642 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_invalid_op.3800015806 |
|
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Oct 09 08:15:47 PM UTC 24 |
Oct 09 08:17:25 PM UTC 24 |
1528697100 ps |
| T358 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_disable.1509426891 |
|
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Oct 09 08:16:52 PM UTC 24 |
Oct 09 08:17:27 PM UTC 24 |
10865800 ps |
| T643 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/12.flash_ctrl_prog_reset.3323613529 |
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Oct 09 08:14:21 PM UTC 24 |
Oct 09 08:17:32 PM UTC 24 |
2021934900 ps |
| T644 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_lcmgr_intg.3083636528 |
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Oct 09 08:17:09 PM UTC 24 |
Oct 09 08:17:37 PM UTC 24 |
47454000 ps |
| T149 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/0.flash_ctrl_full_mem_access.2199420293 |
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Oct 09 07:07:06 PM UTC 24 |
Oct 09 08:17:42 PM UTC 24 |
99781445700 ps |
| T645 |
/workspaces/repo/scratch/os_regression_2024_10_08/flash_ctrl-sim-vcs/coverage/default/13.flash_ctrl_re_evict.3125443196 |
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Oct 09 08:16:50 PM UTC 24 |
Oct 09 08:17:44 PM UTC 24 |
139638400 ps |